bs3-cpu-instr-4-template.mac@ 107231

Last change on this file since 107231 was 107231, checked in by vboxsync, 5 months ago

ValidationKit/bootsectors: split bs3-cpu-instr-4 in two; bugref:10658; jiraref:VBP-1209

Adding the cmp[ps][sd] series of instructions makes bs3-cpu-instr-4
too big to fit in a single floppy image; so split it into two images.

add bs3-cpu-instr-5 boot image
put about half the Stuff in it
cleanups noticed along the way
noted, but not doing anything about it: bs3-cpu-instr-4 (nor 5, obviously) not mentioned in tdCpuIemInstr1.py

Property svn:eol-style set to native
Property svn:keywords set to Author Date Id Revision

File size: 81.3 KB

Line
1	; $Id: bs3-cpu-instr-4-template.mac 107231 2024-12-05 07:27:26Z vboxsync $
2	;; @file
3	; BS3Kit - bs3-cpu-instr-4 & bs3-cpu-instr-5 - SSE, AVX FPU instructions, assembly template.
4	;
5
6	;
7	; Copyright (C) 2024 Oracle and/or its affiliates.
8	;
9	; This file is part of VirtualBox base platform packages, as
10	; available from https://www.virtualbox.org.
11	;
12	; This program is free software; you can redistribute it and/or
13	; modify it under the terms of the GNU General Public License
14	; as published by the Free Software Foundation, in version 3 of the
15	; License.
16	;
17	; This program is distributed in the hope that it will be useful, but
18	; WITHOUT ANY WARRANTY; without even the implied warranty of
19	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	; General Public License for more details.
21	;
22	; You should have received a copy of the GNU General Public License
23	; along with this program; if not, see <https://www.gnu.org/licenses>.
24	;
25	; The contents of this file may alternatively be used under the terms
26	; of the Common Development and Distribution License Version 1.0
27	; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28	; in the VirtualBox distribution, in which case the provisions of the
29	; CDDL are applicable instead of those of the GPL.
30	;
31	; You may elect to license modified versions of this file under the
32	; terms and conditions of either the GPL or the CDDL or both.
33	;
34	; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35	;
36
37
38	;*********************************************************************************************************************************
39	;* Header Files *
40	;*********************************************************************************************************************************
41	%include "bs3kit-template-header.mac" ; setup environment
42
43
44	;*********************************************************************************************************************************
45	;* External Symbols *
46	;*********************************************************************************************************************************
47	TMPL_BEGIN_TEXT
48
49
50	;
51	; Test code snippets containing code which differs between 16-bit, 32-bit
52	; and 64-bit CPUs modes.
53	;
54	%ifdef BS3_INSTANTIATING_CMN
55
56
57	;;
58	; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
59	; with an instruction length byte.
60	;
61	; ASSUMES the length is between the start of the function and the .again label.
62	;
63	%ifndef BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
64	%define BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
65	%macro BS3CPUINSTR4_PROC_BEGIN_CMN 1
66	align 8, db 0cch
67	db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
68	BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
69	%endmacro
70	%endif ; !BS3CPUINSTR4_PROC_BEGIN_CMN_DEFINED
71
72	;;
73	; FSxBX and its variants allow a memory reference to be embedded into a test
74	; instruction. `xBX' adjusts automatically to the addressing model: BX, EBX,
75	; or RBX depending on the number of address bits. FSxBX_D and so on allow to
76	; force a particular memory reference size; this is necessary for some AVX
77	; instructions where the mentioned XMM/YMM/ZMM register size doesn't fully
78	; control the memory size to be used. Macros are repeatedly redefined in
79	; order to pick up the current address-model-specific `xBX' value. (Other
80	; sizes could be defined: B=byte=1, W=word=2, T=tword=10(x87), z=zword=32)
81	;
82	%ifndef BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
83	%define BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
84	%macro BS3CPUINSTR4_DEFINE_FSxBX 0
85	%define FSxBX [fs:xBX] ; natural size of the instruction
86	%define FSxBX_D dword [fs:xBX] ; dword = 32 bits = 4 bytes = 2 words
87	%define FSxBX_Q qword [fs:xBX] ; qword = 64 bits = 8 bytes = 4 words
88	%define FSxBX_O oword [fs:xBX] ; oword = 128 bits = 16 bytes = 8 words
89	%define FSxBX_Y yword [fs:xBX] ; yword = 256 bits = 32 bytes = 16 words
90	%endmacro
91	%macro BS3CPUINSTR4_UNDEF_FSxBX 0
92	%undef FSxBX
93	%undef FSxBX_D
94	%undef FSxBX_Q
95	%undef FSxBX_O
96	%undef FSxBX_Y
97	%endmacro
98	%endif ; !BS3CPUINSTR4_DEFINE_FSxBX_DEFINED
99
100	;;
101	; The EMIT_INSTR_PLUS_ICEBP macros is for creating a common function for and
102	; named after a single instruction & args, followed by a looping ICEBP.
103	;
104	%ifndef EMIT_INSTR_PLUS_ICEBP_DEFINED
105	%define EMIT_INSTR_PLUS_ICEBP_DEFINED
106
107	%macro EMIT_INSTR_PLUS_ICEBP 2
108	BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
109	BS3CPUINSTR4_DEFINE_FSxBX
110	%1 %2
111	BS3CPUINSTR4_UNDEF_FSxBX
112	.again:
113	icebp
114	jmp .again
115	BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _icebp
116	%endmacro
117
118	%macro EMIT_INSTR_PLUS_ICEBP 3
119	BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
120	BS3CPUINSTR4_DEFINE_FSxBX
121	%1 %2, %3
122	BS3CPUINSTR4_UNDEF_FSxBX
123	.again:
124	icebp
125	jmp .again
126	BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _icebp
127	%endmacro
128
129	%macro EMIT_INSTR_PLUS_ICEBP 4
130	BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
131	BS3CPUINSTR4_DEFINE_FSxBX
132	%1 %2, %3, %4
133	BS3CPUINSTR4_UNDEF_FSxBX
134	.again:
135	icebp
136	jmp .again
137	BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _icebp
138	%endmacro
139
140	%macro EMIT_INSTR_PLUS_ICEBP 5
141	BS3CPUINSTR4_PROC_BEGIN_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
142	BS3CPUINSTR4_DEFINE_FSxBX
143	%1 %2, %3, %4, %5
144	BS3CPUINSTR4_UNDEF_FSxBX
145	.again:
146	icebp
147	jmp .again
148	BS3_PROC_END_CMN bs3CpuInstr4_ %+ %1 %+ _ %+ %2 %+ _ %+ %3 %+ _ %+ %4 %+ _ %+ %5 %+ _icebp
149	%endmacro
150
151	%macro EMIT_INSTR_PLUS_ICEBP_C64 2
152	%if TMPL_BITS == 64
153	EMIT_INSTR_PLUS_ICEBP %1, %2
154	%endif
155	%endmacro
156
157	%macro EMIT_INSTR_PLUS_ICEBP_C64 3
158	%if TMPL_BITS == 64
159	EMIT_INSTR_PLUS_ICEBP %1, %2, %3
160	%endif
161	%endmacro
162
163	%macro EMIT_INSTR_PLUS_ICEBP_C64 4
164	%if TMPL_BITS == 64
165	EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4
166	%endif
167	%endmacro
168
169	%macro EMIT_INSTR_PLUS_ICEBP_C64 5
170	%if TMPL_BITS == 64
171	EMIT_INSTR_PLUS_ICEBP %1, %2, %3, %4, %5
172	%endif
173	%endmacro
174
175	%endif ; !EMIT_INSTR_PLUS_ICEBP_DEFINED
176
177	%ifdef BS3_CPU_INSTR_4
178
179	;
180	;; [v]addps
181	;
182	EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM2
183	EMIT_INSTR_PLUS_ICEBP addps, XMM1, FSxBX
184	EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM9
185	EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, FSxBX
186
187	EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, XMM3
188	EMIT_INSTR_PLUS_ICEBP vaddps, XMM1, XMM2, FSxBX
189	EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, XMM10
190	EMIT_INSTR_PLUS_ICEBP_C64 vaddps, XMM8, XMM9, FSxBX
191
192	EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, YMM3
193	EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM2, FSxBX
194	EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, YMM10
195	EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM9, FSxBX
196
197	EMIT_INSTR_PLUS_ICEBP addps, XMM1, XMM1
198	EMIT_INSTR_PLUS_ICEBP_C64 addps, XMM8, XMM8
199	EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, YMM1
200	EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, YMM2
201	EMIT_INSTR_PLUS_ICEBP_C64 vaddps, YMM8, YMM8, YMM8
202	EMIT_INSTR_PLUS_ICEBP vaddps, YMM1, YMM1, FSxBX
203
204	;
205	;; [v]addpd
206	;
207	EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM2
208	EMIT_INSTR_PLUS_ICEBP addpd, XMM1, FSxBX
209	EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM9
210	EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, FSxBX
211
212	EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, XMM3
213	EMIT_INSTR_PLUS_ICEBP vaddpd, XMM1, XMM2, FSxBX
214	EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, XMM10
215	EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, XMM8, XMM9, FSxBX
216
217	EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, YMM3
218	EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM2, FSxBX
219	EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, YMM10
220	EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM9, FSxBX
221
222	EMIT_INSTR_PLUS_ICEBP addpd, XMM1, XMM1
223	EMIT_INSTR_PLUS_ICEBP_C64 addpd, XMM8, XMM8
224	EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, YMM1
225	EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, YMM2
226	EMIT_INSTR_PLUS_ICEBP_C64 vaddpd, YMM8, YMM8, YMM8
227	EMIT_INSTR_PLUS_ICEBP vaddpd, YMM1, YMM1, FSxBX
228
229	;
230	;; [v]addss
231	;
232	EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM2
233	EMIT_INSTR_PLUS_ICEBP addss, XMM1, FSxBX
234	EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM9
235	EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, FSxBX
236
237	EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, XMM3
238	EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM2, FSxBX
239	EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, XMM10
240	EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM9, FSxBX
241
242	EMIT_INSTR_PLUS_ICEBP addss, XMM1, XMM1
243	EMIT_INSTR_PLUS_ICEBP_C64 addss, XMM8, XMM8
244	EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, XMM1
245	EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, XMM2
246	EMIT_INSTR_PLUS_ICEBP_C64 vaddss, XMM8, XMM8, XMM8
247	EMIT_INSTR_PLUS_ICEBP vaddss, XMM1, XMM1, FSxBX
248
249	;
250	;; [v]addsd
251	;
252	EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM2
253	EMIT_INSTR_PLUS_ICEBP addsd, XMM1, FSxBX
254	EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM9
255	EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, FSxBX
256
257	EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, XMM3
258	EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM2, FSxBX
259	EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, XMM10
260	EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM9, FSxBX
261
262	EMIT_INSTR_PLUS_ICEBP addsd, XMM1, XMM1
263	EMIT_INSTR_PLUS_ICEBP_C64 addsd, XMM8, XMM8
264	EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, XMM1
265	EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, XMM2
266	EMIT_INSTR_PLUS_ICEBP_C64 vaddsd, XMM8, XMM8, XMM8
267	EMIT_INSTR_PLUS_ICEBP vaddsd, XMM1, XMM1, FSxBX
268
269	;
270	;; [v]haddps
271	;
272	EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM2
273	EMIT_INSTR_PLUS_ICEBP haddps, XMM1, FSxBX
274	EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM9
275	EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, FSxBX
276
277	EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, XMM3
278	EMIT_INSTR_PLUS_ICEBP vhaddps, XMM1, XMM2, FSxBX
279	EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, XMM10
280	EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, XMM8, XMM9, FSxBX
281
282	EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, YMM3
283	EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM2, FSxBX
284	EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, YMM10
285	EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM9, FSxBX
286
287	EMIT_INSTR_PLUS_ICEBP haddps, XMM1, XMM1
288	EMIT_INSTR_PLUS_ICEBP_C64 haddps, XMM8, XMM8
289	EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, YMM1
290	EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, YMM2
291	EMIT_INSTR_PLUS_ICEBP_C64 vhaddps, YMM8, YMM8, YMM8
292	EMIT_INSTR_PLUS_ICEBP vhaddps, YMM1, YMM1, FSxBX
293
294	;
295	;; [v]haddpd
296	;
297	EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM2
298	EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, FSxBX
299	EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM9
300	EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, FSxBX
301
302	EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, XMM3
303	EMIT_INSTR_PLUS_ICEBP vhaddpd, XMM1, XMM2, FSxBX
304	EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, XMM10
305	EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, XMM8, XMM9, FSxBX
306
307	EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, YMM3
308	EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM2, FSxBX
309	EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, YMM10
310	EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM9, FSxBX
311
312	EMIT_INSTR_PLUS_ICEBP haddpd, XMM1, XMM1
313	EMIT_INSTR_PLUS_ICEBP_C64 haddpd, XMM8, XMM8
314	EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, YMM1
315	EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, YMM2
316	EMIT_INSTR_PLUS_ICEBP_C64 vhaddpd, YMM8, YMM8, YMM8
317	EMIT_INSTR_PLUS_ICEBP vhaddpd, YMM1, YMM1, FSxBX
318
319	;
320	;; [v]subps
321	;
322	EMIT_INSTR_PLUS_ICEBP subps, XMM1, XMM2
323	EMIT_INSTR_PLUS_ICEBP subps, XMM1, FSxBX
324	EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, XMM9
325	EMIT_INSTR_PLUS_ICEBP_C64 subps, XMM8, FSxBX
326
327	EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, XMM3
328	EMIT_INSTR_PLUS_ICEBP vsubps, XMM1, XMM2, FSxBX
329	EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, XMM10
330	EMIT_INSTR_PLUS_ICEBP_C64 vsubps, XMM8, XMM9, FSxBX
331
332	EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, YMM3
333	EMIT_INSTR_PLUS_ICEBP vsubps, YMM1, YMM2, FSxBX
334	EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, YMM10
335	EMIT_INSTR_PLUS_ICEBP_C64 vsubps, YMM8, YMM9, FSxBX
336
337	;
338	;; [v]subpd
339	;
340	EMIT_INSTR_PLUS_ICEBP subpd, XMM1, XMM2
341	EMIT_INSTR_PLUS_ICEBP subpd, XMM1, FSxBX
342	EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, XMM9
343	EMIT_INSTR_PLUS_ICEBP_C64 subpd, XMM8, FSxBX
344
345	EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, XMM3
346	EMIT_INSTR_PLUS_ICEBP vsubpd, XMM1, XMM2, FSxBX
347	EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, XMM10
348	EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, XMM8, XMM9, FSxBX
349
350	EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, YMM3
351	EMIT_INSTR_PLUS_ICEBP vsubpd, YMM1, YMM2, FSxBX
352	EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, YMM10
353	EMIT_INSTR_PLUS_ICEBP_C64 vsubpd, YMM8, YMM9, FSxBX
354
355	;
356	;; [v]subss
357	;
358	EMIT_INSTR_PLUS_ICEBP subss, XMM1, XMM2
359	EMIT_INSTR_PLUS_ICEBP subss, XMM1, FSxBX
360	EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, XMM9
361	EMIT_INSTR_PLUS_ICEBP_C64 subss, XMM8, FSxBX
362
363	EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, XMM3
364	EMIT_INSTR_PLUS_ICEBP vsubss, XMM1, XMM2, FSxBX
365	EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, XMM10
366	EMIT_INSTR_PLUS_ICEBP_C64 vsubss, XMM8, XMM9, FSxBX
367
368	;
369	;; [v]subsd
370	;
371	EMIT_INSTR_PLUS_ICEBP subsd, XMM1, XMM2
372	EMIT_INSTR_PLUS_ICEBP subsd, XMM1, FSxBX
373	EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, XMM9
374	EMIT_INSTR_PLUS_ICEBP_C64 subsd, XMM8, FSxBX
375
376	EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, XMM3
377	EMIT_INSTR_PLUS_ICEBP vsubsd, XMM1, XMM2, FSxBX
378	EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, XMM10
379	EMIT_INSTR_PLUS_ICEBP_C64 vsubsd, XMM8, XMM9, FSxBX
380
381	;
382	;; [v]hsubps
383	;
384	EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, XMM2
385	EMIT_INSTR_PLUS_ICEBP hsubps, XMM1, FSxBX
386	EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, XMM9
387	EMIT_INSTR_PLUS_ICEBP_C64 hsubps, XMM8, FSxBX
388
389	EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, XMM3
390	EMIT_INSTR_PLUS_ICEBP vhsubps, XMM1, XMM2, FSxBX
391	EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, XMM10
392	EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, XMM8, XMM9, FSxBX
393
394	EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, YMM3
395	EMIT_INSTR_PLUS_ICEBP vhsubps, YMM1, YMM2, FSxBX
396	EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, YMM10
397	EMIT_INSTR_PLUS_ICEBP_C64 vhsubps, YMM8, YMM9, FSxBX
398
399	;
400	;; [v]hsubpd
401	;
402	EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, XMM2
403	EMIT_INSTR_PLUS_ICEBP hsubpd, XMM1, FSxBX
404	EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, XMM9
405	EMIT_INSTR_PLUS_ICEBP_C64 hsubpd, XMM8, FSxBX
406
407	EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, XMM3
408	EMIT_INSTR_PLUS_ICEBP vhsubpd, XMM1, XMM2, FSxBX
409	EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, XMM10
410	EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, XMM8, XMM9, FSxBX
411
412	EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, YMM3
413	EMIT_INSTR_PLUS_ICEBP vhsubpd, YMM1, YMM2, FSxBX
414	EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, YMM10
415	EMIT_INSTR_PLUS_ICEBP_C64 vhsubpd, YMM8, YMM9, FSxBX
416
417	;
418	;; [v]mulps
419	;
420	EMIT_INSTR_PLUS_ICEBP mulps, XMM1, XMM2
421	EMIT_INSTR_PLUS_ICEBP mulps, XMM1, FSxBX
422	EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, XMM9
423	EMIT_INSTR_PLUS_ICEBP_C64 mulps, XMM8, FSxBX
424
425	EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, XMM3
426	EMIT_INSTR_PLUS_ICEBP vmulps, XMM1, XMM2, FSxBX
427	EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, XMM10
428	EMIT_INSTR_PLUS_ICEBP_C64 vmulps, XMM8, XMM9, FSxBX
429
430	EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, YMM3
431	EMIT_INSTR_PLUS_ICEBP vmulps, YMM1, YMM2, FSxBX
432	EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, YMM10
433	EMIT_INSTR_PLUS_ICEBP_C64 vmulps, YMM8, YMM9, FSxBX
434
435	;
436	;; [v]mulpd
437	;
438	EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, XMM2
439	EMIT_INSTR_PLUS_ICEBP mulpd, XMM1, FSxBX
440	EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, XMM9
441	EMIT_INSTR_PLUS_ICEBP_C64 mulpd, XMM8, FSxBX
442
443	EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, XMM3
444	EMIT_INSTR_PLUS_ICEBP vmulpd, XMM1, XMM2, FSxBX
445	EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, XMM10
446	EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, XMM8, XMM9, FSxBX
447
448	EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, YMM3
449	EMIT_INSTR_PLUS_ICEBP vmulpd, YMM1, YMM2, FSxBX
450	EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, YMM10
451	EMIT_INSTR_PLUS_ICEBP_C64 vmulpd, YMM8, YMM9, FSxBX
452
453	;
454	;; [v]mulss
455	;
456	EMIT_INSTR_PLUS_ICEBP mulss, XMM1, XMM2
457	EMIT_INSTR_PLUS_ICEBP mulss, XMM1, FSxBX
458	EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, XMM9
459	EMIT_INSTR_PLUS_ICEBP_C64 mulss, XMM8, FSxBX
460
461	EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, XMM3
462	EMIT_INSTR_PLUS_ICEBP vmulss, XMM1, XMM2, FSxBX
463	EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, XMM10
464	EMIT_INSTR_PLUS_ICEBP_C64 vmulss, XMM8, XMM9, FSxBX
465
466	;
467	;; [v]mulsd
468	;
469	EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, XMM2
470	EMIT_INSTR_PLUS_ICEBP mulsd, XMM1, FSxBX
471	EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, XMM9
472	EMIT_INSTR_PLUS_ICEBP_C64 mulsd, XMM8, FSxBX
473
474	EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, XMM3
475	EMIT_INSTR_PLUS_ICEBP vmulsd, XMM1, XMM2, FSxBX
476	EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, XMM10
477	EMIT_INSTR_PLUS_ICEBP_C64 vmulsd, XMM8, XMM9, FSxBX
478
479	;
480	;; [v]divps
481	;
482	EMIT_INSTR_PLUS_ICEBP divps, XMM1, XMM2
483	EMIT_INSTR_PLUS_ICEBP divps, XMM1, FSxBX
484	EMIT_INSTR_PLUS_ICEBP_C64 divps, XMM8, XMM9
485	EMIT_INSTR_PLUS_ICEBP_C64 divps, XMM8, FSxBX
486
487	EMIT_INSTR_PLUS_ICEBP vdivps, XMM1, XMM2, XMM3
488	EMIT_INSTR_PLUS_ICEBP vdivps, XMM1, XMM2, FSxBX
489	EMIT_INSTR_PLUS_ICEBP_C64 vdivps, XMM8, XMM9, XMM10
490	EMIT_INSTR_PLUS_ICEBP_C64 vdivps, XMM8, XMM9, FSxBX
491
492	EMIT_INSTR_PLUS_ICEBP vdivps, YMM1, YMM2, YMM3
493	EMIT_INSTR_PLUS_ICEBP vdivps, YMM1, YMM2, FSxBX
494	EMIT_INSTR_PLUS_ICEBP_C64 vdivps, YMM8, YMM9, YMM10
495	EMIT_INSTR_PLUS_ICEBP_C64 vdivps, YMM8, YMM9, FSxBX
496
497	;
498	;; [v]divpd
499	;
500	EMIT_INSTR_PLUS_ICEBP divpd, XMM1, XMM2
501	EMIT_INSTR_PLUS_ICEBP divpd, XMM1, FSxBX
502	EMIT_INSTR_PLUS_ICEBP_C64 divpd, XMM8, XMM9
503	EMIT_INSTR_PLUS_ICEBP_C64 divpd, XMM8, FSxBX
504
505	EMIT_INSTR_PLUS_ICEBP vdivpd, XMM1, XMM2, XMM3
506	EMIT_INSTR_PLUS_ICEBP vdivpd, XMM1, XMM2, FSxBX
507	EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, XMM8, XMM9, XMM10
508	EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, XMM8, XMM9, FSxBX
509
510	EMIT_INSTR_PLUS_ICEBP vdivpd, YMM1, YMM2, YMM3
511	EMIT_INSTR_PLUS_ICEBP vdivpd, YMM1, YMM2, FSxBX
512	EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, YMM8, YMM9, YMM10
513	EMIT_INSTR_PLUS_ICEBP_C64 vdivpd, YMM8, YMM9, FSxBX
514
515	;
516	;; [v]divss
517	;
518	EMIT_INSTR_PLUS_ICEBP divss, XMM1, XMM2
519	EMIT_INSTR_PLUS_ICEBP divss, XMM1, FSxBX
520	EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, XMM9
521	EMIT_INSTR_PLUS_ICEBP_C64 divss, XMM8, FSxBX
522
523	EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, XMM3
524	EMIT_INSTR_PLUS_ICEBP vdivss, XMM1, XMM2, FSxBX
525	EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, XMM10
526	EMIT_INSTR_PLUS_ICEBP_C64 vdivss, XMM8, XMM9, FSxBX
527
528	;
529	;; [v]divsd
530	;
531	EMIT_INSTR_PLUS_ICEBP divsd, XMM1, XMM2
532	EMIT_INSTR_PLUS_ICEBP divsd, XMM1, FSxBX
533	EMIT_INSTR_PLUS_ICEBP_C64 divsd, XMM8, XMM9
534	EMIT_INSTR_PLUS_ICEBP_C64 divsd, XMM8, FSxBX
535
536	EMIT_INSTR_PLUS_ICEBP vdivsd, XMM1, XMM2, XMM3
537	EMIT_INSTR_PLUS_ICEBP vdivsd, XMM1, XMM2, FSxBX
538	EMIT_INSTR_PLUS_ICEBP_C64 vdivsd, XMM8, XMM9, XMM10
539	EMIT_INSTR_PLUS_ICEBP_C64 vdivsd, XMM8, XMM9, FSxBX
540
541	;
542	;; [v]addsubps
543	;
544	EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, XMM2
545	EMIT_INSTR_PLUS_ICEBP addsubps, XMM1, FSxBX
546	EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, XMM9
547	EMIT_INSTR_PLUS_ICEBP_C64 addsubps, XMM8, FSxBX
548
549	EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, XMM3
550	EMIT_INSTR_PLUS_ICEBP vaddsubps, XMM1, XMM2, FSxBX
551	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, XMM10
552	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, XMM8, XMM9, FSxBX
553
554	EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, YMM3
555	EMIT_INSTR_PLUS_ICEBP vaddsubps, YMM1, YMM2, FSxBX
556	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, YMM15
557	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubps, YMM13, YMM14, FSxBX
558
559	;
560	;; [v]addsubpd
561	;
562	EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, XMM2
563	EMIT_INSTR_PLUS_ICEBP addsubpd, XMM1, FSxBX
564	EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, XMM9
565	EMIT_INSTR_PLUS_ICEBP_C64 addsubpd, XMM8, FSxBX
566
567	EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, XMM3
568	EMIT_INSTR_PLUS_ICEBP vaddsubpd, XMM1, XMM2, FSxBX
569	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, XMM10
570	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, XMM8, XMM9, FSxBX
571
572	EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, YMM3
573	EMIT_INSTR_PLUS_ICEBP vaddsubpd, YMM1, YMM2, FSxBX
574	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, YMM15
575	EMIT_INSTR_PLUS_ICEBP_C64 vaddsubpd, YMM13, YMM14, FSxBX
576
577	;
578	;; [v]maxps
579	;
580	EMIT_INSTR_PLUS_ICEBP maxps, XMM1, XMM2
581	EMIT_INSTR_PLUS_ICEBP maxps, XMM1, FSxBX
582	EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, XMM9
583	EMIT_INSTR_PLUS_ICEBP_C64 maxps, XMM8, FSxBX
584
585	EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, XMM3
586	EMIT_INSTR_PLUS_ICEBP vmaxps, XMM1, XMM2, FSxBX
587	EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, XMM10
588	EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, XMM8, XMM9, FSxBX
589
590	EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, YMM3
591	EMIT_INSTR_PLUS_ICEBP vmaxps, YMM1, YMM2, FSxBX
592	EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, YMM10
593	EMIT_INSTR_PLUS_ICEBP_C64 vmaxps, YMM8, YMM9, FSxBX
594
595	;
596	;; [v]maxpd
597	;
598	EMIT_INSTR_PLUS_ICEBP maxpd, XMM1, XMM2
599	EMIT_INSTR_PLUS_ICEBP maxpd, XMM1, FSxBX
600	EMIT_INSTR_PLUS_ICEBP_C64 maxpd, XMM8, XMM9
601	EMIT_INSTR_PLUS_ICEBP_C64 maxpd, XMM8, FSxBX
602
603	EMIT_INSTR_PLUS_ICEBP vmaxpd, XMM1, XMM2, XMM3
604	EMIT_INSTR_PLUS_ICEBP vmaxpd, XMM1, XMM2, FSxBX
605	EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, XMM8, XMM9, XMM10
606	EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, XMM8, XMM9, FSxBX
607
608	EMIT_INSTR_PLUS_ICEBP vmaxpd, YMM1, YMM2, YMM3
609	EMIT_INSTR_PLUS_ICEBP vmaxpd, YMM1, YMM2, FSxBX
610	EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, YMM8, YMM9, YMM10
611	EMIT_INSTR_PLUS_ICEBP_C64 vmaxpd, YMM8, YMM9, FSxBX
612
613	;
614	;; [v]maxss
615	;
616	EMIT_INSTR_PLUS_ICEBP maxss, XMM3, XMM4
617	EMIT_INSTR_PLUS_ICEBP maxss, XMM3, FSxBX
618	EMIT_INSTR_PLUS_ICEBP_C64 maxss, XMM8, XMM9
619	EMIT_INSTR_PLUS_ICEBP_C64 maxss, XMM8, FSxBX
620
621	EMIT_INSTR_PLUS_ICEBP vmaxss, XMM1, XMM6, XMM7
622	EMIT_INSTR_PLUS_ICEBP vmaxss, XMM1, XMM6, FSxBX
623	EMIT_INSTR_PLUS_ICEBP_C64 vmaxss, XMM8, XMM9, XMM10
624	EMIT_INSTR_PLUS_ICEBP_C64 vmaxss, XMM8, XMM9, FSxBX
625
626	;
627	;; [v]maxsd
628	;
629	EMIT_INSTR_PLUS_ICEBP maxsd, XMM3, XMM4
630	EMIT_INSTR_PLUS_ICEBP maxsd, XMM3, FSxBX
631	EMIT_INSTR_PLUS_ICEBP_C64 maxsd, XMM8, XMM9
632	EMIT_INSTR_PLUS_ICEBP_C64 maxsd, XMM8, FSxBX
633
634	EMIT_INSTR_PLUS_ICEBP vmaxsd, XMM1, XMM6, XMM7
635	EMIT_INSTR_PLUS_ICEBP vmaxsd, XMM1, XMM6, FSxBX
636	EMIT_INSTR_PLUS_ICEBP_C64 vmaxsd, XMM8, XMM9, XMM10
637	EMIT_INSTR_PLUS_ICEBP_C64 vmaxsd, XMM8, XMM9, FSxBX
638
639	;
640	;; [v]minps
641	;
642	EMIT_INSTR_PLUS_ICEBP minps, XMM1, XMM2
643	EMIT_INSTR_PLUS_ICEBP minps, XMM1, FSxBX
644	EMIT_INSTR_PLUS_ICEBP_C64 minps, XMM8, XMM9
645	EMIT_INSTR_PLUS_ICEBP_C64 minps, XMM8, FSxBX
646
647	EMIT_INSTR_PLUS_ICEBP vminps, XMM1, XMM2, XMM3
648	EMIT_INSTR_PLUS_ICEBP vminps, XMM1, XMM2, FSxBX
649	EMIT_INSTR_PLUS_ICEBP_C64 vminps, XMM8, XMM9, XMM10
650	EMIT_INSTR_PLUS_ICEBP_C64 vminps, XMM8, XMM9, FSxBX
651
652	EMIT_INSTR_PLUS_ICEBP vminps, YMM1, YMM2, YMM3
653	EMIT_INSTR_PLUS_ICEBP vminps, YMM1, YMM2, FSxBX
654	EMIT_INSTR_PLUS_ICEBP_C64 vminps, YMM8, YMM9, YMM10
655	EMIT_INSTR_PLUS_ICEBP_C64 vminps, YMM8, YMM9, FSxBX
656
657	;
658	;; [v]minpd
659	;
660	EMIT_INSTR_PLUS_ICEBP minpd, XMM1, XMM2
661	EMIT_INSTR_PLUS_ICEBP minpd, XMM1, FSxBX
662	EMIT_INSTR_PLUS_ICEBP_C64 minpd, XMM8, XMM9
663	EMIT_INSTR_PLUS_ICEBP_C64 minpd, XMM8, FSxBX
664
665	EMIT_INSTR_PLUS_ICEBP vminpd, XMM1, XMM2, XMM3
666	EMIT_INSTR_PLUS_ICEBP vminpd, XMM1, XMM2, FSxBX
667	EMIT_INSTR_PLUS_ICEBP_C64 vminpd, XMM8, XMM9, XMM10
668	EMIT_INSTR_PLUS_ICEBP_C64 vminpd, XMM8, XMM9, FSxBX
669
670	EMIT_INSTR_PLUS_ICEBP vminpd, YMM1, YMM2, YMM3
671	EMIT_INSTR_PLUS_ICEBP vminpd, YMM1, YMM2, FSxBX
672	EMIT_INSTR_PLUS_ICEBP_C64 vminpd, YMM8, YMM9, YMM10
673	EMIT_INSTR_PLUS_ICEBP_C64 vminpd, YMM8, YMM9, FSxBX
674
675	;
676	;; [v]minss
677	;
678	EMIT_INSTR_PLUS_ICEBP minss, XMM3, XMM4
679	EMIT_INSTR_PLUS_ICEBP minss, XMM3, FSxBX
680	EMIT_INSTR_PLUS_ICEBP_C64 minss, XMM8, XMM9
681	EMIT_INSTR_PLUS_ICEBP_C64 minss, XMM8, FSxBX
682
683	EMIT_INSTR_PLUS_ICEBP vminss, XMM1, XMM6, XMM7
684	EMIT_INSTR_PLUS_ICEBP vminss, XMM1, XMM6, FSxBX
685	EMIT_INSTR_PLUS_ICEBP_C64 vminss, XMM8, XMM9, XMM10
686	EMIT_INSTR_PLUS_ICEBP_C64 vminss, XMM8, XMM9, FSxBX
687
688	;
689	;; [v]minsd
690	;
691	EMIT_INSTR_PLUS_ICEBP minsd, XMM3, XMM4
692	EMIT_INSTR_PLUS_ICEBP minsd, XMM3, FSxBX
693	EMIT_INSTR_PLUS_ICEBP_C64 minsd, XMM8, XMM9
694	EMIT_INSTR_PLUS_ICEBP_C64 minsd, XMM8, FSxBX
695
696	EMIT_INSTR_PLUS_ICEBP vminsd, XMM1, XMM6, XMM7
697	EMIT_INSTR_PLUS_ICEBP vminsd, XMM1, XMM6, FSxBX
698	EMIT_INSTR_PLUS_ICEBP_C64 vminsd, XMM8, XMM9, XMM10
699	EMIT_INSTR_PLUS_ICEBP_C64 vminsd, XMM8, XMM9, FSxBX
700
701	%endif ; BS3_CPU_INSTR_4
702
703	%ifdef BS3_CPU_INSTR_5
704
705	;
706	;; [v]rcpps
707	;
708	EMIT_INSTR_PLUS_ICEBP rcpps, XMM1, XMM2
709	EMIT_INSTR_PLUS_ICEBP rcpps, XMM1, FSxBX
710	EMIT_INSTR_PLUS_ICEBP_C64 rcpps, XMM8, XMM9
711	EMIT_INSTR_PLUS_ICEBP_C64 rcpps, XMM8, FSxBX
712
713	EMIT_INSTR_PLUS_ICEBP vrcpps, XMM1, XMM2
714	EMIT_INSTR_PLUS_ICEBP vrcpps, XMM1, FSxBX
715	EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, XMM8, XMM9
716	EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, XMM8, FSxBX
717
718	EMIT_INSTR_PLUS_ICEBP vrcpps, YMM1, YMM2
719	EMIT_INSTR_PLUS_ICEBP vrcpps, YMM1, FSxBX
720	EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, YMM8, YMM9
721	EMIT_INSTR_PLUS_ICEBP_C64 vrcpps, YMM8, FSxBX
722
723	;
724	;; [v]rcpss
725	;
726	EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, XMM2
727	EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, FSxBX
728	EMIT_INSTR_PLUS_ICEBP_C64 rcpss, XMM8, XMM9
729	EMIT_INSTR_PLUS_ICEBP_C64 rcpss, XMM8, FSxBX
730
731	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, XMM3
732	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, FSxBX
733	EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, XMM15
734	EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, FSxBX
735
736	EMIT_INSTR_PLUS_ICEBP rcpss, XMM1, XMM1
737	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, XMM1
738	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, XMM2
739	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM2, XMM2
740	EMIT_INSTR_PLUS_ICEBP vrcpss, XMM1, XMM1, FSxBX
741	EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM15, XMM15, XMM15
742	EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM15, XMM15, XMM13
743	EMIT_INSTR_PLUS_ICEBP_C64 vrcpss, XMM13, XMM14, XMM14
744
745	;
746	;; [v]sqrtps
747	;
748	EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, XMM2
749	EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, FSxBX
750	EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, XMM9
751	EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, FSxBX
752
753	EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, XMM2
754	EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, FSxBX
755	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, XMM8, XMM9
756	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, XMM8, FSxBX
757
758	EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, YMM2
759	EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, FSxBX
760	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, YMM9
761	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, FSxBX
762
763	EMIT_INSTR_PLUS_ICEBP sqrtps, XMM1, XMM1
764	EMIT_INSTR_PLUS_ICEBP_C64 sqrtps, XMM8, XMM8
765	EMIT_INSTR_PLUS_ICEBP vsqrtps, XMM1, XMM1
766	EMIT_INSTR_PLUS_ICEBP vsqrtps, YMM1, YMM1
767	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtps, YMM8, YMM8
768
769	;
770	;; [v]sqrtpd
771	;
772	EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, XMM2
773	EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, FSxBX
774	EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, XMM9
775	EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, FSxBX
776
777	EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, XMM2
778	EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, FSxBX
779	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, XMM8, XMM9
780	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, XMM8, FSxBX
781
782	EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, YMM2
783	EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, FSxBX
784	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, YMM9
785	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, FSxBX
786
787	EMIT_INSTR_PLUS_ICEBP sqrtpd, XMM1, XMM1
788	EMIT_INSTR_PLUS_ICEBP_C64 sqrtpd, XMM8, XMM8
789	EMIT_INSTR_PLUS_ICEBP vsqrtpd, XMM1, XMM1
790	EMIT_INSTR_PLUS_ICEBP vsqrtpd, YMM1, YMM1
791	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtpd, YMM8, YMM8
792
793	;
794	;; [v]sqrtss
795	;
796	EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, XMM2
797	EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, FSxBX
798	EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, XMM9
799	EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, FSxBX
800
801	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, XMM3
802	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, FSxBX
803	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM9, XMM10
804	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM9, FSxBX
805
806	EMIT_INSTR_PLUS_ICEBP sqrtss, XMM1, XMM1
807	EMIT_INSTR_PLUS_ICEBP_C64 sqrtss, XMM8, XMM8
808	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, XMM1
809	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, XMM2
810	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM2, XMM2
811	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtss, XMM8, XMM8, XMM8
812	EMIT_INSTR_PLUS_ICEBP vsqrtss, XMM1, XMM1, FSxBX
813
814	;
815	;; [v]sqrtsd
816	;
817	EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, XMM2
818	EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, FSxBX
819	EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, XMM9
820	EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, FSxBX
821
822	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, XMM3
823	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, FSxBX
824	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM9, XMM10
825	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM9, FSxBX
826
827	EMIT_INSTR_PLUS_ICEBP sqrtsd, XMM1, XMM1
828	EMIT_INSTR_PLUS_ICEBP_C64 sqrtsd, XMM8, XMM8
829	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, XMM1
830	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, XMM2
831	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM2, XMM2
832	EMIT_INSTR_PLUS_ICEBP_C64 vsqrtsd, XMM8, XMM8, XMM8
833	EMIT_INSTR_PLUS_ICEBP vsqrtsd, XMM1, XMM1, FSxBX
834
835	;
836	;; [v]rsqrtps
837	;
838	EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, XMM2
839	EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, FSxBX
840	EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, XMM9
841	EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, FSxBX
842
843	EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, XMM2
844	EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, FSxBX
845	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, XMM8, XMM9
846	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, XMM8, FSxBX
847
848	EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, YMM2
849	EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, FSxBX
850	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, YMM9
851	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, FSxBX
852
853	EMIT_INSTR_PLUS_ICEBP rsqrtps, XMM1, XMM1
854	EMIT_INSTR_PLUS_ICEBP_C64 rsqrtps, XMM8, XMM8
855	EMIT_INSTR_PLUS_ICEBP vrsqrtps, XMM1, XMM1
856	EMIT_INSTR_PLUS_ICEBP vrsqrtps, YMM1, YMM1
857	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtps, YMM8, YMM8
858
859	;
860	;; [v]rsqrtss
861	;
862	EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, XMM2
863	EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, FSxBX
864	EMIT_INSTR_PLUS_ICEBP_C64 rsqrtss, XMM8, XMM9
865	EMIT_INSTR_PLUS_ICEBP_C64 rsqrtss, XMM8, FSxBX
866
867	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, XMM3
868	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, FSxBX
869	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM9, XMM10
870	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM9, FSxBX
871
872	EMIT_INSTR_PLUS_ICEBP rsqrtss, XMM1, XMM1
873	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, XMM1
874	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, XMM2
875	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM2, XMM2
876	EMIT_INSTR_PLUS_ICEBP vrsqrtss, XMM1, XMM1, FSxBX
877	EMIT_INSTR_PLUS_ICEBP_C64 vrsqrtss, XMM8, XMM8, XMM8
878
879	;
880	;; [v]dpps
881	;
882	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 000h
883	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 0FFh
884	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM2, 0E1h
885	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 000h
886	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 0FFh
887	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, FSxBX, 0E1h
888	EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, XMM9, 0E1h
889	EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, FSxBX, 0E1h
890
891	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 000h
892	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 0FFh
893	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM3, 0E1h
894	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 000h
895	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 0FFh
896	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, FSxBX, 0E1h
897	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM9, XMM10, 0E1h
898	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM9, FSxBX, 0E1h
899
900	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 000h
901	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 0FFh
902	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM3, 0E1h
903	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 000h
904	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 0FFh
905	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, FSxBX, 0E1h
906	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM9, YMM10, 0E1h
907	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM9, FSxBX, 0E1h
908
909	EMIT_INSTR_PLUS_ICEBP dpps, XMM1, XMM1, 0E1h
910	EMIT_INSTR_PLUS_ICEBP_C64 dpps, XMM8, XMM8, 0E1h
911
912	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, XMM1, 0E1h
913	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM1, 0E1h
914	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, XMM2, 0E1h
915	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM2, XMM2, 0E1h
916	EMIT_INSTR_PLUS_ICEBP vdpps, XMM1, XMM1, FSxBX, 0E1h
917	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM8, XMM8, 0E1h
918	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, XMM8, XMM8, FSxBX, 0E1h
919
920	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, YMM1, 0E1h
921	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM1, 0E1h
922	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, YMM2, 0E1h
923	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM2, YMM2, 0E1h
924	EMIT_INSTR_PLUS_ICEBP vdpps, YMM1, YMM1, FSxBX, 0E1h
925	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM8, YMM8, 0E1h
926	EMIT_INSTR_PLUS_ICEBP_C64 vdpps, YMM8, YMM8, FSxBX, 0E1h
927
928	;
929	;; [v]dppd
930	;
931	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 000h
932	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 0FFh
933	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM2, 022h
934	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 000h
935	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 0FFh
936	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, FSxBX, 022h
937	EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, XMM9, 022h
938	EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, FSxBX, 022h
939
940	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 000h
941	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 0FFh
942	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM3, 022h
943	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 000h
944	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 0FFh
945	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, FSxBX, 022h
946	EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM9, XMM10, 022h
947	EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM9, FSxBX, 022h
948
949	EMIT_INSTR_PLUS_ICEBP dppd, XMM1, XMM1, 022h
950	EMIT_INSTR_PLUS_ICEBP_C64 dppd, XMM8, XMM8, 022h
951
952	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, XMM1, 022h
953	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM1, 022h
954	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, XMM2, 022h
955	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM2, XMM2, 022h
956	EMIT_INSTR_PLUS_ICEBP vdppd, XMM1, XMM1, FSxBX, 022h
957	EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM8, XMM8, 022h
958	EMIT_INSTR_PLUS_ICEBP_C64 vdppd, XMM8, XMM8, FSxBX, 022h
959
960	;
961	;; [v]roundps
962	;
963	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM1, 008h
964	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 000h
965	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 008h
966	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 009h
967	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00ah
968	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00bh
969	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00ch
970	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00dh
971	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00eh
972	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 00fh
973	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, XMM2, 0ffh
974	EMIT_INSTR_PLUS_ICEBP roundps, XMM1, FSxBX, 008h
975	EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, XMM8, 008h
976	EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, XMM9, 008h
977	EMIT_INSTR_PLUS_ICEBP_C64 roundps, XMM8, FSxBX, 008h
978
979	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM1, 008h
980	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 000h
981	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 008h
982	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 009h
983	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00ah
984	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00bh
985	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00ch
986	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00dh
987	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00eh
988	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 00fh
989	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, XMM2, 0ffh
990	EMIT_INSTR_PLUS_ICEBP vroundps, XMM1, FSxBX, 008h
991	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM8, 008h
992	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, XMM9, 008h
993	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, XMM8, FSxBX, 008h
994
995	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM1, 008h
996	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 000h
997	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 008h
998	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 009h
999	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00ah
1000	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00bh
1001	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00ch
1002	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00dh
1003	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00eh
1004	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 00fh
1005	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, YMM2, 0ffh
1006	EMIT_INSTR_PLUS_ICEBP vroundps, YMM1, FSxBX, 008h
1007	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM8, 008h
1008	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, YMM9, 008h
1009	EMIT_INSTR_PLUS_ICEBP_C64 vroundps, YMM8, FSxBX, 008h
1010
1011	;
1012	;; [v]roundpd
1013	;
1014	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM1, 008h
1015	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 000h
1016	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 008h
1017	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 009h
1018	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00ah
1019	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00bh
1020	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00ch
1021	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00dh
1022	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00eh
1023	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 00fh
1024	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, XMM2, 0ffh
1025	EMIT_INSTR_PLUS_ICEBP roundpd, XMM1, FSxBX, 008h
1026	EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, XMM8, 008h
1027	EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, XMM9, 008h
1028	EMIT_INSTR_PLUS_ICEBP_C64 roundpd, XMM8, FSxBX, 008h
1029
1030	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM1, 008h
1031	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 000h
1032	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 008h
1033	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 009h
1034	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00ah
1035	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00bh
1036	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00ch
1037	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00dh
1038	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00eh
1039	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 00fh
1040	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, XMM2, 0ffh
1041	EMIT_INSTR_PLUS_ICEBP vroundpd, XMM1, FSxBX, 008h
1042	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, XMM8, 008h
1043	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, XMM9, 008h
1044	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, XMM8, FSxBX, 008h
1045
1046	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM1, 008h
1047	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 000h
1048	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 008h
1049	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 009h
1050	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00ah
1051	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00bh
1052	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00ch
1053	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00dh
1054	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00eh
1055	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 00fh
1056	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, YMM2, 0ffh
1057	EMIT_INSTR_PLUS_ICEBP vroundpd, YMM1, FSxBX, 008h
1058	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, YMM8, 008h
1059	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, YMM9, 008h
1060	EMIT_INSTR_PLUS_ICEBP_C64 vroundpd, YMM8, FSxBX, 008h
1061
1062	;
1063	;; [v]roundss
1064	;
1065	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 000h
1066	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 008h
1067	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 009h
1068	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00ah
1069	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00bh
1070	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00ch
1071	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00dh
1072	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00eh
1073	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 00fh
1074	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM2, 0ffh
1075	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, FSxBX, 008h
1076	EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, XMM9, 008h
1077	EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, FSxBX, 008h
1078
1079	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, XMM2, 008h
1080	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, FSxBX, 008h
1081	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM1, 008h
1082	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 000h
1083	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 008h
1084	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 009h
1085	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00ah
1086	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00bh
1087	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00ch
1088	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00dh
1089	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00eh
1090	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 00fh
1091	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM3, 0ffh
1092	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, FSxBX, 008h
1093	EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8, FSxBX, 008h
1094	EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9, XMM10, 008h
1095	EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM9, FSxBX, 008h
1096
1097	EMIT_INSTR_PLUS_ICEBP roundss, XMM1, XMM1, 008h
1098	EMIT_INSTR_PLUS_ICEBP_C64 roundss, XMM8, XMM8, 008h
1099	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM1, XMM1, 008h
1100	EMIT_INSTR_PLUS_ICEBP vroundss, XMM1, XMM2, XMM2, 008h
1101	EMIT_INSTR_PLUS_ICEBP_C64 vroundss, XMM8, XMM8, XMM8, 008h
1102
1103	;
1104	;; [v]roundsd
1105	;
1106	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 000h
1107	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 008h
1108	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 009h
1109	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00ah
1110	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00bh
1111	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00ch
1112	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00dh
1113	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00eh
1114	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 00fh
1115	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM2, 0ffh
1116	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, FSxBX, 008h
1117	EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, XMM9, 008h
1118	EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, FSxBX, 008h
1119
1120	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, XMM2, 008h
1121	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, FSxBX, 008h
1122	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM1, 008h
1123	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 000h
1124	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 008h
1125	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 009h
1126	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00ah
1127	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00bh
1128	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00ch
1129	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00dh
1130	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00eh
1131	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 00fh
1132	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM3, 0ffh
1133	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, FSxBX, 008h
1134	EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM8, FSxBX, 008h
1135	EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM9, XMM10, 008h
1136	EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM9, FSxBX, 008h
1137
1138	EMIT_INSTR_PLUS_ICEBP roundsd, XMM1, XMM1, 008h
1139	EMIT_INSTR_PLUS_ICEBP_C64 roundsd, XMM8, XMM8, 008h
1140	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM1, XMM1, 008h
1141	EMIT_INSTR_PLUS_ICEBP vroundsd, XMM1, XMM2, XMM2, 008h
1142	EMIT_INSTR_PLUS_ICEBP_C64 vroundsd, XMM8, XMM8, XMM8, 008h
1143
1144	;
1145	;; [v]comiss
1146	;
1147	EMIT_INSTR_PLUS_ICEBP comiss, XMM1, XMM2
1148	EMIT_INSTR_PLUS_ICEBP comiss, XMM1, FSxBX
1149	EMIT_INSTR_PLUS_ICEBP comiss, XMM1, XMM1
1150	EMIT_INSTR_PLUS_ICEBP_C64 comiss, XMM8, XMM9
1151	EMIT_INSTR_PLUS_ICEBP_C64 comiss, XMM8, FSxBX
1152	EMIT_INSTR_PLUS_ICEBP_C64 comiss, XMM8, XMM8
1153
1154	EMIT_INSTR_PLUS_ICEBP vcomiss, XMM1, XMM2
1155	EMIT_INSTR_PLUS_ICEBP vcomiss, XMM1, FSxBX
1156	EMIT_INSTR_PLUS_ICEBP vcomiss, XMM1, XMM1
1157	EMIT_INSTR_PLUS_ICEBP_C64 vcomiss, XMM8, XMM9
1158	EMIT_INSTR_PLUS_ICEBP_C64 vcomiss, XMM8, FSxBX
1159	EMIT_INSTR_PLUS_ICEBP_C64 vcomiss, XMM8, XMM8
1160
1161	;
1162	;; [v]ucomiss
1163	;
1164	EMIT_INSTR_PLUS_ICEBP ucomiss, XMM1, XMM2
1165	EMIT_INSTR_PLUS_ICEBP ucomiss, XMM1, FSxBX
1166	EMIT_INSTR_PLUS_ICEBP ucomiss, XMM1, XMM1
1167	EMIT_INSTR_PLUS_ICEBP_C64 ucomiss, XMM8, XMM9
1168	EMIT_INSTR_PLUS_ICEBP_C64 ucomiss, XMM8, FSxBX
1169	EMIT_INSTR_PLUS_ICEBP_C64 ucomiss, XMM8, XMM8
1170
1171	EMIT_INSTR_PLUS_ICEBP vucomiss, XMM1, XMM2
1172	EMIT_INSTR_PLUS_ICEBP vucomiss, XMM1, FSxBX
1173	EMIT_INSTR_PLUS_ICEBP vucomiss, XMM1, XMM1
1174	EMIT_INSTR_PLUS_ICEBP_C64 vucomiss, XMM8, XMM9
1175	EMIT_INSTR_PLUS_ICEBP_C64 vucomiss, XMM8, FSxBX
1176	EMIT_INSTR_PLUS_ICEBP_C64 vucomiss, XMM8, XMM8
1177
1178	;
1179	;; [v]comisd
1180	;
1181	EMIT_INSTR_PLUS_ICEBP comisd, XMM1, XMM2
1182	EMIT_INSTR_PLUS_ICEBP comisd, XMM1, FSxBX
1183	EMIT_INSTR_PLUS_ICEBP comisd, XMM1, XMM1
1184	EMIT_INSTR_PLUS_ICEBP_C64 comisd, XMM8, XMM9
1185	EMIT_INSTR_PLUS_ICEBP_C64 comisd, XMM8, FSxBX
1186	EMIT_INSTR_PLUS_ICEBP_C64 comisd, XMM8, XMM8
1187
1188	EMIT_INSTR_PLUS_ICEBP vcomisd, XMM1, XMM2
1189	EMIT_INSTR_PLUS_ICEBP vcomisd, XMM1, FSxBX
1190	EMIT_INSTR_PLUS_ICEBP vcomisd, XMM1, XMM1
1191	EMIT_INSTR_PLUS_ICEBP_C64 vcomisd, XMM8, XMM9
1192	EMIT_INSTR_PLUS_ICEBP_C64 vcomisd, XMM8, FSxBX
1193	EMIT_INSTR_PLUS_ICEBP_C64 vcomisd, XMM8, XMM8
1194
1195	;
1196	;; [v]ucomisd
1197	;
1198	EMIT_INSTR_PLUS_ICEBP ucomisd, XMM1, XMM2
1199	EMIT_INSTR_PLUS_ICEBP ucomisd, XMM1, FSxBX
1200	EMIT_INSTR_PLUS_ICEBP ucomisd, XMM1, XMM1
1201	EMIT_INSTR_PLUS_ICEBP_C64 ucomisd, XMM8, XMM9
1202	EMIT_INSTR_PLUS_ICEBP_C64 ucomisd, XMM8, FSxBX
1203	EMIT_INSTR_PLUS_ICEBP_C64 ucomisd, XMM8, XMM8
1204
1205	EMIT_INSTR_PLUS_ICEBP vucomisd, XMM1, XMM2
1206	EMIT_INSTR_PLUS_ICEBP vucomisd, XMM1, FSxBX
1207	EMIT_INSTR_PLUS_ICEBP vucomisd, XMM1, XMM1
1208	EMIT_INSTR_PLUS_ICEBP_C64 vucomisd, XMM8, XMM9
1209	EMIT_INSTR_PLUS_ICEBP_C64 vucomisd, XMM8, FSxBX
1210	EMIT_INSTR_PLUS_ICEBP_C64 vucomisd, XMM8, XMM8
1211
1212	;
1213	;; [v]cmpps
1214	;
1215	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 000h
1216	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 001h
1217	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 002h
1218	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 003h
1219	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 004h
1220	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 005h
1221	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 006h
1222	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 007h
1223	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 008h ;; reserved
1224	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 011h ;; reserved
1225	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 022h ;; reserved
1226	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 043h ;; reserved
1227	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM2, 084h ;; reserved
1228	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM1, 000h ;; same-register
1229	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, XMM1, 006h ;; same-register
1230	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, FSxBX, 001h
1231	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, FSxBX, 004h
1232	EMIT_INSTR_PLUS_ICEBP cmpps, XMM1, FSxBX, 007h
1233	EMIT_INSTR_PLUS_ICEBP_C64 cmpps, XMM8, XMM9, 002h
1234	EMIT_INSTR_PLUS_ICEBP_C64 cmpps, XMM8, XMM8, 005h ;; same-register
1235	EMIT_INSTR_PLUS_ICEBP_C64 cmpps, XMM8, FSxBX, 003h
1236
1237	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 000h
1238	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 001h
1239	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 002h
1240	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 003h
1241	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 004h
1242	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 005h
1243	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 006h
1244	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 007h
1245	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 008h
1246	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 009h
1247	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00ah
1248	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00bh
1249	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00ch
1250	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00dh
1251	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00eh
1252	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 00fh
1253	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 010h
1254	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 011h
1255	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 012h
1256	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 013h
1257	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 014h
1258	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 015h
1259	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 016h
1260	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 017h
1261	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 018h
1262	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 019h
1263	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01ah
1264	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01bh
1265	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01ch
1266	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01dh
1267	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01eh
1268	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 01fh
1269	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 022h ;; reserved
1270	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM3, 044h ;; reserved
1271	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM1, XMM1, 005h ;; same-register
1272	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM1, XMM2, 00ah ;; same-register
1273	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM1, FSxBX, 00bh ;; same-register
1274	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM1, 00ch ;; same-register
1275	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, XMM2, 00eh ;; same-register
1276	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, FSxBX, 010h
1277	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, FSxBX, 011h
1278	EMIT_INSTR_PLUS_ICEBP vcmpps, XMM1, XMM2, FSxBX, 013h
1279	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, XMM10, 016h
1280	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, XMM10, 017h
1281	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, XMM10, 019h
1282	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, XMM9, 01ah ;; same-register
1283	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, XMM10, 0ddh ;; reserved
1284	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM9, FSxBX, 01dh
1285	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, XMM8, XMM8, FSxBX, 01fh ;; same-register
1286
1287	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 000h
1288	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 001h
1289	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 002h
1290	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 003h
1291	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 004h
1292	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 005h
1293	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 006h
1294	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 007h
1295	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 008h
1296	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 009h
1297	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00ah
1298	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00bh
1299	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00ch
1300	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00dh
1301	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00eh
1302	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 00fh
1303	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 010h
1304	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 011h
1305	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 012h
1306	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 013h
1307	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 014h
1308	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 015h
1309	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 016h
1310	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 017h
1311	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 018h
1312	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 019h
1313	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01ah
1314	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01bh
1315	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01ch
1316	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01dh
1317	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01eh
1318	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 01fh
1319	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 022h ;; reserved
1320	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM3, 044h ;; reserved
1321	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM1, YMM1, 005h ;; same-register
1322	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM1, YMM2, 00ah ;; same-register
1323	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM1, FSxBX, 00bh ;; same-register
1324	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM1, 00ch ;; same-register
1325	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, YMM2, 00eh ;; same-register
1326	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, FSxBX, 010h
1327	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, FSxBX, 011h
1328	EMIT_INSTR_PLUS_ICEBP vcmpps, YMM1, YMM2, FSxBX, 013h
1329	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, YMM10, 016h
1330	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, YMM10, 017h
1331	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, YMM10, 019h
1332	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, YMM9, 01ah ;; same-register
1333	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, YMM10, 0ddh ;; reserved
1334	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM9, FSxBX, 01dh
1335	EMIT_INSTR_PLUS_ICEBP_C64 vcmpps, YMM8, YMM8, FSxBX, 01fh ;; same-register
1336
1337	;
1338	;; [v]cmppd
1339	;
1340	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 000h
1341	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 001h
1342	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 002h
1343	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 003h
1344	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 004h
1345	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 005h
1346	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 006h
1347	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 007h
1348	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 008h ;; reserved
1349	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 011h ;; reserved
1350	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 022h ;; reserved
1351	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 043h ;; reserved
1352	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM2, 084h ;; reserved
1353	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM1, 000h ;; same-register
1354	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, XMM1, 006h ;; same-register
1355	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, FSxBX, 001h
1356	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, FSxBX, 004h
1357	EMIT_INSTR_PLUS_ICEBP cmppd, XMM1, FSxBX, 007h
1358	EMIT_INSTR_PLUS_ICEBP_C64 cmppd, XMM8, XMM9, 002h
1359	EMIT_INSTR_PLUS_ICEBP_C64 cmppd, XMM8, XMM8, 005h ;; same-register
1360	EMIT_INSTR_PLUS_ICEBP_C64 cmppd, XMM8, FSxBX, 003h
1361
1362	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 000h
1363	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 001h
1364	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 002h
1365	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 003h
1366	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 004h
1367	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 005h
1368	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 006h
1369	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 007h
1370	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 008h
1371	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 009h
1372	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00ah
1373	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00bh
1374	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00ch
1375	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00dh
1376	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00eh
1377	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 00fh
1378	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 010h
1379	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 011h
1380	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 012h
1381	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 013h
1382	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 014h
1383	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 015h
1384	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 016h
1385	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 017h
1386	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 018h
1387	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 019h
1388	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01ah
1389	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01bh
1390	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01ch
1391	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01dh
1392	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01eh
1393	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 01fh
1394	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 022h ;; reserved
1395	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM3, 044h ;; reserved
1396	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM1, XMM1, 005h ;; same-register
1397	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM1, XMM2, 00ah ;; same-register
1398	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM1, FSxBX, 00bh ;; same-register
1399	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM1, 00ch ;; same-register
1400	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, XMM2, 00eh ;; same-register
1401	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, FSxBX, 010h
1402	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, FSxBX, 011h
1403	EMIT_INSTR_PLUS_ICEBP vcmppd, XMM1, XMM2, FSxBX, 013h
1404	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, XMM10, 016h
1405	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, XMM10, 017h
1406	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, XMM10, 019h
1407	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, XMM9, 01ah ;; same-register
1408	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, XMM10, 0ddh ;; reserved
1409	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM9, FSxBX, 01dh
1410	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, XMM8, XMM8, FSxBX, 01fh ;; same-register
1411
1412	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 000h
1413	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 001h
1414	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 002h
1415	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 003h
1416	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 004h
1417	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 005h
1418	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 006h
1419	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 007h
1420	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 008h
1421	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 009h
1422	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00ah
1423	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00bh
1424	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00ch
1425	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00dh
1426	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00eh
1427	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 00fh
1428	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 010h
1429	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 011h
1430	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 012h
1431	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 013h
1432	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 014h
1433	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 015h
1434	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 016h
1435	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 017h
1436	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 018h
1437	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 019h
1438	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01ah
1439	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01bh
1440	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01ch
1441	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01dh
1442	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01eh
1443	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 01fh
1444	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 022h ;; reserved
1445	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM3, 044h ;; reserved
1446	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM1, YMM1, 005h ;; same-register
1447	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM1, YMM2, 00ah ;; same-register
1448	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM1, FSxBX, 00bh ;; same-register
1449	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM1, 00ch ;; same-register
1450	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, YMM2, 00eh ;; same-register
1451	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, FSxBX, 010h
1452	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, FSxBX, 011h
1453	EMIT_INSTR_PLUS_ICEBP vcmppd, YMM1, YMM2, FSxBX, 013h
1454	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, YMM10, 016h
1455	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, YMM10, 017h
1456	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, YMM10, 019h
1457	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, YMM9, 01ah ;; same-register
1458	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, YMM10, 0ddh ;; reserved
1459	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM9, FSxBX, 01dh
1460	EMIT_INSTR_PLUS_ICEBP_C64 vcmppd, YMM8, YMM8, FSxBX, 01fh ;; same-register
1461
1462	;
1463	;; cvtpi2ps
1464	;
1465	; SSE-128, fp32 <- int32 (packed:2; from MMX register)
1466	EMIT_INSTR_PLUS_ICEBP cvtpi2ps, XMM1, MM1
1467	EMIT_INSTR_PLUS_ICEBP cvtpi2ps, XMM1, FSxBX
1468	EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2ps, XMM8, MM1
1469	EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2ps, XMM8, FSxBX
1470
1471	;
1472	;; cvtps2pi
1473	;
1474	; SSE-128, int32 <- fp32 (packed:2; to MMX register)
1475	EMIT_INSTR_PLUS_ICEBP cvtps2pi, MM1, XMM1
1476	EMIT_INSTR_PLUS_ICEBP cvtps2pi, MM1, FSxBX
1477	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pi, MM1, XMM8
1478
1479	;
1480	;; cvttps2pi
1481	;
1482	; SSE-128, int32 <- fp32 (packed:2; truncated; to MMX register)
1483	EMIT_INSTR_PLUS_ICEBP cvttps2pi, MM1, XMM1
1484	EMIT_INSTR_PLUS_ICEBP cvttps2pi, MM1, FSxBX
1485	EMIT_INSTR_PLUS_ICEBP_C64 cvttps2pi, MM1, XMM8
1486
1487	;
1488	;; [v]cvtsi2ss
1489	;
1490	; SSE-128, fp32 <- int32 (single)
1491	EMIT_INSTR_PLUS_ICEBP cvtsi2ss, XMM1, EAX
1492	EMIT_INSTR_PLUS_ICEBP cvtsi2ss, XMM1, FSxBX_D
1493	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, R8D
1494	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, FSxBX_D
1495	; SSE-128, fp32 <- int64 (single)
1496	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM1, RAX
1497	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM1, FSxBX_Q
1498	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, R8
1499	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2ss, XMM8, FSxBX_Q
1500	; AVX-128, fp32 <- int32 (single)
1501	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, EAX
1502	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, FSxBX_D
1503	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, R8D
1504	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, FSxBX_D
1505	; AVX-128, fp32 <- int64 (single)
1506	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, RAX ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1507	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM2, FSxBX_Q ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1508	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, R8
1509	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM9, FSxBX_Q
1510	; AVX-128, fp32 <- int32, same-reg (single)
1511	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, EAX
1512	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, FSxBX_D
1513	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, R8D
1514	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, FSxBX_D
1515	; AVX-128, fp32 <- int64, same-reg (single)
1516	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, RAX ;; @todo this assembles in 16/32 mode, but should it...?
1517	EMIT_INSTR_PLUS_ICEBP vcvtsi2ss, XMM1, XMM1, FSxBX_Q ;; @todo this assembles in 16/32 mode, but should it...?
1518	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, R8
1519	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2ss, XMM8, XMM8, FSxBX_Q
1520	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1521	; @todo same-reg fp32 <- int32 (SDM says W1 ignored in 32-bit modes) (see above)
1522
1523	;
1524	;; [v]cvtss2si
1525	;
1526	; SSE-128, int32 <- fp32
1527	EMIT_INSTR_PLUS_ICEBP cvtss2si, EAX, XMM1
1528	EMIT_INSTR_PLUS_ICEBP cvtss2si, EAX, FSxBX
1529	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8D, XMM8
1530	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8D, FSxBX
1531	; SSE-128, int64 <- fp32
1532	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, RAX, XMM1
1533	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, RAX, FSxBX
1534	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8, XMM8
1535	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2si, R8, FSxBX
1536	; AVX-128, int32 <- fp32
1537	EMIT_INSTR_PLUS_ICEBP vcvtss2si, EAX, XMM1
1538	EMIT_INSTR_PLUS_ICEBP vcvtss2si, EAX, FSxBX
1539	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8D, XMM8
1540	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8D, FSxBX
1541	; AVX-128, int64 <- fp32
1542	EMIT_INSTR_PLUS_ICEBP vcvtss2si, RAX, XMM1
1543	EMIT_INSTR_PLUS_ICEBP vcvtss2si, RAX, FSxBX
1544	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8, XMM8
1545	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2si, R8, FSxBX
1546	; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1547	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1548
1549	;
1550	;; [v]cvttss2si
1551	;
1552	; SSE-128, int32 <- fp32 (single; truncated)
1553	EMIT_INSTR_PLUS_ICEBP cvttss2si, EAX, XMM1
1554	EMIT_INSTR_PLUS_ICEBP cvttss2si, EAX, FSxBX
1555	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8D, XMM8
1556	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8D, FSxBX
1557	; SSE-128, int64 <- fp32 (single; truncated)
1558	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, RAX, XMM1
1559	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, RAX, FSxBX
1560	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8, XMM8
1561	EMIT_INSTR_PLUS_ICEBP_C64 cvttss2si, R8, FSxBX
1562	; AVX-128, int32 <- fp32 (single; truncated)
1563	EMIT_INSTR_PLUS_ICEBP vcvttss2si, EAX, XMM1
1564	EMIT_INSTR_PLUS_ICEBP vcvttss2si, EAX, FSxBX
1565	EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8D, XMM8
1566	EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8D, FSxBX
1567	; AVX-128, int64 <- fp32 (single; truncated)
1568	EMIT_INSTR_PLUS_ICEBP vcvttss2si, RAX, XMM1
1569	EMIT_INSTR_PLUS_ICEBP vcvttss2si, RAX, FSxBX
1570	EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8, XMM8
1571	EMIT_INSTR_PLUS_ICEBP_C64 vcvttss2si, R8, FSxBX
1572	; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1573	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1574
1575	;
1576	;; cvtpi2pd
1577	;
1578	; SSE-128, fp64 <- int32 (packed:2; from MMX register)
1579	EMIT_INSTR_PLUS_ICEBP cvtpi2pd, XMM1, MM1
1580	EMIT_INSTR_PLUS_ICEBP cvtpi2pd, XMM1, FSxBX
1581	EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2pd, XMM8, MM1
1582	EMIT_INSTR_PLUS_ICEBP_C64 cvtpi2pd, XMM8, FSxBX
1583	; note: transition from x87 FPU to MMX; takes FPU exceptions (MM forms only)
1584
1585	;
1586	;; cvtpd2pi
1587	;
1588	; SSE-128, int32 <- fp64 (packed:2; to MMX register)
1589	EMIT_INSTR_PLUS_ICEBP cvtpd2pi, MM1, XMM1
1590	EMIT_INSTR_PLUS_ICEBP cvtpd2pi, MM1, FSxBX
1591	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2pi, MM1, XMM8
1592	; note: transition from x87 FPU to MMX; takes FPU exceptions
1593
1594	;
1595	;; cvttpd2pi
1596	;
1597	; SSE-128, int32 <- fp64 (packed:2; truncated; to MMX register)
1598	EMIT_INSTR_PLUS_ICEBP cvttpd2pi, MM1, XMM1
1599	EMIT_INSTR_PLUS_ICEBP cvttpd2pi, MM1, FSxBX
1600	EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2pi, MM1, XMM8
1601	; note: transition from x87 FPU to MMX; takes FPU exceptions
1602
1603	;
1604	;; [v]cvtsi2sd
1605	;
1606	; SSE-128, fp64 <- int32 (single)
1607	EMIT_INSTR_PLUS_ICEBP cvtsi2sd, XMM1, EAX
1608	EMIT_INSTR_PLUS_ICEBP cvtsi2sd, XMM1, FSxBX_D
1609	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, R8D
1610	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, FSxBX_D
1611	; SSE-128, fp64 <- int64 (single)
1612	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM1, RAX
1613	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM1, FSxBX_Q
1614	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, R8
1615	EMIT_INSTR_PLUS_ICEBP_C64 cvtsi2sd, XMM8, FSxBX_Q
1616	; AVX-128, fp64 <- int32 (single)
1617	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, EAX
1618	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, FSxBX_D
1619	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, R8D
1620	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, FSxBX_D
1621	; AVX-128, fp64 <- int64 (single)
1622	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, RAX
1623	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM2, FSxBX_Q
1624	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, R8
1625	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM9, FSxBX_Q
1626	; AVX-128, fp64 <- int32, same-reg (single)
1627	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, EAX
1628	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, FSxBX_D
1629	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, R8D
1630	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, FSxBX_D
1631	; AVX-128, fp64 <- int64, same-reg (single)
1632	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, RAX
1633	EMIT_INSTR_PLUS_ICEBP vcvtsi2sd, XMM1, XMM1, FSxBX_Q
1634	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, R8
1635	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsi2sd, XMM8, XMM8, FSxBX_Q
1636	; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1637	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1638
1639	;
1640	;; [v]cvtsd2si
1641	;
1642	; SSE-128, int32 <- fp64 (single)
1643	EMIT_INSTR_PLUS_ICEBP cvtsd2si, EAX, XMM1
1644	EMIT_INSTR_PLUS_ICEBP cvtsd2si, EAX, FSxBX
1645	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8D, XMM8
1646	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8D, FSxBX
1647	; SSE-128, int64 <- fp64 (single)
1648	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, RAX, XMM1
1649	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, RAX, FSxBX
1650	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8, XMM8
1651	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2si, R8, FSxBX
1652	; AVX-128, int32 <- fp64 (single)
1653	EMIT_INSTR_PLUS_ICEBP vcvtsd2si, EAX, XMM1
1654	EMIT_INSTR_PLUS_ICEBP vcvtsd2si, EAX, FSxBX
1655	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8D, XMM8
1656	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8D, FSxBX
1657	; AVX-128, int64 <- fp64 (single)
1658	EMIT_INSTR_PLUS_ICEBP vcvtsd2si, RAX, XMM1 ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1659	EMIT_INSTR_PLUS_ICEBP vcvtsd2si, RAX, FSxBX ;; @todo this assembles in 16/32 mode; SDM says VEX.W1 ignored in non-64 bit
1660	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8, XMM8
1661	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2si, R8, FSxBX
1662	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1663	; @todo same-reg fp32 <- int32 (SDM says W1 ignored in 32-bit modes) (see above)
1664
1665	;
1666	;; [v]cvttsd2si
1667	;
1668	; SSE-128, int32 <- fp64 (single; truncated)
1669	EMIT_INSTR_PLUS_ICEBP cvttsd2si, EAX, XMM1
1670	EMIT_INSTR_PLUS_ICEBP cvttsd2si, EAX, FSxBX
1671	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8D, XMM8
1672	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8D, FSxBX
1673	; SSE-128, int64 <- fp64 (single; truncated)
1674	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, RAX, XMM1
1675	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, RAX, FSxBX
1676	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8, XMM8
1677	EMIT_INSTR_PLUS_ICEBP_C64 cvttsd2si, R8, FSxBX
1678	; AVX-128, int32 <- fp64 (single; truncated)
1679	EMIT_INSTR_PLUS_ICEBP vcvttsd2si, EAX, XMM1
1680	EMIT_INSTR_PLUS_ICEBP vcvttsd2si, EAX, FSxBX
1681	EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8D, XMM8
1682	EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8D, FSxBX
1683	; AVX-128, int64 <- fp64 (single; truncated)
1684	EMIT_INSTR_PLUS_ICEBP vcvttsd2si, RAX, XMM1
1685	EMIT_INSTR_PLUS_ICEBP vcvttsd2si, RAX, FSxBX
1686	EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8, XMM8
1687	EMIT_INSTR_PLUS_ICEBP_C64 vcvttsd2si, R8, FSxBX
1688	; @todo test with VEX.W=1 in 16/32-bit modes; SDM says behaves as if W=0
1689	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1690
1691	;
1692	;; [v]cvtdq2ps
1693	;
1694	; SSE-128, fp32 <- int32 (packed:4)
1695	EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, XMM2
1696	EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, FSxBX
1697	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, XMM9
1698	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, FSxBX
1699	; AVX-128, fp32 <- int32 (packed:4)
1700	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, XMM2
1701	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, FSxBX
1702	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, XMM9
1703	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, FSxBX
1704	; AVX-256, fp32 <- int32 (packed:8)
1705	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, YMM2
1706	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, FSxBX
1707	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, YMM9
1708	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, FSxBX
1709	; SSE-128, fp32 <- int32, same-reg (packed:4)
1710	EMIT_INSTR_PLUS_ICEBP cvtdq2ps, XMM1, XMM1
1711	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2ps, XMM8, XMM8
1712	; AVX-128, fp32 <- int32, same-reg (packed:4)
1713	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, XMM1, XMM1
1714	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, XMM8, XMM8
1715	; AVX-256, fp32 <- int32, same-reg (packed:8)
1716	EMIT_INSTR_PLUS_ICEBP vcvtdq2ps, YMM1, YMM1
1717	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2ps, YMM8, YMM8
1718
1719	;
1720	;; [v]cvtps2dq
1721	;
1722	; SSE-128, int32 <- fp32 (packed:4)
1723	EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, XMM2
1724	EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, FSxBX
1725	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, XMM9
1726	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, FSxBX
1727	; AVX-128, int32 <- fp32 (packed:4)
1728	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, XMM2
1729	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, FSxBX
1730	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, XMM9
1731	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, FSxBX
1732	; AVX-256, int32 <- fp32 (packed:8)
1733	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, YMM2
1734	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, FSxBX
1735	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, YMM9
1736	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, FSxBX
1737	; SSE-128, int32 <- fp32, same-reg (packed:4)
1738	EMIT_INSTR_PLUS_ICEBP cvtps2dq, XMM1, XMM1
1739	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2dq, XMM8, XMM8
1740	; AVX-128, int32 <- fp32, same-reg (packed:4)
1741	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, XMM1, XMM1
1742	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, XMM8, XMM8
1743	; AVX-256, int32 <- fp32, same-reg (packed:8)
1744	EMIT_INSTR_PLUS_ICEBP vcvtps2dq, YMM1, YMM1
1745	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2dq, YMM8, YMM8
1746
1747	;
1748	;; [v]cvttps2dq
1749	;
1750	; SSE-128, int32 <- fp32 (packed:4; truncated)
1751	EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, XMM2
1752	EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, FSxBX
1753	EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, XMM9
1754	EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, FSxBX
1755	; AVX-128, int32 <- fp32 (packed:4; truncated)
1756	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, XMM2
1757	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, FSxBX
1758	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, XMM9
1759	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, FSxBX
1760	; AVX-256, int32 <- fp32 (packed:8; truncated)
1761	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, YMM2
1762	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, FSxBX
1763	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, YMM9
1764	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, FSxBX
1765	; AVX-128, int32 <- fp32, same-reg (packed:4; truncated)
1766	EMIT_INSTR_PLUS_ICEBP cvttps2dq, XMM1, XMM1
1767	EMIT_INSTR_PLUS_ICEBP_C64 cvttps2dq, XMM8, XMM8
1768	; AVX-128, int32 <- fp32, same-reg (packed:4; truncated)
1769	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, XMM1, XMM1
1770	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, XMM8, XMM8
1771	; AVX-256, int32 <- fp32, same-reg (packed:8; truncated)
1772	EMIT_INSTR_PLUS_ICEBP vcvttps2dq, YMM1, YMM1
1773	EMIT_INSTR_PLUS_ICEBP_C64 vcvttps2dq, YMM8, YMM8
1774
1775	;
1776	;; [v]cvtdq2pd
1777	;
1778	; SSE-128, fp64 <- int32 (packed:2)
1779	EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, XMM2
1780	EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, FSxBX
1781	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, XMM9
1782	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, FSxBX
1783	; AVX-128, fp64 <- int32 (packed:2)
1784	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, XMM2
1785	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, FSxBX
1786	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, XMM9
1787	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, FSxBX
1788	; AVX-256, fp64 <- int32 (packed:4)
1789	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, XMM2
1790	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, FSxBX
1791	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, XMM9
1792	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, FSxBX
1793	; SSE-128, fp64 <- int32, same-reg (packed:2)
1794	EMIT_INSTR_PLUS_ICEBP cvtdq2pd, XMM1, XMM1
1795	EMIT_INSTR_PLUS_ICEBP_C64 cvtdq2pd, XMM8, XMM8
1796	; AVX-128, fp64 <- int32, same-reg (packed:2)
1797	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, XMM1, XMM1
1798	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, XMM8, XMM8
1799	; AVX-256, fp64 <- int32, same-reg (packed:4)
1800	EMIT_INSTR_PLUS_ICEBP vcvtdq2pd, YMM1, XMM1
1801	EMIT_INSTR_PLUS_ICEBP_C64 vcvtdq2pd, YMM8, XMM8
1802
1803	;
1804	;; [v]cvtpd2dq
1805	;
1806	; SSE-128, int32 <- fp64 (packed:2)
1807	EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, XMM2
1808	EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, FSxBX
1809	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, XMM9
1810	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, FSxBX
1811	; AVX-128, int32 <- fp64 (packed:2)
1812	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, XMM2
1813	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, FSxBX
1814	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, XMM9
1815	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, FSxBX
1816	; AVX-256, int32 <- fp64 (packed:4)
1817	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, YMM2
1818	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, FSxBX_Y
1819	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, YMM9
1820	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, FSxBX_Y
1821	; SSE-128, int32 <- fp64, same-reg (packed:2)
1822	EMIT_INSTR_PLUS_ICEBP cvtpd2dq, XMM1, XMM1
1823	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2dq, XMM8, XMM8
1824	; AVX-128, int32 <- fp64, same-reg (packed:2)
1825	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, XMM1
1826	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, XMM8
1827	; AVX-256, int32 <- fp64, same-reg (packed:4)
1828	EMIT_INSTR_PLUS_ICEBP vcvtpd2dq, XMM1, YMM1
1829	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2dq, XMM8, YMM8
1830
1831	;
1832	;; [v]cvttpd2dq
1833	;
1834	; SSE-128, int32 <- fp64 (packed:2; truncated)
1835	EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, XMM2
1836	EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, FSxBX
1837	EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, XMM9
1838	EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, FSxBX
1839	; AVX-128, int32 <- fp64 (packed:2; truncated)
1840	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, XMM2
1841	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, FSxBX
1842	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, XMM9
1843	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, FSxBX
1844	; AVX-256, int32 <- fp64 (packed:4; truncated)
1845	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, YMM2
1846	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, FSxBX_Y
1847	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, YMM9
1848	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, FSxBX_Y
1849	; AVX-128, int32 <- fp64, same-reg (packed:2; truncated)
1850	EMIT_INSTR_PLUS_ICEBP cvttpd2dq, XMM1, XMM1
1851	EMIT_INSTR_PLUS_ICEBP_C64 cvttpd2dq, XMM8, XMM8
1852	; AVX-128, int32 <- fp64, same-reg (packed:2; truncated)
1853	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, XMM1
1854	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, XMM8
1855	; AVX-256, int32 <- fp64, same-reg (packed:4; truncated)
1856	EMIT_INSTR_PLUS_ICEBP vcvttpd2dq, XMM1, YMM1
1857	EMIT_INSTR_PLUS_ICEBP_C64 vcvttpd2dq, XMM8, YMM8
1858
1859	;
1860	;; [v]cvtpd2ps
1861	;
1862	; SSE-128, fp32 <- fp64 (packed:2)
1863	EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, XMM2
1864	EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, FSxBX
1865	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, XMM9
1866	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, FSxBX
1867	; AVX-128, fp32 <- fp64 (packed:2)
1868	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, XMM2
1869	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, FSxBX_O
1870	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, XMM9
1871	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, FSxBX_O
1872	; AVX-256, fp32 <- fp64 (packed:4)
1873	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, YMM2
1874	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, FSxBX_Y
1875	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, YMM9
1876	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, FSxBX_Y
1877	; SSE-128, fp32 <- fp64, same-reg (packed:2)
1878	EMIT_INSTR_PLUS_ICEBP cvtpd2ps, XMM1, XMM1
1879	EMIT_INSTR_PLUS_ICEBP_C64 cvtpd2ps, XMM8, XMM8
1880	; AVX-128, fp32 <- fp64, same-reg (packed:2)
1881	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, XMM1
1882	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, XMM8
1883	; AVX-256, fp32 <- fp64, same-reg (packed:4)
1884	EMIT_INSTR_PLUS_ICEBP vcvtpd2ps, XMM1, YMM1
1885	EMIT_INSTR_PLUS_ICEBP_C64 vcvtpd2ps, XMM8, YMM8
1886
1887	;
1888	;; [v]cvtps2pd
1889	;
1890	; SSE-128, fp64 <- fp32 (packed:2)
1891	EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, XMM2
1892	EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, FSxBX
1893	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, XMM9
1894	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, FSxBX
1895	; AVX-128, fp64 <- fp32 (packed:2)
1896	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, XMM2
1897	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, FSxBX
1898	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, XMM9
1899	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, FSxBX
1900	; AVX-256, fp64 <- fp32 (packed:4)
1901	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, XMM2
1902	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, FSxBX
1903	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, XMM9
1904	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, FSxBX
1905	; SSE-128, fp64 <- fp32, same-reg (packed:2)
1906	EMIT_INSTR_PLUS_ICEBP cvtps2pd, XMM1, XMM1
1907	EMIT_INSTR_PLUS_ICEBP_C64 cvtps2pd, XMM8, XMM8
1908	; AVX-128, fp64 <- fp32, same-reg (packed:2)
1909	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, XMM1, XMM1
1910	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, XMM8, XMM8
1911	; AVX-256, fp64 <- fp32, same-reg (packed:4)
1912	EMIT_INSTR_PLUS_ICEBP vcvtps2pd, YMM1, XMM1
1913	EMIT_INSTR_PLUS_ICEBP_C64 vcvtps2pd, YMM8, XMM8
1914
1915	;
1916	;; [v]cvtsd2ss
1917	;
1918	; SSE-128, fp32 <- fp64 (single)
1919	EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, XMM2
1920	EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, FSxBX
1921	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, XMM9
1922	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, FSxBX
1923	; AVX-128, fp32 <- fp64 (single)
1924	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM3
1925	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, FSxBX
1926	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM10
1927	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, FSxBX
1928	; SSE-128, fp32 <- fp64, same-reg (single)
1929	EMIT_INSTR_PLUS_ICEBP cvtsd2ss, XMM1, XMM1
1930	EMIT_INSTR_PLUS_ICEBP_C64 cvtsd2ss, XMM8, XMM8
1931	; AVX-128, fp32 <- fp64, same-reg (single)
1932	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, XMM1
1933	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, XMM2
1934	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM1
1935	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM2, XMM2
1936	EMIT_INSTR_PLUS_ICEBP vcvtsd2ss, XMM1, XMM1, FSxBX
1937	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, XMM8
1938	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, XMM9
1939	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM8
1940	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM9, XMM9
1941	EMIT_INSTR_PLUS_ICEBP_C64 vcvtsd2ss, XMM8, XMM8, FSxBX
1942	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1943
1944	;
1945	;; [v]cvtss2sd
1946	;
1947	; SSE-128, fp64 <- fp32 (single)
1948	EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, XMM2
1949	EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, FSxBX
1950	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, XMM9
1951	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, FSxBX
1952	; AVX-128, fp64 <- fp32 (single)
1953	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM3
1954	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, FSxBX
1955	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM10
1956	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, FSxBX
1957	; SSE-128, fp64 <- fp32, same-reg (single)
1958	EMIT_INSTR_PLUS_ICEBP cvtss2sd, XMM1, XMM1
1959	EMIT_INSTR_PLUS_ICEBP_C64 cvtss2sd, XMM8, XMM8
1960	; AVX-128, fp64 <- fp32, same-reg (single)
1961	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, XMM1
1962	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, XMM2
1963	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM1
1964	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM2, XMM2
1965	EMIT_INSTR_PLUS_ICEBP vcvtss2sd, XMM1, XMM1, FSxBX
1966	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, XMM8
1967	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, XMM9
1968	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM8
1969	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM9, XMM9
1970	EMIT_INSTR_PLUS_ICEBP_C64 vcvtss2sd, XMM8, XMM8, FSxBX
1971	; @todo test with VEX.L=1 (as if asking for YMM)? SDM says 'unpredictable behavior'...
1972
1973	%endif ; BS3_CPU_INSTR_4
1974
1975	%endif ; BS3_INSTANTIATING_CMN
1976
1977	%include "bs3kit-template-footer.mac" ; reset environment

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