1 | ; $Id: bs3-cpu-basic-3-cmn-template.mac 102182 2023-11-21 09:46:33Z vboxsync $
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2 | ;; @file
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3 | ; BS3Kit - bs3-cpu-basic-3 assembly template, common code (CMN).
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2007-2023 Oracle and/or its affiliates.
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8 | ;
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9 | ; This file is part of VirtualBox base platform packages, as
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10 | ; available from https://www.virtualbox.org.
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11 | ;
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12 | ; This program is free software; you can redistribute it and/or
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13 | ; modify it under the terms of the GNU General Public License
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14 | ; as published by the Free Software Foundation, in version 3 of the
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15 | ; License.
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16 | ;
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17 | ; This program is distributed in the hope that it will be useful, but
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18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | ; General Public License for more details.
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21 | ;
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22 | ; You should have received a copy of the GNU General Public License
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23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | ;
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25 | ; The contents of this file may alternatively be used under the terms
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26 | ; of the Common Development and Distribution License Version 1.0
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27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | ; in the VirtualBox distribution, in which case the provisions of the
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29 | ; CDDL are applicable instead of those of the GPL.
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30 | ;
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31 | ; You may elect to license modified versions of this file under the
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32 | ; terms and conditions of either the GPL or the CDDL or both.
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33 | ;
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34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | ;
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36 |
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37 |
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38 | ;*********************************************************************************************************************************
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39 | ;* Header Files *
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40 | ;*********************************************************************************************************************************
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41 | %include "bs3kit-template-header.mac" ; setup environment
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42 |
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43 |
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44 | TMPL_BEGIN_TEXT
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45 |
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46 |
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47 | ;*********************************************************************************************************************************
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48 | ;* External Symbols *
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49 | ;*********************************************************************************************************************************
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50 | extern _Bs3Text16_StartOfSegment
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51 |
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52 |
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53 | ;*********************************************************************************************************************************
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54 | ;* LEA - in BS3X1TEXT16 *
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55 | ;*********************************************************************************************************************************
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56 |
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57 | %define LEA_EAX 011111110h
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58 | %define LEA_ECX 022222202h
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59 | %define LEA_EDX 033333033h
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60 | %define LEA_EBX 044440444h
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61 | %define LEA_ESP 051525356h
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62 | %define LEA_EBP 055555551h
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63 | %define LEA_ESI 066666616h
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64 | %define LEA_EDI 077777177h
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65 |
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66 |
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67 |
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68 | ;
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69 | ; Switching segment for the 16-bit stuff, this may need some space.
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70 | ;
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71 | %if TMPL_BITS == 16
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72 | BS3_BEGIN_X0TEXT16
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73 | %else
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74 | TMPL_BEGIN_TEXT
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75 | %endif
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76 |
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77 |
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78 | %if TMPL_BITS != 64
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79 | ;
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80 | ; Macros for 16-bit lea tests.
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81 | ;
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82 | %ifndef BS3CPUBASIC3_LEA_16_MACROS
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83 | %define BS3CPUBASIC3_LEA_16_MACROS
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84 | %macro test_lea_16_one 3
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85 | call .load_regs
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86 | lea strict %1, strict %2
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87 | cmp %1, %3 & 0ffffh
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88 | jz %%okay
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89 | int3
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90 | %%okay:
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91 | %endm
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92 | %macro test_lea_16_inner 2
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93 | test_lea_16_one ax, %1, %2
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94 | test_lea_16_one cx, %1, %2
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95 | test_lea_16_one dx, %1, %2
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96 | test_lea_16_one bx, %1, %2
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97 | test_lea_16_one bp, %1, %2
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98 | test_lea_16_one si, %1, %2
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99 | test_lea_16_one di, %1, %2
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100 |
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101 | test_lea_16_one eax, %1, %2
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102 | test_lea_16_one ecx, %1, %2
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103 | test_lea_16_one edx, %1, %2
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104 | test_lea_16_one ebx, %1, %2
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105 | test_lea_16_one ebp, %1, %2
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106 | test_lea_16_one esi, %1, %2
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107 | test_lea_16_one edi, %1, %2
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108 | %endm
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109 | %macro test_lea_16_outer 3
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110 | %if %1 == 0
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111 | test_lea_16_inner [%2], %3
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112 | %else
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113 | test_lea_16_inner [word %3], %3 ; mod0/6 = disp16
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114 | %endif
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115 | test_lea_16_inner [%2 + 07fh], %3 + 7fh
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116 | test_lea_16_inner [%2 - 19], %3 - 19
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117 | test_lea_16_inner [%2 + 5708h], %3 + 5708h
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118 | test_lea_16_inner [%2 - 7293h], %3 - 7293h
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119 | %endm
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120 | %endif
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121 |
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122 | ;;
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123 | ; Tests 16-bit addressing using the LEA instruction.
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124 | ;
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125 | BS3_PROC_BEGIN_CMN bs3CpuBasic3_lea_16, BS3_PBC_FAR
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126 | pushad
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127 |
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128 | test_lea_16_outer 0, bx + si, 00444h+06616h
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129 | test_lea_16_outer 0, bx + di, 00444h+07177h
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130 | test_lea_16_outer 0, bp + si, 05551h+06616h
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131 | test_lea_16_outer 0, bp + di, 05551h+07177h
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132 | test_lea_16_outer 0, si, 06616h
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133 | test_lea_16_outer 0, di, 07177h
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134 | test_lea_16_outer 1, bp, 05551h
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135 | test_lea_16_outer 0, bx, 00444h
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136 |
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137 | popad
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138 | BS3_HYBRID_RET
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139 |
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140 | .load_regs:
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141 | mov eax, LEA_EAX
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142 | mov ecx, LEA_ECX
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143 | mov edx, LEA_EDX
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144 | mov ebx, LEA_EBX
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145 | mov ebp, LEA_EBP
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146 | mov esi, LEA_ESI
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147 | mov edi, LEA_EDI
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148 | ret
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149 | BS3_PROC_END_CMN bs3CpuBasic3_lea_16
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150 |
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151 |
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152 | ;
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153 | ; Switching segment for the 16-bit stuff, SIB needs too much space.
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154 | ;
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155 | %if TMPL_BITS == 16
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156 | BS3_BEGIN_X1TEXT16
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157 | %endif
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158 |
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159 | ;
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160 | ; Macros for 32-bit lea tests.
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161 | ;
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162 | %if TMPL_BITS == 16
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163 | %define MY_O16 67h,
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164 | %define MY_O32 67h, 66h,
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165 | %define MY_CMP_O32 66h,
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166 | %else
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167 | %define MY_O16 66h,
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168 | %define MY_O32
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169 | %define MY_CMP_O32
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170 | %endif
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171 |
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172 | ;;
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173 | ; Tests 32-bit addressing using the LEA instruction.
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174 | ;
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175 | BS3_PROC_BEGIN_CMN bs3CpuBasic3_lea_32, BS3_PBC_FAR
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176 | pushad
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177 | mov [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))], esp
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178 |
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179 | ;
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180 | ; Loop thru all the modr/m memory encodings.
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181 | ;
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182 | %assign iMod 0
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183 | %rep 3
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184 | %assign iDstReg 0
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185 | %rep 8
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186 | %assign iMemReg 0
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187 | %rep 8
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188 | %if iDstReg == 0
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189 | %assign iDstReg_Value LEA_EAX
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190 | %elif iDstReg == 1
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191 | %assign iDstReg_Value LEA_ECX
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192 | %elif iDstReg == 2
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193 | %assign iDstReg_Value LEA_EDX
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194 | %elif iDstReg == 3
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195 | %assign iDstReg_Value LEA_EBX
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196 | %elif iDstReg == 4
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197 | %assign iDstReg_Value LEA_ESP
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198 | %elif iDstReg == 5
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199 | %assign iDstReg_Value LEA_EBP
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200 | %elif iDstReg == 6
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201 | %assign iDstReg_Value LEA_ESI
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202 | %elif iDstReg == 7
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203 | %assign iDstReg_Value LEA_EDI
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204 | %else
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205 | %error iDstReg
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206 | %endif
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207 |
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208 | %if iMemReg == 4
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209 | ;
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210 | ; SIB.
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211 | ;
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212 | %assign iBase 0
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213 | %rep 8
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214 | %if iBase == 0
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215 | %assign iBase_Value LEA_EAX
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216 | %elif iBase == 1
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217 | %assign iBase_Value LEA_ECX
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218 | %elif iBase == 2
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219 | %assign iBase_Value LEA_EDX
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220 | %elif iBase == 3
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221 | %assign iBase_Value LEA_EBX
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222 | %elif iBase == 4
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223 | %assign iBase_Value LEA_ESP
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224 | %elif iBase == 5 && iMod == 0
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225 | %assign iBase_Value 0
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226 | %elif iBase == 5
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227 | %assign iBase_Value LEA_EBP
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228 | %elif iBase == 6
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229 | %assign iBase_Value LEA_ESI
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230 | %elif iBase == 7
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231 | %assign iBase_Value LEA_EDI
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232 | %else
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233 | %error iBase
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234 | %endif
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235 |
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236 | %assign iIndex 0
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237 | %assign cShift 0 ; we don't have enough room for checking all the shifts in the 16-bit segment or the total image.
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238 | %rep 8
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239 | %if iIndex == 0
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240 | %assign iIndex_Value LEA_EAX
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241 | %elif iIndex == 1
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242 | %assign iIndex_Value LEA_ECX
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243 | %elif iIndex == 2
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244 | %assign iIndex_Value LEA_EDX
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245 | %elif iIndex == 3
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246 | %assign iIndex_Value LEA_EBX
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247 | %elif iIndex == 4
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248 | %assign iIndex_Value 0
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249 | %elif iIndex == 5
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250 | %assign iIndex_Value LEA_EBP
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251 | %elif iIndex == 6
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252 | %assign iIndex_Value LEA_ESI
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253 | %elif iIndex == 7
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254 | %assign iIndex_Value LEA_EDI
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255 | %else
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256 | %error iIndex
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257 | %endif
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258 |
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259 | ;
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260 | ; We don't test all shift combinations, there just isn't enough space
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261 | ; in the image (32-bit case) or the segment (16-bit case) unfortunately.
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262 | ;
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263 | %if TMPL_BITS == 32
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264 | %assign cShiftLoops 2
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265 | %else
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266 | %assign cShiftLoops 1
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267 | %endif
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268 | %rep cShiftLoops
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269 |
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270 | ;
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271 | ; LEA+SIB w/ 32-bit operand size.
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272 | ;
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273 | call .load_regs
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274 | %if iBase == 4 || iDstReg == 4
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275 | mov esp, LEA_ESP
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276 | %endif
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277 |
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278 | ; lea
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279 | %assign iValue iBase_Value + (iIndex_Value << cShift)
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280 | db MY_O32 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift)
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281 | %if iMod == X86_MOD_MEM1
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282 | db -119
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283 | %assign iValue iValue - 119
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284 | %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iBase == 5)
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285 | dd -04353f1ech
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286 | %assign iValue iValue - 04353f1ech
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287 | %endif
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288 |
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289 | ; cmp iDstReg, iValue
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290 | db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg)
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291 | dd iValue & 0ffffffffh
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292 | %if iBase == 4 || iDstReg == 4
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293 | mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))]
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294 | %endif
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295 | jz $+3
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296 | int3
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297 | %assign cShift (cShift + 1) & 3
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298 |
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299 | ;
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300 | ; LEA+SIB w/ 16-bit operand size.
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301 | ;
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302 | %if TMPL_BITS == 32 ; No room in the 16-bit segment for all of this.
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303 | call .load_regs
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304 | %if iBase == 4 || iDstReg == 4
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305 | mov esp, LEA_ESP
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306 | %endif
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307 |
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308 | ; lea
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309 | %assign iValue iBase_Value + (iIndex_Value << cShift)
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310 | db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg), X86_SIB_MAKE(iBase, iIndex, cShift)
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311 | %if iMod == X86_MOD_MEM1
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312 | db -7
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313 | %assign iValue iValue - 7
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314 | %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iBase == 5)
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315 | dd -073d676e4h
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316 | %assign iValue iValue - 073d676e4h
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317 | %endif
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318 |
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319 | ; cmp iDstReg, iValue
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320 | db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg)
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321 | dd (iValue & 00000ffffh) | (iDstReg_Value & 0ffff0000h)
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322 | %if 1 || iBase == 4 || iDstReg == 4
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323 | mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))]
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324 | %endif
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325 | jz $+3
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326 | int3
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327 | %assign cShift (cShift + 2) & 3
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328 | %endif ; TMPL_BITS == 32
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329 | %endrep
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330 | %assign iIndex iIndex + 1
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331 | %endrep
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332 | %assign iBase iBase + 1
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333 | %endrep
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334 |
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335 | %else ; !SIB
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336 | ;
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337 | ; Plain lea reg, [reg] with disp according to iMod,
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338 | ; or lea reg, [disp32] if iMemReg == 5 && iMod == 0.
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339 | ;
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340 | %if iMemReg == 0
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341 | %assign iMemReg_Value LEA_EAX
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342 | %elif iMemReg == 1
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343 | %assign iMemReg_Value LEA_ECX
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344 | %elif iMemReg == 2
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345 | %assign iMemReg_Value LEA_EDX
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346 | %elif iMemReg == 3
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347 | %assign iMemReg_Value LEA_EBX
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348 | %elif iMemReg == 5 && iMod == 0
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349 | %assign iMemReg_Value 0
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350 | %elif iMemReg == 5
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351 | %assign iMemReg_Value LEA_EBP
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352 | %elif iMemReg == 6
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353 | %assign iMemReg_Value LEA_ESI
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354 | %elif iMemReg == 7
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355 | %assign iMemReg_Value LEA_EDI
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356 | %else
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357 | %error iMemReg
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358 | %endif
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359 |
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360 | ;
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361 | ; 32-bit operand size first.
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362 | ;
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363 | call .load_regs
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364 | %if iDstReg == 4
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365 | mov esp, LEA_ESP
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366 | %endif
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367 |
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368 | ; lea
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369 | %assign iValue iMemReg_Value
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370 | db MY_O32 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg)
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371 | %if iMod == X86_MOD_MEM1
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372 | db 89
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373 | %assign iValue iValue + 89
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374 | %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5)
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375 | dd 058739af8h
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376 | %assign iValue iValue + 058739af8h
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377 | %endif
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378 |
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379 | ; cmp iDstReg, iValue
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380 | db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg)
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381 | dd iValue & 0ffffffffh
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382 | %if iDstReg == 4
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383 | mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))]
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384 | %endif
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385 | jz $+3
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386 | int3
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387 |
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388 | ;
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389 | ; 16-bit operand size next.
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390 | ;
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391 | call .load_regs
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392 | %if iDstReg == 4
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393 | mov esp, LEA_ESP
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394 | %endif
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395 |
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396 | ; lea
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397 | %assign iValue iMemReg_Value
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398 | db MY_O16 8dh, X86_MODRM_MAKE(iMod, iDstReg, iMemReg)
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399 | %if iMod == X86_MOD_MEM1
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400 | db -98
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401 | %assign iValue iValue - 98
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402 | %elif iMod == X86_MOD_MEM4 || (iMod == 0 && iMemReg == 5)
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403 | dd 0f3694352h
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404 | %assign iValue iValue + 0f3694352h
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405 | %endif
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406 |
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407 | ; cmp iDstReg, iValue
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408 | db MY_CMP_O32 81h, X86_MODRM_MAKE(X86_MOD_REG, 7, iDstReg)
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409 | dd (iValue & 00000ffffh) | (iDstReg_Value & 0ffff0000h)
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410 | %if iDstReg == 4
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411 | mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))]
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412 | %endif
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413 | jz $+3
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414 | int3
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415 |
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416 | %endif ; !SIB
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417 | %assign iMemReg iMemReg + 1
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418 | %endrep
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419 | %assign iDstReg iDstReg + 1
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420 | %endrep
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421 | %assign iMod iMod + 1
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422 | %endrep
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423 |
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424 | mov esp, [BS3_DATA16_WRT(BS3_DATA_NM(g_bs3CpuBasic3_lea_rsp))]
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425 | popad
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426 | BS3_HYBRID_RET
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427 |
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428 | .load_regs:
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429 | mov eax, LEA_EAX
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430 | mov ecx, LEA_ECX
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431 | mov edx, LEA_EDX
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432 | mov ebx, LEA_EBX
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433 | mov ebp, LEA_EBP
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434 | mov esi, LEA_ESI
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435 | mov edi, LEA_EDI
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436 | ret
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437 | BS3_PROC_END_CMN bs3CpuBasic3_lea_32
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438 |
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439 | %endif ; TMPL_BITS != 64
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440 |
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441 |
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442 | %include "bs3kit-template-footer.mac" ; reset environment
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443 |
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