VirtualBox

source: vbox/trunk/src/VBox/ValidationKit/bootsectors/bs3-apic-1.c@ 103131

Last change on this file since 103131 was 98103, checked in by vboxsync, 21 months ago

Copyright year updates by scm.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 4.5 KB
Line 
1/* $Id: bs3-apic-1.c 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * BS3Kit - bs3-apic-1, 16-bit C code.
4 */
5
6/*
7 * Copyright (C) 2007-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * The contents of this file may alternatively be used under the terms
26 * of the Common Development and Distribution License Version 1.0
27 * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
28 * in the VirtualBox distribution, in which case the provisions of the
29 * CDDL are applicable instead of those of the GPL.
30 *
31 * You may elect to license modified versions of this file under the
32 * terms and conditions of either the GPL or the CDDL or both.
33 *
34 * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
35 */
36
37
38/*********************************************************************************************************************************
39* Header Files *
40*********************************************************************************************************************************/
41#include <bs3kit.h>
42#include <iprt/asm-amd64-x86.h>
43#include <iprt/x86.h>
44
45
46/*********************************************************************************************************************************
47* Internal Functions *
48*********************************************************************************************************************************/
49BS3_DECL_CALLBACK(void) ProtModeApicTests(void);
50
51
52BS3_DECL(void) Main_rm()
53{
54 Bs3InitAll_rm();
55 Bs3TestInit("bs3-apic-1");
56 Bs3TestPrintf("g_uBs3CpuDetected=%#x\n", g_uBs3CpuDetected);
57 Bs3TestSub("real-mode");
58
59 /*
60 * Check that there is an APIC
61 */
62 if (!(g_uBs3CpuDetected & BS3CPU_F_CPUID))
63 Bs3TestFailed("CPUID not supported");
64 else if (!(ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_MSR))
65 Bs3TestFailed("No APIC: RDMSR/WRMSR not supported!");
66 else if (!(ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_APIC))
67 Bs3TestFailed("No APIC: CPUID(1) does not have EDX_APIC set!\n");
68 else
69 {
70 uint64_t uApicBase2;
71 uint64_t uApicBase = ASMRdMsr(MSR_IA32_APICBASE);
72 Bs3TestPrintf("MSR_IA32_APICBASE=%#RX64 %s, %s cpu%s\n",
73 uApicBase,
74 uApicBase & MSR_IA32_APICBASE_EN ? "enabled" : "disabled",
75 uApicBase & MSR_IA32_APICBASE_BSP ? "bootstrap" : "slave",
76 uApicBase & MSR_IA32_APICBASE_EXTD ? ", x2apic" : "",
77 (uApicBase & X86_PAGE_4K_BASE_MASK) == MSR_IA32_APICBASE_ADDR ? ", !non-default address!" : "");
78
79 /* Disable the APIC (according to wiki.osdev.org/APIC, disabling the
80 APIC could require a CPU reset to re-enable it, but it works for us): */
81 ASMWrMsr(MSR_IA32_APICBASE, uApicBase & ~(uint64_t)MSR_IA32_APICBASE_EN);
82 uApicBase2 = ASMRdMsr(MSR_IA32_APICBASE);
83 if (uApicBase2 == (uApicBase & ~(uint64_t)MSR_IA32_APICBASE_EN))
84 Bs3TestPrintf("Disabling worked.\n");
85 else
86 Bs3TestFailedF("Disabling the APIC did not work (%#RX64)", uApicBase2);
87
88 /* Enabling the APIC: */
89 ASMWrMsr(MSR_IA32_APICBASE, uApicBase | MSR_IA32_APICBASE_EN);
90 uApicBase2 = ASMRdMsr(MSR_IA32_APICBASE);
91 if (uApicBase2 == (uApicBase | MSR_IA32_APICBASE_EN))
92 {
93 Bs3TestPrintf("Enabling worked.\n");
94
95 /*
96 * Do the rest of the testing in protected mode since we cannot
97 * (easily) access the APIC address from real mode.
98 */
99 Bs3SwitchTo32BitAndCallC_rm(ProtModeApicTests, 0);
100 }
101 else
102 Bs3TestFailedF("Enabling the APIC did not work (%#RX64)", uApicBase2);
103 }
104
105 Bs3TestTerm();
106 Bs3Shutdown();
107}
108
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette