VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 74795

Last change on this file since 74795 was 72493, checked in by vboxsync, 6 years ago

IEM,REM,++: Removed code related IEM_VERIFICATION_MODE and friends because it (1) adds aditional complexity and mess, (2) suffers bit rot as it's infrequently used, and (3) prevents using pVCpu->cpum.GstCtx directly.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 50.0 KB
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1/* $Id: PDMInternal.h 72493 2018-06-10 16:08:44Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___PDMInternal_h
19#define ___PDMInternal_h
20
21#include <VBox/types.h>
22#include <VBox/param.h>
23#include <VBox/vmm/cfgm.h>
24#include <VBox/vmm/stam.h>
25#include <VBox/vusb.h>
26#include <VBox/vmm/pdmasynccompletion.h>
27#ifdef VBOX_WITH_NETSHAPER
28# include <VBox/vmm/pdmnetshaper.h>
29#endif
30#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
31# include <VBox/vmm/pdmasynccompletion.h>
32#endif
33#include <VBox/vmm/pdmblkcache.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/sup.h>
36#include <iprt/assert.h>
37#include <iprt/critsect.h>
38#ifdef IN_RING3
39# include <iprt/thread.h>
40#endif
41
42RT_C_DECLS_BEGIN
43
44
45/** @defgroup grp_pdm_int Internal
46 * @ingroup grp_pdm
47 * @internal
48 * @{
49 */
50
51/** @def PDM_WITH_R3R0_CRIT_SECT
52 * Enables or disabled ring-3/ring-0 critical sections. */
53#if defined(DOXYGEN_RUNNING) || 1
54# define PDM_WITH_R3R0_CRIT_SECT
55#endif
56
57/** @def PDMCRITSECT_STRICT
58 * Enables/disables PDM critsect strictness like deadlock detection. */
59#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
60 || defined(DOXYGEN_RUNNING)
61# define PDMCRITSECT_STRICT
62#endif
63
64/** @def PDMCRITSECT_STRICT
65 * Enables/disables PDM read/write critsect strictness like deadlock
66 * detection. */
67#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
68 || defined(DOXYGEN_RUNNING)
69# define PDMCRITSECTRW_STRICT
70#endif
71
72
73/*******************************************************************************
74* Structures and Typedefs *
75*******************************************************************************/
76
77/** Pointer to a PDM Device. */
78typedef struct PDMDEV *PPDMDEV;
79/** Pointer to a pointer to a PDM Device. */
80typedef PPDMDEV *PPPDMDEV;
81
82/** Pointer to a PDM USB Device. */
83typedef struct PDMUSB *PPDMUSB;
84/** Pointer to a pointer to a PDM USB Device. */
85typedef PPDMUSB *PPPDMUSB;
86
87/** Pointer to a PDM Driver. */
88typedef struct PDMDRV *PPDMDRV;
89/** Pointer to a pointer to a PDM Driver. */
90typedef PPDMDRV *PPPDMDRV;
91
92/** Pointer to a PDM Logical Unit. */
93typedef struct PDMLUN *PPDMLUN;
94/** Pointer to a pointer to a PDM Logical Unit. */
95typedef PPDMLUN *PPPDMLUN;
96
97/** Pointer to a PDM PCI Bus instance. */
98typedef struct PDMPCIBUS *PPDMPCIBUS;
99/** Pointer to a DMAC instance. */
100typedef struct PDMDMAC *PPDMDMAC;
101/** Pointer to a RTC instance. */
102typedef struct PDMRTC *PPDMRTC;
103
104/** Pointer to an USB HUB registration record. */
105typedef struct PDMUSBHUB *PPDMUSBHUB;
106
107/**
108 * Supported asynchronous completion endpoint classes.
109 */
110typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
111{
112 /** File class. */
113 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
114 /** Number of supported classes. */
115 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
116 /** 32bit hack. */
117 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
118} PDMASYNCCOMPLETIONEPCLASSTYPE;
119
120/**
121 * Private device instance data.
122 */
123typedef struct PDMDEVINSINT
124{
125 /** Pointer to the next instance (HC Ptr).
126 * (Head is pointed to by PDM::pDevInstances.) */
127 R3PTRTYPE(PPDMDEVINS) pNextR3;
128 /** Pointer to the next per device instance (HC Ptr).
129 * (Head is pointed to by PDMDEV::pInstances.) */
130 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
131 /** Pointer to device structure - HC Ptr. */
132 R3PTRTYPE(PPDMDEV) pDevR3;
133 /** Pointer to the list of logical units associated with the device. (FIFO) */
134 R3PTRTYPE(PPDMLUN) pLunsR3;
135 /** Pointer to the asynchronous notification callback set while in
136 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
137 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
138 /** Configuration handle to the instance node. */
139 R3PTRTYPE(PCFGMNODE) pCfgHandle;
140
141 /** R3 pointer to the VM this instance was created for. */
142 PVMR3 pVMR3;
143 /** Associated PCI device list head (first is default). (R3 ptr) */
144 R3PTRTYPE(PPDMPCIDEV) pHeadPciDevR3;
145
146 /** R0 pointer to the VM this instance was created for. */
147 PVMR0 pVMR0;
148 /** Associated PCI device list head (first is default). (R0 ptr) */
149 R0PTRTYPE(PPDMPCIDEV) pHeadPciDevR0;
150
151 /** RC pointer to the VM this instance was created for. */
152 PVMRC pVMRC;
153 /** Associated PCI device list head (first is default). (RC ptr) */
154 RCPTRTYPE(PPDMPCIDEV) pHeadPciDevRC;
155
156 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
157 uint32_t fIntFlags;
158 /** The last IRQ tag (for tracing it thru clearing). */
159 uint32_t uLastIrqTag;
160} PDMDEVINSINT;
161
162/** @name PDMDEVINSINT::fIntFlags
163 * @{ */
164/** Used by pdmR3Load to mark device instances it found in the saved state. */
165#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
166/** Indicates that the device hasn't been powered on or resumed.
167 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
168 * to make sure each device gets exactly one notification for each of those
169 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
170 * a failure (already resumed/powered-on devices are suspended).
171 * PDMR3PowerOff resets this flag once before going through the devices to make sure
172 * every device gets the power off notification even if it was suspended before with
173 * PDMR3Suspend.
174 */
175#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
176/** Indicates that the device has been reset already. Used by PDMR3Reset. */
177#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
178/** @} */
179
180
181/**
182 * Private USB device instance data.
183 */
184typedef struct PDMUSBINSINT
185{
186 /** The UUID of this instance. */
187 RTUUID Uuid;
188 /** Pointer to the next instance.
189 * (Head is pointed to by PDM::pUsbInstances.) */
190 R3PTRTYPE(PPDMUSBINS) pNext;
191 /** Pointer to the next per USB device instance.
192 * (Head is pointed to by PDMUSB::pInstances.) */
193 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
194
195 /** Pointer to device structure. */
196 R3PTRTYPE(PPDMUSB) pUsbDev;
197
198 /** Pointer to the VM this instance was created for. */
199 PVMR3 pVM;
200 /** Pointer to the list of logical units associated with the device. (FIFO) */
201 R3PTRTYPE(PPDMLUN) pLuns;
202 /** The per instance device configuration. */
203 R3PTRTYPE(PCFGMNODE) pCfg;
204 /** Same as pCfg if the configuration should be deleted when detaching the device. */
205 R3PTRTYPE(PCFGMNODE) pCfgDelete;
206 /** The global device configuration. */
207 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
208
209 /** Pointer to the USB hub this device is attached to.
210 * This is NULL if the device isn't connected to any HUB. */
211 R3PTRTYPE(PPDMUSBHUB) pHub;
212 /** The port number that we're connected to. */
213 uint32_t iPort;
214 /** Indicates that the USB device hasn't been powered on or resumed.
215 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
216 bool fVMSuspended;
217 /** Indicates that the USB device has been reset. */
218 bool fVMReset;
219 /** Pointer to the asynchronous notification callback set while in
220 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
221 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
222} PDMUSBINSINT;
223
224
225/**
226 * Private driver instance data.
227 */
228typedef struct PDMDRVINSINT
229{
230 /** Pointer to the driver instance above.
231 * This is NULL for the topmost drive. */
232 R3PTRTYPE(PPDMDRVINS) pUp;
233 /** Pointer to the driver instance below.
234 * This is NULL for the bottommost driver. */
235 R3PTRTYPE(PPDMDRVINS) pDown;
236 /** Pointer to the logical unit this driver chained on. */
237 R3PTRTYPE(PPDMLUN) pLun;
238 /** Pointer to driver structure from which this was instantiated. */
239 R3PTRTYPE(PPDMDRV) pDrv;
240 /** Pointer to the VM this instance was created for, ring-3 context. */
241 PVMR3 pVMR3;
242 /** Pointer to the VM this instance was created for, ring-0 context. */
243 PVMR0 pVMR0;
244 /** Pointer to the VM this instance was created for, raw-mode context. */
245 PVMRC pVMRC;
246 /** Flag indicating that the driver is being detached and destroyed.
247 * (Helps detect potential recursive detaching.) */
248 bool fDetaching;
249 /** Indicates that the driver hasn't been powered on or resumed.
250 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
251 bool fVMSuspended;
252 /** Indicates that the driver has been reset already. */
253 bool fVMReset;
254 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
255 bool fHyperHeap;
256 /** Pointer to the asynchronous notification callback set while in
257 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
258 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
259 /** Configuration handle to the instance node. */
260 R3PTRTYPE(PCFGMNODE) pCfgHandle;
261 /** Pointer to the ring-0 request handler function. */
262 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
263} PDMDRVINSINT;
264
265
266/**
267 * Private critical section data.
268 */
269typedef struct PDMCRITSECTINT
270{
271 /** The critical section core which is shared with IPRT.
272 * @note The semaphore is a SUPSEMEVENT. */
273 RTCRITSECT Core;
274 /** Pointer to the next critical section.
275 * This chain is used for relocating pVMRC and device cleanup. */
276 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
277 /** Owner identifier.
278 * This is pDevIns if the owner is a device. Similarly for a driver or service.
279 * PDMR3CritSectInit() sets this to point to the critsect itself. */
280 RTR3PTR pvKey;
281 /** Pointer to the VM - R3Ptr. */
282 PVMR3 pVMR3;
283 /** Pointer to the VM - R0Ptr. */
284 PVMR0 pVMR0;
285 /** Pointer to the VM - GCPtr. */
286 PVMRC pVMRC;
287 /** Set if this critical section is the automatically created default
288 * section of a device. */
289 bool fAutomaticDefaultCritsect;
290 /** Set if the critical section is used by a timer or similar.
291 * See PDMR3DevGetCritSect. */
292 bool fUsedByTimerOrSimilar;
293 /** Alignment padding. */
294 bool afPadding[2];
295 /** Support driver event semaphore that is scheduled to be signaled upon leaving
296 * the critical section. This is only for Ring-3 and Ring-0. */
297 SUPSEMEVENT hEventToSignal;
298 /** The lock name. */
299 R3PTRTYPE(const char *) pszName;
300 /** R0/RC lock contention. */
301 STAMCOUNTER StatContentionRZLock;
302 /** R0/RC unlock contention. */
303 STAMCOUNTER StatContentionRZUnlock;
304 /** R3 lock contention. */
305 STAMCOUNTER StatContentionR3;
306 /** Profiling the time the section is locked. */
307 STAMPROFILEADV StatLocked;
308} PDMCRITSECTINT;
309AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
310/** Pointer to private critical section data. */
311typedef PDMCRITSECTINT *PPDMCRITSECTINT;
312
313/** Indicates that the critical section is queued for unlock.
314 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
315#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
316
317
318/**
319 * Private critical section data.
320 */
321typedef struct PDMCRITSECTRWINT
322{
323 /** The read/write critical section core which is shared with IPRT.
324 * @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
325 RTCRITSECTRW Core;
326
327 /** Pointer to the next critical section.
328 * This chain is used for relocating pVMRC and device cleanup. */
329 R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
330 /** Owner identifier.
331 * This is pDevIns if the owner is a device. Similarly for a driver or service.
332 * PDMR3CritSectInit() sets this to point to the critsect itself. */
333 RTR3PTR pvKey;
334 /** Pointer to the VM - R3Ptr. */
335 PVMR3 pVMR3;
336 /** Pointer to the VM - R0Ptr. */
337 PVMR0 pVMR0;
338 /** Pointer to the VM - GCPtr. */
339 PVMRC pVMRC;
340#if HC_ARCH_BITS == 64
341 /** Alignment padding. */
342 RTRCPTR RCPtrPadding;
343#endif
344 /** The lock name. */
345 R3PTRTYPE(const char *) pszName;
346 /** R0/RC write lock contention. */
347 STAMCOUNTER StatContentionRZEnterExcl;
348 /** R0/RC write unlock contention. */
349 STAMCOUNTER StatContentionRZLeaveExcl;
350 /** R0/RC read lock contention. */
351 STAMCOUNTER StatContentionRZEnterShared;
352 /** R0/RC read unlock contention. */
353 STAMCOUNTER StatContentionRZLeaveShared;
354 /** R0/RC writes. */
355 STAMCOUNTER StatRZEnterExcl;
356 /** R0/RC reads. */
357 STAMCOUNTER StatRZEnterShared;
358 /** R3 write lock contention. */
359 STAMCOUNTER StatContentionR3EnterExcl;
360 /** R3 read lock contention. */
361 STAMCOUNTER StatContentionR3EnterShared;
362 /** R3 writes. */
363 STAMCOUNTER StatR3EnterExcl;
364 /** R3 reads. */
365 STAMCOUNTER StatR3EnterShared;
366 /** Profiling the time the section is write locked. */
367 STAMPROFILEADV StatWriteLocked;
368} PDMCRITSECTRWINT;
369AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
370AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
371/** Pointer to private critical section data. */
372typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
373
374
375
376/**
377 * The usual device/driver/internal/external stuff.
378 */
379typedef enum
380{
381 /** The usual invalid entry. */
382 PDMTHREADTYPE_INVALID = 0,
383 /** Device type. */
384 PDMTHREADTYPE_DEVICE,
385 /** USB Device type. */
386 PDMTHREADTYPE_USB,
387 /** Driver type. */
388 PDMTHREADTYPE_DRIVER,
389 /** Internal type. */
390 PDMTHREADTYPE_INTERNAL,
391 /** External type. */
392 PDMTHREADTYPE_EXTERNAL,
393 /** The usual 32-bit hack. */
394 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
395} PDMTHREADTYPE;
396
397
398/**
399 * The internal structure for the thread.
400 */
401typedef struct PDMTHREADINT
402{
403 /** The VM pointer. */
404 PVMR3 pVM;
405 /** The event semaphore the thread blocks on when not running. */
406 RTSEMEVENTMULTI BlockEvent;
407 /** The event semaphore the thread sleeps on while running. */
408 RTSEMEVENTMULTI SleepEvent;
409 /** Pointer to the next thread. */
410 R3PTRTYPE(struct PDMTHREAD *) pNext;
411 /** The thread type. */
412 PDMTHREADTYPE enmType;
413} PDMTHREADINT;
414
415
416
417/* Must be included after PDMDEVINSINT is defined. */
418#define PDMDEVINSINT_DECLARED
419#define PDMUSBINSINT_DECLARED
420#define PDMDRVINSINT_DECLARED
421#define PDMCRITSECTINT_DECLARED
422#define PDMCRITSECTRWINT_DECLARED
423#define PDMTHREADINT_DECLARED
424#ifdef ___VBox_pdm_h
425# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
426#endif
427RT_C_DECLS_END
428#include <VBox/vmm/pdm.h>
429RT_C_DECLS_BEGIN
430
431/**
432 * PDM Logical Unit.
433 *
434 * This typically the representation of a physical port on a
435 * device, like for instance the PS/2 keyboard port on the
436 * keyboard controller device. The LUNs are chained on the
437 * device the belong to (PDMDEVINSINT::pLunsR3).
438 */
439typedef struct PDMLUN
440{
441 /** The LUN - The Logical Unit Number. */
442 RTUINT iLun;
443 /** Pointer to the next LUN. */
444 PPDMLUN pNext;
445 /** Pointer to the top driver in the driver chain. */
446 PPDMDRVINS pTop;
447 /** Pointer to the bottom driver in the driver chain. */
448 PPDMDRVINS pBottom;
449 /** Pointer to the device instance which the LUN belongs to.
450 * Either this is set or pUsbIns is set. Both is never set at the same time. */
451 PPDMDEVINS pDevIns;
452 /** Pointer to the USB device instance which the LUN belongs to. */
453 PPDMUSBINS pUsbIns;
454 /** Pointer to the device base interface. */
455 PPDMIBASE pBase;
456 /** Description of this LUN. */
457 const char *pszDesc;
458} PDMLUN;
459
460
461/**
462 * PDM Device.
463 */
464typedef struct PDMDEV
465{
466 /** Pointer to the next device (R3 Ptr). */
467 R3PTRTYPE(PPDMDEV) pNext;
468 /** Device name length. (search optimization) */
469 RTUINT cchName;
470 /** Registration structure. */
471 R3PTRTYPE(const struct PDMDEVREG *) pReg;
472 /** Number of instances. */
473 uint32_t cInstances;
474 /** Pointer to chain of instances (R3 Ptr). */
475 PPDMDEVINSR3 pInstances;
476 /** The search path for raw-mode context modules (';' as separator). */
477 char *pszRCSearchPath;
478 /** The search path for ring-0 context modules (';' as separator). */
479 char *pszR0SearchPath;
480} PDMDEV;
481
482
483/**
484 * PDM USB Device.
485 */
486typedef struct PDMUSB
487{
488 /** Pointer to the next device (R3 Ptr). */
489 R3PTRTYPE(PPDMUSB) pNext;
490 /** Device name length. (search optimization) */
491 RTUINT cchName;
492 /** Registration structure. */
493 R3PTRTYPE(const struct PDMUSBREG *) pReg;
494 /** Next instance number. */
495 uint32_t iNextInstance;
496 /** Pointer to chain of instances (R3 Ptr). */
497 R3PTRTYPE(PPDMUSBINS) pInstances;
498} PDMUSB;
499
500
501/**
502 * PDM Driver.
503 */
504typedef struct PDMDRV
505{
506 /** Pointer to the next device. */
507 PPDMDRV pNext;
508 /** Registration structure. */
509 const struct PDMDRVREG * pReg;
510 /** Current number of instances. */
511 uint32_t cInstances;
512 /** The next instance number. */
513 uint32_t iNextInstance;
514 /** The search path for raw-mode context modules (';' as separator). */
515 char *pszRCSearchPath;
516 /** The search path for ring-0 context modules (';' as separator). */
517 char *pszR0SearchPath;
518} PDMDRV;
519
520
521/**
522 * PDM registered PIC device.
523 */
524typedef struct PDMPIC
525{
526 /** Pointer to the PIC device instance - R3. */
527 PPDMDEVINSR3 pDevInsR3;
528 /** @copydoc PDMPICREG::pfnSetIrqR3 */
529 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
530 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
531 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
532
533 /** Pointer to the PIC device instance - R0. */
534 PPDMDEVINSR0 pDevInsR0;
535 /** @copydoc PDMPICREG::pfnSetIrqR3 */
536 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
537 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
538 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
539
540 /** Pointer to the PIC device instance - RC. */
541 PPDMDEVINSRC pDevInsRC;
542 /** @copydoc PDMPICREG::pfnSetIrqR3 */
543 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
544 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
545 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
546 /** Alignment padding. */
547 RTRCPTR RCPtrPadding;
548} PDMPIC;
549
550
551/**
552 * PDM registered APIC device.
553 */
554typedef struct PDMAPIC
555{
556 /** Pointer to the APIC device instance - R3 Ptr. */
557 PPDMDEVINSR3 pDevInsR3;
558 /** Pointer to the APIC device instance - R0 Ptr. */
559 PPDMDEVINSR0 pDevInsR0;
560 /** Pointer to the APIC device instance - RC Ptr. */
561 PPDMDEVINSRC pDevInsRC;
562 uint8_t Alignment[4];
563} PDMAPIC;
564
565
566/**
567 * PDM registered I/O APIC device.
568 */
569typedef struct PDMIOAPIC
570{
571 /** Pointer to the APIC device instance - R3 Ptr. */
572 PPDMDEVINSR3 pDevInsR3;
573 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
574 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
575 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
576 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
577 /** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
578 DECLR3CALLBACKMEMBER(int, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
579
580 /** Pointer to the PIC device instance - R0. */
581 PPDMDEVINSR0 pDevInsR0;
582 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
583 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
584 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
585 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
586 /** @copydoc PDMIOAPICREG::pfnSetEoiR3 */
587 DECLR0CALLBACKMEMBER(int, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
588
589 /** Pointer to the APIC device instance - RC Ptr. */
590 PPDMDEVINSRC pDevInsRC;
591 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
592 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
593 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
594 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
595 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
596 DECLRCCALLBACKMEMBER(int, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
597} PDMIOAPIC;
598
599/** Maximum number of PCI busses for a VM. */
600#define PDM_PCI_BUSSES_MAX 8
601
602
603#ifdef IN_RING3
604/**
605 * PDM registered firmware device.
606 */
607typedef struct PDMFW
608{
609 /** Pointer to the firmware device instance. */
610 PPDMDEVINSR3 pDevIns;
611 /** Copy of the registration structure. */
612 PDMFWREG Reg;
613} PDMFW;
614/** Pointer to a firmware instance. */
615typedef PDMFW *PPDMFW;
616#endif
617
618
619/**
620 * PDM PCI Bus instance.
621 */
622typedef struct PDMPCIBUS
623{
624 /** PCI bus number. */
625 RTUINT iBus;
626 RTUINT uPadding0; /**< Alignment padding.*/
627
628 /** Pointer to PCI Bus device instance. */
629 PPDMDEVINSR3 pDevInsR3;
630 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
631 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
632 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
633 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
634 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
635 /** @copydoc PDMPCIBUSREG::pfnRegisterMsiR3 */
636 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
637 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
638 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
639 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
640 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
641 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead,
642 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
643
644 /** Pointer to the PIC device instance - R0. */
645 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
646 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
647 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
648
649 /** Pointer to PCI Bus device instance. */
650 PPDMDEVINSRC pDevInsRC;
651 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
652 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
653} PDMPCIBUS;
654
655
656#ifdef IN_RING3
657/**
658 * PDM registered DMAC (DMA Controller) device.
659 */
660typedef struct PDMDMAC
661{
662 /** Pointer to the DMAC device instance. */
663 PPDMDEVINSR3 pDevIns;
664 /** Copy of the registration structure. */
665 PDMDMACREG Reg;
666} PDMDMAC;
667
668
669/**
670 * PDM registered RTC (Real Time Clock) device.
671 */
672typedef struct PDMRTC
673{
674 /** Pointer to the RTC device instance. */
675 PPDMDEVINSR3 pDevIns;
676 /** Copy of the registration structure. */
677 PDMRTCREG Reg;
678} PDMRTC;
679
680#endif /* IN_RING3 */
681
682/**
683 * Module type.
684 */
685typedef enum PDMMODTYPE
686{
687 /** Raw-mode (RC) context module. */
688 PDMMOD_TYPE_RC,
689 /** Ring-0 (host) context module. */
690 PDMMOD_TYPE_R0,
691 /** Ring-3 (host) context module. */
692 PDMMOD_TYPE_R3
693} PDMMODTYPE;
694
695
696/** The module name length including the terminator. */
697#define PDMMOD_NAME_LEN 32
698
699/**
700 * Loaded module instance.
701 */
702typedef struct PDMMOD
703{
704 /** Module name. This is used for referring to
705 * the module internally, sort of like a handle. */
706 char szName[PDMMOD_NAME_LEN];
707 /** Module type. */
708 PDMMODTYPE eType;
709 /** Loader module handle. Not used for R0 modules. */
710 RTLDRMOD hLdrMod;
711 /** Loaded address.
712 * This is the 'handle' for R0 modules. */
713 RTUINTPTR ImageBase;
714 /** Old loaded address.
715 * This is used during relocation of GC modules. Not used for R0 modules. */
716 RTUINTPTR OldImageBase;
717 /** Where the R3 HC bits are stored.
718 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
719 void *pvBits;
720
721 /** Pointer to next module. */
722 struct PDMMOD *pNext;
723 /** Module filename. */
724 char szFilename[1];
725} PDMMOD;
726/** Pointer to loaded module instance. */
727typedef PDMMOD *PPDMMOD;
728
729
730
731/** Extra space in the free array. */
732#define PDMQUEUE_FREE_SLACK 16
733
734/**
735 * Queue type.
736 */
737typedef enum PDMQUEUETYPE
738{
739 /** Device consumer. */
740 PDMQUEUETYPE_DEV = 1,
741 /** Driver consumer. */
742 PDMQUEUETYPE_DRV,
743 /** Internal consumer. */
744 PDMQUEUETYPE_INTERNAL,
745 /** External consumer. */
746 PDMQUEUETYPE_EXTERNAL
747} PDMQUEUETYPE;
748
749/** Pointer to a PDM Queue. */
750typedef struct PDMQUEUE *PPDMQUEUE;
751
752/**
753 * PDM Queue.
754 */
755typedef struct PDMQUEUE
756{
757 /** Pointer to the next queue in the list. */
758 R3PTRTYPE(PPDMQUEUE) pNext;
759 /** Type specific data. */
760 union
761 {
762 /** PDMQUEUETYPE_DEV */
763 struct
764 {
765 /** Pointer to consumer function. */
766 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
767 /** Pointer to the device instance owning the queue. */
768 R3PTRTYPE(PPDMDEVINS) pDevIns;
769 } Dev;
770 /** PDMQUEUETYPE_DRV */
771 struct
772 {
773 /** Pointer to consumer function. */
774 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
775 /** Pointer to the driver instance owning the queue. */
776 R3PTRTYPE(PPDMDRVINS) pDrvIns;
777 } Drv;
778 /** PDMQUEUETYPE_INTERNAL */
779 struct
780 {
781 /** Pointer to consumer function. */
782 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
783 } Int;
784 /** PDMQUEUETYPE_EXTERNAL */
785 struct
786 {
787 /** Pointer to consumer function. */
788 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
789 /** Pointer to user argument. */
790 R3PTRTYPE(void *) pvUser;
791 } Ext;
792 } u;
793 /** Queue type. */
794 PDMQUEUETYPE enmType;
795 /** The interval between checking the queue for events.
796 * The realtime timer below is used to do the waiting.
797 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
798 uint32_t cMilliesInterval;
799 /** Interval timer. Only used if cMilliesInterval is non-zero. */
800 PTMTIMERR3 pTimer;
801 /** Pointer to the VM - R3. */
802 PVMR3 pVMR3;
803 /** LIFO of pending items - R3. */
804 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
805 /** Pointer to the VM - R0. */
806 PVMR0 pVMR0;
807 /** LIFO of pending items - R0. */
808 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
809 /** Pointer to the GC VM and indicator for GC enabled queue.
810 * If this is NULL, the queue cannot be used in GC.
811 */
812 PVMRC pVMRC;
813 /** LIFO of pending items - GC. */
814 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
815
816 /** Item size (bytes). */
817 uint32_t cbItem;
818 /** Number of items in the queue. */
819 uint32_t cItems;
820 /** Index to the free head (where we insert). */
821 uint32_t volatile iFreeHead;
822 /** Index to the free tail (where we remove). */
823 uint32_t volatile iFreeTail;
824
825 /** Unique queue name. */
826 R3PTRTYPE(const char *) pszName;
827#if HC_ARCH_BITS == 32
828 RTR3PTR Alignment1;
829#endif
830 /** Stat: Times PDMQueueAlloc fails. */
831 STAMCOUNTER StatAllocFailures;
832 /** Stat: PDMQueueInsert calls. */
833 STAMCOUNTER StatInsert;
834 /** Stat: Queue flushes. */
835 STAMCOUNTER StatFlush;
836 /** Stat: Queue flushes with pending items left over. */
837 STAMCOUNTER StatFlushLeftovers;
838#ifdef VBOX_WITH_STATISTICS
839 /** State: Profiling the flushing. */
840 STAMPROFILE StatFlushPrf;
841 /** State: Pending items. */
842 uint32_t volatile cStatPending;
843 uint32_t volatile cAlignment;
844#endif
845
846 /** Array of pointers to free items. Variable size. */
847 struct PDMQUEUEFREEITEM
848 {
849 /** Pointer to the free item - HC Ptr. */
850 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
851 /** Pointer to the free item - HC Ptr. */
852 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
853 /** Pointer to the free item - GC Ptr. */
854 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
855#if HC_ARCH_BITS == 64
856 RTRCPTR Alignment0;
857#endif
858 } aFreeItems[1];
859} PDMQUEUE;
860
861/** @name PDM::fQueueFlushing
862 * @{ */
863/** Used to make sure only one EMT will flush the queues.
864 * Set when an EMT is flushing queues, clear otherwise. */
865#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
866/** Indicating there are queues with items pending.
867 * This is make sure we don't miss inserts happening during flushing. The FF
868 * cannot be used for this since it has to be cleared immediately to prevent
869 * other EMTs from spinning. */
870#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
871/** @} */
872
873
874/**
875 * Queue device helper task operation.
876 */
877typedef enum PDMDEVHLPTASKOP
878{
879 /** The usual invalid 0 entry. */
880 PDMDEVHLPTASKOP_INVALID = 0,
881 /** ISASetIrq */
882 PDMDEVHLPTASKOP_ISA_SET_IRQ,
883 /** PCISetIrq */
884 PDMDEVHLPTASKOP_PCI_SET_IRQ,
885 /** PCISetIrq */
886 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
887 /** The usual 32-bit hack. */
888 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
889} PDMDEVHLPTASKOP;
890
891/**
892 * Queued Device Helper Task.
893 */
894typedef struct PDMDEVHLPTASK
895{
896 /** The queue item core (don't touch). */
897 PDMQUEUEITEMCORE Core;
898 /** Pointer to the device instance (R3 Ptr). */
899 PPDMDEVINSR3 pDevInsR3;
900 /** This operation to perform. */
901 PDMDEVHLPTASKOP enmOp;
902#if HC_ARCH_BITS == 64
903 uint32_t Alignment0;
904#endif
905 /** Parameters to the operation. */
906 union PDMDEVHLPTASKPARAMS
907 {
908 /**
909 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
910 */
911 struct PDMDEVHLPTASKISASETIRQ
912 {
913 /** The IRQ */
914 int iIrq;
915 /** The new level. */
916 int iLevel;
917 /** The IRQ tag and source. */
918 uint32_t uTagSrc;
919 } IsaSetIRQ, IoApicSetIRQ;
920
921 /**
922 * PDMDEVHLPTASKOP_PCI_SET_IRQ
923 */
924 struct PDMDEVHLPTASKPCISETIRQ
925 {
926 /** Pointer to the PCI device (R3 Ptr). */
927 R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
928 /** The IRQ */
929 int iIrq;
930 /** The new level. */
931 int iLevel;
932 /** The IRQ tag and source. */
933 uint32_t uTagSrc;
934 } PciSetIRQ;
935
936 /** Expanding the structure. */
937 uint64_t au64[3];
938 } u;
939} PDMDEVHLPTASK;
940/** Pointer to a queued Device Helper Task. */
941typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
942/** Pointer to a const queued Device Helper Task. */
943typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
944
945
946
947/**
948 * An USB hub registration record.
949 */
950typedef struct PDMUSBHUB
951{
952 /** The USB versions this hub support.
953 * Note that 1.1 hubs can take on 2.0 devices. */
954 uint32_t fVersions;
955 /** The number of ports on the hub. */
956 uint32_t cPorts;
957 /** The number of available ports (0..cPorts). */
958 uint32_t cAvailablePorts;
959 /** The driver instance of the hub. */
960 PPDMDRVINS pDrvIns;
961 /** Copy of the to the registration structure. */
962 PDMUSBHUBREG Reg;
963
964 /** Pointer to the next hub in the list. */
965 struct PDMUSBHUB *pNext;
966} PDMUSBHUB;
967
968/** Pointer to a const USB HUB registration record. */
969typedef const PDMUSBHUB *PCPDMUSBHUB;
970
971/** Pointer to a PDM Async I/O template. */
972typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
973
974/** Pointer to the main PDM Async completion endpoint class. */
975typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
976
977/** Pointer to the global block cache structure. */
978typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
979
980/**
981 * PDM VMCPU Instance data.
982 * Changes to this must checked against the padding of the pdm union in VMCPU!
983 */
984typedef struct PDMCPU
985{
986 /** The number of entries in the apQueuedCritSectsLeaves table that's currently
987 * in use. */
988 uint32_t cQueuedCritSectLeaves;
989 uint32_t uPadding0; /**< Alignment padding.*/
990 /** Critical sections queued in RC/R0 because of contention preventing leave to
991 * complete. (R3 Ptrs)
992 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
993 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
994
995 /** The number of entries in the apQueuedCritSectRwExclLeaves table that's
996 * currently in use. */
997 uint32_t cQueuedCritSectRwExclLeaves;
998 uint32_t uPadding1; /**< Alignment padding.*/
999 /** Read/write critical sections queued in RC/R0 because of contention
1000 * preventing exclusive leave to complete. (R3 Ptrs)
1001 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1002 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1003
1004 /** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1005 * currently in use. */
1006 uint32_t cQueuedCritSectRwShrdLeaves;
1007 uint32_t uPadding2; /**< Alignment padding.*/
1008 /** Read/write critical sections queued in RC/R0 because of contention
1009 * preventing shared leave to complete. (R3 Ptrs)
1010 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1011 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1012} PDMCPU;
1013
1014
1015/**
1016 * PDM VM Instance data.
1017 * Changes to this must checked against the padding of the cfgm union in VM!
1018 */
1019typedef struct PDM
1020{
1021 /** The PDM lock.
1022 * This is used to protect everything that deals with interrupts, i.e.
1023 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1024 PDMCRITSECT CritSect;
1025 /** The NOP critical section.
1026 * This is a dummy critical section that will not do any thread
1027 * serialization but instead let all threads enter immediately and
1028 * concurrently. */
1029 PDMCRITSECT NopCritSect;
1030
1031 /** List of registered devices. (FIFO) */
1032 R3PTRTYPE(PPDMDEV) pDevs;
1033 /** List of devices instances. (FIFO) */
1034 R3PTRTYPE(PPDMDEVINS) pDevInstances;
1035 /** List of registered USB devices. (FIFO) */
1036 R3PTRTYPE(PPDMUSB) pUsbDevs;
1037 /** List of USB devices instances. (FIFO) */
1038 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1039 /** List of registered drivers. (FIFO) */
1040 R3PTRTYPE(PPDMDRV) pDrvs;
1041 /** The registered firmware device (can be NULL). */
1042 R3PTRTYPE(PPDMFW) pFirmware;
1043 /** PCI Buses. */
1044 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1045 /** The register PIC device. */
1046 PDMPIC Pic;
1047 /** The registered APIC device. */
1048 PDMAPIC Apic;
1049 /** The registered I/O APIC device. */
1050 PDMIOAPIC IoApic;
1051 /** The registered DMAC device. */
1052 R3PTRTYPE(PPDMDMAC) pDmac;
1053 /** The registered RTC device. */
1054 R3PTRTYPE(PPDMRTC) pRtc;
1055 /** The registered USB HUBs. (FIFO) */
1056 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1057
1058 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1059 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1060 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1061 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1062 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1063 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1064 /** Pointer to the queue which should be manually flushed - RC Ptr.
1065 * Only touched by EMT. */
1066 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1067 /** Pointer to the queue which should be manually flushed - R0 Ptr.
1068 * Only touched by EMT. */
1069 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1070 /** Bitmask controlling the queue flushing.
1071 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1072 uint32_t volatile fQueueFlushing;
1073
1074 /** The current IRQ tag (tracing purposes). */
1075 uint32_t volatile uIrqTag;
1076
1077 /** Pending reset flags (PDMVMRESET_F_XXX). */
1078 uint32_t volatile fResetFlags;
1079 /** Alignment padding. */
1080 uint32_t volatile u32Padding;
1081
1082 /** The tracing ID of the next device instance.
1083 *
1084 * @remarks We keep the device tracing ID seperate from the rest as these are
1085 * then more likely to end up with the same ID from one run to
1086 * another, making analysis somewhat easier. Drivers and USB devices
1087 * are more volatile and can be changed at runtime, thus these are much
1088 * less likely to remain stable, so just heap them all together. */
1089 uint32_t idTracingDev;
1090 /** The tracing ID of the next driver instance, USB device instance or other
1091 * PDM entity requiring an ID. */
1092 uint32_t idTracingOther;
1093
1094 /** @name VMM device heap
1095 * @{ */
1096 /** The heap size. */
1097 uint32_t cbVMMDevHeap;
1098 /** Free space. */
1099 uint32_t cbVMMDevHeapLeft;
1100 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1101 RTR3PTR pvVMMDevHeap;
1102 /** Ring-3 mapping/unmapping notification callback for the user. */
1103 PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1104 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1105 RTGCPHYS GCPhysVMMDevHeap;
1106 /** @} */
1107
1108 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1109 STAMCOUNTER StatQueuedCritSectLeaves;
1110} PDM;
1111AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1112AssertCompileMemberAlignment(PDM, CritSect, 8);
1113AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1114/** Pointer to PDM VM instance data. */
1115typedef PDM *PPDM;
1116
1117
1118
1119/**
1120 * PDM data kept in the UVM.
1121 */
1122typedef struct PDMUSERPERVM
1123{
1124 /** @todo move more stuff over here. */
1125
1126 /** Linked list of timer driven PDM queues.
1127 * Currently serialized by PDM::CritSect. */
1128 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1129 /** Linked list of force action driven PDM queues.
1130 * Currently serialized by PDM::CritSect. */
1131 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1132
1133 /** Lock protecting the lists below it. */
1134 RTCRITSECT ListCritSect;
1135 /** Pointer to list of loaded modules. */
1136 PPDMMOD pModules;
1137 /** List of initialized critical sections. (LIFO) */
1138 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1139 /** List of initialized read/write critical sections. (LIFO) */
1140 R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1141 /** Head of the PDM Thread list. (singly linked) */
1142 R3PTRTYPE(PPDMTHREAD) pThreads;
1143 /** Tail of the PDM Thread list. (singly linked) */
1144 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1145
1146 /** @name PDM Async Completion
1147 * @{ */
1148 /** Pointer to the array of supported endpoint classes. */
1149 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1150 /** Head of the templates. Singly linked, protected by ListCritSect. */
1151 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1152 /** @} */
1153
1154 /** Global block cache data. */
1155 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1156#ifdef VBOX_WITH_NETSHAPER
1157 /** Pointer to network shaper instance. */
1158 R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1159#endif /* VBOX_WITH_NETSHAPER */
1160
1161} PDMUSERPERVM;
1162/** Pointer to the PDM data kept in the UVM. */
1163typedef PDMUSERPERVM *PPDMUSERPERVM;
1164
1165
1166
1167/*******************************************************************************
1168* Global Variables *
1169*******************************************************************************/
1170#ifdef IN_RING3
1171extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1172extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1173extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1174extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1175extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1176extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1177extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1178extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1179extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1180extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1181extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1182#endif
1183
1184
1185/*******************************************************************************
1186* Defined Constants And Macros *
1187*******************************************************************************/
1188/** @def PDMDEV_ASSERT_DEVINS
1189 * Asserts the validity of the device instance.
1190 */
1191#ifdef VBOX_STRICT
1192# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1193 do { \
1194 AssertPtr(pDevIns); \
1195 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1196 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1197 } while (0)
1198#else
1199# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1200#endif
1201
1202/** @def PDMDRV_ASSERT_DRVINS
1203 * Asserts the validity of the driver instance.
1204 */
1205#ifdef VBOX_STRICT
1206# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1207 do { \
1208 AssertPtr(pDrvIns); \
1209 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1210 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1211 } while (0)
1212#else
1213# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1214#endif
1215
1216
1217/*******************************************************************************
1218* Internal Functions *
1219*******************************************************************************/
1220#ifdef IN_RING3
1221bool pdmR3IsValidName(const char *pszName);
1222
1223int pdmR3CritSectBothInitStats(PVM pVM);
1224void pdmR3CritSectBothRelocate(PVM pVM);
1225int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1226int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1227int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1228 const char *pszNameFmt, va_list va);
1229int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1230 const char *pszNameFmt, ...);
1231int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1232 const char *pszNameFmt, ...);
1233int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1234 const char *pszNameFmt, va_list va);
1235int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1236 const char *pszNameFmt, ...);
1237int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1238 const char *pszNameFmt, ...);
1239
1240int pdmR3DevInit(PVM pVM);
1241int pdmR3DevInitComplete(PVM pVM);
1242PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1243int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1244DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1245
1246int pdmR3UsbLoadModules(PVM pVM);
1247int pdmR3UsbInstantiateDevices(PVM pVM);
1248PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1249int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1250int pdmR3UsbVMInitComplete(PVM pVM);
1251
1252int pdmR3DrvInit(PVM pVM);
1253int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1254 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1255int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1256void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1257PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1258
1259int pdmR3LdrInitU(PUVM pUVM);
1260void pdmR3LdrTermU(PUVM pUVM);
1261char *pdmR3FileR3(const char *pszFile, bool fShared);
1262int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1263
1264void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1265
1266int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1267 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1268int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1269 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1270int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1271 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1272int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1273int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1274int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1275void pdmR3ThreadDestroyAll(PVM pVM);
1276int pdmR3ThreadResumeAll(PVM pVM);
1277int pdmR3ThreadSuspendAll(PVM pVM);
1278
1279#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1280int pdmR3AsyncCompletionInit(PVM pVM);
1281int pdmR3AsyncCompletionTerm(PVM pVM);
1282void pdmR3AsyncCompletionResume(PVM pVM);
1283int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1284int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1285 PFNPDMASYNCCOMPLETEDRV pfnCompleted, void *pvTemplateUser, const char *pszDesc);
1286int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1287int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1288int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1289int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1290#endif
1291
1292#ifdef VBOX_WITH_NETSHAPER
1293int pdmR3NetShaperInit(PVM pVM);
1294int pdmR3NetShaperTerm(PVM pVM);
1295#endif
1296
1297int pdmR3BlkCacheInit(PVM pVM);
1298void pdmR3BlkCacheTerm(PVM pVM);
1299int pdmR3BlkCacheResume(PVM pVM);
1300
1301#endif /* IN_RING3 */
1302
1303void pdmLock(PVM pVM);
1304int pdmLockEx(PVM pVM, int rc);
1305void pdmUnlock(PVM pVM);
1306
1307#if defined(IN_RING3) || defined(IN_RING0)
1308void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1309void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1310#endif
1311
1312/** @} */
1313
1314RT_C_DECLS_END
1315
1316#endif
1317
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