VirtualBox

source: vbox/trunk/src/VBox/VMM/include/HMInternal.mac

Last change on this file was 106061, checked in by vboxsync, 3 months ago

Copyright year updates by scm.

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1;$Id: HMInternal.mac 106061 2024-09-16 14:03:52Z vboxsync $
2;; @file
3; HM - Internal header file.
4;
5
6;
7; Copyright (C) 2006-2024 Oracle and/or its affiliates.
8;
9; This file is part of VirtualBox base platform packages, as
10; available from https://www.virtualbox.org.
11;
12; This program is free software; you can redistribute it and/or
13; modify it under the terms of the GNU General Public License
14; as published by the Free Software Foundation, in version 3 of the
15; License.
16;
17; This program is distributed in the hope that it will be useful, but
18; WITHOUT ANY WARRANTY; without even the implied warranty of
19; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20; General Public License for more details.
21;
22; You should have received a copy of the GNU General Public License
23; along with this program; if not, see <https://www.gnu.org/licenses>.
24;
25; SPDX-License-Identifier: GPL-3.0-only
26;
27
28%ifndef VMX_VMCS_GUEST_FIELD_ES
29 %include "VBox/vmm/hm_vmx.mac" ; For VMXRESTOREHOST
30%endif
31
32struc VMXVMCSINFOSHARED
33 .fWasInRealMode resb 1
34 alignb 8
35 .RealMode.AttrCS resd 1
36 .RealMode.AttrDS resd 1
37 .RealMode.AttrES resd 1
38 .RealMode.AttrFS resd 1
39 .RealMode.AttrGS resd 1
40 .RealMode.AttrSS resd 1
41 .RealMode.Eflags resd 1 ; should be EFlags?
42 .RealMode.fRealOnV86Active resb 1
43
44 alignb 8
45 .au64LbrFromIpMsr resq 32
46 .au64LbrToIpMsr resq 32
47 .au64LbrInfoMsr resq 32
48 .u64LbrTosMsr resq 1
49 .u64LerFromIpMsr resq 1
50 .u64LerToIpMsr resq 1
51endstruc
52
53
54struc VMXVMCSINFO
55 .pShared RTR0PTR_RES 1
56
57 .HCPhysEPTP RTHCPHYS_RES 1
58 .fVmcsState resd 1
59 .fShadowVmcsState resd 1
60 .idHostCpuState resd 1
61 .idHostCpuExec resd 1
62 .cEntryMsrLoad resd 1
63 .cExitMsrStore resd 1
64 .cExitMsrLoad resd 1
65
66 .u32PinCtls resd 1
67 .u32ProcCtls resd 1
68 .u32ProcCtls2 resd 1
69 .u64ProcCtls3 resq 1
70 .u32EntryCtls resd 1
71 .u32ExitCtls resd 1
72 .u32XcptBitmap resd 1
73 .u32XcptPFMask resd 1
74 .u32XcptPFMatch resd 1
75
76 alignb 8
77 .u64TscOffset resq 1
78 .u64VmcsLinkPtr resq 1
79 .u64Cr0Mask resq 1
80 .u64Cr4Mask resq 1
81 .uHostRip resq 1
82 .uHostRsp resq 1
83
84 .pvVmcs RTR0PTR_RES 1
85 .pvShadowVmcs RTR0PTR_RES 1
86 .pbVirtApic RTR0PTR_RES 1
87 .pvMsrBitmap RTR0PTR_RES 1
88 .pvGuestMsrLoad RTR0PTR_RES 1
89 .pvGuestMsrStore RTR0PTR_RES 1
90 .pvHostMsrLoad RTR0PTR_RES 1
91
92 alignb 8
93 .HCPhysVmcs RTHCPHYS_RES 1
94 .HCPhysShadowVmcs RTHCPHYS_RES 1
95 .HCPhysVirtApic RTHCPHYS_RES 1
96 .HCPhysMsrBitmap RTHCPHYS_RES 1
97 .HCPhysGuestMsrLoad RTHCPHYS_RES 1
98 .HCPhysGuestMsrStore RTHCPHYS_RES 1
99 .HCPhysHostMsrLoad RTHCPHYS_RES 1
100
101 .hMemObj RTR0PTR_RES 1
102endstruc
103
104%define VMX_RESTORE_HOST_SEL_DS 0001h ;RT_BIT(0)
105%define VMX_RESTORE_HOST_SEL_ES 0002h ;RT_BIT(1)
106%define VMX_RESTORE_HOST_SEL_FS 0004h ;RT_BIT(2)
107%define VMX_RESTORE_HOST_SEL_GS 0008h ;RT_BIT(3)
108%define VMX_RESTORE_HOST_SEL_TR 0010h ;RT_BIT(4)
109%define VMX_RESTORE_HOST_GDTR 0020h ;RT_BIT(5)
110%define VMX_RESTORE_HOST_IDTR 0040h ;RT_BIT(6)
111%define VMX_RESTORE_HOST_GDT_READ_ONLY 0080h ;RT_BIT(7)
112%define VMX_RESTORE_HOST_GDT_NEED_WRITABLE 0100h ;RT_BIT(8)
113%define VMX_RESTORE_HOST_CAN_USE_WRFSBASE_AND_WRGSBASE 0200h ;RT_BIT(9)
114%define VMX_RESTORE_HOST_REQUIRED 0400h ;RT_BIT(10) - must be the highest bit!
115struc VMXRESTOREHOST
116 .uHostSelDS resw 1
117 .uHostSelES resw 1
118 .uHostSelFS resw 1
119 .HostGdtr resb 10
120 .uHostSelGS resw 1
121 .uHostSelTR resw 1
122 .uHostSelSS resw 1
123 .HostGdtrRw resb 10
124 .uHostSelCS resw 1
125 .abPadding1 resb 4
126 .HostIdtr resb 10
127 alignb 8
128 .uHostFSBase resq 1
129 .uHostGSBase resq 1
130endstruc
131
132struc HMCPUVMX
133 .VmcsInfo resb VMXVMCSINFOSHARED_size
134 .VmcsInfoNstGst resb VMXVMCSINFOSHARED_size
135 .fSwitchedToNstGstVmcsCopyForRing3 resb 1
136 .fMergedNstGstCtls resb 1
137 .fCopiedNstGstToShadowVmcs resb 1
138 .fSwitchedNstGstFlushTlb resb 1
139
140 alignb 8
141 .u64GstMsrApicBase resq 1
142
143 .LastError.idCurrentCpu resd 1
144 .LastError.idEnteredCpu resd 1
145 .LastError.HCPhysCurrentVmcs resq 1
146 .LastError.u32VmcsRev resd 1
147 .LastError.u32InstrError resd 1
148 .LastError.u32ExitReason resd 1
149 .LastError.u32GuestIntrState resd 1
150endstruc
151
152struc HMCPUSVM
153 .fEmulateLongModeSysEnterExit resb 1
154
155 alignb 8
156 .NstGstVmcbCache resb 40
157endstruc
158
159struc HMCPU
160 .fCheckedTLBFlush resb 1
161 .fActive resb 1
162 .fUseDebugLoop resb 1
163
164 .fGIMTrapXcptUD resb 1
165 .fTrapXcptGpForLovelyMesaDrv resb 1
166 .fSingleInstruction resb 1
167 alignb 8
168
169 .u32HMError resd 1
170 .rcLastExitToR3 resd 1
171 alignb 8
172 .fCtxChanged resq 1
173
174 alignb 8
175 .vmx resb HMCPUVMX_size
176 alignb 8
177 .svm resb HMCPUSVM_size
178
179 .Event.fPending resd 1
180 .Event.u32ErrCode resd 1
181 .Event.cbInstr resd 1
182 alignb 8
183 .Event.u64IntInfo resq 1
184 .Event.GCPtrFaultAddress RTGCPTR_RES 1
185
186 .enmShadowMode resd 1
187 alignb 8
188 .aPdpes resq 4
189
190 .StatVmxWriteHostRip resq 1
191 .StatVmxWriteHostRsp resq 1
192
193 ; The remainer is disassembly state and statistics.
194endstruc
195
196struc HMR0CPUVMX
197 .pfnStartVm RTR0PTR_RES 1
198 .uTscDeadline resq 1
199 .uTscDeadlineVersion resq 1
200
201
202 .VmcsInfo resb VMXVMCSINFO_size
203 .VmcsInfoNstGst resb VMXVMCSINFO_size
204 .fSwitchedToNstGstVmcs resb 1
205 alignb 8
206 .pVmxTransient RTR0PTR_RES 1
207
208 .u64HostMsrLStar resq 1
209 .u64HostMsrStar resq 1
210 .u64HostMsrSfMask resq 1
211 .u64HostMsrKernelGsBase resq 1
212 .fLazyMsrs resd 1
213 .fUpdatedHostAutoMsrs resb 1
214 alignb 4
215 .fRestoreHostFlags resd 1
216 alignb 8
217 .RestoreHost resb VMXRESTOREHOST_size
218endstruc
219
220struc HMR0CPUSVM
221 .pfnVMRun RTR0PTR_RES 1
222
223 alignb 8
224 .HCPhysVmcbHost RTHCPHYS_RES 1
225
226 alignb 8
227 .hMemObjVmcbHost RTR0PTR_RES 1
228
229 alignb 8
230 .HCPhysVmcb RTHCPHYS_RES 1
231 .hMemObjVmcb RTR0PTR_RES 1
232 .pVmcb RTR0PTR_RES 1
233
234 alignb 8
235 .HCPhysMsrBitmap RTHCPHYS_RES 1
236 .hMemObjMsrBitmap RTR0PTR_RES 1
237 .pvMsrBitmap RTR0PTR_RES 1
238
239 .fSyncVTpr resb 1
240
241 alignb 8
242 .pSvmTransient RTR0PTR_RES 1
243 .u64HostTscAux resq 1
244
245 alignb 8
246 .Dis resb 0d8h
247endstruc
248
249struc HMR0PERVCPU
250 .cWorldSwitchExits resd 1
251 .cTlbFlushes resd 1
252 .idLastCpu resd 1
253 .idEnteredCpu resd 1
254 .uCurrentAsid resd 1
255
256 .fForceTLBFlush resb 1
257 .fLeaveDone resb 1
258 .fUsingHyperDR7 resb 1
259 .fUsingDebugLoop resb 1
260 .fDebugWantRdTscExit resb 1
261 .fLoadSaveGuestXcr0 resb 1
262 .fClearTrapFlag resb 1
263
264 alignb 4
265 .fWorldSwitcher resd 1
266 .uTscExit resq 1
267
268 alignb 8
269 .vmx resb HMR0CPUVMX_size
270 alignb 8
271 .svm resb HMR0CPUSVM_size
272endstruc
273
274%define HM_WSF_IBPB_EXIT RT_BIT_32(0)
275%define HM_WSF_IBPB_ENTRY RT_BIT_32(1)
276%define HM_WSF_L1D_ENTRY RT_BIT_32(2)
277%define HM_WSF_MDS_ENTRY RT_BIT_32(3)
278
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