VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMMTests.cpp@ 50653

Last change on this file since 50653 was 50115, checked in by vboxsync, 10 years ago

tstVMM: Drop the MSR quick report in the default test.
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File size: 36.6 KB
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1/* $Id: VMMTests.cpp 50115 2014-01-20 13:32:55Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core, Tests.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/*******************************************************************************
21* Header Files *
22*******************************************************************************/
23#define LOG_GROUP LOG_GROUP_VMM
24#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
25#include <VBox/vmm/vmm.h>
26#include <VBox/vmm/pdmapi.h>
27#include <VBox/vmm/cpum.h>
28#include <VBox/dbg.h>
29#include <VBox/vmm/hm.h>
30#include <VBox/vmm/mm.h>
31#include <VBox/vmm/trpm.h>
32#include <VBox/vmm/selm.h>
33#include "VMMInternal.h"
34#include <VBox/vmm/vm.h>
35#include <VBox/err.h>
36#include <VBox/param.h>
37
38#include <iprt/assert.h>
39#include <iprt/asm.h>
40#include <iprt/time.h>
41#include <iprt/stream.h>
42#include <iprt/string.h>
43#include <iprt/x86.h>
44
45static void vmmR3TestClearStack(PVMCPU pVCpu)
46{
47 /* We leave the first 64 bytes of the stack alone because of strict
48 ring-0 long jump code uses it. */
49 memset(pVCpu->vmm.s.pbEMTStackR3 + 64, 0xaa, VMM_STACK_SIZE - 64);
50}
51
52
53#ifdef VBOX_WITH_RAW_MODE
54
55static int vmmR3ReportMsrRange(PVM pVM, uint32_t uMsr, uint64_t cMsrs, PRTSTREAM pReportStrm, uint32_t *pcMsrsFound)
56{
57 /*
58 * Preps.
59 */
60 RTRCPTR RCPtrEP;
61 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMRCTestReadMsrs", &RCPtrEP);
62 AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);
63
64 uint32_t const cMsrsPerCall = 16384;
65 uint32_t cbResults = cMsrsPerCall * sizeof(VMMTESTMSRENTRY);
66 PVMMTESTMSRENTRY paResults;
67 rc = MMHyperAlloc(pVM, cbResults, 0, MM_TAG_VMM, (void **)&paResults);
68 AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", cbResults, rc), rc);
69 /*
70 * The loop.
71 */
72 RTRCPTR RCPtrResults = MMHyperR3ToRC(pVM, paResults);
73 uint32_t cMsrsFound = 0;
74 uint32_t uLastMsr = uMsr;
75 uint64_t uNsTsStart = RTTimeNanoTS();
76
77 for (;;)
78 {
79 if ( pReportStrm
80 && uMsr - uLastMsr > _64K
81 && (uMsr & (_4M - 1)) == 0)
82 {
83 if (uMsr - uLastMsr < 16U*_1M)
84 RTStrmFlush(pReportStrm);
85 RTPrintf("... %#010x [%u ns/msr] ...\n", uMsr, (RTTimeNanoTS() - uNsTsStart) / uMsr);
86 }
87
88 /*RT_BZERO(paResults, cbResults);*/
89 uint32_t const cBatch = RT_MIN(cMsrsPerCall, cMsrs);
90 rc = VMMR3CallRC(pVM, RCPtrEP, 4, pVM->pVMRC, uMsr, cBatch, RCPtrResults);
91 if (RT_FAILURE(rc))
92 {
93 RTPrintf("VMM: VMMR3CallRC failed rc=%Rrc, uMsr=%#x\n", rc, uMsr);
94 break;
95 }
96
97 for (uint32_t i = 0; i < cBatch; i++)
98 if (paResults[i].uMsr != UINT64_MAX)
99 {
100 if (paResults[i].uValue == 0)
101 {
102 if (pReportStrm)
103 RTStrmPrintf(pReportStrm,
104 " MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);
105 RTPrintf("%#010llx = 0\n", paResults[i].uMsr);
106 }
107 else
108 {
109 if (pReportStrm)
110 RTStrmPrintf(pReportStrm,
111 " MVO(%#010llx, \"MSR\", UINT64_C(%#018llx)),\n", paResults[i].uMsr, paResults[i].uValue);
112 RTPrintf("%#010llx = %#010x`%08x\n", paResults[i].uMsr,
113 (uint32_t)(paResults[i].uValue >> 32), (uint32_t)paResults[i].uValue);
114 }
115 cMsrsFound++;
116 uLastMsr = paResults[i].uMsr;
117 }
118
119 /* Advance. */
120 if (cMsrs <= cMsrsPerCall)
121 break;
122 cMsrs -= cMsrsPerCall;
123 uMsr += cMsrsPerCall;
124 }
125
126 *pcMsrsFound += cMsrsFound;
127 MMHyperFree(pVM, paResults);
128 return rc;
129}
130
131
132/**
133 * Produces a quick report of MSRs.
134 *
135 * @returns VBox status code.
136 * @param pVM Pointer to the cross context VM structure.
137 * @param pReportStrm Pointer to the report output stream. Optional.
138 * @param fWithCpuId Whether CPUID should be included.
139 */
140static int vmmR3DoMsrQuickReport(PVM pVM, PRTSTREAM pReportStrm, bool fWithCpuId)
141{
142 uint64_t uTsStart = RTTimeNanoTS();
143 RTPrintf("=== MSR Quick Report Start ===\n");
144 RTStrmFlush(g_pStdOut);
145 if (fWithCpuId)
146 {
147 DBGFR3InfoStdErr(pVM->pUVM, "cpuid", "verbose");
148 RTPrintf("\n");
149 }
150 if (pReportStrm)
151 RTStrmPrintf(pReportStrm, "\n\n{\n");
152
153 static struct { uint32_t uFirst, cMsrs; } const s_aRanges[] =
154 {
155 { 0x00000000, 0x00042000 },
156 { 0x10000000, 0x00001000 },
157 { 0x20000000, 0x00001000 },
158 { 0x40000000, 0x00012000 },
159 { 0x80000000, 0x00012000 },
160// Need 0xc0000000..0xc001106f (at least), but trouble on solaris w/ 10h and 0fh family cpus:
161// { 0xc0000000, 0x00022000 },
162 { 0xc0000000, 0x00010000 },
163 { 0xc0010000, 0x00001040 },
164 { 0xc0011040, 0x00004040 }, /* should cause trouble... */
165 };
166 uint32_t cMsrsFound = 0;
167 int rc = VINF_SUCCESS;
168 for (unsigned i = 0; i < RT_ELEMENTS(s_aRanges) && RT_SUCCESS(rc); i++)
169 {
170//if (i >= 3)
171//{
172//RTStrmFlush(g_pStdOut);
173//RTThreadSleep(40);
174//}
175 rc = vmmR3ReportMsrRange(pVM, s_aRanges[i].uFirst, s_aRanges[i].cMsrs, pReportStrm, &cMsrsFound);
176 }
177
178 if (pReportStrm)
179 RTStrmPrintf(pReportStrm, "}; /* %u (%#x) MSRs; rc=%Rrc */\n", cMsrsFound, cMsrsFound, rc);
180 RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
181 RTPrintf("=== MSR Quick Report End (rc=%Rrc, %'llu ns) ===\n", rc, RTTimeNanoTS() - uTsStart);
182 return rc;
183}
184
185
186/**
187 * Performs a testcase.
188 *
189 * @returns return value from the test.
190 * @param pVM Pointer to the VM.
191 * @param enmTestcase The testcase operation to perform.
192 * @param uVariation The testcase variation id.
193 */
194static int vmmR3DoGCTest(PVM pVM, VMMGCOPERATION enmTestcase, unsigned uVariation)
195{
196 PVMCPU pVCpu = &pVM->aCpus[0];
197
198 RTRCPTR RCPtrEP;
199 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
200 if (RT_FAILURE(rc))
201 return rc;
202
203 Log(("vmmR3DoGCTest: %d %#x\n", enmTestcase, uVariation));
204 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
205 vmmR3TestClearStack(pVCpu);
206 CPUMPushHyper(pVCpu, uVariation);
207 CPUMPushHyper(pVCpu, enmTestcase);
208 CPUMPushHyper(pVCpu, pVM->pVMRC);
209 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
210 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
211 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
212 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
213
214#if 1
215 /* flush the raw-mode logs. */
216# ifdef LOG_ENABLED
217 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
218 if ( pLogger
219 && pLogger->offScratch > 0)
220 RTLogFlushRC(NULL, pLogger);
221# endif
222# ifdef VBOX_WITH_RC_RELEASE_LOGGING
223 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
224 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
225 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
226# endif
227#endif
228
229 Log(("vmmR3DoGCTest: rc=%Rrc iLastGZRc=%Rrc\n", rc, pVCpu->vmm.s.iLastGZRc));
230 if (RT_LIKELY(rc == VINF_SUCCESS))
231 rc = pVCpu->vmm.s.iLastGZRc;
232 return rc;
233}
234
235
236/**
237 * Performs a trap test.
238 *
239 * @returns Return value from the trap test.
240 * @param pVM Pointer to the VM.
241 * @param u8Trap The trap number to test.
242 * @param uVariation The testcase variation.
243 * @param rcExpect The expected result.
244 * @param u32Eax The expected eax value.
245 * @param pszFaultEIP The fault address. Pass NULL if this isn't available or doesn't apply.
246 * @param pszDesc The test description.
247 */
248static int vmmR3DoTrapTest(PVM pVM, uint8_t u8Trap, unsigned uVariation, int rcExpect, uint32_t u32Eax, const char *pszFaultEIP, const char *pszDesc)
249{
250 PVMCPU pVCpu = &pVM->aCpus[0];
251
252 RTPrintf("VMM: testing 0%x / %d - %s\n", u8Trap, uVariation, pszDesc);
253
254 RTRCPTR RCPtrEP;
255 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
256 if (RT_FAILURE(rc))
257 return rc;
258
259 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
260 vmmR3TestClearStack(pVCpu);
261 CPUMPushHyper(pVCpu, uVariation);
262 CPUMPushHyper(pVCpu, u8Trap + VMMGC_DO_TESTCASE_TRAP_FIRST);
263 CPUMPushHyper(pVCpu, pVM->pVMRC);
264 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
265 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
266 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
267 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
268 if (RT_LIKELY(rc == VINF_SUCCESS))
269 rc = pVCpu->vmm.s.iLastGZRc;
270 bool fDump = false;
271 if (rc != rcExpect)
272 {
273 RTPrintf("VMM: FAILURE - rc=%Rrc expected %Rrc\n", rc, rcExpect);
274 if (rc != VERR_NOT_IMPLEMENTED)
275 fDump = true;
276 }
277 else if ( rcExpect != VINF_SUCCESS
278 && u8Trap != 8 /* double fault doesn't dare set TrapNo. */
279 && u8Trap != 3 /* guest only, we're not in guest. */
280 && u8Trap != 1 /* guest only, we're not in guest. */
281 && u8Trap != TRPMGetTrapNo(pVCpu))
282 {
283 RTPrintf("VMM: FAILURE - Trap %#x expected %#x\n", TRPMGetTrapNo(pVCpu), u8Trap);
284 fDump = true;
285 }
286 else if (pszFaultEIP)
287 {
288 RTRCPTR RCPtrFault;
289 int rc2 = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, pszFaultEIP, &RCPtrFault);
290 if (RT_FAILURE(rc2))
291 RTPrintf("VMM: FAILURE - Failed to resolve symbol '%s', %Rrc!\n", pszFaultEIP, rc);
292 else if (RCPtrFault != CPUMGetHyperEIP(pVCpu))
293 {
294 RTPrintf("VMM: FAILURE - EIP=%08RX32 expected %RRv (%s)\n", CPUMGetHyperEIP(pVCpu), RCPtrFault, pszFaultEIP);
295 fDump = true;
296 }
297 }
298 else if (rcExpect != VINF_SUCCESS)
299 {
300 if (CPUMGetHyperSS(pVCpu) == SELMGetHyperDS(pVM))
301 RTPrintf("VMM: FAILURE - ss=%x expected %x\n", CPUMGetHyperSS(pVCpu), SELMGetHyperDS(pVM));
302 if (CPUMGetHyperES(pVCpu) == SELMGetHyperDS(pVM))
303 RTPrintf("VMM: FAILURE - es=%x expected %x\n", CPUMGetHyperES(pVCpu), SELMGetHyperDS(pVM));
304 if (CPUMGetHyperDS(pVCpu) == SELMGetHyperDS(pVM))
305 RTPrintf("VMM: FAILURE - ds=%x expected %x\n", CPUMGetHyperDS(pVCpu), SELMGetHyperDS(pVM));
306 if (CPUMGetHyperFS(pVCpu) == SELMGetHyperDS(pVM))
307 RTPrintf("VMM: FAILURE - fs=%x expected %x\n", CPUMGetHyperFS(pVCpu), SELMGetHyperDS(pVM));
308 if (CPUMGetHyperGS(pVCpu) == SELMGetHyperDS(pVM))
309 RTPrintf("VMM: FAILURE - gs=%x expected %x\n", CPUMGetHyperGS(pVCpu), SELMGetHyperDS(pVM));
310 if (CPUMGetHyperEDI(pVCpu) == 0x01234567)
311 RTPrintf("VMM: FAILURE - edi=%x expected %x\n", CPUMGetHyperEDI(pVCpu), 0x01234567);
312 if (CPUMGetHyperESI(pVCpu) == 0x42000042)
313 RTPrintf("VMM: FAILURE - esi=%x expected %x\n", CPUMGetHyperESI(pVCpu), 0x42000042);
314 if (CPUMGetHyperEBP(pVCpu) == 0xffeeddcc)
315 RTPrintf("VMM: FAILURE - ebp=%x expected %x\n", CPUMGetHyperEBP(pVCpu), 0xffeeddcc);
316 if (CPUMGetHyperEBX(pVCpu) == 0x89abcdef)
317 RTPrintf("VMM: FAILURE - ebx=%x expected %x\n", CPUMGetHyperEBX(pVCpu), 0x89abcdef);
318 if (CPUMGetHyperECX(pVCpu) == 0xffffaaaa)
319 RTPrintf("VMM: FAILURE - ecx=%x expected %x\n", CPUMGetHyperECX(pVCpu), 0xffffaaaa);
320 if (CPUMGetHyperEDX(pVCpu) == 0x77778888)
321 RTPrintf("VMM: FAILURE - edx=%x expected %x\n", CPUMGetHyperEDX(pVCpu), 0x77778888);
322 if (CPUMGetHyperEAX(pVCpu) == u32Eax)
323 RTPrintf("VMM: FAILURE - eax=%x expected %x\n", CPUMGetHyperEAX(pVCpu), u32Eax);
324 }
325 if (fDump)
326 VMMR3FatalDump(pVM, pVCpu, rc);
327 return rc;
328}
329
330#endif /* VBOX_WITH_RAW_MODE */
331
332
333/* execute the switch. */
334VMMR3DECL(int) VMMDoTest(PVM pVM)
335{
336 int rc = VINF_SUCCESS;
337
338#ifdef VBOX_WITH_RAW_MODE
339 PVMCPU pVCpu = &pVM->aCpus[0];
340 PUVM pUVM = pVM->pUVM;
341
342# ifdef NO_SUPCALLR0VMM
343 RTPrintf("NO_SUPCALLR0VMM\n");
344 return rc;
345# endif
346
347 /*
348 * Setup stack for calling VMMGCEntry().
349 */
350 RTRCPTR RCPtrEP;
351 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
352 if (RT_SUCCESS(rc))
353 {
354 RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
355
356 /*
357 * Test various crashes which we must be able to recover from.
358 */
359 vmmR3DoTrapTest(pVM, 0x3, 0, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3");
360 vmmR3DoTrapTest(pVM, 0x3, 1, VINF_EM_DBG_HYPER_ASSERTION, 0xf0f0f0f0, "vmmGCTestTrap3_FaultEIP", "int3 WP");
361
362# if 0//defined(DEBUG_bird) /* guess most people would like to skip these since they write to com1. */
363 vmmR3DoTrapTest(pVM, 0x8, 0, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG]");
364 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
365 bool f;
366 rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "DoubleFault", &f);
367# if !defined(DEBUG_bird)
368 if (RT_SUCCESS(rc) && f)
369# endif
370 {
371 /* see triple fault warnings in SELM and VMMGC.cpp. */
372 vmmR3DoTrapTest(pVM, 0x8, 1, VERR_TRPM_PANIC, 0x00000000, "vmmGCTestTrap8_FaultEIP", "#DF [#PG] WP");
373 SELMR3Relocate(pVM); /* this resets the busy flag of the Trap 08 TSS */
374 }
375# endif
376
377 vmmR3DoTrapTest(pVM, 0xd, 0, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP");
378 ///@todo find a better \#GP case, on intel ltr will \#PF (busy update?) and not \#GP.
379 //vmmR3DoTrapTest(pVM, 0xd, 1, VERR_TRPM_DONT_PANIC, 0xf0f0f0f0, "vmmGCTestTrap0d_FaultEIP", "ltr #GP WP");
380
381 vmmR3DoTrapTest(pVM, 0xe, 0, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL)");
382 vmmR3DoTrapTest(pVM, 0xe, 1, VERR_TRPM_DONT_PANIC, 0x00000000, "vmmGCTestTrap0e_FaultEIP", "#PF (NULL) WP");
383 vmmR3DoTrapTest(pVM, 0xe, 2, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler");
384 /* This test is no longer relevant as fs and gs are loaded with NULL
385 selectors and we will always return to HC if a #GP occurs while
386 returning to guest code.
387 vmmR3DoTrapTest(pVM, 0xe, 4, VINF_SUCCESS, 0x00000000, NULL, "#PF w/Tmp Handler and bad fs");
388 */
389
390 /*
391 * Set a debug register and perform a context switch.
392 */
393 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
394 if (rc != VINF_SUCCESS)
395 {
396 RTPrintf("VMM: Nop test failed, rc=%Rrc not VINF_SUCCESS\n", rc);
397 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
398 }
399
400 /* a harmless breakpoint */
401 RTPrintf("VMM: testing hardware bp at 0x10000 (not hit)\n");
402 DBGFADDRESS Addr;
403 DBGFR3AddrFromFlat(pUVM, &Addr, 0x10000);
404 RTUINT iBp0;
405 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp0);
406 AssertReleaseRC(rc);
407 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
408 if (rc != VINF_SUCCESS)
409 {
410 RTPrintf("VMM: DR0=0x10000 test failed with rc=%Rrc!\n", rc);
411 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
412 }
413
414 /* a bad one at VMMGCEntry */
415 RTPrintf("VMM: testing hardware bp at VMMGCEntry (hit)\n");
416 DBGFR3AddrFromFlat(pUVM, &Addr, RCPtrEP);
417 RTUINT iBp1;
418 rc = DBGFR3BpSetReg(pUVM, &Addr, 0, ~(uint64_t)0, X86_DR7_RW_EO, 1, &iBp1);
419 AssertReleaseRC(rc);
420 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
421 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
422 {
423 RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
424 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
425 }
426
427 /* resume the breakpoint */
428 RTPrintf("VMM: resuming hyper after breakpoint\n");
429 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_RF);
430 rc = VMMR3ResumeHyper(pVM, pVCpu);
431 if (rc != VINF_SUCCESS)
432 {
433 RTPrintf("VMM: failed to resume on hyper breakpoint, rc=%Rrc = KNOWN BUG\n", rc); /** @todo fix VMMR3ResumeHyper */
434 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
435 }
436
437 /* engage the breakpoint again and try single stepping. */
438 RTPrintf("VMM: testing hardware bp at VMMGCEntry + stepping\n");
439 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
440 if (rc != VINF_EM_DBG_HYPER_BREAKPOINT)
441 {
442 RTPrintf("VMM: DR1=VMMGCEntry test failed with rc=%Rrc! expected VINF_EM_RAW_BREAKPOINT_HYPER\n", rc);
443 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
444 }
445
446 RTGCUINTREG OldPc = CPUMGetHyperEIP(pVCpu);
447 RTPrintf("%RGr=>", OldPc);
448 unsigned i;
449 for (i = 0; i < 8; i++)
450 {
451 CPUMSetHyperEFlags(pVCpu, CPUMGetHyperEFlags(pVCpu) | X86_EFL_TF | X86_EFL_RF);
452 rc = VMMR3ResumeHyper(pVM, pVCpu);
453 if (rc != VINF_EM_DBG_HYPER_STEPPED)
454 {
455 RTPrintf("\nVMM: failed to step on hyper breakpoint, rc=%Rrc\n", rc);
456 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
457 }
458 RTGCUINTREG Pc = CPUMGetHyperEIP(pVCpu);
459 RTPrintf("%RGr=>", Pc);
460 if (Pc == OldPc)
461 {
462 RTPrintf("\nVMM: step failed, PC: %RGr -> %RGr\n", OldPc, Pc);
463 return VERR_GENERAL_FAILURE;
464 }
465 OldPc = Pc;
466 }
467 RTPrintf("ok\n");
468
469 /* done, clear it */
470 if ( RT_FAILURE(DBGFR3BpClear(pUVM, iBp0))
471 || RT_FAILURE(DBGFR3BpClear(pUVM, iBp1)))
472 {
473 RTPrintf("VMM: Failed to clear breakpoints!\n");
474 return VERR_GENERAL_FAILURE;
475 }
476 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_NOP, 0);
477 if (rc != VINF_SUCCESS)
478 {
479 RTPrintf("VMM: NOP failed, rc=%Rrc\n", rc);
480 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
481 }
482
483 /*
484 * Interrupt masking. Failure may indiate NMI watchdog activity.
485 */
486 RTPrintf("VMM: interrupt masking...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
487 for (i = 0; i < 10000; i++)
488 {
489 uint64_t StartTick = ASMReadTSC();
490 rc = vmmR3DoGCTest(pVM, VMMGC_DO_TESTCASE_INTERRUPT_MASKING, 0);
491 if (rc != VINF_SUCCESS)
492 {
493 RTPrintf("VMM: Interrupt masking failed: rc=%Rrc\n", rc);
494 return RT_FAILURE(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS;
495 }
496 uint64_t Ticks = ASMReadTSC() - StartTick;
497 if (Ticks < (SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000))
498 RTPrintf("Warning: Ticks=%RU64 (< %RU64)\n", Ticks, SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage) / 10000);
499 }
500
501 /*
502 * Interrupt forwarding.
503 */
504 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
505 CPUMPushHyper(pVCpu, 0);
506 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HYPER_INTERRUPT);
507 CPUMPushHyper(pVCpu, pVM->pVMRC);
508 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
509 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
510 Log(("trampoline=%x\n", pVM->vmm.s.pfnCallTrampolineRC));
511
512 /*
513 * Switch and do da thing.
514 */
515 RTPrintf("VMM: interrupt forwarding...\n"); RTStrmFlush(g_pStdOut); RTThreadSleep(250);
516 i = 0;
517 uint64_t tsBegin = RTTimeNanoTS();
518 uint64_t TickStart = ASMReadTSC();
519 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
520 do
521 {
522 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
523 if (RT_LIKELY(rc == VINF_SUCCESS))
524 rc = pVCpu->vmm.s.iLastGZRc;
525 if (RT_FAILURE(rc))
526 {
527 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
528 VMMR3FatalDump(pVM, pVCpu, rc);
529 return rc;
530 }
531 i++;
532 if (!(i % 32))
533 Log(("VMM: iteration %d, esi=%08x edi=%08x ebx=%08x\n",
534 i, CPUMGetHyperESI(pVCpu), CPUMGetHyperEDI(pVCpu), CPUMGetHyperEBX(pVCpu)));
535 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
536 uint64_t TickEnd = ASMReadTSC();
537 uint64_t tsEnd = RTTimeNanoTS();
538
539 uint64_t Elapsed = tsEnd - tsBegin;
540 uint64_t PerIteration = Elapsed / (uint64_t)i;
541 uint64_t cTicksElapsed = TickEnd - TickStart;
542 uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
543
544 RTPrintf("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
545 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration);
546 Log(("VMM: %8d interrupts in %11llu ns (%11llu ticks), %10llu ns/iteration (%11llu ticks)\n",
547 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration));
548
549 /*
550 * These forced actions are not necessary for the test and trigger breakpoints too.
551 */
552 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
553 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
554
555 /*
556 * Profile switching.
557 */
558 RTPrintf("VMM: profiling switcher...\n");
559 Log(("VMM: profiling switcher...\n"));
560 uint64_t TickMin = ~0;
561 tsBegin = RTTimeNanoTS();
562 TickStart = ASMReadTSC();
563 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
564 for (i = 0; i < 1000000; i++)
565 {
566 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
567 CPUMPushHyper(pVCpu, 0);
568 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_NOP);
569 CPUMPushHyper(pVCpu, pVM->pVMRC);
570 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
571 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
572
573 uint64_t TickThisStart = ASMReadTSC();
574 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
575 if (RT_LIKELY(rc == VINF_SUCCESS))
576 rc = pVCpu->vmm.s.iLastGZRc;
577 uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
578 if (RT_FAILURE(rc))
579 {
580 Log(("VMM: GC returned fatal %Rra in iteration %d\n", rc, i));
581 VMMR3FatalDump(pVM, pVCpu, rc);
582 return rc;
583 }
584 if (TickThisElapsed < TickMin)
585 TickMin = TickThisElapsed;
586 }
587 TickEnd = ASMReadTSC();
588 tsEnd = RTTimeNanoTS();
589
590 Elapsed = tsEnd - tsBegin;
591 PerIteration = Elapsed / (uint64_t)i;
592 cTicksElapsed = TickEnd - TickStart;
593 cTicksPerIteration = cTicksElapsed / (uint64_t)i;
594
595 RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
596 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
597 Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
598 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
599
600 rc = VINF_SUCCESS;
601
602#if 0 /* drop this for now as it causes trouble on AMDs (Opteron 2384 and possibly others). */
603 /*
604 * A quick MSR report.
605 */
606 vmmR3DoMsrQuickReport(pVM, NULL, true);
607#endif
608 }
609 else
610 AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
611#endif
612 return rc;
613}
614
615#define SYNC_SEL(pHyperCtx, reg) \
616 if (pHyperCtx->reg.Sel) \
617 { \
618 DBGFSELINFO selInfo; \
619 int rc2 = SELMR3GetShadowSelectorInfo(pVM, pHyperCtx->reg.Sel, &selInfo); \
620 AssertRC(rc2); \
621 \
622 pHyperCtx->reg.u64Base = selInfo.GCPtrBase; \
623 pHyperCtx->reg.u32Limit = selInfo.cbLimit; \
624 pHyperCtx->reg.Attr.n.u1Present = selInfo.u.Raw.Gen.u1Present; \
625 pHyperCtx->reg.Attr.n.u1DefBig = selInfo.u.Raw.Gen.u1DefBig; \
626 pHyperCtx->reg.Attr.n.u1Granularity = selInfo.u.Raw.Gen.u1Granularity; \
627 pHyperCtx->reg.Attr.n.u4Type = selInfo.u.Raw.Gen.u4Type; \
628 pHyperCtx->reg.Attr.n.u2Dpl = selInfo.u.Raw.Gen.u2Dpl; \
629 pHyperCtx->reg.Attr.n.u1DescType = selInfo.u.Raw.Gen.u1DescType; \
630 pHyperCtx->reg.Attr.n.u1Long = selInfo.u.Raw.Gen.u1Long; \
631 }
632
633/* execute the switch. */
634VMMR3DECL(int) VMMDoHmTest(PVM pVM)
635{
636 uint32_t i;
637 int rc;
638 PCPUMCTX pHyperCtx, pGuestCtx;
639 RTGCPHYS CR3Phys = 0x0; /* fake address */
640 PVMCPU pVCpu = &pVM->aCpus[0];
641
642 if (!HMIsEnabled(pVM))
643 {
644 RTPrintf("VMM: Hardware accelerated test not available!\n");
645 return VERR_ACCESS_DENIED;
646 }
647
648#ifdef VBOX_WITH_RAW_MODE
649 /*
650 * These forced actions are not necessary for the test and trigger breakpoints too.
651 */
652 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
653 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
654#endif
655
656 /* Enable mapping of the hypervisor into the shadow page table. */
657 uint32_t cb;
658 rc = PGMR3MappingsSize(pVM, &cb);
659 AssertRCReturn(rc, rc);
660
661 /* Pretend the mappings are now fixed; to force a refresh of the reserved PDEs. */
662 rc = PGMR3MappingsFix(pVM, MM_HYPER_AREA_ADDRESS, cb);
663 AssertRCReturn(rc, rc);
664
665 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
666
667 pHyperCtx->cr0 = X86_CR0_PE | X86_CR0_WP | X86_CR0_PG | X86_CR0_TS | X86_CR0_ET | X86_CR0_NE | X86_CR0_MP;
668 pHyperCtx->cr4 = X86_CR4_PGE | X86_CR4_OSFSXR | X86_CR4_OSXMMEEXCPT;
669 PGMChangeMode(pVCpu, pHyperCtx->cr0, pHyperCtx->cr4, pHyperCtx->msrEFER);
670 PGMSyncCR3(pVCpu, pHyperCtx->cr0, CR3Phys, pHyperCtx->cr4, true);
671
672 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
673 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
674 VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
675 VM_FF_CLEAR(pVM, VM_FF_REQUEST);
676
677 /*
678 * Setup stack for calling VMMGCEntry().
679 */
680 RTRCPTR RCPtrEP;
681 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
682 if (RT_SUCCESS(rc))
683 {
684 RTPrintf("VMM: VMMGCEntry=%RRv\n", RCPtrEP);
685
686 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
687
688 /* Fill in hidden selector registers for the hypervisor state. */
689 SYNC_SEL(pHyperCtx, cs);
690 SYNC_SEL(pHyperCtx, ds);
691 SYNC_SEL(pHyperCtx, es);
692 SYNC_SEL(pHyperCtx, fs);
693 SYNC_SEL(pHyperCtx, gs);
694 SYNC_SEL(pHyperCtx, ss);
695 SYNC_SEL(pHyperCtx, tr);
696
697 /*
698 * Profile switching.
699 */
700 RTPrintf("VMM: profiling switcher...\n");
701 Log(("VMM: profiling switcher...\n"));
702 uint64_t TickMin = ~0;
703 uint64_t tsBegin = RTTimeNanoTS();
704 uint64_t TickStart = ASMReadTSC();
705 for (i = 0; i < 1000000; i++)
706 {
707 CPUMSetHyperState(pVCpu, pVM->vmm.s.pfnCallTrampolineRC, pVCpu->vmm.s.pbEMTStackBottomRC, 0, 0);
708 CPUMPushHyper(pVCpu, 0);
709 CPUMPushHyper(pVCpu, VMMGC_DO_TESTCASE_HM_NOP);
710 CPUMPushHyper(pVCpu, pVM->pVMRC);
711 CPUMPushHyper(pVCpu, 3 * sizeof(RTRCPTR)); /* stack frame size */
712 CPUMPushHyper(pVCpu, RCPtrEP); /* what to call */
713
714 pHyperCtx = CPUMGetHyperCtxPtr(pVCpu);
715 pGuestCtx = CPUMQueryGuestCtxPtr(pVCpu);
716
717 /* Copy the hypervisor context to make sure we have a valid guest context. */
718 *pGuestCtx = *pHyperCtx;
719 pGuestCtx->cr3 = CR3Phys;
720
721 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
722 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TIMER);
723 VM_FF_CLEAR(pVM, VM_FF_TM_VIRTUAL_SYNC);
724
725 uint64_t TickThisStart = ASMReadTSC();
726 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, 0);
727 uint64_t TickThisElapsed = ASMReadTSC() - TickThisStart;
728 if (RT_FAILURE(rc))
729 {
730 Log(("VMM: R0 returned fatal %Rrc in iteration %d\n", rc, i));
731 VMMR3FatalDump(pVM, pVCpu, rc);
732 return rc;
733 }
734 if (TickThisElapsed < TickMin)
735 TickMin = TickThisElapsed;
736 }
737 uint64_t TickEnd = ASMReadTSC();
738 uint64_t tsEnd = RTTimeNanoTS();
739
740 uint64_t Elapsed = tsEnd - tsBegin;
741 uint64_t PerIteration = Elapsed / (uint64_t)i;
742 uint64_t cTicksElapsed = TickEnd - TickStart;
743 uint64_t cTicksPerIteration = cTicksElapsed / (uint64_t)i;
744
745 RTPrintf("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
746 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin);
747 Log(("VMM: %8d cycles in %11llu ns (%11lld ticks), %10llu ns/iteration (%11lld ticks) Min %11lld ticks\n",
748 i, Elapsed, cTicksElapsed, PerIteration, cTicksPerIteration, TickMin));
749
750 rc = VINF_SUCCESS;
751 }
752 else
753 AssertMsgFailed(("Failed to resolved VMMGC.gc::VMMGCEntry(), rc=%Rrc\n", rc));
754
755 return rc;
756}
757
758
759#ifdef VBOX_WITH_RAW_MODE
760
761/**
762 * Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
763 * prefix to the MSR report.
764 */
765static DECLCALLBACK(void) vmmDoPrintfVToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, va_list va)
766{
767 PRTSTREAM pOutStrm = ((PRTSTREAM *)pHlp)[-1];
768 RTStrmPrintfV(pOutStrm, pszFormat, va);
769}
770
771/**
772 * Used by VMMDoBruteForceMsrs to dump the CPUID info of the host CPU as a
773 * prefix to the MSR report.
774 */
775static DECLCALLBACK(void) vmmDoPrintfToStream(PCDBGFINFOHLP pHlp, const char *pszFormat, ...)
776{
777 va_list va;
778 va_start(va, pszFormat);
779 vmmDoPrintfVToStream(pHlp, pszFormat, va);
780 va_end(va);
781}
782
783#endif
784
785
786/**
787 * Uses raw-mode to query all possible MSRs on the real hardware.
788 *
789 * This generates a msr-report.txt file (appending, no overwriting) as well as
790 * writing the values and process to stdout.
791 *
792 * @returns VBox status code.
793 * @param pVM The VM handle.
794 */
795VMMR3DECL(int) VMMDoBruteForceMsrs(PVM pVM)
796{
797#ifdef VBOX_WITH_RAW_MODE
798 PRTSTREAM pOutStrm;
799 int rc = RTStrmOpen("msr-report.txt", "a", &pOutStrm);
800 if (RT_SUCCESS(rc))
801 {
802 /* Header */
803 struct
804 {
805 PRTSTREAM pOutStrm;
806 DBGFINFOHLP Hlp;
807 } MyHlp = { pOutStrm, { vmmDoPrintfToStream, vmmDoPrintfVToStream } };
808 DBGFR3Info(pVM->pUVM, "cpuid", "verbose", &MyHlp.Hlp);
809 RTStrmPrintf(pOutStrm, "\n");
810
811 uint32_t cMsrsFound = 0;
812 vmmR3ReportMsrRange(pVM, 0, _4G, pOutStrm, &cMsrsFound);
813
814 RTStrmPrintf(pOutStrm, "Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
815 RTPrintf("Total %u (%#x) MSRs\n", cMsrsFound, cMsrsFound);
816
817 RTStrmClose(pOutStrm);
818 }
819 return rc;
820#else
821 return VERR_NOT_SUPPORTED;
822#endif
823}
824
825
826/**
827 * Uses raw-mode to query all known MSRS on the real hardware.
828 *
829 * This generates a known-msr-report.txt file (appending, no overwriting) as
830 * well as writing the values and process to stdout.
831 *
832 * @returns VBox status code.
833 * @param pVM The VM handle.
834 */
835VMMR3DECL(int) VMMDoKnownMsrs(PVM pVM)
836{
837#ifdef VBOX_WITH_RAW_MODE
838 PRTSTREAM pOutStrm;
839 int rc = RTStrmOpen("known-msr-report.txt", "a", &pOutStrm);
840 if (RT_SUCCESS(rc))
841 {
842 vmmR3DoMsrQuickReport(pVM, pOutStrm, false);
843 RTStrmClose(pOutStrm);
844 }
845 return rc;
846#else
847 return VERR_NOT_SUPPORTED;
848#endif
849}
850
851
852/**
853 * MSR experimentation.
854 *
855 * @returns VBox status code.
856 * @param pVM The VM handle.
857 */
858VMMR3DECL(int) VMMDoMsrExperiments(PVM pVM)
859{
860#ifdef VBOX_WITH_RAW_MODE
861 /*
862 * Preps.
863 */
864 RTRCPTR RCPtrEP;
865 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMRCTestTestWriteMsr", &RCPtrEP);
866 AssertMsgRCReturn(rc, ("Failed to resolved VMMRC.rc::VMMRCEntry(), rc=%Rrc\n", rc), rc);
867
868 uint64_t *pauValues;
869 rc = MMHyperAlloc(pVM, 2 * sizeof(uint64_t), 0, MM_TAG_VMM, (void **)&pauValues);
870 AssertMsgRCReturn(rc, ("Error allocating %#x bytes off the hyper heap: %Rrc\n", 2 * sizeof(uint64_t), rc), rc);
871 RTRCPTR RCPtrValues = MMHyperR3ToRC(pVM, pauValues);
872
873 /*
874 * Do the experiments.
875 */
876 uint32_t uMsr = 0x00000277;
877 uint64_t uValue = UINT64_C(0x0007010600070106);
878#if 0
879 uValue &= ~(RT_BIT_64(17) | RT_BIT_64(16) | RT_BIT_64(15) | RT_BIT_64(14) | RT_BIT_64(13));
880 uValue |= RT_BIT_64(13);
881 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
882 RCPtrValues, RCPtrValues + sizeof(uint64_t));
883 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
884 uMsr, pauValues[0], uValue, pauValues[1], rc);
885#elif 1
886 const uint64_t uOrgValue = uValue;
887 uint32_t cChanges = 0;
888 for (int iBit = 63; iBit >= 58; iBit--)
889 {
890 uValue = uOrgValue & ~RT_BIT_64(iBit);
891 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
892 RCPtrValues, RCPtrValues + sizeof(uint64_t));
893 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\nclear bit=%u -> %s\n",
894 uMsr, pauValues[0], uValue, pauValues[1], rc, iBit,
895 (pauValues[0] ^ pauValues[1]) & RT_BIT_64(iBit) ? "changed" : "unchanged");
896 cChanges += RT_BOOL(pauValues[0] ^ pauValues[1]);
897
898 uValue = uOrgValue | RT_BIT_64(iBit);
899 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
900 RCPtrValues, RCPtrValues + sizeof(uint64_t));
901 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\nset bit=%u -> %s\n",
902 uMsr, pauValues[0], uValue, pauValues[1], rc, iBit,
903 (pauValues[0] ^ pauValues[1]) & RT_BIT_64(iBit) ? "changed" : "unchanged");
904 cChanges += RT_BOOL(pauValues[0] ^ pauValues[1]);
905 }
906 RTPrintf("%u change(s)\n", cChanges);
907#else
908 uint64_t fWriteable = 0;
909 for (uint32_t i = 0; i <= 63; i++)
910 {
911 uValue = RT_BIT_64(i);
912# if 0
913 if (uValue & (0x7))
914 continue;
915# endif
916 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
917 RCPtrValues, RCPtrValues + sizeof(uint64_t));
918 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
919 uMsr, pauValues[0], uValue, pauValues[1], rc);
920 if (RT_SUCCESS(rc))
921 fWriteable |= RT_BIT_64(i);
922 }
923
924 uValue = 0;
925 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
926 RCPtrValues, RCPtrValues + sizeof(uint64_t));
927 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
928 uMsr, pauValues[0], uValue, pauValues[1], rc);
929
930 uValue = UINT64_MAX;
931 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
932 RCPtrValues, RCPtrValues + sizeof(uint64_t));
933 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc\n",
934 uMsr, pauValues[0], uValue, pauValues[1], rc);
935
936 uValue = fWriteable;
937 rc = VMMR3CallRC(pVM, RCPtrEP, 6, pVM->pVMRC, uMsr, RT_LODWORD(uValue), RT_HIDWORD(uValue),
938 RCPtrValues, RCPtrValues + sizeof(uint64_t));
939 RTPrintf("uMsr=%#010x before=%#018llx written=%#018llx after=%#018llx rc=%Rrc [fWriteable]\n",
940 uMsr, pauValues[0], uValue, pauValues[1], rc);
941
942#endif
943
944 /*
945 * Cleanups.
946 */
947 MMHyperFree(pVM, pauValues);
948 return rc;
949#else
950 return VERR_NOT_SUPPORTED;
951#endif
952}
953
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