VMM.cpp@ 88346

Last change on this file since 88346 was 88346, checked in by vboxsync, 4 years ago
Forward ported r143574 from 6.1: VMM: Must do vmR3SetHaltMethodCallback on all EMTs or only one of them will be doing halting in ring-0. oem2ticketref:40
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1	/* $Id: VMM.cpp 88346 2021-04-01 13:16:25Z vboxsync $ */
2	/** @file
3	* VMM - The Virtual Machine Monitor Core.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	//#define NO_SUPCALLR0VMM
19
20	/** @page pg_vmm VMM - The Virtual Machine Monitor
21	*
22	* The VMM component is two things at the moment, it's a component doing a few
23	* management and routing tasks, and it's the whole virtual machine monitor
24	* thing. For hysterical reasons, it is not doing all the management that one
25	* would expect, this is instead done by @ref pg_vm. We'll address this
26	* misdesign eventually, maybe.
27	*
28	* VMM is made up of these components:
29	* - @subpage pg_cfgm
30	* - @subpage pg_cpum
31	* - @subpage pg_dbgf
32	* - @subpage pg_em
33	* - @subpage pg_gim
34	* - @subpage pg_gmm
35	* - @subpage pg_gvmm
36	* - @subpage pg_hm
37	* - @subpage pg_iem
38	* - @subpage pg_iom
39	* - @subpage pg_mm
40	* - @subpage pg_nem
41	* - @subpage pg_pdm
42	* - @subpage pg_pgm
43	* - @subpage pg_selm
44	* - @subpage pg_ssm
45	* - @subpage pg_stam
46	* - @subpage pg_tm
47	* - @subpage pg_trpm
48	* - @subpage pg_vm
49	*
50	*
51	* @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52	*
53	*
54	* @section sec_vmmstate VMM State
55	*
56	* @image html VM_Statechart_Diagram.gif
57	*
58	* To be written.
59	*
60	*
61	* @subsection subsec_vmm_init VMM Initialization
62	*
63	* To be written.
64	*
65	*
66	* @subsection subsec_vmm_term VMM Termination
67	*
68	* To be written.
69	*
70	*
71	* @section sec_vmm_limits VMM Limits
72	*
73	* There are various resource limits imposed by the VMM and it's
74	* sub-components. We'll list some of them here.
75	*
76	* On 64-bit hosts:
77	* - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78	* can be increased up to 64K - 1.
79	* - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80	* ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81	* - A VM can be assigned all the memory we can use (16TB), however, the
82	* Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84	*
85	* On 32-bit hosts:
86	* - Max 127 VMs. Imposed by GMM's per page structure.
87	* - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88	* ROM pages. The limit is imposed by the 28-bit page ID used
89	* internally in GMM. It is also limited by PAE.
90	* - A VM can be assigned all the memory GMM can allocate, however, the
91	* Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92	* - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93	*
94	*/
95
96
97	/*********************************************************************************************************************************
98	* Header Files *
99	*********************************************************************************************************************************/
100	#define LOG_GROUP LOG_GROUP_VMM
101	#include <VBox/vmm/vmm.h>
102	#include <VBox/vmm/vmapi.h>
103	#include <VBox/vmm/pgm.h>
104	#include <VBox/vmm/cfgm.h>
105	#include <VBox/vmm/pdmqueue.h>
106	#include <VBox/vmm/pdmcritsect.h>
107	#include <VBox/vmm/pdmcritsectrw.h>
108	#include <VBox/vmm/pdmapi.h>
109	#include <VBox/vmm/cpum.h>
110	#include <VBox/vmm/gim.h>
111	#include <VBox/vmm/mm.h>
112	#include <VBox/vmm/nem.h>
113	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114	# include <VBox/vmm/iem.h>
115	#endif
116	#include <VBox/vmm/iom.h>
117	#include <VBox/vmm/trpm.h>
118	#include <VBox/vmm/selm.h>
119	#include <VBox/vmm/em.h>
120	#include <VBox/sup.h>
121	#include <VBox/vmm/dbgf.h>
122	#include <VBox/vmm/apic.h>
123	#include <VBox/vmm/ssm.h>
124	#include <VBox/vmm/tm.h>
125	#include "VMMInternal.h"
126	#include <VBox/vmm/vmcc.h>
127
128	#include <VBox/err.h>
129	#include <VBox/param.h>
130	#include <VBox/version.h>
131	#include <VBox/vmm/hm.h>
132	#include <iprt/assert.h>
133	#include <iprt/alloc.h>
134	#include <iprt/asm.h>
135	#include <iprt/time.h>
136	#include <iprt/semaphore.h>
137	#include <iprt/stream.h>
138	#include <iprt/string.h>
139	#include <iprt/stdarg.h>
140	#include <iprt/ctype.h>
141	#include <iprt/x86.h>
142
143
144	/*********************************************************************************************************************************
145	* Defined Constants And Macros *
146	*********************************************************************************************************************************/
147	/** The saved state version. */
148	#define VMM_SAVED_STATE_VERSION 4
149	/** The saved state version used by v3.0 and earlier. (Teleportation) */
150	#define VMM_SAVED_STATE_VERSION_3_0 3
151
152	/** Macro for flushing the ring-0 logging. */
153	#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154	do { \
155	PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156	if (!pVmmLogger \|\| pVmmLogger->Logger.offScratch == 0) \
157	{ /* likely? */ } \
158	else \
159	RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160	} while (0)
161
162
163	/*********************************************************************************************************************************
164	* Internal Functions *
165	*********************************************************************************************************************************/
166	static int vmmR3InitStacks(PVM pVM);
167	static int vmmR3InitLoggers(PVM pVM);
168	static void vmmR3InitRegisterStats(PVM pVM);
169	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171	#if 0 /* pointless when timers doesn't run on EMT */
172	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser);
173	#endif
174	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
175	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
176	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
177	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
178
179
180	/**
181	* Initializes the VMM.
182	*
183	* @returns VBox status code.
184	* @param pVM The cross context VM structure.
185	*/
186	VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
187	{
188	LogFlow(("VMMR3Init\n"));
189
190	/*
191	* Assert alignment, sizes and order.
192	*/
193	AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
194	AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
195
196	/*
197	* Init basic VM VMM members.
198	*/
199	pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
200	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
201	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
202	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
203	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
204	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
205	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
206	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
207	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
208
209	#if 0 /* pointless when timers doesn't run on EMT */
210	/** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
211	* The EMT yield interval. The EMT yielding is a hack we employ to play a
212	* bit nicer with the rest of the system (like for instance the GUI).
213	*/
214	int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
215	23 /* Value arrived at after experimenting with the grub boot prompt. */);
216	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
217	#endif
218
219	/** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
220	* Controls whether we employ per-cpu preemption timers to limit the time
221	* spent executing guest code. This option is not available on all
222	* platforms and we will silently ignore this setting then. If we are
223	* running in VT-x mode, we will use the VMX-preemption timer instead of
224	* this one when possible.
225	*/
226	PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
227	int rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
228	AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
229
230	/*
231	* Initialize the VMM rendezvous semaphores.
232	*/
233	pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
234	if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
235	return VERR_NO_MEMORY;
236	for (VMCPUID i = 0; i < pVM->cCpus; i++)
237	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
238	for (VMCPUID i = 0; i < pVM->cCpus; i++)
239	{
240	rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
241	AssertRCReturn(rc, rc);
242	}
243	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
244	AssertRCReturn(rc, rc);
245	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
246	AssertRCReturn(rc, rc);
247	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
248	AssertRCReturn(rc, rc);
249	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
250	AssertRCReturn(rc, rc);
251	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
252	AssertRCReturn(rc, rc);
253	rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
254	AssertRCReturn(rc, rc);
255	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
256	AssertRCReturn(rc, rc);
257	rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
258	AssertRCReturn(rc, rc);
259
260	/*
261	* Register the saved state data unit.
262	*/
263	rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
264	NULL, NULL, NULL,
265	NULL, vmmR3Save, NULL,
266	NULL, vmmR3Load, NULL);
267	if (RT_FAILURE(rc))
268	return rc;
269
270	/*
271	* Register the Ring-0 VM handle with the session for fast ioctl calls.
272	*/
273	rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
274	if (RT_FAILURE(rc))
275	return rc;
276
277	/*
278	* Init various sub-components.
279	*/
280	rc = vmmR3InitStacks(pVM);
281	if (RT_SUCCESS(rc))
282	{
283	rc = vmmR3InitLoggers(pVM);
284
285	#ifdef VBOX_WITH_NMI
286	/*
287	* Allocate mapping for the host APIC.
288	*/
289	if (RT_SUCCESS(rc))
290	{
291	rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
292	AssertRC(rc);
293	}
294	#endif
295	if (RT_SUCCESS(rc))
296	{
297	/*
298	* Debug info and statistics.
299	*/
300	DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
301	vmmR3InitRegisterStats(pVM);
302	vmmInitFormatTypes();
303
304	return VINF_SUCCESS;
305	}
306	}
307	/** @todo Need failure cleanup? */
308
309	return rc;
310	}
311
312
313	/**
314	* Allocate & setup the VMM RC stack(s) (for EMTs).
315	*
316	* The stacks are also used for long jumps in Ring-0.
317	*
318	* @returns VBox status code.
319	* @param pVM The cross context VM structure.
320	*
321	* @remarks The optional guard page gets it protection setup up during R3 init
322	* completion because of init order issues.
323	*/
324	static int vmmR3InitStacks(PVM pVM)
325	{
326	int rc = VINF_SUCCESS;
327	#ifdef VMM_R0_SWITCH_STACK
328	uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
329	#else
330	uint32_t fFlags = 0;
331	#endif
332
333	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
334	{
335	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
336
337	#ifdef VBOX_STRICT_VMM_STACK
338	rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
339	#else
340	rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
341	#endif
342	PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
343	if (RT_SUCCESS(rc))
344	{
345	#ifdef VBOX_STRICT_VMM_STACK
346	pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
347	#endif
348	pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
349
350	}
351	}
352
353	return rc;
354	}
355
356
357	/**
358	* Initialize the loggers.
359	*
360	* @returns VBox status code.
361	* @param pVM The cross context VM structure.
362	*/
363	static int vmmR3InitLoggers(PVM pVM)
364	{
365	int rc;
366	#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
367
368	/*
369	* Allocate R0 Logger instance (finalized in the relocator).
370	*/
371	#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
372	PRTLOGGER pLogger = RTLogDefaultInstance();
373	if (pLogger)
374	{
375	size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
376	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
377	{
378	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
379	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
380	(void **)&pVCpu->vmm.s.pR0LoggerR3);
381	if (RT_FAILURE(rc))
382	return rc;
383	pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
384	//pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
385	pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
386	pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
387	}
388	}
389	#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
390
391	/*
392	* Release logging.
393	*/
394	PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
395	if (pRelLogger)
396	{
397	/*
398	* Ring-0 release logger.
399	*/
400	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
401	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
402	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
403
404	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
405	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
406	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
407
408	size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
409
410	for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
411	{
412	PVMCPU pVCpu = pVM->apCpusR3[idCpu];
413	rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
414	(void **)&pVCpu->vmm.s.pR0RelLoggerR3);
415	if (RT_FAILURE(rc))
416	return rc;
417	PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
418	RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
419	pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
420	pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
421	pVmmLogger->cbLogger = (uint32_t)cbLogger;
422	pVmmLogger->fCreated = false;
423	pVmmLogger->fFlushingDisabled = false;
424	pVmmLogger->fRegistered = false;
425	pVmmLogger->idCpu = idCpu;
426
427	char szR0ThreadName[16];
428	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
429	rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
430	pfnLoggerWrapper, pfnLoggerFlush,
431	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
432	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
433
434	/* We only update the release log instance here. */
435	rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
436	pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
437	AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
438
439	pVmmLogger->fCreated = true;
440	}
441	}
442
443	return VINF_SUCCESS;
444	}
445
446
447	/**
448	* VMMR3Init worker that register the statistics with STAM.
449	*
450	* @param pVM The cross context VM structure.
451	*/
452	static void vmmR3InitRegisterStats(PVM pVM)
453	{
454	RT_NOREF_PV(pVM);
455
456	/*
457	* Statistics.
458	*/
459	STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
460	STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
461	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
462	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
463	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
464	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
465	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
466	STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
467	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
468	STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
469	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
470	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
471	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
472	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
473	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
474	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
475	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
476	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
477	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
478	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
479	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
480	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
481	STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
482	STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
483	STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
484	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
485	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
486	STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
487	STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
488	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
489	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
490	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
491	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
492	STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
493	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
494	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
495	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
496	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
497	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
498	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
499	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
500	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
501	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
502	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
503	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
504	STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
505	STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
506	STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
507	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
508	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
509	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
510	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
511	STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
512	STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
513	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
514	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
515	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
516	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
517	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
518	STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
519	STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
520	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
521	STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
522
523	#ifdef VBOX_WITH_STATISTICS
524	for (VMCPUID i = 0; i < pVM->cCpus; i++)
525	{
526	PVMCPU pVCpu = pVM->apCpusR3[i];
527	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
528	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
529	STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
530	}
531	#endif
532	for (VMCPUID i = 0; i < pVM->cCpus; i++)
533	{
534	PVMCPU pVCpu = pVM->apCpusR3[i];
535	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
536	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
537	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
538	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
539	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
540	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
541	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
542	STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltToR3FromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltToR3FromSpin", i);
543	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
544	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
545	STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
546	}
547	}
548
549
550	/**
551	* Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
552	*
553	* @returns VBox status code.
554	* @param pVM The cross context VM structure.
555	* @param pVCpu The cross context per CPU structure.
556	* @thread EMT(pVCpu)
557	*/
558	static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
559	{
560	return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
561	}
562
563
564	/**
565	* Initializes the R0 VMM.
566	*
567	* @returns VBox status code.
568	* @param pVM The cross context VM structure.
569	*/
570	VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
571	{
572	int rc;
573	PVMCPU pVCpu = VMMGetCpu(pVM);
574	Assert(pVCpu && pVCpu->idCpu == 0);
575
576	#ifdef LOG_ENABLED
577	/*
578	* Initialize the ring-0 logger if we haven't done so yet.
579	*/
580	if ( pVCpu->vmm.s.pR0LoggerR3
581	&& !pVCpu->vmm.s.pR0LoggerR3->fCreated)
582	{
583	rc = VMMR3UpdateLoggers(pVM);
584	if (RT_FAILURE(rc))
585	return rc;
586	}
587	#endif
588
589	/*
590	* Call Ring-0 entry with init code.
591	*/
592	for (;;)
593	{
594	#ifdef NO_SUPCALLR0VMM
595	//rc = VERR_GENERAL_FAILURE;
596	rc = VINF_SUCCESS;
597	#else
598	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
599	#endif
600	/*
601	* Flush the logs.
602	*/
603	#ifdef LOG_ENABLED
604	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
605	#endif
606	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
607	if (rc != VINF_VMM_CALL_HOST)
608	break;
609	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
610	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
611	break;
612	/* Resume R0 */
613	}
614
615	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
616	{
617	LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
618	if (RT_SUCCESS(rc))
619	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
620	}
621
622	/* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
623	if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
624	LogRel(("VMM: Enabled thread-context hooks\n"));
625	else
626	LogRel(("VMM: Thread-context hooks unavailable\n"));
627
628	/* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
629	if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
630	LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
631	else
632	LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
633	if (pVM->vmm.s.fIsPreemptPossible)
634	LogRel(("VMM: Kernel preemption is possible\n"));
635	else
636	LogRel(("VMM: Kernel preemption is not possible it seems\n"));
637
638	/*
639	* Send all EMTs to ring-0 to get their logger initialized.
640	*/
641	for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
642	rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
643
644	return rc;
645	}
646
647
648	/**
649	* Called when an init phase completes.
650	*
651	* @returns VBox status code.
652	* @param pVM The cross context VM structure.
653	* @param enmWhat Which init phase.
654	*/
655	VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
656	{
657	int rc = VINF_SUCCESS;
658
659	switch (enmWhat)
660	{
661	case VMINITCOMPLETED_RING3:
662	{
663	#if 0 /* pointless when timers doesn't run on EMT */
664	/*
665	* Create the EMT yield timer.
666	*/
667	rc = TMR3TimerCreate(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, TMTIMER_FLAGS_NO_RING0,
668	"EMT Yielder", &pVM->vmm.s.hYieldTimer);
669	AssertRCReturn(rc, rc);
670
671	rc = TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldEveryMillies);
672	AssertRCReturn(rc, rc);
673	#endif
674	break;
675	}
676
677	case VMINITCOMPLETED_HM:
678	{
679	/*
680	* Disable the periodic preemption timers if we can use the
681	* VMX-preemption timer instead.
682	*/
683	if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
684	&& HMR3IsVmxPreemptionTimerUsed(pVM))
685	pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
686	LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
687
688	/*
689	* Last chance for GIM to update its CPUID leaves if it requires
690	* knowledge/information from HM initialization.
691	*/
692	rc = GIMR3InitCompleted(pVM);
693	AssertRCReturn(rc, rc);
694
695	/*
696	* CPUM's post-initialization (print CPUIDs).
697	*/
698	CPUMR3LogCpuIdAndMsrFeatures(pVM);
699	break;
700	}
701
702	default: /* shuts up gcc */
703	break;
704	}
705
706	return rc;
707	}
708
709
710	/**
711	* Terminate the VMM bits.
712	*
713	* @returns VBox status code.
714	* @param pVM The cross context VM structure.
715	*/
716	VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
717	{
718	PVMCPU pVCpu = VMMGetCpu(pVM);
719	Assert(pVCpu && pVCpu->idCpu == 0);
720
721	/*
722	* Call Ring-0 entry with termination code.
723	*/
724	int rc;
725	for (;;)
726	{
727	#ifdef NO_SUPCALLR0VMM
728	//rc = VERR_GENERAL_FAILURE;
729	rc = VINF_SUCCESS;
730	#else
731	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /idCpu/, VMMR0_DO_VMMR0_TERM, 0, NULL);
732	#endif
733	/*
734	* Flush the logs.
735	*/
736	#ifdef LOG_ENABLED
737	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
738	#endif
739	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
740	if (rc != VINF_VMM_CALL_HOST)
741	break;
742	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
743	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
744	break;
745	/* Resume R0 */
746	}
747	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
748	{
749	LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
750	if (RT_SUCCESS(rc))
751	rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
752	}
753
754	for (VMCPUID i = 0; i < pVM->cCpus; i++)
755	{
756	RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
757	pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
758	}
759	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
760	pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
761	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
762	pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
763	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
764	pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
765	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
766	pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
767	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
768	pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
769	RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
770	pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
771	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
772	pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
773	RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
774	pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
775
776	vmmTermFormatTypes();
777	return rc;
778	}
779
780
781	/**
782	* Applies relocations to data and code managed by this
783	* component. This function will be called at init and
784	* whenever the VMM need to relocate it self inside the GC.
785	*
786	* The VMM will need to apply relocations to the core code.
787	*
788	* @param pVM The cross context VM structure.
789	* @param offDelta The relocation delta.
790	*/
791	VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
792	{
793	LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
794	RT_NOREF(offDelta);
795
796	/*
797	* Update the logger.
798	*/
799	VMMR3UpdateLoggers(pVM);
800	}
801
802
803	/**
804	* Updates the settings for the RC and R0 loggers.
805	*
806	* @returns VBox status code.
807	* @param pVM The cross context VM structure.
808	*/
809	VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
810	{
811	int rc = VINF_SUCCESS;
812
813	#ifdef LOG_ENABLED
814	/*
815	* For the ring-0 EMT logger, we use a per-thread logger instance
816	* in ring-0. Only initialize it once.
817	*/
818	PRTLOGGER const pDefault = RTLogDefaultInstance();
819	for (VMCPUID i = 0; i < pVM->cCpus; i++)
820	{
821	PVMCPU pVCpu = pVM->apCpusR3[i];
822	PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
823	if (pR0LoggerR3)
824	{
825	if (!pR0LoggerR3->fCreated)
826	{
827	RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
828	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
829	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
830
831	RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
832	rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
833	AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
834
835	char szR0ThreadName[16];
836	RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
837	rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
838	pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
839	pfnLoggerWrapper, pfnLoggerFlush,
840	RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
841	AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
842
843	pR0LoggerR3->idCpu = i;
844	pR0LoggerR3->fCreated = true;
845	pR0LoggerR3->fFlushingDisabled = false;
846	}
847
848	rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
849	pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
850	AssertRC(rc);
851	}
852	}
853	#else
854	RT_NOREF(pVM);
855	#endif
856
857	return rc;
858	}
859
860
861	/**
862	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
863	*
864	* @returns Pointer to the buffer.
865	* @param pVM The cross context VM structure.
866	*/
867	VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
868	{
869	return pVM->vmm.s.szRing0AssertMsg1;
870	}
871
872
873	/**
874	* Returns the VMCPU of the specified virtual CPU.
875	*
876	* @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
877	*
878	* @param pUVM The user mode VM handle.
879	* @param idCpu The ID of the virtual CPU.
880	*/
881	VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
882	{
883	UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
884	AssertReturn(idCpu < pUVM->cCpus, NULL);
885	VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
886	return pUVM->pVM->apCpusR3[idCpu];
887	}
888
889
890	/**
891	* Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
892	*
893	* @returns Pointer to the buffer.
894	* @param pVM The cross context VM structure.
895	*/
896	VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
897	{
898	return pVM->vmm.s.szRing0AssertMsg2;
899	}
900
901
902	/**
903	* Execute state save operation.
904	*
905	* @returns VBox status code.
906	* @param pVM The cross context VM structure.
907	* @param pSSM SSM operation handle.
908	*/
909	static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
910	{
911	LogFlow(("vmmR3Save:\n"));
912
913	/*
914	* Save the started/stopped state of all CPUs except 0 as it will always
915	* be running. This avoids breaking the saved state version. :-)
916	*/
917	for (VMCPUID i = 1; i < pVM->cCpus; i++)
918	SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
919
920	return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
921	}
922
923
924	/**
925	* Execute state load operation.
926	*
927	* @returns VBox status code.
928	* @param pVM The cross context VM structure.
929	* @param pSSM SSM operation handle.
930	* @param uVersion Data layout version.
931	* @param uPass The data pass.
932	*/
933	static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
934	{
935	LogFlow(("vmmR3Load:\n"));
936	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
937
938	/*
939	* Validate version.
940	*/
941	if ( uVersion != VMM_SAVED_STATE_VERSION
942	&& uVersion != VMM_SAVED_STATE_VERSION_3_0)
943	{
944	AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
945	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
946	}
947
948	if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
949	{
950	/* Ignore the stack bottom, stack pointer and stack bits. */
951	RTRCPTR RCPtrIgnored;
952	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
953	SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
954	#ifdef RT_OS_DARWIN
955	if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
956	&& SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
957	&& SSMR3HandleRevision(pSSM) >= 48858
958	&& ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
959	\|\| !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
960	)
961	SSMR3Skip(pSSM, 16384);
962	else
963	SSMR3Skip(pSSM, 8192);
964	#else
965	SSMR3Skip(pSSM, 8192);
966	#endif
967	}
968
969	/*
970	* Restore the VMCPU states. VCPU 0 is always started.
971	*/
972	VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
973	for (VMCPUID i = 1; i < pVM->cCpus; i++)
974	{
975	bool fStarted;
976	int rc = SSMR3GetBool(pSSM, &fStarted);
977	if (RT_FAILURE(rc))
978	return rc;
979	VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
980	}
981
982	/* terminator */
983	uint32_t u32;
984	int rc = SSMR3GetU32(pSSM, &u32);
985	if (RT_FAILURE(rc))
986	return rc;
987	if (u32 != UINT32_MAX)
988	{
989	AssertMsgFailed(("u32=%#x\n", u32));
990	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
991	}
992	return VINF_SUCCESS;
993	}
994
995
996	/**
997	* Suspends the CPU yielder.
998	*
999	* @param pVM The cross context VM structure.
1000	*/
1001	VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1002	{
1003	#if 0 /* pointless when timers doesn't run on EMT */
1004	VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
1005	if (!pVM->vmm.s.cYieldResumeMillies)
1006	{
1007	uint64_t u64Now = TMTimerGet(pVM, pVM->vmm.s.hYieldTimer);
1008	uint64_t u64Expire = TMTimerGetExpire(pVM, pVM->vmm.s.hYieldTimer);
1009	if (u64Now >= u64Expire \|\| u64Expire == ~(uint64_t)0)
1010	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1011	else
1012	pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM, pVM->vmm.s.hYieldTimer, u64Expire - u64Now);
1013	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1014	}
1015	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1016	#else
1017	RT_NOREF(pVM);
1018	#endif
1019	}
1020
1021
1022	/**
1023	* Stops the CPU yielder.
1024	*
1025	* @param pVM The cross context VM structure.
1026	*/
1027	VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1028	{
1029	#if 0 /* pointless when timers doesn't run on EMT */
1030	if (!pVM->vmm.s.cYieldResumeMillies)
1031	TMTimerStop(pVM, pVM->vmm.s.hYieldTimer);
1032	pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1033	pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1034	#else
1035	RT_NOREF(pVM);
1036	#endif
1037	}
1038
1039
1040	/**
1041	* Resumes the CPU yielder when it has been a suspended or stopped.
1042	*
1043	* @param pVM The cross context VM structure.
1044	*/
1045	VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1046	{
1047	#if 0 /* pointless when timers doesn't run on EMT */
1048	if (pVM->vmm.s.cYieldResumeMillies)
1049	{
1050	TMTimerSetMillies(pVM, pVM->vmm.s.hYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1051	pVM->vmm.s.cYieldResumeMillies = 0;
1052	}
1053	#else
1054	RT_NOREF(pVM);
1055	#endif
1056	}
1057
1058
1059	#if 0 /* pointless when timers doesn't run on EMT */
1060	/**
1061	* @callback_method_impl{FNTMTIMERINT, EMT yielder}
1062	*
1063	* @todo This is a UNI core/thread thing, really... Should be reconsidered.
1064	*/
1065	static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, TMTIMERHANDLE hTimer, void *pvUser)
1066	{
1067	NOREF(pvUser);
1068
1069	/*
1070	* This really needs some careful tuning. While we shouldn't be too greedy since
1071	* that'll cause the rest of the system to stop up, we shouldn't be too nice either
1072	* because that'll cause us to stop up.
1073	*
1074	* The current logic is to use the default interval when there is no lag worth
1075	* mentioning, but when we start accumulating lag we don't bother yielding at all.
1076	*
1077	* (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1078	* so the lag is up to date.)
1079	*/
1080	const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1081	if ( u64Lag < 50000000 /* 50ms */
1082	\|\| ( u64Lag < 1000000000 /* 1s */
1083	&& RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1084	)
1085	{
1086	uint64_t u64Elapsed = RTTimeNanoTS();
1087	pVM->vmm.s.u64LastYield = u64Elapsed;
1088
1089	RTThreadYield();
1090
1091	#ifdef LOG_ENABLED
1092	u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1093	Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1094	#endif
1095	}
1096	TMTimerSetMillies(pVM, hTimer, pVM->vmm.s.cYieldEveryMillies);
1097	}
1098	#endif
1099
1100
1101	/**
1102	* Executes guest code (Intel VT-x and AMD-V).
1103	*
1104	* @param pVM The cross context VM structure.
1105	* @param pVCpu The cross context virtual CPU structure.
1106	*/
1107	VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1108	{
1109	Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1110
1111	for (;;)
1112	{
1113	int rc;
1114	do
1115	{
1116	#ifdef NO_SUPCALLR0VMM
1117	rc = VERR_GENERAL_FAILURE;
1118	#else
1119	rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1120	if (RT_LIKELY(rc == VINF_SUCCESS))
1121	rc = pVCpu->vmm.s.iLastGZRc;
1122	#endif
1123	} while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1124
1125	#if 0 /** @todo triggers too often */
1126	Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1127	#endif
1128
1129	/*
1130	* Flush the logs
1131	*/
1132	#ifdef LOG_ENABLED
1133	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1134	#endif
1135	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1136	if (rc != VINF_VMM_CALL_HOST)
1137	{
1138	Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1139	return rc;
1140	}
1141	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1142	if (RT_FAILURE(rc))
1143	return rc;
1144	/* Resume R0 */
1145	}
1146	}
1147
1148
1149	/**
1150	* Perform one of the fast I/O control VMMR0 operation.
1151	*
1152	* @returns VBox strict status code.
1153	* @param pVM The cross context VM structure.
1154	* @param pVCpu The cross context virtual CPU structure.
1155	* @param enmOperation The operation to perform.
1156	*/
1157	VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1158	{
1159	for (;;)
1160	{
1161	VBOXSTRICTRC rcStrict;
1162	do
1163	{
1164	#ifdef NO_SUPCALLR0VMM
1165	rcStrict = VERR_GENERAL_FAILURE;
1166	#else
1167	rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1168	if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1169	rcStrict = pVCpu->vmm.s.iLastGZRc;
1170	#endif
1171	} while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1172
1173	/*
1174	* Flush the logs
1175	*/
1176	#ifdef LOG_ENABLED
1177	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1178	#endif
1179	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1180	if (rcStrict != VINF_VMM_CALL_HOST)
1181	return rcStrict;
1182	int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1183	if (RT_FAILURE(rc))
1184	return rc;
1185	/* Resume R0 */
1186	}
1187	}
1188
1189
1190	/**
1191	* VCPU worker for VMMR3SendStartupIpi.
1192	*
1193	* @param pVM The cross context VM structure.
1194	* @param idCpu Virtual CPU to perform SIPI on.
1195	* @param uVector The SIPI vector.
1196	*/
1197	static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1198	{
1199	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1200	VMCPU_ASSERT_EMT(pVCpu);
1201
1202	/*
1203	* In the INIT state, the target CPU is only responsive to an SIPI.
1204	* This is also true for when when the CPU is in VMX non-root mode.
1205	*
1206	* See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1207	* See Intel spec. 26.6.2 "Activity State".
1208	*/
1209	if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1210	return VINF_SUCCESS;
1211
1212	PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1213	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1214	if (CPUMIsGuestInVmxRootMode(pCtx))
1215	{
1216	/* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1217	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1218	return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1219
1220	/* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1221	return VINF_SUCCESS;
1222	}
1223	#endif
1224
1225	pCtx->cs.Sel = uVector << 8;
1226	pCtx->cs.ValidSel = uVector << 8;
1227	pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1228	pCtx->cs.u64Base = uVector << 12;
1229	pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1230	pCtx->rip = 0;
1231
1232	Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1233
1234	# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1235	EMSetState(pVCpu, EMSTATE_HALTED);
1236	return VINF_EM_RESCHEDULE;
1237	# else /* And if we go the VMCPU::enmState way it can stay here. */
1238	VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1239	VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1240	return VINF_SUCCESS;
1241	# endif
1242	}
1243
1244
1245	/**
1246	* VCPU worker for VMMR3SendInitIpi.
1247	*
1248	* @returns VBox status code.
1249	* @param pVM The cross context VM structure.
1250	* @param idCpu Virtual CPU to perform SIPI on.
1251	*/
1252	static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1253	{
1254	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1255	VMCPU_ASSERT_EMT(pVCpu);
1256
1257	Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1258
1259	/** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1260	* wait-for-SIPI state. Verify. */
1261
1262	/* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1263	#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1264	PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1265	if (CPUMIsGuestInVmxNonRootMode(pCtx))
1266	return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1267	#endif
1268
1269	/** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1270	* IPI (e.g. SVM_EXIT_INIT). */
1271
1272	PGMR3ResetCpu(pVM, pVCpu);
1273	PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1274	APICR3InitIpi(pVCpu);
1275	TRPMR3ResetCpu(pVCpu);
1276	CPUMR3ResetCpu(pVM, pVCpu);
1277	EMR3ResetCpu(pVCpu);
1278	HMR3ResetCpu(pVCpu);
1279	NEMR3ResetCpu(pVCpu, true /fInitIpi/);
1280
1281	/* This will trickle up on the target EMT. */
1282	return VINF_EM_WAIT_SIPI;
1283	}
1284
1285
1286	/**
1287	* Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1288	* vector-dependent state and unhalting processor.
1289	*
1290	* @param pVM The cross context VM structure.
1291	* @param idCpu Virtual CPU to perform SIPI on.
1292	* @param uVector SIPI vector.
1293	*/
1294	VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1295	{
1296	AssertReturnVoid(idCpu < pVM->cCpus);
1297
1298	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1299	AssertRC(rc);
1300	}
1301
1302
1303	/**
1304	* Sends init IPI to the virtual CPU.
1305	*
1306	* @param pVM The cross context VM structure.
1307	* @param idCpu Virtual CPU to perform int IPI on.
1308	*/
1309	VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1310	{
1311	AssertReturnVoid(idCpu < pVM->cCpus);
1312
1313	int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1314	AssertRC(rc);
1315	}
1316
1317
1318	/**
1319	* Registers the guest memory range that can be used for patching.
1320	*
1321	* @returns VBox status code.
1322	* @param pVM The cross context VM structure.
1323	* @param pPatchMem Patch memory range.
1324	* @param cbPatchMem Size of the memory range.
1325	*/
1326	VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1327	{
1328	VM_ASSERT_EMT(pVM);
1329	if (HMIsEnabled(pVM))
1330	return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1331
1332	return VERR_NOT_SUPPORTED;
1333	}
1334
1335
1336	/**
1337	* Deregisters the guest memory range that can be used for patching.
1338	*
1339	* @returns VBox status code.
1340	* @param pVM The cross context VM structure.
1341	* @param pPatchMem Patch memory range.
1342	* @param cbPatchMem Size of the memory range.
1343	*/
1344	VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1345	{
1346	if (HMIsEnabled(pVM))
1347	return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1348
1349	return VINF_SUCCESS;
1350	}
1351
1352
1353	/**
1354	* Common recursion handler for the other EMTs.
1355	*
1356	* @returns Strict VBox status code.
1357	* @param pVM The cross context VM structure.
1358	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1359	* @param rcStrict Current status code to be combined with the one
1360	* from this recursion and returned.
1361	*/
1362	static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1363	{
1364	int rc2;
1365
1366	/*
1367	* We wait here while the initiator of this recursion reconfigures
1368	* everything. The last EMT to get in signals the initiator.
1369	*/
1370	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1371	{
1372	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1373	AssertLogRelRC(rc2);
1374	}
1375
1376	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1377	AssertLogRelRC(rc2);
1378
1379	/*
1380	* Do the normal rendezvous processing.
1381	*/
1382	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1383	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1384
1385	/*
1386	* Wait for the initiator to restore everything.
1387	*/
1388	rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1389	AssertLogRelRC(rc2);
1390
1391	/*
1392	* Last thread out of here signals the initiator.
1393	*/
1394	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1395	{
1396	rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1397	AssertLogRelRC(rc2);
1398	}
1399
1400	/*
1401	* Merge status codes and return.
1402	*/
1403	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1404	if ( rcStrict2 != VINF_SUCCESS
1405	&& ( rcStrict == VINF_SUCCESS
1406	\|\| rcStrict > rcStrict2))
1407	rcStrict = rcStrict2;
1408	return rcStrict;
1409	}
1410
1411
1412	/**
1413	* Count returns and have the last non-caller EMT wake up the caller.
1414	*
1415	* @returns VBox strict informational status code for EM scheduling. No failures
1416	* will be returned here, those are for the caller only.
1417	*
1418	* @param pVM The cross context VM structure.
1419	* @param rcStrict The current accumulated recursive status code,
1420	* to be merged with i32RendezvousStatus and
1421	* returned.
1422	*/
1423	DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1424	{
1425	VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1426
1427	uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1428	if (cReturned == pVM->cCpus - 1U)
1429	{
1430	int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1431	AssertLogRelRC(rc);
1432	}
1433
1434	/*
1435	* Merge the status codes, ignoring error statuses in this code path.
1436	*/
1437	AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1438	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1439	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1440	VERR_IPE_UNEXPECTED_INFO_STATUS);
1441
1442	if (RT_SUCCESS(rcStrict2))
1443	{
1444	if ( rcStrict2 != VINF_SUCCESS
1445	&& ( rcStrict == VINF_SUCCESS
1446	\|\| rcStrict > rcStrict2))
1447	rcStrict = rcStrict2;
1448	}
1449	return rcStrict;
1450	}
1451
1452
1453	/**
1454	* Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1455	*
1456	* @returns VBox strict informational status code for EM scheduling. No failures
1457	* will be returned here, those are for the caller only. When
1458	* fIsCaller is set, VINF_SUCCESS is always returned.
1459	*
1460	* @param pVM The cross context VM structure.
1461	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1462	* @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1463	* not.
1464	* @param fFlags The flags.
1465	* @param pfnRendezvous The callback.
1466	* @param pvUser The user argument for the callback.
1467	*/
1468	static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1469	uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1470	{
1471	int rc;
1472	VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1473
1474	/*
1475	* Enter, the last EMT triggers the next callback phase.
1476	*/
1477	uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1478	if (cEntered != pVM->cCpus)
1479	{
1480	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1481	{
1482	/* Wait for our turn. */
1483	for (;;)
1484	{
1485	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1486	AssertLogRelRC(rc);
1487	if (!pVM->vmm.s.fRendezvousRecursion)
1488	break;
1489	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1490	}
1491	}
1492	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1493	{
1494	/* Wait for the last EMT to arrive and wake everyone up. */
1495	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1496	AssertLogRelRC(rc);
1497	Assert(!pVM->vmm.s.fRendezvousRecursion);
1498	}
1499	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1500	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1501	{
1502	/* Wait for our turn. */
1503	for (;;)
1504	{
1505	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1506	AssertLogRelRC(rc);
1507	if (!pVM->vmm.s.fRendezvousRecursion)
1508	break;
1509	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1510	}
1511	}
1512	else
1513	{
1514	Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1515
1516	/*
1517	* The execute once is handled specially to optimize the code flow.
1518	*
1519	* The last EMT to arrive will perform the callback and the other
1520	* EMTs will wait on the Done/DoneCaller semaphores (instead of
1521	* the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1522	* returns, that EMT will initiate the normal return sequence.
1523	*/
1524	if (!fIsCaller)
1525	{
1526	for (;;)
1527	{
1528	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1529	AssertLogRelRC(rc);
1530	if (!pVM->vmm.s.fRendezvousRecursion)
1531	break;
1532	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1533	}
1534
1535	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1536	}
1537	return VINF_SUCCESS;
1538	}
1539	}
1540	else
1541	{
1542	/*
1543	* All EMTs are waiting, clear the FF and take action according to the
1544	* execution method.
1545	*/
1546	VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1547
1548	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1549	{
1550	/* Wake up everyone. */
1551	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1552	AssertLogRelRC(rc);
1553	}
1554	else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1555	\|\| (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1556	{
1557	/* Figure out who to wake up and wake it up. If it's ourself, then
1558	it's easy otherwise wait for our turn. */
1559	VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1560	? 0
1561	: pVM->cCpus - 1U;
1562	if (pVCpu->idCpu != iFirst)
1563	{
1564	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1565	AssertLogRelRC(rc);
1566	for (;;)
1567	{
1568	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1569	AssertLogRelRC(rc);
1570	if (!pVM->vmm.s.fRendezvousRecursion)
1571	break;
1572	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1573	}
1574	}
1575	}
1576	/* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1577	}
1578
1579
1580	/*
1581	* Do the callback and update the status if necessary.
1582	*/
1583	if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1584	\|\| RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1585	{
1586	VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1587	if (rcStrict2 != VINF_SUCCESS)
1588	{
1589	AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1590	\|\| (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1591	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1592	int32_t i32RendezvousStatus;
1593	do
1594	{
1595	i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1596	if ( rcStrict2 == i32RendezvousStatus
1597	\|\| RT_FAILURE(i32RendezvousStatus)
1598	\|\| ( i32RendezvousStatus != VINF_SUCCESS
1599	&& rcStrict2 > i32RendezvousStatus))
1600	break;
1601	} while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1602	}
1603	}
1604
1605	/*
1606	* Increment the done counter and take action depending on whether we're
1607	* the last to finish callback execution.
1608	*/
1609	uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1610	if ( cDone != pVM->cCpus
1611	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1612	{
1613	/* Signal the next EMT? */
1614	if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1615	{
1616	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1617	AssertLogRelRC(rc);
1618	}
1619	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1620	{
1621	Assert(cDone == pVCpu->idCpu + 1U);
1622	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1623	AssertLogRelRC(rc);
1624	}
1625	else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1626	{
1627	Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1628	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1629	AssertLogRelRC(rc);
1630	}
1631
1632	/* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1633	if (!fIsCaller)
1634	{
1635	for (;;)
1636	{
1637	rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1638	AssertLogRelRC(rc);
1639	if (!pVM->vmm.s.fRendezvousRecursion)
1640	break;
1641	rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1642	}
1643	}
1644	}
1645	else
1646	{
1647	/* Callback execution is all done, tell the rest to return. */
1648	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1649	AssertLogRelRC(rc);
1650	}
1651
1652	if (!fIsCaller)
1653	return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1654	return rcStrictRecursion;
1655	}
1656
1657
1658	/**
1659	* Called in response to VM_FF_EMT_RENDEZVOUS.
1660	*
1661	* @returns VBox strict status code - EM scheduling. No errors will be returned
1662	* here, nor will any non-EM scheduling status codes be returned.
1663	*
1664	* @param pVM The cross context VM structure.
1665	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
1666	*
1667	* @thread EMT
1668	*/
1669	VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1670	{
1671	Assert(!pVCpu->vmm.s.fInRendezvous);
1672	Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1673	pVCpu->vmm.s.fInRendezvous = true;
1674	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1675	pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1676	pVCpu->vmm.s.fInRendezvous = false;
1677	Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1678	return VBOXSTRICTRC_TODO(rcStrict);
1679	}
1680
1681
1682	/**
1683	* Helper for resetting an single wakeup event sempahore.
1684	*
1685	* @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1686	* @param hEvt The event semaphore to reset.
1687	*/
1688	static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1689	{
1690	for (uint32_t cLoops = 0; ; cLoops++)
1691	{
1692	int rc = RTSemEventWait(hEvt, 0 /cMsTimeout/);
1693	if (rc != VINF_SUCCESS \|\| cLoops > _4K)
1694	return rc;
1695	}
1696	}
1697
1698
1699	/**
1700	* Worker for VMMR3EmtRendezvous that handles recursion.
1701	*
1702	* @returns VBox strict status code. This will be the first error,
1703	* VINF_SUCCESS, or an EM scheduling status code.
1704	*
1705	* @param pVM The cross context VM structure.
1706	* @param pVCpu The cross context virtual CPU structure of the
1707	* calling EMT.
1708	* @param fFlags Flags indicating execution methods. See
1709	* grp_VMMR3EmtRendezvous_fFlags.
1710	* @param pfnRendezvous The callback.
1711	* @param pvUser User argument for the callback.
1712	*
1713	* @thread EMT(pVCpu)
1714	*/
1715	static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1716	PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1717	{
1718	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1719	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1720	Assert(pVCpu->vmm.s.fInRendezvous);
1721
1722	/*
1723	* Save the current state.
1724	*/
1725	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1726	uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1727	int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1728	PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1729	void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1730
1731	/*
1732	* Check preconditions and save the current state.
1733	*/
1734	AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1735	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1736	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1737	\|\| (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1738	VERR_INTERNAL_ERROR);
1739	AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1740	AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1741
1742	/*
1743	* Reset the recursion prep and pop semaphores.
1744	*/
1745	int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1746	AssertLogRelRCReturn(rc, rc);
1747	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1748	AssertLogRelRCReturn(rc, rc);
1749	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1750	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1751	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1752	AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1753
1754	/*
1755	* Usher the other thread into the recursion routine.
1756	*/
1757	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1758	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1759
1760	uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1761	if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1762	while (cLeft-- > 0)
1763	{
1764	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1765	AssertLogRelRC(rc);
1766	}
1767	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1768	{
1769	Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1770	for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1771	{
1772	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1773	AssertLogRelRC(rc);
1774	}
1775	}
1776	else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1777	{
1778	Assert(cLeft == pVCpu->idCpu);
1779	for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1780	{
1781	rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1782	AssertLogRelRC(rc);
1783	}
1784	}
1785	else
1786	AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1787	VERR_INTERNAL_ERROR_4);
1788
1789	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1790	AssertLogRelRC(rc);
1791	rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1792	AssertLogRelRC(rc);
1793
1794
1795	/*
1796	* Wait for the EMTs to wake up and get out of the parent rendezvous code.
1797	*/
1798	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1799	{
1800	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1801	AssertLogRelRC(rc);
1802	}
1803
1804	ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1805
1806	/*
1807	* Clear the slate and setup the new rendezvous.
1808	*/
1809	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1810	{
1811	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1812	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1813	}
1814	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1815	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1816	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1817	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1818
1819	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1820	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1821	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1822	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1823	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
1824	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1825	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1826	ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1827
1828	/*
1829	* We're ready to go now, do normal rendezvous processing.
1830	*/
1831	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1832	AssertLogRelRC(rc);
1833
1834	VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /fIsCaller/, fFlags, pfnRendezvous, pvUser);
1835
1836	/*
1837	* The caller waits for the other EMTs to be done, return and waiting on the
1838	* pop semaphore.
1839	*/
1840	for (;;)
1841	{
1842	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1843	AssertLogRelRC(rc);
1844	if (!pVM->vmm.s.fRendezvousRecursion)
1845	break;
1846	rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1847	}
1848
1849	/*
1850	* Get the return code and merge it with the above recursion status.
1851	*/
1852	VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1853	if ( rcStrict2 != VINF_SUCCESS
1854	&& ( rcStrict == VINF_SUCCESS
1855	\|\| rcStrict > rcStrict2))
1856	rcStrict = rcStrict2;
1857
1858	/*
1859	* Restore the parent rendezvous state.
1860	*/
1861	for (VMCPUID i = 0; i < pVM->cCpus; i++)
1862	{
1863	rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1864	AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1865	}
1866	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1867	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1868	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1869	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1870
1871	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1872	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1873	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1874	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1875	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1876	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1877	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnParent);
1878
1879	/*
1880	* Usher the other EMTs back to their parent recursion routine, waiting
1881	* for them to all get there before we return (makes sure they've been
1882	* scheduled and are past the pop event sem, see below).
1883	*/
1884	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1885	rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1886	AssertLogRelRC(rc);
1887
1888	if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1889	{
1890	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1891	AssertLogRelRC(rc);
1892	}
1893
1894	/*
1895	* We must reset the pop semaphore on the way out (doing the pop caller too,
1896	* just in case). The parent may be another recursion.
1897	*/
1898	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1899	rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1900
1901	ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1902
1903	Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1904	fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1905	return rcStrict;
1906	}
1907
1908
1909	/**
1910	* EMT rendezvous.
1911	*
1912	* Gathers all the EMTs and execute some code on each of them, either in a one
1913	* by one fashion or all at once.
1914	*
1915	* @returns VBox strict status code. This will be the first error,
1916	* VINF_SUCCESS, or an EM scheduling status code.
1917	*
1918	* @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1919	* doesn't support it or if the recursion is too deep.
1920	*
1921	* @param pVM The cross context VM structure.
1922	* @param fFlags Flags indicating execution methods. See
1923	* grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1924	* descending and ascending rendezvous types support
1925	* recursion from inside @a pfnRendezvous.
1926	* @param pfnRendezvous The callback.
1927	* @param pvUser User argument for the callback.
1928	*
1929	* @thread Any.
1930	*/
1931	VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1932	{
1933	/*
1934	* Validate input.
1935	*/
1936	AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1937	AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1938	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1939	&& !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1940	AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1941	\|\| ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1942	&& (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1943	("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1944
1945	VBOXSTRICTRC rcStrict;
1946	PVMCPU pVCpu = VMMGetCpu(pVM);
1947	if (!pVCpu)
1948	{
1949	/*
1950	* Forward the request to an EMT thread.
1951	*/
1952	Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1953	if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1954	rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1955	else
1956	rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1957	Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1958	}
1959	else if ( pVM->cCpus == 1
1960	\|\| ( pVM->enmVMState == VMSTATE_DESTROYING
1961	&& VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1962	{
1963	/*
1964	* Shortcut for the single EMT case.
1965	*
1966	* We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1967	* during vmR3Destroy after other emulation threads have started terminating.
1968	*/
1969	if (!pVCpu->vmm.s.fInRendezvous)
1970	{
1971	Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1972	pVCpu->vmm.s.fInRendezvous = true;
1973	pVM->vmm.s.fRendezvousFlags = fFlags;
1974	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1975	pVCpu->vmm.s.fInRendezvous = false;
1976	}
1977	else
1978	{
1979	/* Recursion. Do the same checks as in the SMP case. */
1980	Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1981	uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1982	AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1983	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1984	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1985	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1986	\|\| fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1987	, VERR_DEADLOCK);
1988
1989	AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1990	pVM->vmm.s.cRendezvousRecursions++;
1991	uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1992	pVM->vmm.s.fRendezvousFlags = fFlags;
1993
1994	rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1995
1996	pVM->vmm.s.fRendezvousFlags = fParentFlags;
1997	pVM->vmm.s.cRendezvousRecursions--;
1998	}
1999	Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
2000	}
2001	else
2002	{
2003	/*
2004	* Spin lock. If busy, check for recursion, if not recursing wait for
2005	* the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
2006	*/
2007	int rc;
2008	rcStrict = VINF_SUCCESS;
2009	if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
2010	{
2011	/* Allow recursion in some cases. */
2012	if ( pVCpu->vmm.s.fInRendezvous
2013	&& ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
2014	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
2015	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
2016	\|\| (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
2017	))
2018	return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2019
2020	AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2021	VERR_DEADLOCK);
2022
2023	Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2024	while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2025	{
2026	if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2027	{
2028	rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2029	if ( rc != VINF_SUCCESS
2030	&& ( rcStrict == VINF_SUCCESS
2031	\|\| rcStrict > rc))
2032	rcStrict = rc;
2033	/** @todo Perhaps deal with termination here? */
2034	}
2035	ASMNopPause();
2036	}
2037	}
2038
2039	Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2040	Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2041	Assert(!pVCpu->vmm.s.fInRendezvous);
2042	pVCpu->vmm.s.fInRendezvous = true;
2043
2044	/*
2045	* Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2046	*/
2047	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2048	{
2049	rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2050	AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2051	}
2052	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2053	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2054	rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2055	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT \|\| rc == VINF_SUCCESS, ("%Rrc\n", rc));
2056	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2057	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2058	ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2059	ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2060	ASMAtomicWritePtr((void * volatile )&pVM->vmm.s.pfnRendezvous, (void )(uintptr_t)pfnRendezvous);
2061	ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2062	ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2063
2064	/*
2065	* Set the FF and poke the other EMTs.
2066	*/
2067	VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2068	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2069
2070	/*
2071	* Do the same ourselves.
2072	*/
2073	VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2074
2075	/*
2076	* The caller waits for the other EMTs to be done and return before doing
2077	* the cleanup. This makes away with wakeup / reset races we would otherwise
2078	* risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2079	*/
2080	for (;;)
2081	{
2082	rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2083	AssertLogRelRC(rc);
2084	if (!pVM->vmm.s.fRendezvousRecursion)
2085	break;
2086	rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2087	}
2088
2089	/*
2090	* Get the return code and clean up a little bit.
2091	*/
2092	VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2093	ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2094
2095	ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2096	pVCpu->vmm.s.fInRendezvous = false;
2097
2098	/*
2099	* Merge rcStrict, rcStrict2 and rcStrict3.
2100	*/
2101	AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2102	AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2103	if ( rcStrict2 != VINF_SUCCESS
2104	&& ( rcStrict == VINF_SUCCESS
2105	\|\| rcStrict > rcStrict2))
2106	rcStrict = rcStrict2;
2107	if ( rcStrict3 != VINF_SUCCESS
2108	&& ( rcStrict == VINF_SUCCESS
2109	\|\| rcStrict > rcStrict3))
2110	rcStrict = rcStrict3;
2111	Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2112	}
2113
2114	AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2115	\|\| (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2116	("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2117	VERR_IPE_UNEXPECTED_INFO_STATUS);
2118	return VBOXSTRICTRC_VAL(rcStrict);
2119	}
2120
2121
2122	/**
2123	* Interface for vmR3SetHaltMethodU.
2124	*
2125	* @param pVCpu The cross context virtual CPU structure of the
2126	* calling EMT.
2127	* @param fMayHaltInRing0 The new state.
2128	* @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2129	* @thread EMT(pVCpu)
2130	*
2131	* @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2132	* component.
2133	*/
2134	VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2135	{
2136	LogFlow(("VMMR3SetMayHaltInRing0(#%u, %d, %u)\n", pVCpu->idCpu, fMayHaltInRing0, cNsSpinBlockThreshold));
2137	pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2138	pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2139	}
2140
2141
2142	/**
2143	* Read from the ring 0 jump buffer stack.
2144	*
2145	* @returns VBox status code.
2146	*
2147	* @param pVM The cross context VM structure.
2148	* @param idCpu The ID of the source CPU context (for the address).
2149	* @param R0Addr Where to start reading.
2150	* @param pvBuf Where to store the data we've read.
2151	* @param cbRead The number of bytes to read.
2152	*/
2153	VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2154	{
2155	PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2156	AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2157	AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2158
2159	int rc;
2160	#ifdef VMM_R0_SWITCH_STACK
2161	RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2162	#else
2163	RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2164	#endif
2165	if ( off < VMM_STACK_SIZE
2166	&& off + cbRead <= VMM_STACK_SIZE)
2167	{
2168	memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2169	rc = VINF_SUCCESS;
2170	}
2171	else
2172	rc = VERR_INVALID_POINTER;
2173
2174	/* Supply the setjmp return RIP/EIP. */
2175	if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2176	&& pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2177	{
2178	uint8_t const pbSrc = (uint8_t const )&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2179	size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2180	size_t offDst = 0;
2181	if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2182	offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2183	else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2184	{
2185	size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2186	Assert(offSrc < cbSrc);
2187	pbSrc -= offSrc;
2188	cbSrc -= offSrc;
2189	}
2190	if (cbSrc > cbRead - offDst)
2191	cbSrc = cbRead - offDst;
2192	memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2193
2194	if (cbSrc == cbRead)
2195	rc = VINF_SUCCESS;
2196	}
2197
2198	return rc;
2199	}
2200
2201
2202	/**
2203	* Used by the DBGF stack unwinder to initialize the register state.
2204	*
2205	* @param pUVM The user mode VM handle.
2206	* @param idCpu The ID of the CPU being unwound.
2207	* @param pState The unwind state to initialize.
2208	*/
2209	VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2210	{
2211	PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2212	AssertReturnVoid(pVCpu);
2213
2214	/*
2215	* Locate the resume point on the stack.
2216	*/
2217	#ifdef VMM_R0_SWITCH_STACK
2218	uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2219	AssertReturnVoid(off < VMM_STACK_SIZE);
2220	#else
2221	uintptr_t off = 0;
2222	#endif
2223
2224	#ifdef RT_ARCH_AMD64
2225	/*
2226	* This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2227	*/
2228	# ifdef VBOX_STRICT
2229	Assert((uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2230	off += 8; /* RESUME_MAGIC */
2231	# endif
2232	# ifdef RT_OS_WINDOWS
2233	off += 0xa0; /* XMM6 thru XMM15 */
2234	# endif
2235	pState->u.x86.uRFlags = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2236	off += 8;
2237	pState->u.x86.auRegs[X86_GREG_xBX] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2238	off += 8;
2239	# ifdef RT_OS_WINDOWS
2240	pState->u.x86.auRegs[X86_GREG_xSI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2241	off += 8;
2242	pState->u.x86.auRegs[X86_GREG_xDI] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2243	off += 8;
2244	# endif
2245	pState->u.x86.auRegs[X86_GREG_x12] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2246	off += 8;
2247	pState->u.x86.auRegs[X86_GREG_x13] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2248	off += 8;
2249	pState->u.x86.auRegs[X86_GREG_x14] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2250	off += 8;
2251	pState->u.x86.auRegs[X86_GREG_x15] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2252	off += 8;
2253	pState->u.x86.auRegs[X86_GREG_xBP] = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2254	off += 8;
2255	pState->uPc = (uint64_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2256	off += 8;
2257
2258	#elif defined(RT_ARCH_X86)
2259	/*
2260	* This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2261	*/
2262	# ifdef VBOX_STRICT
2263	Assert((uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2264	off += 4; /* RESUME_MAGIC */
2265	# endif
2266	pState->u.x86.uRFlags = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2267	off += 4;
2268	pState->u.x86.auRegs[X86_GREG_xBX] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2269	off += 4;
2270	pState->u.x86.auRegs[X86_GREG_xSI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2271	off += 4;
2272	pState->u.x86.auRegs[X86_GREG_xDI] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2273	off += 4;
2274	pState->u.x86.auRegs[X86_GREG_xBP] = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2275	off += 4;
2276	pState->uPc = (uint32_t const )&pVCpu->vmm.s.pbEMTStackR3[off];
2277	off += 4;
2278	#else
2279	# error "Port me"
2280	#endif
2281
2282	/*
2283	* This is all we really need here, though the above helps if the assembly
2284	* doesn't contain unwind info (currently only on win/64, so that is useful).
2285	*/
2286	pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2287	pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2288	}
2289
2290
2291	/**
2292	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2293	*
2294	* @returns VBox status code.
2295	* @param pVM The cross context VM structure.
2296	* @param uOperation Operation to execute.
2297	* @param u64Arg Constant argument.
2298	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2299	* details.
2300	*/
2301	VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2302	{
2303	PVMCPU pVCpu = VMMGetCpu(pVM);
2304	AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2305	return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2306	}
2307
2308
2309	/**
2310	* Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2311	*
2312	* @returns VBox status code.
2313	* @param pVM The cross context VM structure.
2314	* @param pVCpu The cross context VM structure.
2315	* @param enmOperation Operation to execute.
2316	* @param u64Arg Constant argument.
2317	* @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2318	* details.
2319	*/
2320	VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2321	{
2322	int rc;
2323	for (;;)
2324	{
2325	#ifdef NO_SUPCALLR0VMM
2326	rc = VERR_GENERAL_FAILURE;
2327	#else
2328	rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2329	#endif
2330	/*
2331	* Flush the logs.
2332	*/
2333	#ifdef LOG_ENABLED
2334	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2335	#endif
2336	VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2337	if (rc != VINF_VMM_CALL_HOST)
2338	break;
2339	rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2340	if (RT_FAILURE(rc) \|\| (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2341	break;
2342	/* Resume R0 */
2343	}
2344
2345	AssertLogRelMsgReturn(rc == VINF_SUCCESS \|\| RT_FAILURE(rc),
2346	("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2347	VERR_IPE_UNEXPECTED_INFO_STATUS);
2348	return rc;
2349	}
2350
2351
2352	/**
2353	* Service a call to the ring-3 host code.
2354	*
2355	* @returns VBox status code.
2356	* @param pVM The cross context VM structure.
2357	* @param pVCpu The cross context virtual CPU structure.
2358	* @remarks Careful with critsects.
2359	*/
2360	static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2361	{
2362	/*
2363	* We must also check for pending critsect exits or else we can deadlock
2364	* when entering other critsects here.
2365	*/
2366	if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2367	PDMCritSectBothFF(pVCpu);
2368
2369	switch (pVCpu->vmm.s.enmCallRing3Operation)
2370	{
2371	/*
2372	* Acquire a critical section.
2373	*/
2374	case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2375	{
2376	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2377	true /fCallRing3/);
2378	break;
2379	}
2380
2381	/*
2382	* Enter a r/w critical section exclusively.
2383	*/
2384	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2385	{
2386	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2387	true /fCallRing3/);
2388	break;
2389	}
2390
2391	/*
2392	* Enter a r/w critical section shared.
2393	*/
2394	case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2395	{
2396	pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2397	true /fCallRing3/);
2398	break;
2399	}
2400
2401	/*
2402	* Acquire the PDM lock.
2403	*/
2404	case VMMCALLRING3_PDM_LOCK:
2405	{
2406	pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2407	break;
2408	}
2409
2410	/*
2411	* Grow the PGM pool.
2412	*/
2413	case VMMCALLRING3_PGM_POOL_GROW:
2414	{
2415	pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2416	break;
2417	}
2418
2419	/*
2420	* Maps an page allocation chunk into ring-3 so ring-0 can use it.
2421	*/
2422	case VMMCALLRING3_PGM_MAP_CHUNK:
2423	{
2424	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2425	break;
2426	}
2427
2428	/*
2429	* Allocates more handy pages.
2430	*/
2431	case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2432	{
2433	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2434	break;
2435	}
2436
2437	/*
2438	* Allocates a large page.
2439	*/
2440	case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2441	{
2442	pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2443	break;
2444	}
2445
2446	/*
2447	* Acquire the PGM lock.
2448	*/
2449	case VMMCALLRING3_PGM_LOCK:
2450	{
2451	pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2452	break;
2453	}
2454
2455	/*
2456	* Acquire the MM hypervisor heap lock.
2457	*/
2458	case VMMCALLRING3_MMHYPER_LOCK:
2459	{
2460	pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2461	break;
2462	}
2463
2464	/*
2465	* This is a noop. We just take this route to avoid unnecessary
2466	* tests in the loops.
2467	*/
2468	case VMMCALLRING3_VMM_LOGGER_FLUSH:
2469	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2470	LogAlways(("FLUSH\n"));
2471	break;
2472
2473	/*
2474	* Set the VM error message.
2475	*/
2476	case VMMCALLRING3_VM_SET_ERROR:
2477	VMR3SetErrorWorker(pVM);
2478	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2479	break;
2480
2481	/*
2482	* Set the VM runtime error message.
2483	*/
2484	case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2485	pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2486	break;
2487
2488	/*
2489	* Signal a ring 0 hypervisor assertion.
2490	* Cancel the longjmp operation that's in progress.
2491	*/
2492	case VMMCALLRING3_VM_R0_ASSERTION:
2493	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2494	pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2495	#ifdef RT_ARCH_X86
2496	pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2497	#else
2498	pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2499	#endif
2500	#ifdef VMM_R0_SWITCH_STACK
2501	(uint64_t )pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2502	#endif
2503	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2504	LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2505	return VERR_VMM_RING0_ASSERTION;
2506
2507	/*
2508	* A forced switch to ring 0 for preemption purposes.
2509	*/
2510	case VMMCALLRING3_VM_R0_PREEMPT:
2511	pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2512	break;
2513
2514	default:
2515	AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2516	return VERR_VMM_UNKNOWN_RING3_CALL;
2517	}
2518
2519	pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2520	return VINF_SUCCESS;
2521	}
2522
2523
2524	/**
2525	* Displays the Force action Flags.
2526	*
2527	* @param pVM The cross context VM structure.
2528	* @param pHlp The output helpers.
2529	* @param pszArgs The additional arguments (ignored).
2530	*/
2531	static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2532	{
2533	int c;
2534	uint32_t f;
2535	NOREF(pszArgs);
2536
2537	#define PRINT_FLAG(prf,flag) do { \
2538	if (f & (prf##flag)) \
2539	{ \
2540	static const char *s_psz = #flag; \
2541	if (!(c % 6)) \
2542	pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2543	else \
2544	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2545	c++; \
2546	f &= ~(prf##flag); \
2547	} \
2548	} while (0)
2549
2550	#define PRINT_GROUP(prf,grp,sfx) do { \
2551	if (f & (prf##grp##sfx)) \
2552	{ \
2553	static const char *s_psz = #grp; \
2554	if (!(c % 5)) \
2555	pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2556	else \
2557	pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2558	c++; \
2559	} \
2560	} while (0)
2561
2562	/*
2563	* The global flags.
2564	*/
2565	const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2566	pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2567
2568	/* show the flag mnemonics */
2569	c = 0;
2570	f = fGlobalForcedActions;
2571	PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2572	PRINT_FLAG(VM_FF_,PDM_QUEUES);
2573	PRINT_FLAG(VM_FF_,PDM_DMA);
2574	PRINT_FLAG(VM_FF_,DBGF);
2575	PRINT_FLAG(VM_FF_,REQUEST);
2576	PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2577	PRINT_FLAG(VM_FF_,RESET);
2578	PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2579	PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2580	PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2581	PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2582	PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2583	if (f)
2584	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2585	else
2586	pHlp->pfnPrintf(pHlp, "\n");
2587
2588	/* the groups */
2589	c = 0;
2590	f = fGlobalForcedActions;
2591	PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2592	PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2593	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2594	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2595	PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2596	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2597	PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2598	PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2599	if (c)
2600	pHlp->pfnPrintf(pHlp, "\n");
2601
2602	/*
2603	* Per CPU flags.
2604	*/
2605	for (VMCPUID i = 0; i < pVM->cCpus; i++)
2606	{
2607	PVMCPU pVCpu = pVM->apCpusR3[i];
2608	const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2609	pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2610
2611	/* show the flag mnemonics */
2612	c = 0;
2613	f = fLocalForcedActions;
2614	PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2615	PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2616	PRINT_FLAG(VMCPU_FF_,TIMER);
2617	PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2618	PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2619	PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2620	PRINT_FLAG(VMCPU_FF_,UNHALT);
2621	PRINT_FLAG(VMCPU_FF_,IEM);
2622	PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2623	PRINT_FLAG(VMCPU_FF_,DBGF);
2624	PRINT_FLAG(VMCPU_FF_,REQUEST);
2625	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2626	PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2627	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2628	PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2629	PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2630	PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2631	PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2632	PRINT_FLAG(VMCPU_FF_,TO_R3);
2633	PRINT_FLAG(VMCPU_FF_,IOM);
2634	if (f)
2635	pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2636	else
2637	pHlp->pfnPrintf(pHlp, "\n");
2638
2639	if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2640	pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2641
2642	/* the groups */
2643	c = 0;
2644	f = fLocalForcedActions;
2645	PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2646	PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2647	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2648	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2649	PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2650	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2651	PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2652	PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2653	PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2654	PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2655	if (c)
2656	pHlp->pfnPrintf(pHlp, "\n");
2657	}
2658
2659	#undef PRINT_FLAG
2660	#undef PRINT_GROUP
2661	}
2662

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source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 88346

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