VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 84044

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1/* $Id: VMM.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually, maybe.
27 *
28 * VMM is made up of these components:
29 * - @subpage pg_cfgm
30 * - @subpage pg_cpum
31 * - @subpage pg_dbgf
32 * - @subpage pg_em
33 * - @subpage pg_gim
34 * - @subpage pg_gmm
35 * - @subpage pg_gvmm
36 * - @subpage pg_hm
37 * - @subpage pg_iem
38 * - @subpage pg_iom
39 * - @subpage pg_mm
40 * - @subpage pg_nem
41 * - @subpage pg_pdm
42 * - @subpage pg_pgm
43 * - @subpage pg_selm
44 * - @subpage pg_ssm
45 * - @subpage pg_stam
46 * - @subpage pg_tm
47 * - @subpage pg_trpm
48 * - @subpage pg_vm
49 *
50 *
51 * @see @ref grp_vmm @ref grp_vm @subpage pg_vmm_guideline @subpage pg_raw
52 *
53 *
54 * @section sec_vmmstate VMM State
55 *
56 * @image html VM_Statechart_Diagram.gif
57 *
58 * To be written.
59 *
60 *
61 * @subsection subsec_vmm_init VMM Initialization
62 *
63 * To be written.
64 *
65 *
66 * @subsection subsec_vmm_term VMM Termination
67 *
68 * To be written.
69 *
70 *
71 * @section sec_vmm_limits VMM Limits
72 *
73 * There are various resource limits imposed by the VMM and it's
74 * sub-components. We'll list some of them here.
75 *
76 * On 64-bit hosts:
77 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
78 * can be increased up to 64K - 1.
79 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
80 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
81 * - A VM can be assigned all the memory we can use (16TB), however, the
82 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
83 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
84 *
85 * On 32-bit hosts:
86 * - Max 127 VMs. Imposed by GMM's per page structure.
87 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
88 * ROM pages. The limit is imposed by the 28-bit page ID used
89 * internally in GMM. It is also limited by PAE.
90 * - A VM can be assigned all the memory GMM can allocate, however, the
91 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
92 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
93 *
94 */
95
96
97/*********************************************************************************************************************************
98* Header Files *
99*********************************************************************************************************************************/
100#define LOG_GROUP LOG_GROUP_VMM
101#include <VBox/vmm/vmm.h>
102#include <VBox/vmm/vmapi.h>
103#include <VBox/vmm/pgm.h>
104#include <VBox/vmm/cfgm.h>
105#include <VBox/vmm/pdmqueue.h>
106#include <VBox/vmm/pdmcritsect.h>
107#include <VBox/vmm/pdmcritsectrw.h>
108#include <VBox/vmm/pdmapi.h>
109#include <VBox/vmm/cpum.h>
110#include <VBox/vmm/gim.h>
111#include <VBox/vmm/mm.h>
112#include <VBox/vmm/nem.h>
113#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
114# include <VBox/vmm/iem.h>
115#endif
116#include <VBox/vmm/iom.h>
117#include <VBox/vmm/trpm.h>
118#include <VBox/vmm/selm.h>
119#include <VBox/vmm/em.h>
120#include <VBox/sup.h>
121#include <VBox/vmm/dbgf.h>
122#include <VBox/vmm/apic.h>
123#include <VBox/vmm/ssm.h>
124#include <VBox/vmm/tm.h>
125#include "VMMInternal.h"
126#include <VBox/vmm/vmcc.h>
127
128#include <VBox/err.h>
129#include <VBox/param.h>
130#include <VBox/version.h>
131#include <VBox/vmm/hm.h>
132#include <iprt/assert.h>
133#include <iprt/alloc.h>
134#include <iprt/asm.h>
135#include <iprt/time.h>
136#include <iprt/semaphore.h>
137#include <iprt/stream.h>
138#include <iprt/string.h>
139#include <iprt/stdarg.h>
140#include <iprt/ctype.h>
141#include <iprt/x86.h>
142
143
144/*********************************************************************************************************************************
145* Defined Constants And Macros *
146*********************************************************************************************************************************/
147/** The saved state version. */
148#define VMM_SAVED_STATE_VERSION 4
149/** The saved state version used by v3.0 and earlier. (Teleportation) */
150#define VMM_SAVED_STATE_VERSION_3_0 3
151
152/** Macro for flushing the ring-0 logging. */
153#define VMM_FLUSH_R0_LOG(a_pR0Logger, a_pR3Logger) \
154 do { \
155 PVMMR0LOGGER pVmmLogger = (a_pR0Logger); \
156 if (!pVmmLogger || pVmmLogger->Logger.offScratch == 0) \
157 { /* likely? */ } \
158 else \
159 RTLogFlushR0(a_pR3Logger, &pVmmLogger->Logger); \
160 } while (0)
161
162
163/*********************************************************************************************************************************
164* Internal Functions *
165*********************************************************************************************************************************/
166static int vmmR3InitStacks(PVM pVM);
167static int vmmR3InitLoggers(PVM pVM);
168static void vmmR3InitRegisterStats(PVM pVM);
169static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
170static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
171static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
172static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
173 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser);
174static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
175static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
176
177
178/**
179 * Initializes the VMM.
180 *
181 * @returns VBox status code.
182 * @param pVM The cross context VM structure.
183 */
184VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
185{
186 LogFlow(("VMMR3Init\n"));
187
188 /*
189 * Assert alignment, sizes and order.
190 */
191 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
192 AssertCompile(RT_SIZEOFMEMB(VMCPU, vmm.s) <= RT_SIZEOFMEMB(VMCPU, vmm.padding));
193
194 /*
195 * Init basic VM VMM members.
196 */
197 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
198 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
199 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
200 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
201 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
202 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
203 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
204 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
205 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
206
207 /** @cfgm{/YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
208 * The EMT yield interval. The EMT yielding is a hack we employ to play a
209 * bit nicer with the rest of the system (like for instance the GUI).
210 */
211 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
212 23 /* Value arrived at after experimenting with the grub boot prompt. */);
213 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
214
215
216 /** @cfgm{/VMM/UsePeriodicPreemptionTimers, boolean, true}
217 * Controls whether we employ per-cpu preemption timers to limit the time
218 * spent executing guest code. This option is not available on all
219 * platforms and we will silently ignore this setting then. If we are
220 * running in VT-x mode, we will use the VMX-preemption timer instead of
221 * this one when possible.
222 */
223 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
224 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
225 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
226
227 /*
228 * Initialize the VMM rendezvous semaphores.
229 */
230 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
231 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
232 return VERR_NO_MEMORY;
233 for (VMCPUID i = 0; i < pVM->cCpus; i++)
234 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
235 for (VMCPUID i = 0; i < pVM->cCpus; i++)
236 {
237 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
238 AssertRCReturn(rc, rc);
239 }
240 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
241 AssertRCReturn(rc, rc);
242 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
243 AssertRCReturn(rc, rc);
244 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
245 AssertRCReturn(rc, rc);
246 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
247 AssertRCReturn(rc, rc);
248 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPush);
249 AssertRCReturn(rc, rc);
250 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousRecursionPop);
251 AssertRCReturn(rc, rc);
252 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
253 AssertRCReturn(rc, rc);
254 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
255 AssertRCReturn(rc, rc);
256
257 /*
258 * Register the saved state data unit.
259 */
260 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
261 NULL, NULL, NULL,
262 NULL, vmmR3Save, NULL,
263 NULL, vmmR3Load, NULL);
264 if (RT_FAILURE(rc))
265 return rc;
266
267 /*
268 * Register the Ring-0 VM handle with the session for fast ioctl calls.
269 */
270 rc = SUPR3SetVMForFastIOCtl(VMCC_GET_VMR0_FOR_CALL(pVM));
271 if (RT_FAILURE(rc))
272 return rc;
273
274 /*
275 * Init various sub-components.
276 */
277 rc = vmmR3InitStacks(pVM);
278 if (RT_SUCCESS(rc))
279 {
280 rc = vmmR3InitLoggers(pVM);
281
282#ifdef VBOX_WITH_NMI
283 /*
284 * Allocate mapping for the host APIC.
285 */
286 if (RT_SUCCESS(rc))
287 {
288 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
289 AssertRC(rc);
290 }
291#endif
292 if (RT_SUCCESS(rc))
293 {
294 /*
295 * Debug info and statistics.
296 */
297 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
298 vmmR3InitRegisterStats(pVM);
299 vmmInitFormatTypes();
300
301 return VINF_SUCCESS;
302 }
303 }
304 /** @todo Need failure cleanup? */
305
306 return rc;
307}
308
309
310/**
311 * Allocate & setup the VMM RC stack(s) (for EMTs).
312 *
313 * The stacks are also used for long jumps in Ring-0.
314 *
315 * @returns VBox status code.
316 * @param pVM The cross context VM structure.
317 *
318 * @remarks The optional guard page gets it protection setup up during R3 init
319 * completion because of init order issues.
320 */
321static int vmmR3InitStacks(PVM pVM)
322{
323 int rc = VINF_SUCCESS;
324#ifdef VMM_R0_SWITCH_STACK
325 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
326#else
327 uint32_t fFlags = 0;
328#endif
329
330 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
331 {
332 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
333
334#ifdef VBOX_STRICT_VMM_STACK
335 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
336#else
337 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
338#endif
339 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
340 if (RT_SUCCESS(rc))
341 {
342#ifdef VBOX_STRICT_VMM_STACK
343 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
344#endif
345 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
346
347 }
348 }
349
350 return rc;
351}
352
353
354/**
355 * Initialize the loggers.
356 *
357 * @returns VBox status code.
358 * @param pVM The cross context VM structure.
359 */
360static int vmmR3InitLoggers(PVM pVM)
361{
362 int rc;
363#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_UOFFSETOF_DYN(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
364
365 /*
366 * Allocate R0 Logger instance (finalized in the relocator).
367 */
368#if defined(LOG_ENABLED) && defined(VBOX_WITH_R0_LOGGING)
369 PRTLOGGER pLogger = RTLogDefaultInstance();
370 if (pLogger)
371 {
372 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
373 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
374 {
375 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
376 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
377 (void **)&pVCpu->vmm.s.pR0LoggerR3);
378 if (RT_FAILURE(rc))
379 return rc;
380 pVCpu->vmm.s.pR0LoggerR3->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
381 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
382 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
383 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
384 }
385 }
386#endif /* LOG_ENABLED && VBOX_WITH_R0_LOGGING */
387
388 /*
389 * Release logging.
390 */
391 PRTLOGGER pRelLogger = RTLogRelGetDefaultInstance();
392 if (pRelLogger)
393 {
394 /*
395 * Ring-0 release logger.
396 */
397 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
398 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
399 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
400
401 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
402 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
403 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
404
405 size_t const cbLogger = RTLogCalcSizeForR0(pRelLogger->cGroups, 0);
406
407 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
408 {
409 PVMCPU pVCpu = pVM->apCpusR3[idCpu];
410 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
411 (void **)&pVCpu->vmm.s.pR0RelLoggerR3);
412 if (RT_FAILURE(rc))
413 return rc;
414 PVMMR0LOGGER pVmmLogger = pVCpu->vmm.s.pR0RelLoggerR3;
415 RTR0PTR R0PtrVmmLogger = MMHyperR3ToR0(pVM, pVmmLogger);
416 pVCpu->vmm.s.pR0RelLoggerR0 = R0PtrVmmLogger;
417 pVmmLogger->pVM = VMCC_GET_VMR0_FOR_CALL(pVM);
418 pVmmLogger->cbLogger = (uint32_t)cbLogger;
419 pVmmLogger->fCreated = false;
420 pVmmLogger->fFlushingDisabled = false;
421 pVmmLogger->fRegistered = false;
422 pVmmLogger->idCpu = idCpu;
423
424 char szR0ThreadName[16];
425 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", idCpu);
426 rc = RTLogCreateForR0(&pVmmLogger->Logger, pVmmLogger->cbLogger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
427 pfnLoggerWrapper, pfnLoggerFlush,
428 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
429 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
430
431 /* We only update the release log instance here. */
432 rc = RTLogCopyGroupsAndFlagsForR0(&pVmmLogger->Logger, R0PtrVmmLogger + RT_UOFFSETOF(VMMR0LOGGER, Logger),
433 pRelLogger, RTLOGFLAGS_BUFFERED, UINT32_MAX);
434 AssertReleaseMsgRCReturn(rc, ("RTLogCopyGroupsAndFlagsForR0 failed! rc=%Rra\n", rc), rc);
435
436 pVmmLogger->fCreated = true;
437 }
438 }
439
440 return VINF_SUCCESS;
441}
442
443
444/**
445 * VMMR3Init worker that register the statistics with STAM.
446 *
447 * @param pVM The cross context VM structure.
448 */
449static void vmmR3InitRegisterStats(PVM pVM)
450{
451 RT_NOREF_PV(pVM);
452
453 /*
454 * Statistics.
455 */
456 STAM_REG(pVM, &pVM->vmm.s.StatRunGC, STAMTYPE_COUNTER, "/VMM/RunGC", STAMUNIT_OCCURENCES, "Number of context switches.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
467 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
468 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
469 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_COMMIT_WRITE returns.");
470 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
471 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
472 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOCommitWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOCommitWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_COMMIT_WRITE returns.");
473 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
474 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
475 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
476 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRRead, STAMTYPE_COUNTER, "/VMM/RZRet/MSRRead", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_READ returns.");
477 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMSRWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MSRWrite", STAMUNIT_OCCURENCES, "Number of VINF_CPUM_R3_MSR_WRITE returns.");
478 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
479 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
480 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
481 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
482 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
483 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
484 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
485 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
486 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
487 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
488 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
489 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
490 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Total, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
491 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns without responsible force flag.");
492 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3FF, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TO_R3.");
493 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_TM_VIRTUAL_SYNC.");
494 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PGM_NEED_HANDY_PAGES.");
495 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_QUEUES.");
496 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_EMT_RENDEZVOUS.");
497 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_TIMER.");
498 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VM_FF_PDM_DMA.");
499 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_PDM_CRITSECT.");
500 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iem, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IEM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IEM.");
501 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Iom, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/IOM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns with VMCPU_FF_IOM.");
502 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
503 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
504 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
505 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
506 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
507 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
508 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
509 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
510 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
511 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
512 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
513 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
514 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
515 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
516 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
517 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
518 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
519
520#ifdef VBOX_WITH_STATISTICS
521 for (VMCPUID i = 0; i < pVM->cCpus; i++)
522 {
523 PVMCPU pVCpu = pVM->apCpusR3[i];
524 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
525 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
526 STAMR3RegisterF(pVM, &pVCpu->vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
527 }
528#endif
529 for (VMCPUID i = 0; i < pVM->cCpus; i++)
530 {
531 PVMCPU pVCpu = pVM->apCpusR3[i];
532 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlock, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlock", i);
533 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOnTime, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOnTime", i);
534 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockOverslept, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockOverslept", i);
535 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltBlockInsomnia, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_NS_PER_CALL, "", "/PROF/CPU%u/VM/Halt/R0HaltBlockInsomnia", i);
536 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExec, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec", i);
537 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromSpin, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromSpin", i);
538 STAMR3RegisterF(pVM, &pVCpu->vmm.s.StatR0HaltExecFromBlock, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltExec/FromBlock", i);
539 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0Halts, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryCounter", i);
540 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsSucceeded, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistorySucceeded", i);
541 STAMR3RegisterF(pVM, &pVCpu->vmm.s.cR0HaltsToRing3, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "", "/PROF/CPU%u/VM/Halt/R0HaltHistoryToRing3", i);
542 }
543}
544
545
546/**
547 * Worker for VMMR3InitR0 that calls ring-0 to do EMT specific initialization.
548 *
549 * @returns VBox status code.
550 * @param pVM The cross context VM structure.
551 * @param pVCpu The cross context per CPU structure.
552 * @thread EMT(pVCpu)
553 */
554static DECLCALLBACK(int) vmmR3InitR0Emt(PVM pVM, PVMCPU pVCpu)
555{
556 return VMMR3CallR0Emt(pVM, pVCpu, VMMR0_DO_VMMR0_INIT_EMT, 0, NULL);
557}
558
559
560/**
561 * Initializes the R0 VMM.
562 *
563 * @returns VBox status code.
564 * @param pVM The cross context VM structure.
565 */
566VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
567{
568 int rc;
569 PVMCPU pVCpu = VMMGetCpu(pVM);
570 Assert(pVCpu && pVCpu->idCpu == 0);
571
572#ifdef LOG_ENABLED
573 /*
574 * Initialize the ring-0 logger if we haven't done so yet.
575 */
576 if ( pVCpu->vmm.s.pR0LoggerR3
577 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
578 {
579 rc = VMMR3UpdateLoggers(pVM);
580 if (RT_FAILURE(rc))
581 return rc;
582 }
583#endif
584
585 /*
586 * Call Ring-0 entry with init code.
587 */
588 for (;;)
589 {
590#ifdef NO_SUPCALLR0VMM
591 //rc = VERR_GENERAL_FAILURE;
592 rc = VINF_SUCCESS;
593#else
594 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT, RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
595#endif
596 /*
597 * Flush the logs.
598 */
599#ifdef LOG_ENABLED
600 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
601#endif
602 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
603 if (rc != VINF_VMM_CALL_HOST)
604 break;
605 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
606 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
607 break;
608 /* Resume R0 */
609 }
610
611 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
612 {
613 LogRel(("VMM: R0 init failed, rc=%Rra\n", rc));
614 if (RT_SUCCESS(rc))
615 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
616 }
617
618 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
619 if (pVM->apCpusR3[0]->vmm.s.hCtxHook != NIL_RTTHREADCTXHOOK)
620 LogRel(("VMM: Enabled thread-context hooks\n"));
621 else
622 LogRel(("VMM: Thread-context hooks unavailable\n"));
623
624 /* Log RTThreadPreemptIsPendingTrusty() and RTThreadPreemptIsPossible() results. */
625 if (pVM->vmm.s.fIsPreemptPendingApiTrusty)
626 LogRel(("VMM: RTThreadPreemptIsPending() can be trusted\n"));
627 else
628 LogRel(("VMM: Warning! RTThreadPreemptIsPending() cannot be trusted! Need to update kernel info?\n"));
629 if (pVM->vmm.s.fIsPreemptPossible)
630 LogRel(("VMM: Kernel preemption is possible\n"));
631 else
632 LogRel(("VMM: Kernel preemption is not possible it seems\n"));
633
634 /*
635 * Send all EMTs to ring-0 to get their logger initialized.
636 */
637 for (VMCPUID idCpu = 0; RT_SUCCESS(rc) && idCpu < pVM->cCpus; idCpu++)
638 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)vmmR3InitR0Emt, 2, pVM, pVM->apCpusR3[idCpu]);
639
640 return rc;
641}
642
643
644/**
645 * Called when an init phase completes.
646 *
647 * @returns VBox status code.
648 * @param pVM The cross context VM structure.
649 * @param enmWhat Which init phase.
650 */
651VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
652{
653 int rc = VINF_SUCCESS;
654
655 switch (enmWhat)
656 {
657 case VMINITCOMPLETED_RING3:
658 {
659 /*
660 * Create the EMT yield timer.
661 */
662 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
663 AssertRCReturn(rc, rc);
664
665 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
666 AssertRCReturn(rc, rc);
667 break;
668 }
669
670 case VMINITCOMPLETED_HM:
671 {
672 /*
673 * Disable the periodic preemption timers if we can use the
674 * VMX-preemption timer instead.
675 */
676 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
677 && HMR3IsVmxPreemptionTimerUsed(pVM))
678 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
679 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
680
681 /*
682 * Last chance for GIM to update its CPUID leaves if it requires
683 * knowledge/information from HM initialization.
684 */
685 rc = GIMR3InitCompleted(pVM);
686 AssertRCReturn(rc, rc);
687
688 /*
689 * CPUM's post-initialization (print CPUIDs).
690 */
691 CPUMR3LogCpuIdAndMsrFeatures(pVM);
692 break;
693 }
694
695 default: /* shuts up gcc */
696 break;
697 }
698
699 return rc;
700}
701
702
703/**
704 * Terminate the VMM bits.
705 *
706 * @returns VBox status code.
707 * @param pVM The cross context VM structure.
708 */
709VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
710{
711 PVMCPU pVCpu = VMMGetCpu(pVM);
712 Assert(pVCpu && pVCpu->idCpu == 0);
713
714 /*
715 * Call Ring-0 entry with termination code.
716 */
717 int rc;
718 for (;;)
719 {
720#ifdef NO_SUPCALLR0VMM
721 //rc = VERR_GENERAL_FAILURE;
722 rc = VINF_SUCCESS;
723#else
724 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
725#endif
726 /*
727 * Flush the logs.
728 */
729#ifdef LOG_ENABLED
730 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
731#endif
732 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
733 if (rc != VINF_VMM_CALL_HOST)
734 break;
735 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
736 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
737 break;
738 /* Resume R0 */
739 }
740 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
741 {
742 LogRel(("VMM: VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
743 if (RT_SUCCESS(rc))
744 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
745 }
746
747 for (VMCPUID i = 0; i < pVM->cCpus; i++)
748 {
749 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
750 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
751 }
752 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
753 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
754 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
755 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
756 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
757 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
758 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
759 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
760 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
761 pVM->vmm.s.hEvtMulRendezvousRecursionPush = NIL_RTSEMEVENTMULTI;
762 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
763 pVM->vmm.s.hEvtMulRendezvousRecursionPop = NIL_RTSEMEVENTMULTI;
764 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
765 pVM->vmm.s.hEvtRendezvousRecursionPushCaller = NIL_RTSEMEVENT;
766 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
767 pVM->vmm.s.hEvtRendezvousRecursionPopCaller = NIL_RTSEMEVENT;
768
769 vmmTermFormatTypes();
770 return rc;
771}
772
773
774/**
775 * Applies relocations to data and code managed by this
776 * component. This function will be called at init and
777 * whenever the VMM need to relocate it self inside the GC.
778 *
779 * The VMM will need to apply relocations to the core code.
780 *
781 * @param pVM The cross context VM structure.
782 * @param offDelta The relocation delta.
783 */
784VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
785{
786 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
787 RT_NOREF(offDelta);
788
789 /*
790 * Update the logger.
791 */
792 VMMR3UpdateLoggers(pVM);
793}
794
795
796/**
797 * Updates the settings for the RC and R0 loggers.
798 *
799 * @returns VBox status code.
800 * @param pVM The cross context VM structure.
801 */
802VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
803{
804 int rc = VINF_SUCCESS;
805
806#ifdef LOG_ENABLED
807 /*
808 * For the ring-0 EMT logger, we use a per-thread logger instance
809 * in ring-0. Only initialize it once.
810 */
811 PRTLOGGER const pDefault = RTLogDefaultInstance();
812 for (VMCPUID i = 0; i < pVM->cCpus; i++)
813 {
814 PVMCPU pVCpu = pVM->apCpusR3[i];
815 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
816 if (pR0LoggerR3)
817 {
818 if (!pR0LoggerR3->fCreated)
819 {
820 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
821 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
822 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
823
824 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
825 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
826 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
827
828 char szR0ThreadName[16];
829 RTStrPrintf(szR0ThreadName, sizeof(szR0ThreadName), "EMT-%u-R0", i);
830 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
831 pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
832 pfnLoggerWrapper, pfnLoggerFlush,
833 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY, szR0ThreadName);
834 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
835
836 pR0LoggerR3->idCpu = i;
837 pR0LoggerR3->fCreated = true;
838 pR0LoggerR3->fFlushingDisabled = false;
839 }
840
841 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_UOFFSETOF(VMMR0LOGGER, Logger),
842 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
843 AssertRC(rc);
844 }
845 }
846#else
847 RT_NOREF(pVM);
848#endif
849
850 return rc;
851}
852
853
854/**
855 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
856 *
857 * @returns Pointer to the buffer.
858 * @param pVM The cross context VM structure.
859 */
860VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
861{
862 return pVM->vmm.s.szRing0AssertMsg1;
863}
864
865
866/**
867 * Returns the VMCPU of the specified virtual CPU.
868 *
869 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
870 *
871 * @param pUVM The user mode VM handle.
872 * @param idCpu The ID of the virtual CPU.
873 */
874VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
875{
876 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
877 AssertReturn(idCpu < pUVM->cCpus, NULL);
878 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
879 return pUVM->pVM->apCpusR3[idCpu];
880}
881
882
883/**
884 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
885 *
886 * @returns Pointer to the buffer.
887 * @param pVM The cross context VM structure.
888 */
889VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
890{
891 return pVM->vmm.s.szRing0AssertMsg2;
892}
893
894
895/**
896 * Execute state save operation.
897 *
898 * @returns VBox status code.
899 * @param pVM The cross context VM structure.
900 * @param pSSM SSM operation handle.
901 */
902static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
903{
904 LogFlow(("vmmR3Save:\n"));
905
906 /*
907 * Save the started/stopped state of all CPUs except 0 as it will always
908 * be running. This avoids breaking the saved state version. :-)
909 */
910 for (VMCPUID i = 1; i < pVM->cCpus; i++)
911 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(pVM->apCpusR3[i])));
912
913 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
914}
915
916
917/**
918 * Execute state load operation.
919 *
920 * @returns VBox status code.
921 * @param pVM The cross context VM structure.
922 * @param pSSM SSM operation handle.
923 * @param uVersion Data layout version.
924 * @param uPass The data pass.
925 */
926static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
927{
928 LogFlow(("vmmR3Load:\n"));
929 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
930
931 /*
932 * Validate version.
933 */
934 if ( uVersion != VMM_SAVED_STATE_VERSION
935 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
936 {
937 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
938 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
939 }
940
941 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
942 {
943 /* Ignore the stack bottom, stack pointer and stack bits. */
944 RTRCPTR RCPtrIgnored;
945 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
946 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
947#ifdef RT_OS_DARWIN
948 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
949 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
950 && SSMR3HandleRevision(pSSM) >= 48858
951 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
952 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
953 )
954 SSMR3Skip(pSSM, 16384);
955 else
956 SSMR3Skip(pSSM, 8192);
957#else
958 SSMR3Skip(pSSM, 8192);
959#endif
960 }
961
962 /*
963 * Restore the VMCPU states. VCPU 0 is always started.
964 */
965 VMCPU_SET_STATE(pVM->apCpusR3[0], VMCPUSTATE_STARTED);
966 for (VMCPUID i = 1; i < pVM->cCpus; i++)
967 {
968 bool fStarted;
969 int rc = SSMR3GetBool(pSSM, &fStarted);
970 if (RT_FAILURE(rc))
971 return rc;
972 VMCPU_SET_STATE(pVM->apCpusR3[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
973 }
974
975 /* terminator */
976 uint32_t u32;
977 int rc = SSMR3GetU32(pSSM, &u32);
978 if (RT_FAILURE(rc))
979 return rc;
980 if (u32 != UINT32_MAX)
981 {
982 AssertMsgFailed(("u32=%#x\n", u32));
983 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
984 }
985 return VINF_SUCCESS;
986}
987
988
989/**
990 * Suspends the CPU yielder.
991 *
992 * @param pVM The cross context VM structure.
993 */
994VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
995{
996 VMCPU_ASSERT_EMT(pVM->apCpusR3[0]);
997 if (!pVM->vmm.s.cYieldResumeMillies)
998 {
999 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1000 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1001 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1002 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1003 else
1004 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1005 TMTimerStop(pVM->vmm.s.pYieldTimer);
1006 }
1007 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1008}
1009
1010
1011/**
1012 * Stops the CPU yielder.
1013 *
1014 * @param pVM The cross context VM structure.
1015 */
1016VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1017{
1018 if (!pVM->vmm.s.cYieldResumeMillies)
1019 TMTimerStop(pVM->vmm.s.pYieldTimer);
1020 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1021 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1022}
1023
1024
1025/**
1026 * Resumes the CPU yielder when it has been a suspended or stopped.
1027 *
1028 * @param pVM The cross context VM structure.
1029 */
1030VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1031{
1032 if (pVM->vmm.s.cYieldResumeMillies)
1033 {
1034 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1035 pVM->vmm.s.cYieldResumeMillies = 0;
1036 }
1037}
1038
1039
1040/**
1041 * Internal timer callback function.
1042 *
1043 * @param pVM The cross context VM structure.
1044 * @param pTimer The timer handle.
1045 * @param pvUser User argument specified upon timer creation.
1046 */
1047static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1048{
1049 NOREF(pvUser);
1050
1051 /*
1052 * This really needs some careful tuning. While we shouldn't be too greedy since
1053 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1054 * because that'll cause us to stop up.
1055 *
1056 * The current logic is to use the default interval when there is no lag worth
1057 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1058 *
1059 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1060 * so the lag is up to date.)
1061 */
1062 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1063 if ( u64Lag < 50000000 /* 50ms */
1064 || ( u64Lag < 1000000000 /* 1s */
1065 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1066 )
1067 {
1068 uint64_t u64Elapsed = RTTimeNanoTS();
1069 pVM->vmm.s.u64LastYield = u64Elapsed;
1070
1071 RTThreadYield();
1072
1073#ifdef LOG_ENABLED
1074 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1075 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1076#endif
1077 }
1078 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1079}
1080
1081
1082/**
1083 * Executes guest code (Intel VT-x and AMD-V).
1084 *
1085 * @param pVM The cross context VM structure.
1086 * @param pVCpu The cross context virtual CPU structure.
1087 */
1088VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1089{
1090 Log2(("VMMR3HmRunGC: (cs:rip=%04x:%RX64)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1091
1092 for (;;)
1093 {
1094 int rc;
1095 do
1096 {
1097#ifdef NO_SUPCALLR0VMM
1098 rc = VERR_GENERAL_FAILURE;
1099#else
1100 rc = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), VMMR0_DO_HM_RUN, pVCpu->idCpu);
1101 if (RT_LIKELY(rc == VINF_SUCCESS))
1102 rc = pVCpu->vmm.s.iLastGZRc;
1103#endif
1104 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1105
1106#if 0 /** @todo triggers too often */
1107 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1108#endif
1109
1110 /*
1111 * Flush the logs
1112 */
1113#ifdef LOG_ENABLED
1114 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1115#endif
1116 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1117 if (rc != VINF_VMM_CALL_HOST)
1118 {
1119 Log2(("VMMR3HmRunGC: returns %Rrc (cs:rip=%04x:%RX64)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestRIP(pVCpu)));
1120 return rc;
1121 }
1122 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1123 if (RT_FAILURE(rc))
1124 return rc;
1125 /* Resume R0 */
1126 }
1127}
1128
1129
1130/**
1131 * Perform one of the fast I/O control VMMR0 operation.
1132 *
1133 * @returns VBox strict status code.
1134 * @param pVM The cross context VM structure.
1135 * @param pVCpu The cross context virtual CPU structure.
1136 * @param enmOperation The operation to perform.
1137 */
1138VMMR3_INT_DECL(VBOXSTRICTRC) VMMR3CallR0EmtFast(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation)
1139{
1140 for (;;)
1141 {
1142 VBOXSTRICTRC rcStrict;
1143 do
1144 {
1145#ifdef NO_SUPCALLR0VMM
1146 rcStrict = VERR_GENERAL_FAILURE;
1147#else
1148 rcStrict = SUPR3CallVMMR0Fast(VMCC_GET_VMR0_FOR_CALL(pVM), enmOperation, pVCpu->idCpu);
1149 if (RT_LIKELY(rcStrict == VINF_SUCCESS))
1150 rcStrict = pVCpu->vmm.s.iLastGZRc;
1151#endif
1152 } while (rcStrict == VINF_EM_RAW_INTERRUPT_HYPER);
1153
1154 /*
1155 * Flush the logs
1156 */
1157#ifdef LOG_ENABLED
1158 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
1159#endif
1160 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
1161 if (rcStrict != VINF_VMM_CALL_HOST)
1162 return rcStrict;
1163 int rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1164 if (RT_FAILURE(rc))
1165 return rc;
1166 /* Resume R0 */
1167 }
1168}
1169
1170
1171/**
1172 * VCPU worker for VMMR3SendStartupIpi.
1173 *
1174 * @param pVM The cross context VM structure.
1175 * @param idCpu Virtual CPU to perform SIPI on.
1176 * @param uVector The SIPI vector.
1177 */
1178static DECLCALLBACK(int) vmmR3SendStarupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1179{
1180 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1181 VMCPU_ASSERT_EMT(pVCpu);
1182
1183 /*
1184 * In the INIT state, the target CPU is only responsive to an SIPI.
1185 * This is also true for when when the CPU is in VMX non-root mode.
1186 *
1187 * See AMD spec. 16.5 "Interprocessor Interrupts (IPI)".
1188 * See Intel spec. 26.6.2 "Activity State".
1189 */
1190 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1191 return VINF_SUCCESS;
1192
1193 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1194#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1195 if (CPUMIsGuestInVmxRootMode(pCtx))
1196 {
1197 /* If the CPU is in VMX non-root mode we must cause a VM-exit. */
1198 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1199 return VBOXSTRICTRC_TODO(IEMExecVmxVmexitStartupIpi(pVCpu, uVector));
1200
1201 /* If the CPU is in VMX root mode (and not in VMX non-root mode) SIPIs are blocked. */
1202 return VINF_SUCCESS;
1203 }
1204#endif
1205
1206 pCtx->cs.Sel = uVector << 8;
1207 pCtx->cs.ValidSel = uVector << 8;
1208 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1209 pCtx->cs.u64Base = uVector << 12;
1210 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1211 pCtx->rip = 0;
1212
1213 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1214
1215# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1216 EMSetState(pVCpu, EMSTATE_HALTED);
1217 return VINF_EM_RESCHEDULE;
1218# else /* And if we go the VMCPU::enmState way it can stay here. */
1219 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1220 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1221 return VINF_SUCCESS;
1222# endif
1223}
1224
1225
1226/**
1227 * VCPU worker for VMMR3SendInitIpi.
1228 *
1229 * @returns VBox status code.
1230 * @param pVM The cross context VM structure.
1231 * @param idCpu Virtual CPU to perform SIPI on.
1232 */
1233static DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1234{
1235 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1236 VMCPU_ASSERT_EMT(pVCpu);
1237
1238 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1239
1240 /** @todo r=ramshankar: We should probably block INIT signal when the CPU is in
1241 * wait-for-SIPI state. Verify. */
1242
1243 /* If the CPU is in VMX non-root mode, INIT signals cause VM-exits. */
1244#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
1245 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1246 if (CPUMIsGuestInVmxNonRootMode(pCtx))
1247 return VBOXSTRICTRC_TODO(IEMExecVmxVmexit(pVCpu, VMX_EXIT_INIT_SIGNAL, 0 /* uExitQual */));
1248#endif
1249
1250 /** @todo Figure out how to handle a SVM nested-guest intercepts here for INIT
1251 * IPI (e.g. SVM_EXIT_INIT). */
1252
1253 PGMR3ResetCpu(pVM, pVCpu);
1254 PDMR3ResetCpu(pVCpu); /* Only clears pending interrupts force flags */
1255 APICR3InitIpi(pVCpu);
1256 TRPMR3ResetCpu(pVCpu);
1257 CPUMR3ResetCpu(pVM, pVCpu);
1258 EMR3ResetCpu(pVCpu);
1259 HMR3ResetCpu(pVCpu);
1260 NEMR3ResetCpu(pVCpu, true /*fInitIpi*/);
1261
1262 /* This will trickle up on the target EMT. */
1263 return VINF_EM_WAIT_SIPI;
1264}
1265
1266
1267/**
1268 * Sends a Startup IPI to the virtual CPU by setting CS:EIP into
1269 * vector-dependent state and unhalting processor.
1270 *
1271 * @param pVM The cross context VM structure.
1272 * @param idCpu Virtual CPU to perform SIPI on.
1273 * @param uVector SIPI vector.
1274 */
1275VMMR3_INT_DECL(void) VMMR3SendStartupIpi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1276{
1277 AssertReturnVoid(idCpu < pVM->cCpus);
1278
1279 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendStarupIpi, 3, pVM, idCpu, uVector);
1280 AssertRC(rc);
1281}
1282
1283
1284/**
1285 * Sends init IPI to the virtual CPU.
1286 *
1287 * @param pVM The cross context VM structure.
1288 * @param idCpu Virtual CPU to perform int IPI on.
1289 */
1290VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1291{
1292 AssertReturnVoid(idCpu < pVM->cCpus);
1293
1294 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1295 AssertRC(rc);
1296}
1297
1298
1299/**
1300 * Registers the guest memory range that can be used for patching.
1301 *
1302 * @returns VBox status code.
1303 * @param pVM The cross context VM structure.
1304 * @param pPatchMem Patch memory range.
1305 * @param cbPatchMem Size of the memory range.
1306 */
1307VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1308{
1309 VM_ASSERT_EMT(pVM);
1310 if (HMIsEnabled(pVM))
1311 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1312
1313 return VERR_NOT_SUPPORTED;
1314}
1315
1316
1317/**
1318 * Deregisters the guest memory range that can be used for patching.
1319 *
1320 * @returns VBox status code.
1321 * @param pVM The cross context VM structure.
1322 * @param pPatchMem Patch memory range.
1323 * @param cbPatchMem Size of the memory range.
1324 */
1325VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1326{
1327 if (HMIsEnabled(pVM))
1328 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1329
1330 return VINF_SUCCESS;
1331}
1332
1333
1334/**
1335 * Common recursion handler for the other EMTs.
1336 *
1337 * @returns Strict VBox status code.
1338 * @param pVM The cross context VM structure.
1339 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1340 * @param rcStrict Current status code to be combined with the one
1341 * from this recursion and returned.
1342 */
1343static VBOXSTRICTRC vmmR3EmtRendezvousCommonRecursion(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rcStrict)
1344{
1345 int rc2;
1346
1347 /*
1348 * We wait here while the initiator of this recursion reconfigures
1349 * everything. The last EMT to get in signals the initiator.
1350 */
1351 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) == pVM->cCpus)
1352 {
1353 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1354 AssertLogRelRC(rc2);
1355 }
1356
1357 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPush, RT_INDEFINITE_WAIT);
1358 AssertLogRelRC(rc2);
1359
1360 /*
1361 * Do the normal rendezvous processing.
1362 */
1363 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1364 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1365
1366 /*
1367 * Wait for the initiator to restore everything.
1368 */
1369 rc2 = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousRecursionPop, RT_INDEFINITE_WAIT);
1370 AssertLogRelRC(rc2);
1371
1372 /*
1373 * Last thread out of here signals the initiator.
1374 */
1375 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) == pVM->cCpus)
1376 {
1377 rc2 = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1378 AssertLogRelRC(rc2);
1379 }
1380
1381 /*
1382 * Merge status codes and return.
1383 */
1384 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
1385 if ( rcStrict2 != VINF_SUCCESS
1386 && ( rcStrict == VINF_SUCCESS
1387 || rcStrict > rcStrict2))
1388 rcStrict = rcStrict2;
1389 return rcStrict;
1390}
1391
1392
1393/**
1394 * Count returns and have the last non-caller EMT wake up the caller.
1395 *
1396 * @returns VBox strict informational status code for EM scheduling. No failures
1397 * will be returned here, those are for the caller only.
1398 *
1399 * @param pVM The cross context VM structure.
1400 * @param rcStrict The current accumulated recursive status code,
1401 * to be merged with i32RendezvousStatus and
1402 * returned.
1403 */
1404DECL_FORCE_INLINE(VBOXSTRICTRC) vmmR3EmtRendezvousNonCallerReturn(PVM pVM, VBOXSTRICTRC rcStrict)
1405{
1406 VBOXSTRICTRC rcStrict2 = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1407
1408 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1409 if (cReturned == pVM->cCpus - 1U)
1410 {
1411 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1412 AssertLogRelRC(rc);
1413 }
1414
1415 /*
1416 * Merge the status codes, ignoring error statuses in this code path.
1417 */
1418 AssertLogRelMsgReturn( rcStrict2 <= VINF_SUCCESS
1419 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1420 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)),
1421 VERR_IPE_UNEXPECTED_INFO_STATUS);
1422
1423 if (RT_SUCCESS(rcStrict2))
1424 {
1425 if ( rcStrict2 != VINF_SUCCESS
1426 && ( rcStrict == VINF_SUCCESS
1427 || rcStrict > rcStrict2))
1428 rcStrict = rcStrict2;
1429 }
1430 return rcStrict;
1431}
1432
1433
1434/**
1435 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1436 *
1437 * @returns VBox strict informational status code for EM scheduling. No failures
1438 * will be returned here, those are for the caller only. When
1439 * fIsCaller is set, VINF_SUCCESS is always returned.
1440 *
1441 * @param pVM The cross context VM structure.
1442 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1443 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1444 * not.
1445 * @param fFlags The flags.
1446 * @param pfnRendezvous The callback.
1447 * @param pvUser The user argument for the callback.
1448 */
1449static VBOXSTRICTRC vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1450 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1451{
1452 int rc;
1453 VBOXSTRICTRC rcStrictRecursion = VINF_SUCCESS;
1454
1455 /*
1456 * Enter, the last EMT triggers the next callback phase.
1457 */
1458 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1459 if (cEntered != pVM->cCpus)
1460 {
1461 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1462 {
1463 /* Wait for our turn. */
1464 for (;;)
1465 {
1466 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1467 AssertLogRelRC(rc);
1468 if (!pVM->vmm.s.fRendezvousRecursion)
1469 break;
1470 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1471 }
1472 }
1473 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1474 {
1475 /* Wait for the last EMT to arrive and wake everyone up. */
1476 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1477 AssertLogRelRC(rc);
1478 Assert(!pVM->vmm.s.fRendezvousRecursion);
1479 }
1480 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1481 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1482 {
1483 /* Wait for our turn. */
1484 for (;;)
1485 {
1486 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1487 AssertLogRelRC(rc);
1488 if (!pVM->vmm.s.fRendezvousRecursion)
1489 break;
1490 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1491 }
1492 }
1493 else
1494 {
1495 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1496
1497 /*
1498 * The execute once is handled specially to optimize the code flow.
1499 *
1500 * The last EMT to arrive will perform the callback and the other
1501 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1502 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1503 * returns, that EMT will initiate the normal return sequence.
1504 */
1505 if (!fIsCaller)
1506 {
1507 for (;;)
1508 {
1509 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1510 AssertLogRelRC(rc);
1511 if (!pVM->vmm.s.fRendezvousRecursion)
1512 break;
1513 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1514 }
1515
1516 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1517 }
1518 return VINF_SUCCESS;
1519 }
1520 }
1521 else
1522 {
1523 /*
1524 * All EMTs are waiting, clear the FF and take action according to the
1525 * execution method.
1526 */
1527 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1528
1529 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1530 {
1531 /* Wake up everyone. */
1532 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1533 AssertLogRelRC(rc);
1534 }
1535 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1536 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1537 {
1538 /* Figure out who to wake up and wake it up. If it's ourself, then
1539 it's easy otherwise wait for our turn. */
1540 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1541 ? 0
1542 : pVM->cCpus - 1U;
1543 if (pVCpu->idCpu != iFirst)
1544 {
1545 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1546 AssertLogRelRC(rc);
1547 for (;;)
1548 {
1549 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1550 AssertLogRelRC(rc);
1551 if (!pVM->vmm.s.fRendezvousRecursion)
1552 break;
1553 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1554 }
1555 }
1556 }
1557 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1558 }
1559
1560
1561 /*
1562 * Do the callback and update the status if necessary.
1563 */
1564 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1565 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1566 {
1567 VBOXSTRICTRC rcStrict2 = pfnRendezvous(pVM, pVCpu, pvUser);
1568 if (rcStrict2 != VINF_SUCCESS)
1569 {
1570 AssertLogRelMsg( rcStrict2 <= VINF_SUCCESS
1571 || (rcStrict2 >= VINF_EM_FIRST && rcStrict2 <= VINF_EM_LAST),
1572 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict2)));
1573 int32_t i32RendezvousStatus;
1574 do
1575 {
1576 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1577 if ( rcStrict2 == i32RendezvousStatus
1578 || RT_FAILURE(i32RendezvousStatus)
1579 || ( i32RendezvousStatus != VINF_SUCCESS
1580 && rcStrict2 > i32RendezvousStatus))
1581 break;
1582 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict2), i32RendezvousStatus));
1583 }
1584 }
1585
1586 /*
1587 * Increment the done counter and take action depending on whether we're
1588 * the last to finish callback execution.
1589 */
1590 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1591 if ( cDone != pVM->cCpus
1592 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1593 {
1594 /* Signal the next EMT? */
1595 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1596 {
1597 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1598 AssertLogRelRC(rc);
1599 }
1600 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1601 {
1602 Assert(cDone == pVCpu->idCpu + 1U);
1603 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1604 AssertLogRelRC(rc);
1605 }
1606 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1607 {
1608 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1609 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1610 AssertLogRelRC(rc);
1611 }
1612
1613 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1614 if (!fIsCaller)
1615 {
1616 for (;;)
1617 {
1618 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1619 AssertLogRelRC(rc);
1620 if (!pVM->vmm.s.fRendezvousRecursion)
1621 break;
1622 rcStrictRecursion = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrictRecursion);
1623 }
1624 }
1625 }
1626 else
1627 {
1628 /* Callback execution is all done, tell the rest to return. */
1629 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1630 AssertLogRelRC(rc);
1631 }
1632
1633 if (!fIsCaller)
1634 return vmmR3EmtRendezvousNonCallerReturn(pVM, rcStrictRecursion);
1635 return rcStrictRecursion;
1636}
1637
1638
1639/**
1640 * Called in response to VM_FF_EMT_RENDEZVOUS.
1641 *
1642 * @returns VBox strict status code - EM scheduling. No errors will be returned
1643 * here, nor will any non-EM scheduling status codes be returned.
1644 *
1645 * @param pVM The cross context VM structure.
1646 * @param pVCpu The cross context virtual CPU structure of the calling EMT.
1647 *
1648 * @thread EMT
1649 */
1650VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1651{
1652 Assert(!pVCpu->vmm.s.fInRendezvous);
1653 Log(("VMMR3EmtRendezvousFF: EMT%#u\n", pVCpu->idCpu));
1654 pVCpu->vmm.s.fInRendezvous = true;
1655 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1656 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1657 pVCpu->vmm.s.fInRendezvous = false;
1658 Log(("VMMR3EmtRendezvousFF: EMT%#u returns %Rrc\n", pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
1659 return VBOXSTRICTRC_TODO(rcStrict);
1660}
1661
1662
1663/**
1664 * Helper for resetting an single wakeup event sempahore.
1665 *
1666 * @returns VERR_TIMEOUT on success, RTSemEventWait status otherwise.
1667 * @param hEvt The event semaphore to reset.
1668 */
1669static int vmmR3HlpResetEvent(RTSEMEVENT hEvt)
1670{
1671 for (uint32_t cLoops = 0; ; cLoops++)
1672 {
1673 int rc = RTSemEventWait(hEvt, 0 /*cMsTimeout*/);
1674 if (rc != VINF_SUCCESS || cLoops > _4K)
1675 return rc;
1676 }
1677}
1678
1679
1680/**
1681 * Worker for VMMR3EmtRendezvous that handles recursion.
1682 *
1683 * @returns VBox strict status code. This will be the first error,
1684 * VINF_SUCCESS, or an EM scheduling status code.
1685 *
1686 * @param pVM The cross context VM structure.
1687 * @param pVCpu The cross context virtual CPU structure of the
1688 * calling EMT.
1689 * @param fFlags Flags indicating execution methods. See
1690 * grp_VMMR3EmtRendezvous_fFlags.
1691 * @param pfnRendezvous The callback.
1692 * @param pvUser User argument for the callback.
1693 *
1694 * @thread EMT(pVCpu)
1695 */
1696static VBOXSTRICTRC vmmR3EmtRendezvousRecursive(PVM pVM, PVMCPU pVCpu, uint32_t fFlags,
1697 PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1698{
1699 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d\n", fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions));
1700 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1701 Assert(pVCpu->vmm.s.fInRendezvous);
1702
1703 /*
1704 * Save the current state.
1705 */
1706 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1707 uint32_t const cParentDone = pVM->vmm.s.cRendezvousEmtsDone;
1708 int32_t const iParentStatus = pVM->vmm.s.i32RendezvousStatus;
1709 PFNVMMEMTRENDEZVOUS const pfnParent = pVM->vmm.s.pfnRendezvous;
1710 void * const pvParentUser = pVM->vmm.s.pvRendezvousUser;
1711
1712 /*
1713 * Check preconditions and save the current state.
1714 */
1715 AssertReturn( (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1716 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1717 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1718 || (fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1719 VERR_INTERNAL_ERROR);
1720 AssertReturn(pVM->vmm.s.cRendezvousEmtsEntered == pVM->cCpus, VERR_INTERNAL_ERROR_2);
1721 AssertReturn(pVM->vmm.s.cRendezvousEmtsReturned == 0, VERR_INTERNAL_ERROR_3);
1722
1723 /*
1724 * Reset the recursion prep and pop semaphores.
1725 */
1726 int rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1727 AssertLogRelRCReturn(rc, rc);
1728 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1729 AssertLogRelRCReturn(rc, rc);
1730 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPushCaller);
1731 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1732 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller);
1733 AssertLogRelMsgReturn(rc == VERR_TIMEOUT, ("%Rrc\n", rc), RT_FAILURE_NP(rc) ? rc : VERR_IPE_UNEXPECTED_INFO_STATUS);
1734
1735 /*
1736 * Usher the other thread into the recursion routine.
1737 */
1738 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush, 0);
1739 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, true);
1740
1741 uint32_t cLeft = pVM->cCpus - (cParentDone + 1U);
1742 if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1743 while (cLeft-- > 0)
1744 {
1745 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1746 AssertLogRelRC(rc);
1747 }
1748 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1749 {
1750 Assert(cLeft == pVM->cCpus - (pVCpu->idCpu + 1U));
1751 for (VMCPUID iCpu = pVCpu->idCpu + 1U; iCpu < pVM->cCpus; iCpu++)
1752 {
1753 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu]);
1754 AssertLogRelRC(rc);
1755 }
1756 }
1757 else if ((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1758 {
1759 Assert(cLeft == pVCpu->idCpu);
1760 for (VMCPUID iCpu = pVCpu->idCpu; iCpu > 0; iCpu--)
1761 {
1762 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iCpu - 1U]);
1763 AssertLogRelRC(rc);
1764 }
1765 }
1766 else
1767 AssertLogRelReturn((fParentFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE,
1768 VERR_INTERNAL_ERROR_4);
1769
1770 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1771 AssertLogRelRC(rc);
1772 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1773 AssertLogRelRC(rc);
1774
1775
1776 /*
1777 * Wait for the EMTs to wake up and get out of the parent rendezvous code.
1778 */
1779 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPush) != pVM->cCpus)
1780 {
1781 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPushCaller, RT_INDEFINITE_WAIT);
1782 AssertLogRelRC(rc);
1783 }
1784
1785 ASMAtomicWriteBool(&pVM->vmm.s.fRendezvousRecursion, false);
1786
1787 /*
1788 * Clear the slate and setup the new rendezvous.
1789 */
1790 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1791 {
1792 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1793 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1794 }
1795 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1796 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1797 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1798 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1799
1800 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1801 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1802 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1803 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1804 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1805 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1806 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1807 ASMAtomicIncU32(&pVM->vmm.s.cRendezvousRecursions);
1808
1809 /*
1810 * We're ready to go now, do normal rendezvous processing.
1811 */
1812 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPush);
1813 AssertLogRelRC(rc);
1814
1815 VBOXSTRICTRC rcStrict = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /*fIsCaller*/, fFlags, pfnRendezvous, pvUser);
1816
1817 /*
1818 * The caller waits for the other EMTs to be done, return and waiting on the
1819 * pop semaphore.
1820 */
1821 for (;;)
1822 {
1823 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1824 AssertLogRelRC(rc);
1825 if (!pVM->vmm.s.fRendezvousRecursion)
1826 break;
1827 rcStrict = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict);
1828 }
1829
1830 /*
1831 * Get the return code and merge it with the above recursion status.
1832 */
1833 VBOXSTRICTRC rcStrict2 = pVM->vmm.s.i32RendezvousStatus;
1834 if ( rcStrict2 != VINF_SUCCESS
1835 && ( rcStrict == VINF_SUCCESS
1836 || rcStrict > rcStrict2))
1837 rcStrict = rcStrict2;
1838
1839 /*
1840 * Restore the parent rendezvous state.
1841 */
1842 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1843 {
1844 rc = vmmR3HlpResetEvent(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
1845 AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1846 }
1847 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousEnterOneByOne); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1848 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1849 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1850 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousDoneCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1851
1852 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, pVM->cCpus);
1853 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1854 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, cParentDone);
1855 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, iParentStatus);
1856 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fParentFlags);
1857 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvParentUser);
1858 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnParent);
1859
1860 /*
1861 * Usher the other EMTs back to their parent recursion routine, waiting
1862 * for them to all get there before we return (makes sure they've been
1863 * scheduled and are past the pop event sem, see below).
1864 */
1865 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop, 0);
1866 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousRecursionPop);
1867 AssertLogRelRC(rc);
1868
1869 if (ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsRecursingPop) != pVM->cCpus)
1870 {
1871 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousRecursionPopCaller, RT_INDEFINITE_WAIT);
1872 AssertLogRelRC(rc);
1873 }
1874
1875 /*
1876 * We must reset the pop semaphore on the way out (doing the pop caller too,
1877 * just in case). The parent may be another recursion.
1878 */
1879 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousRecursionPop); AssertLogRelRC(rc);
1880 rc = vmmR3HlpResetEvent(pVM->vmm.s.hEvtRendezvousRecursionPopCaller); AssertLogRelMsg(rc == VERR_TIMEOUT, ("%Rrc\n", rc));
1881
1882 ASMAtomicDecU32(&pVM->vmm.s.cRendezvousRecursions);
1883
1884 Log(("vmmR3EmtRendezvousRecursive: %#x EMT#%u depth=%d returns %Rrc\n",
1885 fFlags, pVCpu->idCpu, pVM->vmm.s.cRendezvousRecursions, VBOXSTRICTRC_VAL(rcStrict)));
1886 return rcStrict;
1887}
1888
1889
1890/**
1891 * EMT rendezvous.
1892 *
1893 * Gathers all the EMTs and execute some code on each of them, either in a one
1894 * by one fashion or all at once.
1895 *
1896 * @returns VBox strict status code. This will be the first error,
1897 * VINF_SUCCESS, or an EM scheduling status code.
1898 *
1899 * @retval VERR_DEADLOCK if recursion is attempted using a rendezvous type that
1900 * doesn't support it or if the recursion is too deep.
1901 *
1902 * @param pVM The cross context VM structure.
1903 * @param fFlags Flags indicating execution methods. See
1904 * grp_VMMR3EmtRendezvous_fFlags. The one-by-one,
1905 * descending and ascending rendezvous types support
1906 * recursion from inside @a pfnRendezvous.
1907 * @param pfnRendezvous The callback.
1908 * @param pvUser User argument for the callback.
1909 *
1910 * @thread Any.
1911 */
1912VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1913{
1914 /*
1915 * Validate input.
1916 */
1917 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1918 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1919 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1920 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1921 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1922 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1923 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1924 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1925
1926 VBOXSTRICTRC rcStrict;
1927 PVMCPU pVCpu = VMMGetCpu(pVM);
1928 if (!pVCpu)
1929 {
1930 /*
1931 * Forward the request to an EMT thread.
1932 */
1933 Log(("VMMR3EmtRendezvous: %#x non-EMT\n", fFlags));
1934 if (!(fFlags & VMMEMTRENDEZVOUS_FLAGS_PRIORITY))
1935 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1936 else
1937 rcStrict = VMR3ReqPriorityCallWait(pVM, VMCPUID_ANY, (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1938 Log(("VMMR3EmtRendezvous: %#x non-EMT returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1939 }
1940 else if ( pVM->cCpus == 1
1941 || ( pVM->enmVMState == VMSTATE_DESTROYING
1942 && VMR3GetActiveEmts(pVM->pUVM) < pVM->cCpus ) )
1943 {
1944 /*
1945 * Shortcut for the single EMT case.
1946 *
1947 * We also ends up here if EMT(0) (or others) tries to issue a rendezvous
1948 * during vmR3Destroy after other emulation threads have started terminating.
1949 */
1950 if (!pVCpu->vmm.s.fInRendezvous)
1951 {
1952 Log(("VMMR3EmtRendezvous: %#x EMT (uni)\n", fFlags));
1953 pVCpu->vmm.s.fInRendezvous = true;
1954 pVM->vmm.s.fRendezvousFlags = fFlags;
1955 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1956 pVCpu->vmm.s.fInRendezvous = false;
1957 }
1958 else
1959 {
1960 /* Recursion. Do the same checks as in the SMP case. */
1961 Log(("VMMR3EmtRendezvous: %#x EMT (uni), recursion depth=%d\n", fFlags, pVM->vmm.s.cRendezvousRecursions));
1962 uint32_t fType = pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK;
1963 AssertLogRelReturn( !pVCpu->vmm.s.fInRendezvous
1964 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1965 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1966 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1967 || fType == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1968 , VERR_DEADLOCK);
1969
1970 AssertLogRelReturn(pVM->vmm.s.cRendezvousRecursions < 3, VERR_DEADLOCK);
1971 pVM->vmm.s.cRendezvousRecursions++;
1972 uint32_t const fParentFlags = pVM->vmm.s.fRendezvousFlags;
1973 pVM->vmm.s.fRendezvousFlags = fFlags;
1974
1975 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1976
1977 pVM->vmm.s.fRendezvousFlags = fParentFlags;
1978 pVM->vmm.s.cRendezvousRecursions--;
1979 }
1980 Log(("VMMR3EmtRendezvous: %#x EMT (uni) returns %Rrc\n", fFlags, VBOXSTRICTRC_VAL(rcStrict)));
1981 }
1982 else
1983 {
1984 /*
1985 * Spin lock. If busy, check for recursion, if not recursing wait for
1986 * the other EMT to finish while keeping a lookout for the RENDEZVOUS FF.
1987 */
1988 int rc;
1989 rcStrict = VINF_SUCCESS;
1990 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1991 {
1992 /* Allow recursion in some cases. */
1993 if ( pVCpu->vmm.s.fInRendezvous
1994 && ( (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1995 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1996 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE
1997 || (pVM->vmm.s.fRendezvousFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE
1998 ))
1999 return VBOXSTRICTRC_TODO(vmmR3EmtRendezvousRecursive(pVM, pVCpu, fFlags, pfnRendezvous, pvUser));
2000
2001 AssertLogRelMsgReturn(!pVCpu->vmm.s.fInRendezvous, ("fRendezvousFlags=%#x\n", pVM->vmm.s.fRendezvousFlags),
2002 VERR_DEADLOCK);
2003
2004 Log(("VMMR3EmtRendezvous: %#x EMT#%u, waiting for lock...\n", fFlags, pVCpu->idCpu));
2005 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
2006 {
2007 if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
2008 {
2009 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
2010 if ( rc != VINF_SUCCESS
2011 && ( rcStrict == VINF_SUCCESS
2012 || rcStrict > rc))
2013 rcStrict = rc;
2014 /** @todo Perhaps deal with termination here? */
2015 }
2016 ASMNopPause();
2017 }
2018 }
2019
2020 Log(("VMMR3EmtRendezvous: %#x EMT#%u\n", fFlags, pVCpu->idCpu));
2021 Assert(!VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS));
2022 Assert(!pVCpu->vmm.s.fInRendezvous);
2023 pVCpu->vmm.s.fInRendezvous = true;
2024
2025 /*
2026 * Clear the slate and setup the rendezvous. This is a semaphore ping-pong orgy. :-)
2027 */
2028 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2029 {
2030 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
2031 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2032 }
2033 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2034 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
2035 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
2036 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
2037 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
2038 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
2039 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
2040 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
2041 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
2042 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
2043 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
2044
2045 /*
2046 * Set the FF and poke the other EMTs.
2047 */
2048 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
2049 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
2050
2051 /*
2052 * Do the same ourselves.
2053 */
2054 VBOXSTRICTRC rcStrict2 = vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
2055
2056 /*
2057 * The caller waits for the other EMTs to be done and return before doing
2058 * the cleanup. This makes away with wakeup / reset races we would otherwise
2059 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
2060 */
2061 for (;;)
2062 {
2063 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
2064 AssertLogRelRC(rc);
2065 if (!pVM->vmm.s.fRendezvousRecursion)
2066 break;
2067 rcStrict2 = vmmR3EmtRendezvousCommonRecursion(pVM, pVCpu, rcStrict2);
2068 }
2069
2070 /*
2071 * Get the return code and clean up a little bit.
2072 */
2073 VBOXSTRICTRC rcStrict3 = pVM->vmm.s.i32RendezvousStatus;
2074 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
2075
2076 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
2077 pVCpu->vmm.s.fInRendezvous = false;
2078
2079 /*
2080 * Merge rcStrict, rcStrict2 and rcStrict3.
2081 */
2082 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
2083 AssertRC(VBOXSTRICTRC_VAL(rcStrict2));
2084 if ( rcStrict2 != VINF_SUCCESS
2085 && ( rcStrict == VINF_SUCCESS
2086 || rcStrict > rcStrict2))
2087 rcStrict = rcStrict2;
2088 if ( rcStrict3 != VINF_SUCCESS
2089 && ( rcStrict == VINF_SUCCESS
2090 || rcStrict > rcStrict3))
2091 rcStrict = rcStrict3;
2092 Log(("VMMR3EmtRendezvous: %#x EMT#%u returns %Rrc\n", fFlags, pVCpu->idCpu, VBOXSTRICTRC_VAL(rcStrict)));
2093 }
2094
2095 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
2096 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
2097 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
2098 VERR_IPE_UNEXPECTED_INFO_STATUS);
2099 return VBOXSTRICTRC_VAL(rcStrict);
2100}
2101
2102
2103/**
2104 * Interface for vmR3SetHaltMethodU.
2105 *
2106 * @param pVCpu The cross context virtual CPU structure of the
2107 * calling EMT.
2108 * @param fMayHaltInRing0 The new state.
2109 * @param cNsSpinBlockThreshold The spin-vs-blocking threashold.
2110 * @thread EMT(pVCpu)
2111 *
2112 * @todo Move the EMT handling to VMM (or EM). I soooooo regret that VM
2113 * component.
2114 */
2115VMMR3_INT_DECL(void) VMMR3SetMayHaltInRing0(PVMCPU pVCpu, bool fMayHaltInRing0, uint32_t cNsSpinBlockThreshold)
2116{
2117 pVCpu->vmm.s.fMayHaltInRing0 = fMayHaltInRing0;
2118 pVCpu->vmm.s.cNsSpinBlockThreshold = cNsSpinBlockThreshold;
2119}
2120
2121
2122/**
2123 * Read from the ring 0 jump buffer stack.
2124 *
2125 * @returns VBox status code.
2126 *
2127 * @param pVM The cross context VM structure.
2128 * @param idCpu The ID of the source CPU context (for the address).
2129 * @param R0Addr Where to start reading.
2130 * @param pvBuf Where to store the data we've read.
2131 * @param cbRead The number of bytes to read.
2132 */
2133VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
2134{
2135 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
2136 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
2137 AssertReturn(cbRead < ~(size_t)0 / 2, VERR_INVALID_PARAMETER);
2138
2139 int rc;
2140#ifdef VMM_R0_SWITCH_STACK
2141 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
2142#else
2143 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
2144#endif
2145 if ( off < VMM_STACK_SIZE
2146 && off + cbRead <= VMM_STACK_SIZE)
2147 {
2148 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
2149 rc = VINF_SUCCESS;
2150 }
2151 else
2152 rc = VERR_INVALID_POINTER;
2153
2154 /* Supply the setjmp return RIP/EIP. */
2155 if ( pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation + sizeof(RTR0UINTPTR) > R0Addr
2156 && pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation < R0Addr + cbRead)
2157 {
2158 uint8_t const *pbSrc = (uint8_t const *)&pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue;
2159 size_t cbSrc = sizeof(pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcValue);
2160 size_t offDst = 0;
2161 if (R0Addr < pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2162 offDst = pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation - R0Addr;
2163 else if (R0Addr > pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation)
2164 {
2165 size_t offSrc = R0Addr - pVCpu->vmm.s.CallRing3JmpBufR0.UnwindRetPcLocation;
2166 Assert(offSrc < cbSrc);
2167 pbSrc -= offSrc;
2168 cbSrc -= offSrc;
2169 }
2170 if (cbSrc > cbRead - offDst)
2171 cbSrc = cbRead - offDst;
2172 memcpy((uint8_t *)pvBuf + offDst, pbSrc, cbSrc);
2173
2174 if (cbSrc == cbRead)
2175 rc = VINF_SUCCESS;
2176 }
2177
2178 return rc;
2179}
2180
2181
2182/**
2183 * Used by the DBGF stack unwinder to initialize the register state.
2184 *
2185 * @param pUVM The user mode VM handle.
2186 * @param idCpu The ID of the CPU being unwound.
2187 * @param pState The unwind state to initialize.
2188 */
2189VMMR3_INT_DECL(void) VMMR3InitR0StackUnwindState(PUVM pUVM, VMCPUID idCpu, struct RTDBGUNWINDSTATE *pState)
2190{
2191 PVMCPU pVCpu = VMMR3GetCpuByIdU(pUVM, idCpu);
2192 AssertReturnVoid(pVCpu);
2193
2194 /*
2195 * Locate the resume point on the stack.
2196 */
2197#ifdef VMM_R0_SWITCH_STACK
2198 uintptr_t off = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume - MMHyperCCToR0(pVCpu->pVMR3, pVCpu->vmm.s.pbEMTStackR3);
2199 AssertReturnVoid(off < VMM_STACK_SIZE);
2200#else
2201 uintptr_t off = 0;
2202#endif
2203
2204#ifdef RT_ARCH_AMD64
2205 /*
2206 * This code must match the .resume stuff in VMMR0JmpA-amd64.asm exactly.
2207 */
2208# ifdef VBOX_STRICT
2209 Assert(*(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2210 off += 8; /* RESUME_MAGIC */
2211# endif
2212# ifdef RT_OS_WINDOWS
2213 off += 0xa0; /* XMM6 thru XMM15 */
2214# endif
2215 pState->u.x86.uRFlags = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2216 off += 8;
2217 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2218 off += 8;
2219# ifdef RT_OS_WINDOWS
2220 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2221 off += 8;
2222 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2223 off += 8;
2224# endif
2225 pState->u.x86.auRegs[X86_GREG_x12] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2226 off += 8;
2227 pState->u.x86.auRegs[X86_GREG_x13] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2228 off += 8;
2229 pState->u.x86.auRegs[X86_GREG_x14] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2230 off += 8;
2231 pState->u.x86.auRegs[X86_GREG_x15] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2232 off += 8;
2233 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2234 off += 8;
2235 pState->uPc = *(uint64_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2236 off += 8;
2237
2238#elif defined(RT_ARCH_X86)
2239 /*
2240 * This code must match the .resume stuff in VMMR0JmpA-x86.asm exactly.
2241 */
2242# ifdef VBOX_STRICT
2243 Assert(*(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off] == UINT32_C(0x7eadf00d));
2244 off += 4; /* RESUME_MAGIC */
2245# endif
2246 pState->u.x86.uRFlags = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2247 off += 4;
2248 pState->u.x86.auRegs[X86_GREG_xBX] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2249 off += 4;
2250 pState->u.x86.auRegs[X86_GREG_xSI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2251 off += 4;
2252 pState->u.x86.auRegs[X86_GREG_xDI] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2253 off += 4;
2254 pState->u.x86.auRegs[X86_GREG_xBP] = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2255 off += 4;
2256 pState->uPc = *(uint32_t const *)&pVCpu->vmm.s.pbEMTStackR3[off];
2257 off += 4;
2258#else
2259# error "Port me"
2260#endif
2261
2262 /*
2263 * This is all we really need here, though the above helps if the assembly
2264 * doesn't contain unwind info (currently only on win/64, so that is useful).
2265 */
2266 pState->u.x86.auRegs[X86_GREG_xBP] = pVCpu->vmm.s.CallRing3JmpBufR0.SavedEbp;
2267 pState->u.x86.auRegs[X86_GREG_xSP] = pVCpu->vmm.s.CallRing3JmpBufR0.SpResume;
2268}
2269
2270
2271/**
2272 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2273 *
2274 * @returns VBox status code.
2275 * @param pVM The cross context VM structure.
2276 * @param uOperation Operation to execute.
2277 * @param u64Arg Constant argument.
2278 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2279 * details.
2280 */
2281VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2282{
2283 PVMCPU pVCpu = VMMGetCpu(pVM);
2284 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2285 return VMMR3CallR0Emt(pVM, pVCpu, (VMMR0OPERATION)uOperation, u64Arg, pReqHdr);
2286}
2287
2288
2289/**
2290 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2291 *
2292 * @returns VBox status code.
2293 * @param pVM The cross context VM structure.
2294 * @param pVCpu The cross context VM structure.
2295 * @param enmOperation Operation to execute.
2296 * @param u64Arg Constant argument.
2297 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2298 * details.
2299 */
2300VMMR3_INT_DECL(int) VMMR3CallR0Emt(PVM pVM, PVMCPU pVCpu, VMMR0OPERATION enmOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2301{
2302 int rc;
2303 for (;;)
2304 {
2305#ifdef NO_SUPCALLR0VMM
2306 rc = VERR_GENERAL_FAILURE;
2307#else
2308 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), pVCpu->idCpu, enmOperation, u64Arg, pReqHdr);
2309#endif
2310 /*
2311 * Flush the logs.
2312 */
2313#ifdef LOG_ENABLED
2314 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0LoggerR3, NULL);
2315#endif
2316 VMM_FLUSH_R0_LOG(pVCpu->vmm.s.pR0RelLoggerR3, RTLogRelGetDefaultInstance());
2317 if (rc != VINF_VMM_CALL_HOST)
2318 break;
2319 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2320 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2321 break;
2322 /* Resume R0 */
2323 }
2324
2325 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2326 ("enmOperation=%u rc=%Rrc\n", enmOperation, rc),
2327 VERR_IPE_UNEXPECTED_INFO_STATUS);
2328 return rc;
2329}
2330
2331
2332/**
2333 * Service a call to the ring-3 host code.
2334 *
2335 * @returns VBox status code.
2336 * @param pVM The cross context VM structure.
2337 * @param pVCpu The cross context virtual CPU structure.
2338 * @remarks Careful with critsects.
2339 */
2340static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2341{
2342 /*
2343 * We must also check for pending critsect exits or else we can deadlock
2344 * when entering other critsects here.
2345 */
2346 if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
2347 PDMCritSectBothFF(pVCpu);
2348
2349 switch (pVCpu->vmm.s.enmCallRing3Operation)
2350 {
2351 /*
2352 * Acquire a critical section.
2353 */
2354 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2355 {
2356 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2357 true /*fCallRing3*/);
2358 break;
2359 }
2360
2361 /*
2362 * Enter a r/w critical section exclusively.
2363 */
2364 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2365 {
2366 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2367 true /*fCallRing3*/);
2368 break;
2369 }
2370
2371 /*
2372 * Enter a r/w critical section shared.
2373 */
2374 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2375 {
2376 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2377 true /*fCallRing3*/);
2378 break;
2379 }
2380
2381 /*
2382 * Acquire the PDM lock.
2383 */
2384 case VMMCALLRING3_PDM_LOCK:
2385 {
2386 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2387 break;
2388 }
2389
2390 /*
2391 * Grow the PGM pool.
2392 */
2393 case VMMCALLRING3_PGM_POOL_GROW:
2394 {
2395 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM, pVCpu);
2396 break;
2397 }
2398
2399 /*
2400 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2401 */
2402 case VMMCALLRING3_PGM_MAP_CHUNK:
2403 {
2404 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2405 break;
2406 }
2407
2408 /*
2409 * Allocates more handy pages.
2410 */
2411 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2412 {
2413 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2414 break;
2415 }
2416
2417 /*
2418 * Allocates a large page.
2419 */
2420 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2421 {
2422 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2423 break;
2424 }
2425
2426 /*
2427 * Acquire the PGM lock.
2428 */
2429 case VMMCALLRING3_PGM_LOCK:
2430 {
2431 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2432 break;
2433 }
2434
2435 /*
2436 * Acquire the MM hypervisor heap lock.
2437 */
2438 case VMMCALLRING3_MMHYPER_LOCK:
2439 {
2440 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2441 break;
2442 }
2443
2444 /*
2445 * This is a noop. We just take this route to avoid unnecessary
2446 * tests in the loops.
2447 */
2448 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2449 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2450 LogAlways(("*FLUSH*\n"));
2451 break;
2452
2453 /*
2454 * Set the VM error message.
2455 */
2456 case VMMCALLRING3_VM_SET_ERROR:
2457 VMR3SetErrorWorker(pVM);
2458 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2459 break;
2460
2461 /*
2462 * Set the VM runtime error message.
2463 */
2464 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2465 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2466 break;
2467
2468 /*
2469 * Signal a ring 0 hypervisor assertion.
2470 * Cancel the longjmp operation that's in progress.
2471 */
2472 case VMMCALLRING3_VM_R0_ASSERTION:
2473 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2474 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2475#ifdef RT_ARCH_X86
2476 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2477#else
2478 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2479#endif
2480#ifdef VMM_R0_SWITCH_STACK
2481 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2482#endif
2483 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2484 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2485 return VERR_VMM_RING0_ASSERTION;
2486
2487 /*
2488 * A forced switch to ring 0 for preemption purposes.
2489 */
2490 case VMMCALLRING3_VM_R0_PREEMPT:
2491 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2492 break;
2493
2494 default:
2495 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2496 return VERR_VMM_UNKNOWN_RING3_CALL;
2497 }
2498
2499 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2500 return VINF_SUCCESS;
2501}
2502
2503
2504/**
2505 * Displays the Force action Flags.
2506 *
2507 * @param pVM The cross context VM structure.
2508 * @param pHlp The output helpers.
2509 * @param pszArgs The additional arguments (ignored).
2510 */
2511static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2512{
2513 int c;
2514 uint32_t f;
2515 NOREF(pszArgs);
2516
2517#define PRINT_FLAG(prf,flag) do { \
2518 if (f & (prf##flag)) \
2519 { \
2520 static const char *s_psz = #flag; \
2521 if (!(c % 6)) \
2522 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2523 else \
2524 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2525 c++; \
2526 f &= ~(prf##flag); \
2527 } \
2528 } while (0)
2529
2530#define PRINT_GROUP(prf,grp,sfx) do { \
2531 if (f & (prf##grp##sfx)) \
2532 { \
2533 static const char *s_psz = #grp; \
2534 if (!(c % 5)) \
2535 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2536 else \
2537 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2538 c++; \
2539 } \
2540 } while (0)
2541
2542 /*
2543 * The global flags.
2544 */
2545 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2546 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2547
2548 /* show the flag mnemonics */
2549 c = 0;
2550 f = fGlobalForcedActions;
2551 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2552 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2553 PRINT_FLAG(VM_FF_,PDM_DMA);
2554 PRINT_FLAG(VM_FF_,DBGF);
2555 PRINT_FLAG(VM_FF_,REQUEST);
2556 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2557 PRINT_FLAG(VM_FF_,RESET);
2558 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2559 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2560 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2561 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2562 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2563 if (f)
2564 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2565 else
2566 pHlp->pfnPrintf(pHlp, "\n");
2567
2568 /* the groups */
2569 c = 0;
2570 f = fGlobalForcedActions;
2571 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2572 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2573 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2574 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2575 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2576 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2577 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2578 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2579 if (c)
2580 pHlp->pfnPrintf(pHlp, "\n");
2581
2582 /*
2583 * Per CPU flags.
2584 */
2585 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2586 {
2587 PVMCPU pVCpu = pVM->apCpusR3[i];
2588 const uint64_t fLocalForcedActions = pVCpu->fLocalForcedActions;
2589 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX64", i, fLocalForcedActions);
2590
2591 /* show the flag mnemonics */
2592 c = 0;
2593 f = fLocalForcedActions;
2594 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2595 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2596 PRINT_FLAG(VMCPU_FF_,TIMER);
2597 PRINT_FLAG(VMCPU_FF_,INTERRUPT_NMI);
2598 PRINT_FLAG(VMCPU_FF_,INTERRUPT_SMI);
2599 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2600 PRINT_FLAG(VMCPU_FF_,UNHALT);
2601 PRINT_FLAG(VMCPU_FF_,IEM);
2602 PRINT_FLAG(VMCPU_FF_,UPDATE_APIC);
2603 PRINT_FLAG(VMCPU_FF_,DBGF);
2604 PRINT_FLAG(VMCPU_FF_,REQUEST);
2605 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_CR3);
2606 PRINT_FLAG(VMCPU_FF_,HM_UPDATE_PAE_PDPES);
2607 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2608 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2609 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2610 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2611 PRINT_FLAG(VMCPU_FF_,BLOCK_NMIS);
2612 PRINT_FLAG(VMCPU_FF_,TO_R3);
2613 PRINT_FLAG(VMCPU_FF_,IOM);
2614 if (f)
2615 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX64\n", c ? "," : "", f);
2616 else
2617 pHlp->pfnPrintf(pHlp, "\n");
2618
2619 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2620 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(pVCpu));
2621
2622 /* the groups */
2623 c = 0;
2624 f = fLocalForcedActions;
2625 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2626 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2627 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2628 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2629 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2630 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2631 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2632 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2633 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2634 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2635 if (c)
2636 pHlp->pfnPrintf(pHlp, "\n");
2637 }
2638
2639#undef PRINT_FLAG
2640#undef PRINT_GROUP
2641}
2642
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