VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/TRPM.cpp@ 98103

Last change on this file since 98103 was 98103, checked in by vboxsync, 17 months ago

Copyright year updates by scm.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 17.0 KB
Line 
1/* $Id: TRPM.cpp 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28/** @page pg_trpm TRPM - The Trap Monitor
29 *
30 * The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
31 * the VMM. It plays a major role in raw-mode execution and a lesser one in the
32 * hardware assisted mode.
33 *
34 * Note first, the following will use trap as a collective term for faults,
35 * aborts and traps.
36 *
37 * @see grp_trpm
38 *
39 *
40 * @section sec_trpm_rc Raw-Mode Context
41 *
42 * When executing in the raw-mode context, TRPM will be managing the IDT and
43 * processing all traps and interrupts. It will also monitor the guest IDT
44 * because CSAM wishes to know about changes to it (trap/interrupt/syscall
45 * handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
46 * considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
47 *
48 * External interrupts will be forwarded to the host context by the quickest
49 * possible route where they will be reasserted. The other events will be
50 * categorized into virtualization traps, genuine guest traps and hypervisor
51 * traps. The latter group may be recoverable depending on when they happen and
52 * whether there is a handler for it, otherwise it will cause a guru meditation.
53 *
54 * TRPM distinguishes the between the first two (virt and guest traps) and the
55 * latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
56 * it's a hyper trap otherwise it's a virt/guest trap. There are three trap
57 * dispatcher tables, one ad-hoc for one time traps registered via
58 * TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
59 * The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
60 *
61 * The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
62 * part), will call up the other VMM sub-systems depending on what it things
63 * happens. The two most busy traps are page faults (\#PF) and general
64 * protection fault/trap (\#GP).
65 *
66 * Before resuming guest code after having taken a virtualization trap or
67 * injected a guest trap, TRPM will check for pending forced action and
68 * every now and again let TM check for timed out timers. This allows code that
69 * is being executed as part of virtualization traps to signal ring-3 exits,
70 * page table resyncs and similar without necessarily using the status code. It
71 * also make sure we're more responsive to timers and requests from other
72 * threads (necessarily running on some different core/cpu in most cases).
73 *
74 *
75 * @section sec_trpm_all All Contexts
76 *
77 * TRPM will also dispatch / inject interrupts and traps to the guest, both when
78 * in raw-mode and when in hardware assisted mode. See TRPMInject().
79 *
80 */
81
82
83/*********************************************************************************************************************************
84* Header Files *
85*********************************************************************************************************************************/
86#define LOG_GROUP LOG_GROUP_TRPM
87#include <VBox/vmm/trpm.h>
88#include <VBox/vmm/cpum.h>
89#include <VBox/vmm/selm.h>
90#include <VBox/vmm/ssm.h>
91#include <VBox/vmm/pdmapi.h>
92#include <VBox/vmm/em.h>
93#include <VBox/vmm/pgm.h>
94#include <VBox/vmm/dbgf.h>
95#include <VBox/vmm/mm.h>
96#include <VBox/vmm/stam.h>
97#include <VBox/vmm/iem.h>
98#include "TRPMInternal.h"
99#include <VBox/vmm/vm.h>
100#include <VBox/vmm/em.h>
101#include <VBox/vmm/hm.h>
102
103#include <VBox/err.h>
104#include <VBox/param.h>
105#include <VBox/log.h>
106#include <iprt/assert.h>
107#include <iprt/asm.h>
108#include <iprt/string.h>
109#include <iprt/alloc.h>
110
111
112/*********************************************************************************************************************************
113* Defined Constants And Macros *
114*********************************************************************************************************************************/
115/** TRPM saved state version. */
116#define TRPM_SAVED_STATE_VERSION 10
117#define TRPM_SAVED_STATE_VERSION_PRE_ICEBP 9 /* INT1/ICEBP support bumped the version */
118#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
119
120
121/*********************************************************************************************************************************
122* Internal Functions *
123*********************************************************************************************************************************/
124static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
125static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
126static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
127
128
129/**
130 * Initializes the Trap Manager
131 *
132 * @returns VBox status code.
133 * @param pVM The cross context VM structure.
134 */
135VMMR3DECL(int) TRPMR3Init(PVM pVM)
136{
137 LogFlow(("TRPMR3Init\n"));
138 int rc;
139
140 /*
141 * Assert sizes and alignments.
142 */
143 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
144
145 /*
146 * Initialize members.
147 */
148 for (VMCPUID i = 0; i < pVM->cCpus; i++)
149 {
150 PVMCPU pVCpu = pVM->apCpusR3[i];
151 pVCpu->trpm.s.uActiveVector = ~0U;
152 }
153
154 /*
155 * Register the saved state data unit.
156 */
157 rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
158 NULL, NULL, NULL,
159 NULL, trpmR3Save, NULL,
160 NULL, trpmR3Load, NULL);
161 if (RT_FAILURE(rc))
162 return rc;
163
164 /*
165 * Register info handlers.
166 */
167 rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
168 DBGFINFO_FLAGS_ALL_EMTS);
169 AssertRCReturn(rc, rc);
170
171 /*
172 * Statistics.
173 */
174 for (unsigned i = 0; i < 256; i++)
175 STAMR3RegisterF(pVM, &pVM->trpm.s.aStatForwardedIRQ[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,
176 "Forwarded interrupts.", i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
177
178 return 0;
179}
180
181
182/**
183 * Applies relocations to data and code managed by this component.
184 *
185 * This function will be called at init and whenever the VMM need
186 * to relocate itself inside the GC.
187 *
188 * @param pVM The cross context VM structure.
189 * @param offDelta Relocation delta relative to old location.
190 */
191VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
192{
193 RT_NOREF(pVM, offDelta);
194}
195
196
197/**
198 * Terminates the Trap Manager
199 *
200 * @returns VBox status code.
201 * @param pVM The cross context VM structure.
202 */
203VMMR3DECL(int) TRPMR3Term(PVM pVM)
204{
205 NOREF(pVM);
206 return VINF_SUCCESS;
207}
208
209
210/**
211 * Resets a virtual CPU.
212 *
213 * Used by TRPMR3Reset and CPU hot plugging.
214 *
215 * @param pVCpu The cross context virtual CPU structure.
216 */
217VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
218{
219 pVCpu->trpm.s.uActiveVector = ~0U;
220}
221
222
223/**
224 * The VM is being reset.
225 *
226 * For the TRPM component this means that any IDT write monitors
227 * needs to be removed, any pending trap cleared, and the IDT reset.
228 *
229 * @param pVM The cross context VM structure.
230 */
231VMMR3DECL(void) TRPMR3Reset(PVM pVM)
232{
233 /*
234 * Reinitialize other members calling the relocator to get things right.
235 */
236 for (VMCPUID i = 0; i < pVM->cCpus; i++)
237 TRPMR3ResetCpu(pVM->apCpusR3[i]);
238 TRPMR3Relocate(pVM, 0);
239}
240
241
242/**
243 * Execute state save operation.
244 *
245 * @returns VBox status code.
246 * @param pVM The cross context VM structure.
247 * @param pSSM SSM operation handle.
248 */
249static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
250{
251 LogFlow(("trpmR3Save:\n"));
252
253 for (VMCPUID i = 0; i < pVM->cCpus; i++)
254 {
255 PCTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
256 SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
257 SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
258 SSMR3PutU32(pSSM, pTrpmCpu->uActiveErrorCode);
259 SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
260 SSMR3PutU8(pSSM, pTrpmCpu->cbInstr);
261 SSMR3PutBool(pSSM, pTrpmCpu->fIcebp);
262 }
263 return VINF_SUCCESS;
264}
265
266
267/**
268 * Execute state load operation.
269 *
270 * @returns VBox status code.
271 * @param pVM The cross context VM structure.
272 * @param pSSM SSM operation handle.
273 * @param uVersion Data layout version.
274 * @param uPass The data pass.
275 */
276static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
277{
278 LogFlow(("trpmR3Load:\n"));
279 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
280
281 /*
282 * Validate version.
283 */
284 if ( uVersion != TRPM_SAVED_STATE_VERSION
285 && uVersion != TRPM_SAVED_STATE_VERSION_PRE_ICEBP
286 && uVersion != TRPM_SAVED_STATE_VERSION_UNI)
287 {
288 AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
289 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
290 }
291
292 if (uVersion == TRPM_SAVED_STATE_VERSION)
293 {
294 for (VMCPUID i = 0; i < pVM->cCpus; i++)
295 {
296 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
297 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
298 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
299 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveErrorCode);
300 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
301 SSMR3GetU8(pSSM, &pTrpmCpu->cbInstr);
302 SSMR3GetBool(pSSM, &pTrpmCpu->fIcebp);
303 }
304 }
305 else
306 {
307 /*
308 * Active and saved traps.
309 */
310 if (uVersion == TRPM_SAVED_STATE_VERSION_PRE_ICEBP)
311 {
312 for (VMCPUID i = 0; i < pVM->cCpus; i++)
313 {
314 RTGCUINT GCUIntErrCode;
315 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
316 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
317 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
318 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
319 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
320 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedVector - No longer used. */
321 SSMR3Skip(pSSM, sizeof(RTUINT)); /* enmSavedType - No longer used. */
322 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedErrorCode - No longer used. */
323 SSMR3Skip(pSSM, sizeof(RTGCUINTPTR)); /* uSavedCR2 - No longer used. */
324 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uPrevVector - No longer used. */
325
326 /*
327 * We lose the high 64-bits here (if RTGCUINT is 64-bit) after making the
328 * active error code as 32-bits. However, for error codes even 16-bit should
329 * be sufficient. Despite this, we decided to use and keep it at 32-bits
330 * since VMX/SVM defines these as 32-bit in their event fields and converting
331 * to/from these events are safer.
332 */
333 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
334 }
335 }
336 else
337 {
338 RTGCUINT GCUIntErrCode;
339 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
340 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
341 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
342 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
343 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
344 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
345 }
346
347 /*
348 * Skip rest of TRPM saved-state unit involving IDT and trampoline gates.
349 * With the removal of raw-mode support, we no longer need these.
350 */
351 SSMR3SkipToEndOfUnit(pSSM);
352 }
353
354 return VINF_SUCCESS;
355}
356
357
358/**
359 * Inject event (such as external irq or trap).
360 *
361 * @returns VBox status code.
362 * @param pVM The cross context VM structure.
363 * @param pVCpu The cross context virtual CPU structure.
364 * @param enmEvent Trpm event type
365 * @param pfInjected Where to store whether the event was injected or not.
366 */
367VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
368{
369 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
370 Assert(!CPUMIsInInterruptShadow(pCtx));
371 Assert(pfInjected);
372 *pfInjected = false;
373
374 /* Currently only useful for external hardware interrupts. */
375 Assert(enmEvent == TRPM_HARDWARE_INT);
376
377 RT_NOREF3(pVM, enmEvent, pCtx);
378 uint8_t u8Interrupt = 0;
379 int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
380 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
381 if (RT_SUCCESS(rc))
382 {
383 *pfInjected = true;
384#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
385 if ( CPUMIsGuestInVmxNonRootMode(pCtx)
386 && CPUMIsGuestVmxInterceptEvents(pCtx)
387 && CPUMIsGuestVmxPinCtlsSet(pCtx, VMX_PIN_CTLS_EXT_INT_EXIT))
388 {
389 VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
390 Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
391 return VBOXSTRICTRC_VAL(rcStrict);
392 }
393#endif
394#ifdef RT_OS_WINDOWS
395 if (!VM_IS_NEM_ENABLED(pVM))
396 {
397#endif
398 rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
399 AssertRC(rc);
400#ifdef RT_OS_WINDOWS
401 }
402 else
403 {
404 VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
405 /** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
406 * If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
407 if (rcStrict != VINF_SUCCESS)
408 return VBOXSTRICTRC_TODO(rcStrict);
409 }
410#endif
411 STAM_REL_COUNTER_INC(&pVM->trpm.s.aStatForwardedIRQ[u8Interrupt]);
412 }
413 else
414 {
415 /* Can happen if the interrupt is masked by TPR or APIC is disabled. */
416 AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR || rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
417 }
418 return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
419 : VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
420 : VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
421}
422
423
424/**
425 * Displays the pending TRPM event.
426 *
427 * @param pVM The cross context VM structure.
428 * @param pHlp The info helper functions.
429 * @param pszArgs Arguments, ignored.
430 */
431static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
432{
433 NOREF(pszArgs);
434 PVMCPU pVCpu = VMMGetCpu(pVM);
435 if (!pVCpu)
436 pVCpu = pVM->apCpusR3[0];
437
438 uint8_t uVector;
439 uint8_t cbInstr;
440 TRPMEVENT enmTrapEvent;
441 uint32_t uErrorCode;
442 RTGCUINTPTR uCR2;
443 bool fIcebp;
444 int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr, &fIcebp);
445 if (RT_SUCCESS(rc))
446 {
447 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
448 static const char * const s_apszTrpmEventType[] =
449 {
450 "Trap",
451 "Hardware Int",
452 "Software Int"
453 };
454 if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
455 {
456 pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
457 pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
458 pHlp->pfnPrintf(pHlp, " uErrorCode = %#x\n", uErrorCode);
459 pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
460 pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
461 pHlp->pfnPrintf(pHlp, " fIcebp = %RTbool\n", fIcebp);
462 }
463 else
464 pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
465 }
466 else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
467 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
468 else
469 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
470}
471
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use