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source: vbox/trunk/src/VBox/VMM/VMMR3/TRPM.cpp@ 84044

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1/* $Id: TRPM.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
2/** @file
3 * TRPM - The Trap Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_trpm TRPM - The Trap Monitor
19 *
20 * The Trap Monitor (TRPM) is responsible for all trap and interrupt handling in
21 * the VMM. It plays a major role in raw-mode execution and a lesser one in the
22 * hardware assisted mode.
23 *
24 * Note first, the following will use trap as a collective term for faults,
25 * aborts and traps.
26 *
27 * @see grp_trpm
28 *
29 *
30 * @section sec_trpm_rc Raw-Mode Context
31 *
32 * When executing in the raw-mode context, TRPM will be managing the IDT and
33 * processing all traps and interrupts. It will also monitor the guest IDT
34 * because CSAM wishes to know about changes to it (trap/interrupt/syscall
35 * handler patching) and TRPM needs to keep the \#BP gate in sync (ring-3
36 * considerations). See TRPMR3SyncIDT and CSAMR3CheckGates.
37 *
38 * External interrupts will be forwarded to the host context by the quickest
39 * possible route where they will be reasserted. The other events will be
40 * categorized into virtualization traps, genuine guest traps and hypervisor
41 * traps. The latter group may be recoverable depending on when they happen and
42 * whether there is a handler for it, otherwise it will cause a guru meditation.
43 *
44 * TRPM distinguishes the between the first two (virt and guest traps) and the
45 * latter (hyper) by checking the CPL of the trapping code, if CPL == 0 then
46 * it's a hyper trap otherwise it's a virt/guest trap. There are three trap
47 * dispatcher tables, one ad-hoc for one time traps registered via
48 * TRPMGCSetTempHandler(), one for hyper traps and one for virt/guest traps.
49 * The latter two live in TRPMGCHandlersA.asm, the former in the VM structure.
50 *
51 * The raw-mode context trap handlers found in TRPMGCHandlers.cpp (for the most
52 * part), will call up the other VMM sub-systems depending on what it things
53 * happens. The two most busy traps are page faults (\#PF) and general
54 * protection fault/trap (\#GP).
55 *
56 * Before resuming guest code after having taken a virtualization trap or
57 * injected a guest trap, TRPM will check for pending forced action and
58 * every now and again let TM check for timed out timers. This allows code that
59 * is being executed as part of virtualization traps to signal ring-3 exits,
60 * page table resyncs and similar without necessarily using the status code. It
61 * also make sure we're more responsive to timers and requests from other
62 * threads (necessarily running on some different core/cpu in most cases).
63 *
64 *
65 * @section sec_trpm_all All Contexts
66 *
67 * TRPM will also dispatch / inject interrupts and traps to the guest, both when
68 * in raw-mode and when in hardware assisted mode. See TRPMInject().
69 *
70 */
71
72
73/*********************************************************************************************************************************
74* Header Files *
75*********************************************************************************************************************************/
76#define LOG_GROUP LOG_GROUP_TRPM
77#include <VBox/vmm/trpm.h>
78#include <VBox/vmm/cpum.h>
79#include <VBox/vmm/selm.h>
80#include <VBox/vmm/ssm.h>
81#include <VBox/vmm/pdmapi.h>
82#include <VBox/vmm/em.h>
83#include <VBox/vmm/pgm.h>
84#include <VBox/vmm/dbgf.h>
85#include <VBox/vmm/mm.h>
86#include <VBox/vmm/stam.h>
87#include <VBox/vmm/iem.h>
88#include "TRPMInternal.h"
89#include <VBox/vmm/vm.h>
90#include <VBox/vmm/em.h>
91#include <VBox/vmm/hm.h>
92
93#include <VBox/err.h>
94#include <VBox/param.h>
95#include <VBox/log.h>
96#include <iprt/assert.h>
97#include <iprt/asm.h>
98#include <iprt/string.h>
99#include <iprt/alloc.h>
100
101
102/*********************************************************************************************************************************
103* Defined Constants And Macros *
104*********************************************************************************************************************************/
105/** TRPM saved state version. */
106#define TRPM_SAVED_STATE_VERSION 10
107#define TRPM_SAVED_STATE_VERSION_PRE_ICEBP 9 /* INT1/ICEBP support bumped the version */
108#define TRPM_SAVED_STATE_VERSION_UNI 8 /* SMP support bumped the version */
109
110
111/*********************************************************************************************************************************
112* Internal Functions *
113*********************************************************************************************************************************/
114static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
115static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
116static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
117
118
119/**
120 * Initializes the Trap Manager
121 *
122 * @returns VBox status code.
123 * @param pVM The cross context VM structure.
124 */
125VMMR3DECL(int) TRPMR3Init(PVM pVM)
126{
127 LogFlow(("TRPMR3Init\n"));
128 int rc;
129
130 /*
131 * Assert sizes and alignments.
132 */
133 AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
134
135 /*
136 * Initialize members.
137 */
138 for (VMCPUID i = 0; i < pVM->cCpus; i++)
139 {
140 PVMCPU pVCpu = pVM->apCpusR3[i];
141 pVCpu->trpm.s.uActiveVector = ~0U;
142 }
143
144 /*
145 * Register the saved state data unit.
146 */
147 rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
148 NULL, NULL, NULL,
149 NULL, trpmR3Save, NULL,
150 NULL, trpmR3Load, NULL);
151 if (RT_FAILURE(rc))
152 return rc;
153
154 /*
155 * Register info handlers.
156 */
157 rc = DBGFR3InfoRegisterInternalEx(pVM, "trpmevent", "Dumps TRPM pending event.", trpmR3InfoEvent,
158 DBGFINFO_FLAGS_ALL_EMTS);
159 AssertRCReturn(rc, rc);
160
161 /*
162 * Statistics.
163 */
164#ifdef VBOX_WITH_STATISTICS
165 rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 256, sizeof(STAMCOUNTER), MM_TAG_TRPM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
166 AssertRCReturn(rc, rc);
167 for (unsigned i = 0; i < 256; i++)
168 STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
169 i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
170#endif
171
172 return 0;
173}
174
175
176/**
177 * Applies relocations to data and code managed by this component.
178 *
179 * This function will be called at init and whenever the VMM need
180 * to relocate itself inside the GC.
181 *
182 * @param pVM The cross context VM structure.
183 * @param offDelta Relocation delta relative to old location.
184 */
185VMMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
186{
187 RT_NOREF(pVM, offDelta);
188}
189
190
191/**
192 * Terminates the Trap Manager
193 *
194 * @returns VBox status code.
195 * @param pVM The cross context VM structure.
196 */
197VMMR3DECL(int) TRPMR3Term(PVM pVM)
198{
199 NOREF(pVM);
200 return VINF_SUCCESS;
201}
202
203
204/**
205 * Resets a virtual CPU.
206 *
207 * Used by TRPMR3Reset and CPU hot plugging.
208 *
209 * @param pVCpu The cross context virtual CPU structure.
210 */
211VMMR3DECL(void) TRPMR3ResetCpu(PVMCPU pVCpu)
212{
213 pVCpu->trpm.s.uActiveVector = ~0U;
214}
215
216
217/**
218 * The VM is being reset.
219 *
220 * For the TRPM component this means that any IDT write monitors
221 * needs to be removed, any pending trap cleared, and the IDT reset.
222 *
223 * @param pVM The cross context VM structure.
224 */
225VMMR3DECL(void) TRPMR3Reset(PVM pVM)
226{
227 /*
228 * Reinitialize other members calling the relocator to get things right.
229 */
230 for (VMCPUID i = 0; i < pVM->cCpus; i++)
231 TRPMR3ResetCpu(pVM->apCpusR3[i]);
232 TRPMR3Relocate(pVM, 0);
233}
234
235
236/**
237 * Execute state save operation.
238 *
239 * @returns VBox status code.
240 * @param pVM The cross context VM structure.
241 * @param pSSM SSM operation handle.
242 */
243static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
244{
245 LogFlow(("trpmR3Save:\n"));
246
247 for (VMCPUID i = 0; i < pVM->cCpus; i++)
248 {
249 PCTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
250 SSMR3PutUInt(pSSM, pTrpmCpu->uActiveVector);
251 SSMR3PutUInt(pSSM, pTrpmCpu->enmActiveType);
252 SSMR3PutU32(pSSM, pTrpmCpu->uActiveErrorCode);
253 SSMR3PutGCUIntPtr(pSSM, pTrpmCpu->uActiveCR2);
254 SSMR3PutU8(pSSM, pTrpmCpu->cbInstr);
255 SSMR3PutBool(pSSM, pTrpmCpu->fIcebp);
256 }
257 return VINF_SUCCESS;
258}
259
260
261/**
262 * Execute state load operation.
263 *
264 * @returns VBox status code.
265 * @param pVM The cross context VM structure.
266 * @param pSSM SSM operation handle.
267 * @param uVersion Data layout version.
268 * @param uPass The data pass.
269 */
270static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
271{
272 LogFlow(("trpmR3Load:\n"));
273 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
274
275 /*
276 * Validate version.
277 */
278 if ( uVersion != TRPM_SAVED_STATE_VERSION
279 && uVersion != TRPM_SAVED_STATE_VERSION_PRE_ICEBP
280 && uVersion != TRPM_SAVED_STATE_VERSION_UNI)
281 {
282 AssertMsgFailed(("trpmR3Load: Invalid version uVersion=%d!\n", uVersion));
283 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
284 }
285
286 if (uVersion == TRPM_SAVED_STATE_VERSION)
287 {
288 for (VMCPUID i = 0; i < pVM->cCpus; i++)
289 {
290 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
291 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
292 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
293 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveErrorCode);
294 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
295 SSMR3GetU8(pSSM, &pTrpmCpu->cbInstr);
296 SSMR3GetBool(pSSM, &pTrpmCpu->fIcebp);
297 }
298 }
299 else
300 {
301 /*
302 * Active and saved traps.
303 */
304 if (uVersion == TRPM_SAVED_STATE_VERSION_PRE_ICEBP)
305 {
306 for (VMCPUID i = 0; i < pVM->cCpus; i++)
307 {
308 RTGCUINT GCUIntErrCode;
309 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[i]->trpm.s;
310 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
311 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
312 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
313 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
314 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedVector - No longer used. */
315 SSMR3Skip(pSSM, sizeof(RTUINT)); /* enmSavedType - No longer used. */
316 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uSavedErrorCode - No longer used. */
317 SSMR3Skip(pSSM, sizeof(RTGCUINTPTR)); /* uSavedCR2 - No longer used. */
318 SSMR3Skip(pSSM, sizeof(RTGCUINT)); /* uPrevVector - No longer used. */
319
320 /*
321 * We lose the high 64-bits here (if RTGCUINT is 64-bit) after making the
322 * active error code as 32-bits. However, for error codes even 16-bit should
323 * be sufficient. Despite this, we decided to use and keep it at 32-bits
324 * since VMX/SVM defines these as 32-bit in their event fields and converting
325 * to/from these events are safer.
326 */
327 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
328 }
329 }
330 else
331 {
332 RTGCUINT GCUIntErrCode;
333 PTRPMCPU pTrpmCpu = &pVM->apCpusR3[0]->trpm.s;
334 SSMR3GetU32(pSSM, &pTrpmCpu->uActiveVector);
335 SSM_GET_ENUM32_RET(pSSM, pTrpmCpu->enmActiveType, TRPMEVENT);
336 SSMR3GetGCUInt(pSSM, &GCUIntErrCode);
337 SSMR3GetGCUIntPtr(pSSM, &pTrpmCpu->uActiveCR2);
338 pTrpmCpu->uActiveErrorCode = GCUIntErrCode;
339 }
340
341 /*
342 * Skip rest of TRPM saved-state unit involving IDT and trampoline gates.
343 * With the removal of raw-mode support, we no longer need these.
344 */
345 SSMR3SkipToEndOfUnit(pSSM);
346 }
347
348 return VINF_SUCCESS;
349}
350
351
352/**
353 * Inject event (such as external irq or trap).
354 *
355 * @returns VBox status code.
356 * @param pVM The cross context VM structure.
357 * @param pVCpu The cross context virtual CPU structure.
358 * @param enmEvent Trpm event type
359 * @param pfInjected Where to store whether the event was injected or not.
360 */
361VMMR3DECL(int) TRPMR3InjectEvent(PVM pVM, PVMCPU pVCpu, TRPMEVENT enmEvent, bool *pfInjected)
362{
363 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
364 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
365 Assert(pfInjected);
366 *pfInjected = false;
367
368 /* Currently only useful for external hardware interrupts. */
369 Assert(enmEvent == TRPM_HARDWARE_INT);
370
371 RT_NOREF3(pVM, enmEvent, pCtx);
372 uint8_t u8Interrupt = 0;
373 int rc = PDMGetInterrupt(pVCpu, &u8Interrupt);
374 Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Rrc\n", u8Interrupt, u8Interrupt, rc));
375 if (RT_SUCCESS(rc))
376 {
377 *pfInjected = true;
378#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
379 if ( CPUMIsGuestInVmxNonRootMode(pCtx)
380 && CPUMIsGuestVmxInterceptEvents(pCtx)
381 && CPUMIsGuestVmxPinCtlsSet(pCtx, VMX_PIN_CTLS_EXT_INT_EXIT)
382 && CPUMIsGuestVmxExitCtlsSet(pCtx, VMX_EXIT_CTLS_ACK_EXT_INT))
383 {
384 VBOXSTRICTRC rcStrict = IEMExecVmxVmexitExtInt(pVCpu, u8Interrupt, false /* fIntPending */);
385 Assert(rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE);
386 return VBOXSTRICTRC_VAL(rcStrict);
387 }
388#endif
389 if (!VM_IS_NEM_ENABLED(pVM))
390 {
391 rc = TRPMAssertTrap(pVCpu, u8Interrupt, TRPM_HARDWARE_INT);
392 AssertRC(rc);
393 }
394 else
395 {
396 VBOXSTRICTRC rcStrict = IEMInjectTrap(pVCpu, u8Interrupt, enmEvent, 0, 0, 0);
397 /** @todo NSTVMX: NSTSVM: We don't support nested VMX or nested SVM with NEM yet.
398 * If so we should handle VINF_SVM_VMEXIT and VINF_VMX_VMEXIT codes here. */
399 if (rcStrict != VINF_SUCCESS)
400 return VBOXSTRICTRC_TODO(rcStrict);
401 }
402 STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
403 }
404 else
405 {
406 /* Can happen if the interrupt is masked by TPR or APIC is disabled. */
407 AssertMsg(rc == VERR_APIC_INTR_MASKED_BY_TPR || rc == VERR_NO_DATA, ("PDMGetInterrupt failed. rc=%Rrc\n", rc));
408 }
409 return HMR3IsActive(pVCpu) ? VINF_EM_RESCHEDULE_HM
410 : VM_IS_NEM_ENABLED(pVM) ? VINF_EM_RESCHEDULE
411 : VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
412}
413
414
415/**
416 * Displays the pending TRPM event.
417 *
418 * @param pVM The cross context VM structure.
419 * @param pHlp The info helper functions.
420 * @param pszArgs Arguments, ignored.
421 */
422static DECLCALLBACK(void) trpmR3InfoEvent(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
423{
424 NOREF(pszArgs);
425 PVMCPU pVCpu = VMMGetCpu(pVM);
426 if (!pVCpu)
427 pVCpu = pVM->apCpusR3[0];
428
429 uint8_t uVector;
430 uint8_t cbInstr;
431 TRPMEVENT enmTrapEvent;
432 uint32_t uErrorCode;
433 RTGCUINTPTR uCR2;
434 bool fIcebp;
435 int rc = TRPMQueryTrapAll(pVCpu, &uVector, &enmTrapEvent, &uErrorCode, &uCR2, &cbInstr, &fIcebp);
436 if (RT_SUCCESS(rc))
437 {
438 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event\n", pVCpu->idCpu);
439 static const char * const s_apszTrpmEventType[] =
440 {
441 "Trap",
442 "Hardware Int",
443 "Software Int"
444 };
445 if (RT_LIKELY((size_t)enmTrapEvent < RT_ELEMENTS(s_apszTrpmEventType)))
446 {
447 pHlp->pfnPrintf(pHlp, " Type = %s\n", s_apszTrpmEventType[enmTrapEvent]);
448 pHlp->pfnPrintf(pHlp, " uVector = %#x\n", uVector);
449 pHlp->pfnPrintf(pHlp, " uErrorCode = %#x\n", uErrorCode);
450 pHlp->pfnPrintf(pHlp, " uCR2 = %#RGp\n", uCR2);
451 pHlp->pfnPrintf(pHlp, " cbInstr = %u bytes\n", cbInstr);
452 pHlp->pfnPrintf(pHlp, " fIcebp = %RTbool\n", fIcebp);
453 }
454 else
455 pHlp->pfnPrintf(pHlp, " Type = %#x (Invalid!)\n", enmTrapEvent);
456 }
457 else if (rc == VERR_TRPM_NO_ACTIVE_TRAP)
458 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event (None)\n", pVCpu->idCpu);
459 else
460 pHlp->pfnPrintf(pHlp, "CPU[%u]: TRPM event - Query failed! rc=%Rrc\n", pVCpu->idCpu, rc);
461}
462
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