VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PGMPool.cpp@ 82210

Last change on this file since 82210 was 80334, checked in by vboxsync, 5 years ago

VMM: Eliminating the VBOX_BUGREF_9217 preprocessor macro. bugref:9217

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1/* $Id: PGMPool.cpp 80334 2019-08-17 00:43:24Z vboxsync $ */
2/** @file
3 * PGM Shadow Page Pool.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/** @page pg_pgm_pool PGM Shadow Page Pool
19 *
20 * Motivations:
21 * -# Relationship between shadow page tables and physical guest pages. This
22 * should allow us to skip most of the global flushes now following access
23 * handler changes. The main expense is flushing shadow pages.
24 * -# Limit the pool size if necessary (default is kind of limitless).
25 * -# Allocate shadow pages from RC. We use to only do this in SyncCR3.
26 * -# Required for 64-bit guests.
27 * -# Combining the PD cache and page pool in order to simplify caching.
28 *
29 *
30 * @section sec_pgm_pool_outline Design Outline
31 *
32 * The shadow page pool tracks pages used for shadowing paging structures (i.e.
33 * page tables, page directory, page directory pointer table and page map
34 * level-4). Each page in the pool has an unique identifier. This identifier is
35 * used to link a guest physical page to a shadow PT. The identifier is a
36 * non-zero value and has a relativly low max value - say 14 bits. This makes it
37 * possible to fit it into the upper bits of the of the aHCPhys entries in the
38 * ram range.
39 *
40 * By restricting host physical memory to the first 48 bits (which is the
41 * announced physical memory range of the K8L chip (scheduled for 2008)), we
42 * can safely use the upper 16 bits for shadow page ID and reference counting.
43 *
44 * Update: The 48 bit assumption will be lifted with the new physical memory
45 * management (PGMPAGE), so we won't have any trouble when someone stuffs 2TB
46 * into a box in some years.
47 *
48 * Now, it's possible for a page to be aliased, i.e. mapped by more than one PT
49 * or PD. This is solved by creating a list of physical cross reference extents
50 * when ever this happens. Each node in the list (extent) is can contain 3 page
51 * pool indexes. The list it self is chained using indexes into the paPhysExt
52 * array.
53 *
54 *
55 * @section sec_pgm_pool_life Life Cycle of a Shadow Page
56 *
57 * -# The SyncPT function requests a page from the pool.
58 * The request includes the kind of page it is (PT/PD, PAE/legacy), the
59 * address of the page it's shadowing, and more.
60 * -# The pool responds to the request by allocating a new page.
61 * When the cache is enabled, it will first check if it's in the cache.
62 * Should the pool be exhausted, one of two things can be done:
63 * -# Flush the whole pool and current CR3.
64 * -# Use the cache to find a page which can be flushed (~age).
65 * -# The SyncPT function will sync one or more pages and insert it into the
66 * shadow PD.
67 * -# The SyncPage function may sync more pages on a later \#PFs.
68 * -# The page is freed / flushed in SyncCR3 (perhaps) and some other cases.
69 * When caching is enabled, the page isn't flush but remains in the cache.
70 *
71 *
72 * @section sec_pgm_pool_monitoring Monitoring
73 *
74 * We always monitor PAGE_SIZE chunks of memory. When we've got multiple shadow
75 * pages for the same PAGE_SIZE of guest memory (PAE and mixed PD/PT) the pages
76 * sharing the monitor get linked using the iMonitoredNext/Prev. The head page
77 * is the pvUser to the access handlers.
78 *
79 *
80 * @section sec_pgm_pool_impl Implementation
81 *
82 * The pool will take pages from the MM page pool. The tracking data
83 * (attributes, bitmaps and so on) are allocated from the hypervisor heap. The
84 * pool content can be accessed both by using the page id and the physical
85 * address (HC). The former is managed by means of an array, the latter by an
86 * offset based AVL tree.
87 *
88 * Flushing of a pool page means that we iterate the content (we know what kind
89 * it is) and updates the link information in the ram range.
90 *
91 * ...
92 */
93
94
95/*********************************************************************************************************************************
96* Header Files *
97*********************************************************************************************************************************/
98#define LOG_GROUP LOG_GROUP_PGM_POOL
99#include <VBox/vmm/pgm.h>
100#include <VBox/vmm/mm.h>
101#include "PGMInternal.h"
102#include <VBox/vmm/vm.h>
103#include <VBox/vmm/uvm.h>
104#include "PGMInline.h"
105
106#include <VBox/log.h>
107#include <VBox/err.h>
108#include <iprt/asm.h>
109#include <iprt/string.h>
110#include <VBox/dbg.h>
111
112
113/*********************************************************************************************************************************
114* Internal Functions *
115*********************************************************************************************************************************/
116#ifdef VBOX_WITH_DEBUGGER
117static FNDBGCCMD pgmR3PoolCmdCheck;
118#endif
119
120#ifdef VBOX_WITH_DEBUGGER
121/** Command descriptors. */
122static const DBGCCMD g_aCmds[] =
123{
124 /* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, fFlags, pfnHandler pszSyntax, ....pszDescription */
125 { "pgmpoolcheck", 0, 0, NULL, 0, 0, pgmR3PoolCmdCheck, "", "Check the pgm pool pages." },
126};
127#endif
128
129/**
130 * Initializes the pool
131 *
132 * @returns VBox status code.
133 * @param pVM The cross context VM structure.
134 */
135int pgmR3PoolInit(PVM pVM)
136{
137 int rc;
138
139 AssertCompile(NIL_PGMPOOL_IDX == 0);
140 /* pPage->cLocked is an unsigned byte. */
141 AssertCompile(VMM_MAX_CPU_COUNT <= 255);
142
143 /*
144 * Query Pool config.
145 */
146 PCFGMNODE pCfg = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/PGM/Pool");
147
148 /* Default pgm pool size is 1024 pages (4MB). */
149 uint16_t cMaxPages = 1024;
150
151 /* Adjust it up relative to the RAM size, using the nested paging formula. */
152 uint64_t cbRam;
153 rc = CFGMR3QueryU64Def(CFGMR3GetRoot(pVM), "RamSize", &cbRam, 0); AssertRCReturn(rc, rc);
154 uint64_t u64MaxPages = (cbRam >> 9)
155 + (cbRam >> 18)
156 + (cbRam >> 27)
157 + 32 * PAGE_SIZE;
158 u64MaxPages >>= PAGE_SHIFT;
159 if (u64MaxPages > PGMPOOL_IDX_LAST)
160 cMaxPages = PGMPOOL_IDX_LAST;
161 else
162 cMaxPages = (uint16_t)u64MaxPages;
163
164 /** @cfgm{/PGM/Pool/MaxPages, uint16_t, \#pages, 16, 0x3fff, F(ram-size)}
165 * The max size of the shadow page pool in pages. The pool will grow dynamically
166 * up to this limit.
167 */
168 rc = CFGMR3QueryU16Def(pCfg, "MaxPages", &cMaxPages, cMaxPages);
169 AssertLogRelRCReturn(rc, rc);
170 AssertLogRelMsgReturn(cMaxPages <= PGMPOOL_IDX_LAST && cMaxPages >= RT_ALIGN(PGMPOOL_IDX_FIRST, 16),
171 ("cMaxPages=%u (%#x)\n", cMaxPages, cMaxPages), VERR_INVALID_PARAMETER);
172 cMaxPages = RT_ALIGN(cMaxPages, 16);
173 if (cMaxPages > PGMPOOL_IDX_LAST)
174 cMaxPages = PGMPOOL_IDX_LAST;
175 LogRel(("PGM: PGMPool: cMaxPages=%u (u64MaxPages=%llu)\n", cMaxPages, u64MaxPages));
176
177 /** @todo
178 * We need to be much more careful with our allocation strategy here.
179 * For nested paging we don't need pool user info nor extents at all, but
180 * we can't check for nested paging here (too early during init to get a
181 * confirmation it can be used). The default for large memory configs is a
182 * bit large for shadow paging, so I've restricted the extent maximum to 8k
183 * (8k * 16 = 128k of hyper heap).
184 *
185 * Also when large page support is enabled, we typically don't need so much,
186 * although that depends on the availability of 2 MB chunks on the host.
187 */
188
189 /** @cfgm{/PGM/Pool/MaxUsers, uint16_t, \#users, MaxUsers, 32K, MaxPages*2}
190 * The max number of shadow page user tracking records. Each shadow page has
191 * zero of other shadow pages (or CR3s) that references it, or uses it if you
192 * like. The structures describing these relationships are allocated from a
193 * fixed sized pool. This configuration variable defines the pool size.
194 */
195 uint16_t cMaxUsers;
196 rc = CFGMR3QueryU16Def(pCfg, "MaxUsers", &cMaxUsers, cMaxPages * 2);
197 AssertLogRelRCReturn(rc, rc);
198 AssertLogRelMsgReturn(cMaxUsers >= cMaxPages && cMaxPages <= _32K,
199 ("cMaxUsers=%u (%#x)\n", cMaxUsers, cMaxUsers), VERR_INVALID_PARAMETER);
200
201 /** @cfgm{/PGM/Pool/MaxPhysExts, uint16_t, \#extents, 16, MaxPages * 2, MIN(MaxPages*2\,8192)}
202 * The max number of extents for tracking aliased guest pages.
203 */
204 uint16_t cMaxPhysExts;
205 rc = CFGMR3QueryU16Def(pCfg, "MaxPhysExts", &cMaxPhysExts,
206 RT_MIN(cMaxPages * 2, 8192 /* 8Ki max as this eat too much hyper heap */));
207 AssertLogRelRCReturn(rc, rc);
208 AssertLogRelMsgReturn(cMaxPhysExts >= 16 && cMaxPhysExts <= PGMPOOL_IDX_LAST,
209 ("cMaxPhysExts=%u (%#x)\n", cMaxPhysExts, cMaxPhysExts), VERR_INVALID_PARAMETER);
210
211 /** @cfgm{/PGM/Pool/ChacheEnabled, bool, true}
212 * Enables or disabling caching of shadow pages. Caching means that we will try
213 * reuse shadow pages instead of recreating them everything SyncCR3, SyncPT or
214 * SyncPage requests one. When reusing a shadow page, we can save time
215 * reconstructing it and it's children.
216 */
217 bool fCacheEnabled;
218 rc = CFGMR3QueryBoolDef(pCfg, "CacheEnabled", &fCacheEnabled, true);
219 AssertLogRelRCReturn(rc, rc);
220
221 LogRel(("PGM: pgmR3PoolInit: cMaxPages=%#RX16 cMaxUsers=%#RX16 cMaxPhysExts=%#RX16 fCacheEnable=%RTbool\n",
222 cMaxPages, cMaxUsers, cMaxPhysExts, fCacheEnabled));
223
224 /*
225 * Allocate the data structures.
226 */
227 uint32_t cb = RT_UOFFSETOF_DYN(PGMPOOL, aPages[cMaxPages]);
228 cb += cMaxUsers * sizeof(PGMPOOLUSER);
229 cb += cMaxPhysExts * sizeof(PGMPOOLPHYSEXT);
230 PPGMPOOL pPool;
231 rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PGM_POOL, (void **)&pPool);
232 if (RT_FAILURE(rc))
233 return rc;
234 pVM->pgm.s.pPoolR3 = pPool;
235 pVM->pgm.s.pPoolR0 = MMHyperR3ToR0(pVM, pPool);
236
237 /*
238 * Initialize it.
239 */
240 pPool->pVMR3 = pVM;
241 pPool->pVMR0 = pVM->pVMR0ForCall;
242 pPool->cMaxPages = cMaxPages;
243 pPool->cCurPages = PGMPOOL_IDX_FIRST;
244 pPool->iUserFreeHead = 0;
245 pPool->cMaxUsers = cMaxUsers;
246 PPGMPOOLUSER paUsers = (PPGMPOOLUSER)&pPool->aPages[pPool->cMaxPages];
247 pPool->paUsersR3 = paUsers;
248 pPool->paUsersR0 = MMHyperR3ToR0(pVM, paUsers);
249 for (unsigned i = 0; i < cMaxUsers; i++)
250 {
251 paUsers[i].iNext = i + 1;
252 paUsers[i].iUser = NIL_PGMPOOL_IDX;
253 paUsers[i].iUserTable = 0xfffffffe;
254 }
255 paUsers[cMaxUsers - 1].iNext = NIL_PGMPOOL_USER_INDEX;
256 pPool->iPhysExtFreeHead = 0;
257 pPool->cMaxPhysExts = cMaxPhysExts;
258 PPGMPOOLPHYSEXT paPhysExts = (PPGMPOOLPHYSEXT)&paUsers[cMaxUsers];
259 pPool->paPhysExtsR3 = paPhysExts;
260 pPool->paPhysExtsR0 = MMHyperR3ToR0(pVM, paPhysExts);
261 for (unsigned i = 0; i < cMaxPhysExts; i++)
262 {
263 paPhysExts[i].iNext = i + 1;
264 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
265 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
266 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
267 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
268 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
269 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
270 }
271 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
272 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aiHash); i++)
273 pPool->aiHash[i] = NIL_PGMPOOL_IDX;
274 pPool->iAgeHead = NIL_PGMPOOL_IDX;
275 pPool->iAgeTail = NIL_PGMPOOL_IDX;
276 pPool->fCacheEnabled = fCacheEnabled;
277
278 pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE;
279 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE,
280 pgmPoolAccessHandler,
281 NULL, "pgmPoolAccessHandler", "pgmRZPoolAccessPfHandler",
282 NULL, "pgmPoolAccessHandler", "pgmRZPoolAccessPfHandler",
283 "Guest Paging Access Handler",
284 &pPool->hAccessHandlerType);
285 AssertLogRelRCReturn(rc, rc);
286
287 pPool->HCPhysTree = 0;
288
289 /*
290 * The NIL entry.
291 */
292 Assert(NIL_PGMPOOL_IDX == 0);
293 pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
294 pPool->aPages[NIL_PGMPOOL_IDX].idx = NIL_PGMPOOL_IDX;
295 pPool->aPages[NIL_PGMPOOL_IDX].Core.Key = NIL_RTHCPHYS;
296 pPool->aPages[NIL_PGMPOOL_IDX].GCPhys = NIL_RTGCPHYS;
297 pPool->aPages[NIL_PGMPOOL_IDX].iNext = NIL_PGMPOOL_IDX;
298 /* pPool->aPages[NIL_PGMPOOL_IDX].cLocked = INT32_MAX; - test this out... */
299 pPool->aPages[NIL_PGMPOOL_IDX].pvPageR3 = 0;
300 pPool->aPages[NIL_PGMPOOL_IDX].iUserHead = NIL_PGMPOOL_USER_INDEX;
301 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedNext = NIL_PGMPOOL_IDX;
302 pPool->aPages[NIL_PGMPOOL_IDX].iModifiedPrev = NIL_PGMPOOL_IDX;
303 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredNext = NIL_PGMPOOL_IDX;
304 pPool->aPages[NIL_PGMPOOL_IDX].iMonitoredPrev = NIL_PGMPOOL_IDX;
305 pPool->aPages[NIL_PGMPOOL_IDX].iAgeNext = NIL_PGMPOOL_IDX;
306 pPool->aPages[NIL_PGMPOOL_IDX].iAgePrev = NIL_PGMPOOL_IDX;
307
308 Assert(pPool->aPages[NIL_PGMPOOL_IDX].idx == NIL_PGMPOOL_IDX);
309 Assert(pPool->aPages[NIL_PGMPOOL_IDX].GCPhys == NIL_RTGCPHYS);
310 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fSeenNonGlobal);
311 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fMonitored);
312 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fCached);
313 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fZeroed);
314 Assert(!pPool->aPages[NIL_PGMPOOL_IDX].fReusedFlushPending);
315
316#ifdef VBOX_WITH_STATISTICS
317 /*
318 * Register statistics.
319 */
320 STAM_REG(pVM, &pPool->cCurPages, STAMTYPE_U16, "/PGM/Pool/cCurPages", STAMUNIT_PAGES, "Current pool size.");
321 STAM_REG(pVM, &pPool->cMaxPages, STAMTYPE_U16, "/PGM/Pool/cMaxPages", STAMUNIT_PAGES, "Max pool size.");
322 STAM_REG(pVM, &pPool->cUsedPages, STAMTYPE_U16, "/PGM/Pool/cUsedPages", STAMUNIT_PAGES, "The number of pages currently in use.");
323 STAM_REG(pVM, &pPool->cUsedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/cUsedPagesHigh", STAMUNIT_PAGES, "The high watermark for cUsedPages.");
324 STAM_REG(pVM, &pPool->StatAlloc, STAMTYPE_PROFILE_ADV, "/PGM/Pool/Alloc", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolAlloc.");
325 STAM_REG(pVM, &pPool->StatClearAll, STAMTYPE_PROFILE, "/PGM/Pool/ClearAll", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolClearAll.");
326 STAM_REG(pVM, &pPool->StatR3Reset, STAMTYPE_PROFILE, "/PGM/Pool/R3Reset", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmR3PoolReset.");
327 STAM_REG(pVM, &pPool->StatFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFlushPage.");
328 STAM_REG(pVM, &pPool->StatFree, STAMTYPE_PROFILE, "/PGM/Pool/Free", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolFree.");
329 STAM_REG(pVM, &pPool->StatForceFlushPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForce", STAMUNIT_OCCURENCES, "Counting explicit flushes by PGMPoolFlushPage().");
330 STAM_REG(pVM, &pPool->StatForceFlushDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/FlushForceDirty", STAMUNIT_OCCURENCES, "Counting explicit flushes of dirty pages by PGMPoolFlushPage().");
331 STAM_REG(pVM, &pPool->StatForceFlushReused, STAMTYPE_COUNTER, "/PGM/Pool/FlushReused", STAMUNIT_OCCURENCES, "Counting flushes for reused pages.");
332 STAM_REG(pVM, &pPool->StatZeroPage, STAMTYPE_PROFILE, "/PGM/Pool/ZeroPage", STAMUNIT_TICKS_PER_CALL, "Profiling time spent zeroing pages. Overlaps with Alloc.");
333 STAM_REG(pVM, &pPool->cMaxUsers, STAMTYPE_U16, "/PGM/Pool/Track/cMaxUsers", STAMUNIT_COUNT, "Max user tracking records.");
334 STAM_REG(pVM, &pPool->cPresent, STAMTYPE_U32, "/PGM/Pool/Track/cPresent", STAMUNIT_COUNT, "Number of present page table entries.");
335 STAM_REG(pVM, &pPool->StatTrackDeref, STAMTYPE_PROFILE, "/PGM/Pool/Track/Deref", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackDeref.");
336 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPT, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPT", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPT.");
337 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTs, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTs", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTs.");
338 STAM_REG(pVM, &pPool->StatTrackFlushGCPhysPTsSlow, STAMTYPE_PROFILE, "/PGM/Pool/Track/FlushGCPhysPTsSlow", STAMUNIT_TICKS_PER_CALL, "Profiling of pgmPoolTrackFlushGCPhysPTsSlow.");
339 STAM_REG(pVM, &pPool->StatTrackFlushEntry, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Flush", STAMUNIT_COUNT, "Nr of flushed entries.");
340 STAM_REG(pVM, &pPool->StatTrackFlushEntryKeep, STAMTYPE_COUNTER, "/PGM/Pool/Track/Entry/Update", STAMUNIT_COUNT, "Nr of updated entries.");
341 STAM_REG(pVM, &pPool->StatTrackFreeUpOneUser, STAMTYPE_COUNTER, "/PGM/Pool/Track/FreeUpOneUser", STAMUNIT_TICKS_PER_CALL, "The number of times we were out of user tracking records.");
342 STAM_REG(pVM, &pPool->StatTrackDerefGCPhys, STAMTYPE_PROFILE, "/PGM/Pool/Track/DrefGCPhys", STAMUNIT_TICKS_PER_CALL, "Profiling deref activity related tracking GC physical pages.");
343 STAM_REG(pVM, &pPool->StatTrackLinearRamSearches, STAMTYPE_COUNTER, "/PGM/Pool/Track/LinearRamSearches", STAMUNIT_OCCURENCES, "The number of times we had to do linear ram searches.");
344 STAM_REG(pVM, &pPool->StamTrackPhysExtAllocFailures,STAMTYPE_COUNTER, "/PGM/Pool/Track/PhysExtAllocFailures", STAMUNIT_OCCURENCES, "The number of failing pgmPoolTrackPhysExtAlloc calls.");
345
346 STAM_REG(pVM, &pPool->StatMonitorPfRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access handler.");
347 STAM_REG(pVM, &pPool->StatMonitorPfRZEmulateInstr, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/EmulateInstr", STAMUNIT_OCCURENCES, "Times we've failed interpreting the instruction.");
348 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the RC/R0 access handler.");
349 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushReinit, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushReinit", STAMUNIT_OCCURENCES, "Times we've detected a page table reinit.");
350 STAM_REG(pVM, &pPool->StatMonitorPfRZFlushModOverflow,STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/FlushOverflow", STAMUNIT_OCCURENCES, "Counting flushes for pages that are modified too often.");
351 STAM_REG(pVM, &pPool->StatMonitorPfRZFork, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/Fork", STAMUNIT_OCCURENCES, "Times we've detected fork().");
352 STAM_REG(pVM, &pPool->StatMonitorPfRZHandled, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/Handled", STAMUNIT_TICKS_PER_CALL, "Profiling the RC/R0 #PF access we've handled (except REP STOSD).");
353 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch1, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch1", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction.");
354 STAM_REG(pVM, &pPool->StatMonitorPfRZIntrFailPatch2, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/IntrFailPatch2", STAMUNIT_OCCURENCES, "Times we've failed interpreting a patch code instruction during flushing.");
355 STAM_REG(pVM, &pPool->StatMonitorPfRZRepPrefix, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/#PF/RepPrefix", STAMUNIT_OCCURENCES, "The number of times we've seen rep prefixes we can't handle.");
356 STAM_REG(pVM, &pPool->StatMonitorPfRZRepStosd, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/#PF/RepStosd", STAMUNIT_TICKS_PER_CALL, "Profiling the REP STOSD cases we've handled.");
357
358 STAM_REG(pVM, &pPool->StatMonitorRZ, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM", STAMUNIT_TICKS_PER_CALL, "Profiling the regular access handler.");
359 STAM_REG(pVM, &pPool->StatMonitorRZFlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the regular access handler.");
360 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses.");
361 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses.");
362 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses.");
363 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses.");
364 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses.");
365 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses.");
366 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses.");
367 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[7], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses.");
368 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[8], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses.");
369 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[9], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses.");
370 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[10], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses.");
371 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[11], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses.");
372 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[12], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses.");
373 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[13], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses.");
374 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[14], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses.");
375 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[15], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses.");
376 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[16], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
377 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[17], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
378 STAM_REG(pVM, &pPool->aStatMonitorRZSizes[18], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
379 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1.");
380 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2.");
381 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3.");
382 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4.");
383 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5.");
384 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6.");
385 STAM_REG(pVM, &pPool->aStatMonitorRZMisaligned[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/RZ/IEM/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7.");
386
387 STAM_REG(pVM, &pPool->StatMonitorRZFaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
388 STAM_REG(pVM, &pPool->StatMonitorRZFaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
389 STAM_REG(pVM, &pPool->StatMonitorRZFaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
390 STAM_REG(pVM, &pPool->StatMonitorRZFaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/RZ/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
391
392 STAM_REG(pVM, &pPool->StatMonitorR3, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3", STAMUNIT_TICKS_PER_CALL, "Profiling the R3 access handler.");
393 STAM_REG(pVM, &pPool->StatMonitorR3FlushPage, STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/FlushPage", STAMUNIT_TICKS_PER_CALL, "Profiling the pgmPoolFlushPage calls made from the R3 access handler.");
394 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size01", STAMUNIT_OCCURENCES, "Number of 1 byte accesses (R3).");
395 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size02", STAMUNIT_OCCURENCES, "Number of 2 byte accesses (R3).");
396 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size03", STAMUNIT_OCCURENCES, "Number of 3 byte accesses (R3).");
397 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size04", STAMUNIT_OCCURENCES, "Number of 4 byte accesses (R3).");
398 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size05", STAMUNIT_OCCURENCES, "Number of 5 byte accesses (R3).");
399 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size06", STAMUNIT_OCCURENCES, "Number of 6 byte accesses (R3).");
400 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size07", STAMUNIT_OCCURENCES, "Number of 7 byte accesses (R3).");
401 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[7], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size08", STAMUNIT_OCCURENCES, "Number of 8 byte accesses (R3).");
402 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[8], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size09", STAMUNIT_OCCURENCES, "Number of 9 byte accesses (R3).");
403 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[9], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0a", STAMUNIT_OCCURENCES, "Number of 10 byte accesses (R3).");
404 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[10], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0b", STAMUNIT_OCCURENCES, "Number of 11 byte accesses (R3).");
405 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[11], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0c", STAMUNIT_OCCURENCES, "Number of 12 byte accesses (R3).");
406 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[12], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0d", STAMUNIT_OCCURENCES, "Number of 13 byte accesses (R3).");
407 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[13], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0e", STAMUNIT_OCCURENCES, "Number of 14 byte accesses (R3).");
408 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[14], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size0f", STAMUNIT_OCCURENCES, "Number of 15 byte accesses (R3).");
409 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[15], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size10", STAMUNIT_OCCURENCES, "Number of 16 byte accesses (R3).");
410 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[16], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size11-2f", STAMUNIT_OCCURENCES, "Number of 17-31 byte accesses.");
411 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[17], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size20-3f", STAMUNIT_OCCURENCES, "Number of 32-63 byte accesses.");
412 STAM_REG(pVM, &pPool->aStatMonitorR3Sizes[18], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Size40+", STAMUNIT_OCCURENCES, "Number of 64+ byte accesses.");
413 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[0], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned1", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 1 in R3.");
414 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[1], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned2", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 2 in R3.");
415 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[2], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned3", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 3 in R3.");
416 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[3], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned4", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 4 in R3.");
417 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[4], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned5", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 5 in R3.");
418 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[5], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned6", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 6 in R3.");
419 STAM_REG(pVM, &pPool->aStatMonitorR3Misaligned[6], STAMTYPE_PROFILE, "/PGM/Pool/Monitor/R3/Misaligned7", STAMUNIT_OCCURENCES, "Number of misaligned access with offset 7 in R3.");
420
421 STAM_REG(pVM, &pPool->StatMonitorR3FaultPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PT", STAMUNIT_OCCURENCES, "Nr of handled PT faults.");
422 STAM_REG(pVM, &pPool->StatMonitorR3FaultPD, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PD", STAMUNIT_OCCURENCES, "Nr of handled PD faults.");
423 STAM_REG(pVM, &pPool->StatMonitorR3FaultPDPT, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PDPT", STAMUNIT_OCCURENCES, "Nr of handled PDPT faults.");
424 STAM_REG(pVM, &pPool->StatMonitorR3FaultPML4, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/R3/Fault/PML4", STAMUNIT_OCCURENCES, "Nr of handled PML4 faults.");
425
426 STAM_REG(pVM, &pPool->cModifiedPages, STAMTYPE_U16, "/PGM/Pool/Monitor/cModifiedPages", STAMUNIT_PAGES, "The current cModifiedPages value.");
427 STAM_REG(pVM, &pPool->cModifiedPagesHigh, STAMTYPE_U16_RESET, "/PGM/Pool/Monitor/cModifiedPagesHigh", STAMUNIT_PAGES, "The high watermark for cModifiedPages.");
428 STAM_REG(pVM, &pPool->StatResetDirtyPages, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Resets", STAMUNIT_OCCURENCES, "Times we've called pgmPoolResetDirtyPages (and there were dirty page).");
429 STAM_REG(pVM, &pPool->StatDirtyPage, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/Pages", STAMUNIT_OCCURENCES, "Times we've called pgmPoolAddDirtyPage.");
430 STAM_REG(pVM, &pPool->StatDirtyPageDupFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushDup", STAMUNIT_OCCURENCES, "Times we've had to flush duplicates for dirty page management.");
431 STAM_REG(pVM, &pPool->StatDirtyPageOverFlowFlush, STAMTYPE_COUNTER, "/PGM/Pool/Monitor/Dirty/FlushOverflow",STAMUNIT_OCCURENCES, "Times we've had to flush because of overflow.");
432 STAM_REG(pVM, &pPool->StatCacheHits, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Hits", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls satisfied by the cache.");
433 STAM_REG(pVM, &pPool->StatCacheMisses, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Misses", STAMUNIT_OCCURENCES, "The number of pgmPoolAlloc calls not statisfied by the cache.");
434 STAM_REG(pVM, &pPool->StatCacheKindMismatches, STAMTYPE_COUNTER, "/PGM/Pool/Cache/KindMismatches", STAMUNIT_OCCURENCES, "The number of shadow page kind mismatches. (Better be low, preferably 0!)");
435 STAM_REG(pVM, &pPool->StatCacheFreeUpOne, STAMTYPE_COUNTER, "/PGM/Pool/Cache/FreeUpOne", STAMUNIT_OCCURENCES, "The number of times the cache was asked to free up a page.");
436 STAM_REG(pVM, &pPool->StatCacheCacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Cacheable", STAMUNIT_OCCURENCES, "The number of cacheable allocations.");
437 STAM_REG(pVM, &pPool->StatCacheUncacheable, STAMTYPE_COUNTER, "/PGM/Pool/Cache/Uncacheable", STAMUNIT_OCCURENCES, "The number of uncacheable allocations.");
438#endif /* VBOX_WITH_STATISTICS */
439
440#ifdef VBOX_WITH_DEBUGGER
441 /*
442 * Debugger commands.
443 */
444 static bool s_fRegisteredCmds = false;
445 if (!s_fRegisteredCmds)
446 {
447 rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
448 if (RT_SUCCESS(rc))
449 s_fRegisteredCmds = true;
450 }
451#endif
452
453 return VINF_SUCCESS;
454}
455
456
457/**
458 * Relocate the page pool data.
459 *
460 * @param pVM The cross context VM structure.
461 */
462void pgmR3PoolRelocate(PVM pVM)
463{
464 RT_NOREF(pVM);
465}
466
467
468/**
469 * Grows the shadow page pool.
470 *
471 * I.e. adds more pages to it, assuming that hasn't reached cMaxPages yet.
472 *
473 * @returns VBox status code.
474 * @param pVM The cross context VM structure.
475 */
476VMMR3DECL(int) PGMR3PoolGrow(PVM pVM)
477{
478 PPGMPOOL pPool = pVM->pgm.s.pPoolR3;
479 AssertReturn(pPool->cCurPages < pPool->cMaxPages, VERR_PGM_POOL_MAXED_OUT_ALREADY);
480
481 /* With 32-bit guests and no EPT, the CR3 limits the root pages to low
482 (below 4 GB) memory. */
483 /** @todo change the pool to handle ROOT page allocations specially when
484 * required. */
485 bool fCanUseHighMemory = HMIsNestedPagingActive(pVM);
486
487 pgmLock(pVM);
488
489 /*
490 * How much to grow it by?
491 */
492 uint32_t cPages = pPool->cMaxPages - pPool->cCurPages;
493 cPages = RT_MIN(PGMPOOL_CFG_MAX_GROW, cPages);
494 LogFlow(("PGMR3PoolGrow: Growing the pool by %d (%#x) pages. fCanUseHighMemory=%RTbool\n", cPages, cPages, fCanUseHighMemory));
495
496 for (unsigned i = pPool->cCurPages; cPages-- > 0; i++)
497 {
498 PPGMPOOLPAGE pPage = &pPool->aPages[i];
499
500 if (fCanUseHighMemory)
501 pPage->pvPageR3 = MMR3PageAlloc(pVM);
502 else
503 pPage->pvPageR3 = MMR3PageAllocLow(pVM);
504 if (!pPage->pvPageR3)
505 {
506 Log(("We're out of memory!! i=%d fCanUseHighMemory=%RTbool\n", i, fCanUseHighMemory));
507 pgmUnlock(pVM);
508 return i ? VINF_SUCCESS : VERR_NO_PAGE_MEMORY;
509 }
510 pPage->Core.Key = MMPage2Phys(pVM, pPage->pvPageR3);
511 AssertFatal(pPage->Core.Key < _4G || fCanUseHighMemory);
512 pPage->GCPhys = NIL_RTGCPHYS;
513 pPage->enmKind = PGMPOOLKIND_FREE;
514 pPage->idx = pPage - &pPool->aPages[0];
515 LogFlow(("PGMR3PoolGrow: insert page #%#x - %RHp\n", pPage->idx, pPage->Core.Key));
516 pPage->iNext = pPool->iFreeHead;
517 pPage->iUserHead = NIL_PGMPOOL_USER_INDEX;
518 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
519 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
520 pPage->iMonitoredNext = NIL_PGMPOOL_IDX;
521 pPage->iMonitoredPrev = NIL_PGMPOOL_IDX;
522 pPage->iAgeNext = NIL_PGMPOOL_IDX;
523 pPage->iAgePrev = NIL_PGMPOOL_IDX;
524 /* commit it */
525 bool fRc = RTAvloHCPhysInsert(&pPool->HCPhysTree, &pPage->Core); Assert(fRc); NOREF(fRc);
526 pPool->iFreeHead = i;
527 pPool->cCurPages = i + 1;
528 }
529
530 pgmUnlock(pVM);
531 Assert(pPool->cCurPages <= pPool->cMaxPages);
532 return VINF_SUCCESS;
533}
534
535
536/**
537 * Rendezvous callback used by pgmR3PoolClearAll that clears all shadow pages
538 * and all modification counters.
539 *
540 * This is only called on one of the EMTs while the other ones are waiting for
541 * it to complete this function.
542 *
543 * @returns VINF_SUCCESS (VBox strict status code).
544 * @param pVM The cross context VM structure.
545 * @param pVCpu The cross context virtual CPU structure of the calling EMT. Unused.
546 * @param fpvFlushRemTlb When not NULL, we'll flush the REM TLB as well.
547 * (This is the pvUser, so it has to be void *.)
548 *
549 */
550DECLCALLBACK(VBOXSTRICTRC) pgmR3PoolClearAllRendezvous(PVM pVM, PVMCPU pVCpu, void *fpvFlushRemTlb)
551{
552 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
553 STAM_PROFILE_START(&pPool->StatClearAll, c);
554 NOREF(pVCpu);
555
556 pgmLock(pVM);
557 Log(("pgmR3PoolClearAllRendezvous: cUsedPages=%d fpvFlushRemTlb=%RTbool\n", pPool->cUsedPages, !!fpvFlushRemTlb));
558
559 /*
560 * Iterate all the pages until we've encountered all that are in use.
561 * This is a simple but not quite optimal solution.
562 */
563 unsigned cModifiedPages = 0; NOREF(cModifiedPages);
564 unsigned cLeft = pPool->cUsedPages;
565 uint32_t iPage = pPool->cCurPages;
566 while (--iPage >= PGMPOOL_IDX_FIRST)
567 {
568 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
569 if (pPage->GCPhys != NIL_RTGCPHYS)
570 {
571 switch (pPage->enmKind)
572 {
573 /*
574 * We only care about shadow page tables that reference physical memory
575 */
576#ifdef PGM_WITH_LARGE_PAGES
577 case PGMPOOLKIND_EPT_PD_FOR_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
578 if (pPage->cPresent)
579 {
580 PX86PDPAE pShwPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
581 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
582 {
583 if ( pShwPD->a[i].n.u1Present
584 && pShwPD->a[i].b.u1Size)
585 {
586 Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
587 pShwPD->a[i].u = 0;
588 Assert(pPage->cPresent);
589 pPage->cPresent--;
590 }
591 }
592 if (pPage->cPresent == 0)
593 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
594 }
595 goto default_case;
596
597 case PGMPOOLKIND_PAE_PD_PHYS: /* Large pages reference 2 MB of physical memory, so we must clear them. */
598 if (pPage->cPresent)
599 {
600 PEPTPD pShwPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
601 for (unsigned i = 0; i < RT_ELEMENTS(pShwPD->a); i++)
602 {
603 Assert((pShwPD->a[i].u & UINT64_C(0xfff0000000000f80)) == 0);
604 if ( pShwPD->a[i].n.u1Present
605 && pShwPD->a[i].b.u1Size)
606 {
607 Assert(!(pShwPD->a[i].u & PGM_PDFLAGS_MAPPING));
608 pShwPD->a[i].u = 0;
609 Assert(pPage->cPresent);
610 pPage->cPresent--;
611 }
612 }
613 if (pPage->cPresent == 0)
614 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
615 }
616 goto default_case;
617#endif /* PGM_WITH_LARGE_PAGES */
618
619 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
620 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
621 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
622 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
623 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
624 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
625 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
626 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
627 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
628 {
629 if (pPage->cPresent)
630 {
631 void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
632 STAM_PROFILE_START(&pPool->StatZeroPage, z);
633#if 0
634 /* Useful check for leaking references; *very* expensive though. */
635 switch (pPage->enmKind)
636 {
637 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
638 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
639 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
640 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
641 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
642 {
643 bool fFoundFirst = false;
644 PPGMSHWPTPAE pPT = (PPGMSHWPTPAE)pvShw;
645 for (unsigned ptIndex = 0; ptIndex < RT_ELEMENTS(pPT->a); ptIndex++)
646 {
647 if (pPT->a[ptIndex].u)
648 {
649 if (!fFoundFirst)
650 {
651 AssertFatalMsg(pPage->iFirstPresent <= ptIndex, ("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
652 if (pPage->iFirstPresent != ptIndex)
653 Log(("ptIndex = %d first present = %d\n", ptIndex, pPage->iFirstPresent));
654 fFoundFirst = true;
655 }
656 if (PGMSHWPTEPAE_IS_P(pPT->a[ptIndex]))
657 {
658 pgmPoolTracDerefGCPhysHint(pPool, pPage, PGMSHWPTEPAE_GET_HCPHYS(pPT->a[ptIndex]), NIL_RTGCPHYS);
659 if (pPage->iFirstPresent == ptIndex)
660 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
661 }
662 }
663 }
664 AssertFatalMsg(pPage->cPresent == 0, ("cPresent = %d pPage = %RGv\n", pPage->cPresent, pPage->GCPhys));
665 break;
666 }
667 default:
668 break;
669 }
670#endif
671 ASMMemZeroPage(pvShw);
672 STAM_PROFILE_STOP(&pPool->StatZeroPage, z);
673 pPage->cPresent = 0;
674 pPage->iFirstPresent = NIL_PGMPOOL_PRESENT_INDEX;
675 }
676 }
677 RT_FALL_THRU();
678#ifdef PGM_WITH_LARGE_PAGES
679 default_case:
680#endif
681 default:
682 Assert(!pPage->cModifications || ++cModifiedPages);
683 Assert(pPage->iModifiedNext == NIL_PGMPOOL_IDX || pPage->cModifications);
684 Assert(pPage->iModifiedPrev == NIL_PGMPOOL_IDX || pPage->cModifications);
685 pPage->iModifiedNext = NIL_PGMPOOL_IDX;
686 pPage->iModifiedPrev = NIL_PGMPOOL_IDX;
687 pPage->cModifications = 0;
688 break;
689
690 }
691 if (!--cLeft)
692 break;
693 }
694 }
695
696#ifndef DEBUG_michael
697 AssertMsg(cModifiedPages == pPool->cModifiedPages, ("%d != %d\n", cModifiedPages, pPool->cModifiedPages));
698#endif
699 pPool->iModifiedHead = NIL_PGMPOOL_IDX;
700 pPool->cModifiedPages = 0;
701
702 /*
703 * Clear all the GCPhys links and rebuild the phys ext free list.
704 */
705 for (PPGMRAMRANGE pRam = pPool->CTX_SUFF(pVM)->pgm.s.CTX_SUFF(pRamRangesX);
706 pRam;
707 pRam = pRam->CTX_SUFF(pNext))
708 {
709 iPage = pRam->cb >> PAGE_SHIFT;
710 while (iPage-- > 0)
711 PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
712 }
713
714 pPool->iPhysExtFreeHead = 0;
715 PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
716 const unsigned cMaxPhysExts = pPool->cMaxPhysExts;
717 for (unsigned i = 0; i < cMaxPhysExts; i++)
718 {
719 paPhysExts[i].iNext = i + 1;
720 paPhysExts[i].aidx[0] = NIL_PGMPOOL_IDX;
721 paPhysExts[i].apte[0] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
722 paPhysExts[i].aidx[1] = NIL_PGMPOOL_IDX;
723 paPhysExts[i].apte[1] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
724 paPhysExts[i].aidx[2] = NIL_PGMPOOL_IDX;
725 paPhysExts[i].apte[2] = NIL_PGMPOOL_PHYSEXT_IDX_PTE;
726 }
727 paPhysExts[cMaxPhysExts - 1].iNext = NIL_PGMPOOL_PHYSEXT_INDEX;
728
729
730#ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
731 /* Reset all dirty pages to reactivate the page monitoring. */
732 /* Note: we must do this *after* clearing all page references and shadow page tables as there might be stale references to
733 * recently removed MMIO ranges around that might otherwise end up asserting in pgmPoolTracDerefGCPhysHint
734 */
735 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++)
736 {
737 unsigned idxPage = pPool->aidxDirtyPages[i];
738 if (idxPage == NIL_PGMPOOL_IDX)
739 continue;
740
741 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage];
742 Assert(pPage->idx == idxPage);
743 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX);
744
745 AssertMsg(pPage->fDirty, ("Page %RGp (slot=%d) not marked dirty!", pPage->GCPhys, i));
746
747 Log(("Reactivate dirty page %RGp\n", pPage->GCPhys));
748
749 /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
750 int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK);
751 AssertRCSuccess(rc);
752 pPage->fDirty = false;
753
754 pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX;
755 }
756
757 /* Clear all dirty pages. */
758 pPool->idxFreeDirtyPage = 0;
759 pPool->cDirtyPages = 0;
760#endif
761
762 /* Clear the PGM_SYNC_CLEAR_PGM_POOL flag on all VCPUs to prevent redundant flushes. */
763 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
764 pVM->apCpusR3[idCpu]->pgm.s.fSyncFlags &= ~PGM_SYNC_CLEAR_PGM_POOL;
765
766 /* Flush job finished. */
767 VM_FF_CLEAR(pVM, VM_FF_PGM_POOL_FLUSH_PENDING);
768 pPool->cPresent = 0;
769 pgmUnlock(pVM);
770
771 PGM_INVL_ALL_VCPU_TLBS(pVM);
772
773 if (fpvFlushRemTlb)
774 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
775 CPUMSetChangedFlags(pVM->apCpusR3[idCpu], CPUM_CHANGED_GLOBAL_TLB_FLUSH);
776
777 STAM_PROFILE_STOP(&pPool->StatClearAll, c);
778 return VINF_SUCCESS;
779}
780
781
782/**
783 * Clears the shadow page pool.
784 *
785 * @param pVM The cross context VM structure.
786 * @param fFlushRemTlb When set, the REM TLB is scheduled for flushing as
787 * well.
788 */
789void pgmR3PoolClearAll(PVM pVM, bool fFlushRemTlb)
790{
791 int rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE, pgmR3PoolClearAllRendezvous, &fFlushRemTlb);
792 AssertRC(rc);
793}
794
795
796/**
797 * Protect all pgm pool page table entries to monitor writes
798 *
799 * @param pVM The cross context VM structure.
800 *
801 * @remarks ASSUMES the caller will flush all TLBs!!
802 */
803void pgmR3PoolWriteProtectPages(PVM pVM)
804{
805 PGM_LOCK_ASSERT_OWNER(pVM);
806 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
807 unsigned cLeft = pPool->cUsedPages;
808 unsigned iPage = pPool->cCurPages;
809 while (--iPage >= PGMPOOL_IDX_FIRST)
810 {
811 PPGMPOOLPAGE pPage = &pPool->aPages[iPage];
812 if ( pPage->GCPhys != NIL_RTGCPHYS
813 && pPage->cPresent)
814 {
815 union
816 {
817 void *pv;
818 PX86PT pPT;
819 PPGMSHWPTPAE pPTPae;
820 PEPTPT pPTEpt;
821 } uShw;
822 uShw.pv = PGMPOOL_PAGE_2_PTR(pVM, pPage);
823
824 switch (pPage->enmKind)
825 {
826 /*
827 * We only care about shadow page tables.
828 */
829 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT:
830 case PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB:
831 case PGMPOOLKIND_32BIT_PT_FOR_PHYS:
832 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPT->a); iShw++)
833 {
834 if (uShw.pPT->a[iShw].n.u1Present)
835 uShw.pPT->a[iShw].n.u1Write = 0;
836 }
837 break;
838
839 case PGMPOOLKIND_PAE_PT_FOR_32BIT_PT:
840 case PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB:
841 case PGMPOOLKIND_PAE_PT_FOR_PAE_PT:
842 case PGMPOOLKIND_PAE_PT_FOR_PAE_2MB:
843 case PGMPOOLKIND_PAE_PT_FOR_PHYS:
844 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTPae->a); iShw++)
845 {
846 if (PGMSHWPTEPAE_IS_P(uShw.pPTPae->a[iShw]))
847 PGMSHWPTEPAE_SET_RO(uShw.pPTPae->a[iShw]);
848 }
849 break;
850
851 case PGMPOOLKIND_EPT_PT_FOR_PHYS:
852 for (unsigned iShw = 0; iShw < RT_ELEMENTS(uShw.pPTEpt->a); iShw++)
853 {
854 if (uShw.pPTEpt->a[iShw].n.u1Present)
855 uShw.pPTEpt->a[iShw].n.u1Write = 0;
856 }
857 break;
858
859 default:
860 break;
861 }
862 if (!--cLeft)
863 break;
864 }
865 }
866}
867
868#ifdef VBOX_WITH_DEBUGGER
869/**
870 * @callback_method_impl{FNDBGCCMD, The '.pgmpoolcheck' command.}
871 */
872static DECLCALLBACK(int) pgmR3PoolCmdCheck(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PUVM pUVM, PCDBGCVAR paArgs, unsigned cArgs)
873{
874 DBGC_CMDHLP_REQ_UVM_RET(pCmdHlp, pCmd, pUVM);
875 PVM pVM = pUVM->pVM;
876 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
877 DBGC_CMDHLP_ASSERT_PARSER_RET(pCmdHlp, pCmd, -1, cArgs == 0);
878 uint32_t cErrors = 0;
879 NOREF(paArgs);
880
881 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
882 for (unsigned i = 0; i < pPool->cCurPages; i++)
883 {
884 PPGMPOOLPAGE pPage = &pPool->aPages[i];
885 bool fFirstMsg = true;
886
887 /** @todo cover other paging modes too. */
888 if (pPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
889 {
890 PPGMSHWPTPAE pShwPT = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
891 {
892 PX86PTPAE pGstPT;
893 PGMPAGEMAPLOCK LockPage;
894 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, pPage->GCPhys, (const void **)&pGstPT, &LockPage); AssertReleaseRC(rc);
895
896 /* Check if any PTEs are out of sync. */
897 for (unsigned j = 0; j < RT_ELEMENTS(pShwPT->a); j++)
898 {
899 if (PGMSHWPTEPAE_IS_P(pShwPT->a[j]))
900 {
901 RTHCPHYS HCPhys = NIL_RTHCPHYS;
902 rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[j].u & X86_PTE_PAE_PG_MASK, &HCPhys);
903 if ( rc != VINF_SUCCESS
904 || PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[j]) != HCPhys)
905 {
906 if (fFirstMsg)
907 {
908 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
909 fFirstMsg = false;
910 }
911 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch HCPhys: rc=%Rrc idx=%d guest %RX64 shw=%RX64 vs %RHp\n", rc, j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
912 cErrors++;
913 }
914 else if ( PGMSHWPTEPAE_IS_RW(pShwPT->a[j])
915 && !pGstPT->a[j].n.u1Write)
916 {
917 if (fFirstMsg)
918 {
919 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
920 fFirstMsg = false;
921 }
922 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch r/w gst/shw: idx=%d guest %RX64 shw=%RX64 vs %RHp\n", j, pGstPT->a[j].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[j]), HCPhys);
923 cErrors++;
924 }
925 }
926 }
927 PGMPhysReleasePageMappingLock(pVM, &LockPage);
928 }
929
930 /* Make sure this page table can't be written to from any shadow mapping. */
931 RTHCPHYS HCPhysPT = NIL_RTHCPHYS;
932 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pPage->GCPhys, &HCPhysPT);
933 AssertMsgRC(rc, ("PGMPhysGCPhys2HCPhys failed with rc=%d for %RGp\n", rc, pPage->GCPhys));
934 if (rc == VINF_SUCCESS)
935 {
936 for (unsigned j = 0; j < pPool->cCurPages; j++)
937 {
938 PPGMPOOLPAGE pTempPage = &pPool->aPages[j];
939
940 if (pTempPage->enmKind == PGMPOOLKIND_PAE_PT_FOR_PAE_PT)
941 {
942 PPGMSHWPTPAE pShwPT2 = (PPGMSHWPTPAE)PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pTempPage);
943
944 for (unsigned k = 0; k < RT_ELEMENTS(pShwPT->a); k++)
945 {
946 if ( PGMSHWPTEPAE_IS_P_RW(pShwPT2->a[k])
947# ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
948 && !pPage->fDirty
949# endif
950 && PGMSHWPTEPAE_GET_HCPHYS(pShwPT2->a[k]) == HCPhysPT)
951 {
952 if (fFirstMsg)
953 {
954 DBGCCmdHlpPrintf(pCmdHlp, "Check pool page %RGp\n", pPage->GCPhys);
955 fFirstMsg = false;
956 }
957 DBGCCmdHlpPrintf(pCmdHlp, "Mismatch: r/w: GCPhys=%RGp idx=%d shw %RX64 %RX64\n", pTempPage->GCPhys, k, PGMSHWPTEPAE_GET_LOG(pShwPT->a[k]), PGMSHWPTEPAE_GET_LOG(pShwPT2->a[k]));
958 cErrors++;
959 }
960 }
961 }
962 }
963 }
964 }
965 }
966 if (cErrors > 0)
967 return DBGCCmdHlpFail(pCmdHlp, pCmd, "Found %#x errors", cErrors);
968 return VINF_SUCCESS;
969}
970#endif /* VBOX_WITH_DEBUGGER */
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