[23] | 1 | /* $Id: PGMMap.cpp 73097 2018-07-12 21:06:33Z vboxsync $ */
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[1] | 2 | /** @file
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| 3 | * PGM - Page Manager, Guest Context Mappings.
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| 4 | */
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| 5 |
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| 6 | /*
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[69111] | 7 | * Copyright (C) 2006-2017 Oracle Corporation
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[1] | 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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[5999] | 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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[1] | 16 | */
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| 17 |
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| 18 |
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[57358] | 19 | /*********************************************************************************************************************************
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| 20 | * Header Files *
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| 21 | *********************************************************************************************************************************/
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[1] | 22 | #define LOG_GROUP LOG_GROUP_PGM
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[35346] | 23 | #include <VBox/vmm/dbgf.h>
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| 24 | #include <VBox/vmm/pgm.h>
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[1] | 25 | #include "PGMInternal.h"
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[35346] | 26 | #include <VBox/vmm/vm.h>
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[26150] | 27 | #include "PGMInline.h"
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[1] | 28 |
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| 29 | #include <VBox/log.h>
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| 30 | #include <VBox/err.h>
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| 31 | #include <iprt/asm.h>
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| 32 | #include <iprt/assert.h>
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| 33 | #include <iprt/string.h>
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| 34 |
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| 35 |
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[57358] | 36 | /*********************************************************************************************************************************
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| 37 | * Internal Functions *
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| 38 | *********************************************************************************************************************************/
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[43872] | 39 | #ifndef PGM_WITHOUT_MAPPINGS
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[16300] | 40 | static void pgmR3MapClearPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iOldPDE);
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[13236] | 41 | static void pgmR3MapSetPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iNewPDE);
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| 42 | static int pgmR3MapIntermediateCheckOne(PVM pVM, uintptr_t uAddress, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault);
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| 43 | static void pgmR3MapIntermediateDoOne(PVM pVM, uintptr_t uAddress, RTHCPHYS HCPhys, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault);
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[43872] | 44 | #else
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| 45 | # define pgmR3MapClearPDEs(pVM, pMap, iNewPDE) do { } while (0)
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| 46 | # define pgmR3MapSetPDEs(pVM, pMap, iNewPDE) do { } while (0)
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| 47 | #endif
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[1] | 48 |
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| 49 |
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| 50 | /**
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| 51 | * Creates a page table based mapping in GC.
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| 52 | *
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| 53 | * @returns VBox status code.
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[58122] | 54 | * @param pVM The cross context VM structure.
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[1] | 55 | * @param GCPtr Virtual Address. (Page table aligned!)
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| 56 | * @param cb Size of the range. Must be a 4MB aligned!
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[18291] | 57 | * @param fFlags PGMR3MAPPT_FLAGS_UNMAPPABLE or 0.
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[1] | 58 | * @param pfnRelocate Relocation callback function.
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| 59 | * @param pvUser User argument to the callback.
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| 60 | * @param pszDesc Pointer to description string. This must not be freed.
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| 61 | */
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[18291] | 62 | VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, uint32_t fFlags, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc)
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[1] | 63 | {
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[18291] | 64 | LogFlow(("PGMR3MapPT: GCPtr=%#x cb=%d fFlags=%#x pfnRelocate=%p pvUser=%p pszDesc=%s\n", GCPtr, cb, fFlags, pfnRelocate, pvUser, pszDesc));
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[17489] | 65 | AssertMsg(pVM->pgm.s.pInterPD, ("Paging isn't initialized, init order problems!\n"));
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[1] | 66 |
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| 67 | /*
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| 68 | * Validate input.
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[70372] | 69 | * Note! The lower limit (1 MB) matches how pgmR3PhysMMIOExCreate works.
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[1] | 70 | */
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[18291] | 71 | Assert(!fFlags || fFlags == PGMR3MAPPT_FLAGS_UNMAPPABLE);
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[70372] | 72 | AssertMsgReturn(cb >= _1M && cb <= _64M, ("Seriously? cb=%d (%#x)\n", cb, cb), VERR_OUT_OF_RANGE);
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| 73 |
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[6915] | 74 | cb = RT_ALIGN_32(cb, _4M);
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[1] | 75 | RTGCPTR GCPtrLast = GCPtr + cb - 1;
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| 76 |
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[25935] | 77 | AssertMsgReturn(GCPtrLast >= GCPtr, ("Range wraps! GCPtr=%x GCPtrLast=%x\n", GCPtr, GCPtrLast),
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| 78 | VERR_INVALID_PARAMETER);
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| 79 | AssertMsgReturn(!pVM->pgm.s.fMappingsFixed, ("Mappings are fixed! It's not possible to add new mappings at this time!\n"),
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| 80 | VERR_PGM_MAPPINGS_FIXED);
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| 81 | AssertPtrReturn(pfnRelocate, VERR_INVALID_PARAMETER);
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| 82 |
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[1] | 83 | /*
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| 84 | * Find list location.
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| 85 | */
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| 86 | PPGMMAPPING pPrev = NULL;
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[2270] | 87 | PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3;
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[1] | 88 | while (pCur)
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| 89 | {
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| 90 | if (pCur->GCPtrLast >= GCPtr && pCur->GCPtr <= GCPtrLast)
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| 91 | {
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| 92 | AssertMsgFailed(("Address is already in use by %s. req %#x-%#x take %#x-%#x\n",
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| 93 | pCur->pszDesc, GCPtr, GCPtrLast, pCur->GCPtr, pCur->GCPtrLast));
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[5348] | 94 | LogRel(("VERR_PGM_MAPPING_CONFLICT: Address is already in use by %s. req %#x-%#x take %#x-%#x\n",
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[1578] | 95 | pCur->pszDesc, GCPtr, GCPtrLast, pCur->GCPtr, pCur->GCPtrLast));
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[1] | 96 | return VERR_PGM_MAPPING_CONFLICT;
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| 97 | }
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| 98 | if (pCur->GCPtr > GCPtr)
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| 99 | break;
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| 100 | pPrev = pCur;
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[2270] | 101 | pCur = pCur->pNextR3;
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[1] | 102 | }
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| 103 |
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| 104 | /*
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| 105 | * Check for conflicts with intermediate mappings.
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| 106 | */
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[5629] | 107 | const unsigned iPageDir = GCPtr >> X86_PD_SHIFT;
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[16182] | 108 | const unsigned cPTs = cb >> X86_PD_SHIFT;
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| 109 | if (pVM->pgm.s.fFinalizedMappings)
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[1] | 110 | {
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[16182] | 111 | for (unsigned i = 0; i < cPTs; i++)
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| 112 | if (pVM->pgm.s.pInterPD->a[iPageDir + i].n.u1Present)
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| 113 | {
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| 114 | AssertMsgFailed(("Address %#x is already in use by an intermediate mapping.\n", GCPtr + (i << PAGE_SHIFT)));
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| 115 | LogRel(("VERR_PGM_MAPPING_CONFLICT: Address %#x is already in use by an intermediate mapping.\n", GCPtr + (i << PAGE_SHIFT)));
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| 116 | return VERR_PGM_MAPPING_CONFLICT;
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| 117 | }
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| 118 | /** @todo AMD64: add check in PAE structures too, so we can remove all the 32-Bit paging stuff there. */
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[1] | 119 | }
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| 120 |
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| 121 | /*
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| 122 | * Allocate and initialize the new list node.
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| 123 | */
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| 124 | PPGMMAPPING pNew;
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[18291] | 125 | int rc;
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| 126 | if (fFlags & PGMR3MAPPT_FLAGS_UNMAPPABLE)
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[73097] | 127 | rc = MMHyperAlloc( pVM, RT_UOFFSETOF_DYN(PGMMAPPING, aPTs[cPTs]), 0, MM_TAG_PGM_MAPPINGS, (void **)&pNew);
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[18291] | 128 | else
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[73097] | 129 | rc = MMR3HyperAllocOnceNoRel(pVM, RT_UOFFSETOF_DYN(PGMMAPPING, aPTs[cPTs]), 0, MM_TAG_PGM_MAPPINGS, (void **)&pNew);
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[13816] | 130 | if (RT_FAILURE(rc))
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[1] | 131 | return rc;
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| 132 | pNew->GCPtr = GCPtr;
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| 133 | pNew->GCPtrLast = GCPtrLast;
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| 134 | pNew->cb = cb;
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| 135 | pNew->pfnRelocate = pfnRelocate;
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| 136 | pNew->pvUser = pvUser;
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[25935] | 137 | pNew->pszDesc = pszDesc;
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[1] | 138 | pNew->cPTs = cPTs;
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| 139 |
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| 140 | /*
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| 141 | * Allocate page tables and insert them into the page directories.
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| 142 | * (One 32-bit PT and two PAE PTs.)
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| 143 | */
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| 144 | uint8_t *pbPTs;
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[18291] | 145 | if (fFlags & PGMR3MAPPT_FLAGS_UNMAPPABLE)
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| 146 | rc = MMHyperAlloc( pVM, PAGE_SIZE * 3 * cPTs, PAGE_SIZE, MM_TAG_PGM_MAPPINGS, (void **)&pbPTs);
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| 147 | else
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| 148 | rc = MMR3HyperAllocOnceNoRel(pVM, PAGE_SIZE * 3 * cPTs, PAGE_SIZE, MM_TAG_PGM_MAPPINGS, (void **)&pbPTs);
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[13816] | 149 | if (RT_FAILURE(rc))
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[1] | 150 | {
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| 151 | MMHyperFree(pVM, pNew);
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| 152 | return VERR_NO_MEMORY;
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| 153 | }
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| 154 |
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| 155 | /*
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| 156 | * Init the page tables and insert them into the page directories.
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| 157 | */
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[13823] | 158 | Log4(("PGMR3MapPT: GCPtr=%RGv cPTs=%u pbPTs=%p\n", GCPtr, cPTs, pbPTs));
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[16182] | 159 | for (unsigned i = 0; i < cPTs; i++)
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[1] | 160 | {
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| 161 | /*
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| 162 | * 32-bit.
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| 163 | */
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[7629] | 164 | pNew->aPTs[i].pPTR3 = (PX86PT)pbPTs;
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[13019] | 165 | pNew->aPTs[i].pPTRC = MMHyperR3ToRC(pVM, pNew->aPTs[i].pPTR3);
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[2270] | 166 | pNew->aPTs[i].pPTR0 = MMHyperR3ToR0(pVM, pNew->aPTs[i].pPTR3);
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| 167 | pNew->aPTs[i].HCPhysPT = MMR3HyperHCVirt2HCPhys(pVM, pNew->aPTs[i].pPTR3);
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[1] | 168 | pbPTs += PAGE_SIZE;
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[13019] | 169 | Log4(("PGMR3MapPT: i=%d: pPTR3=%RHv pPTRC=%RRv pPRTR0=%RHv HCPhysPT=%RHp\n",
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| 170 | i, pNew->aPTs[i].pPTR3, pNew->aPTs[i].pPTRC, pNew->aPTs[i].pPTR0, pNew->aPTs[i].HCPhysPT));
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[1] | 171 |
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| 172 | /*
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| 173 | * PAE.
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| 174 | */
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| 175 | pNew->aPTs[i].HCPhysPaePT0 = MMR3HyperHCVirt2HCPhys(pVM, pbPTs);
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| 176 | pNew->aPTs[i].HCPhysPaePT1 = MMR3HyperHCVirt2HCPhys(pVM, pbPTs + PAGE_SIZE);
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[31775] | 177 | pNew->aPTs[i].paPaePTsR3 = (PPGMSHWPTPAE)pbPTs;
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[13019] | 178 | pNew->aPTs[i].paPaePTsRC = MMHyperR3ToRC(pVM, pbPTs);
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[2270] | 179 | pNew->aPTs[i].paPaePTsR0 = MMHyperR3ToR0(pVM, pbPTs);
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[1] | 180 | pbPTs += PAGE_SIZE * 2;
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[13019] | 181 | Log4(("PGMR3MapPT: i=%d: paPaePTsR#=%RHv paPaePTsRC=%RRv paPaePTsR#=%RHv HCPhysPaePT0=%RHp HCPhysPaePT1=%RHp\n",
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| 182 | i, pNew->aPTs[i].paPaePTsR3, pNew->aPTs[i].paPaePTsRC, pNew->aPTs[i].paPaePTsR0, pNew->aPTs[i].HCPhysPaePT0, pNew->aPTs[i].HCPhysPaePT1));
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[1] | 183 | }
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[16182] | 184 | if (pVM->pgm.s.fFinalizedMappings)
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| 185 | pgmR3MapSetPDEs(pVM, pNew, iPageDir);
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| 186 | /* else PGMR3FinalizeMappings() */
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[1] | 187 |
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| 188 | /*
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| 189 | * Insert the new mapping.
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| 190 | */
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[2270] | 191 | pNew->pNextR3 = pCur;
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[13019] | 192 | pNew->pNextRC = pCur ? MMHyperR3ToRC(pVM, pCur) : NIL_RTRCPTR;
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| 193 | pNew->pNextR0 = pCur ? MMHyperR3ToR0(pVM, pCur) : NIL_RTR0PTR;
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[1] | 194 | if (pPrev)
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| 195 | {
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[2270] | 196 | pPrev->pNextR3 = pNew;
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[13019] | 197 | pPrev->pNextRC = MMHyperR3ToRC(pVM, pNew);
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[2270] | 198 | pPrev->pNextR0 = MMHyperR3ToR0(pVM, pNew);
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[1] | 199 | }
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| 200 | else
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| 201 | {
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[2270] | 202 | pVM->pgm.s.pMappingsR3 = pNew;
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[13019] | 203 | pVM->pgm.s.pMappingsRC = MMHyperR3ToRC(pVM, pNew);
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[2270] | 204 | pVM->pgm.s.pMappingsR0 = MMHyperR3ToR0(pVM, pNew);
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[1] | 205 | }
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| 206 |
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[22890] | 207 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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[19141] | 208 | {
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| 209 | PVMCPU pVCpu = &pVM->aCpus[i];
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| 210 | VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
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| 211 | }
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[1] | 212 | return VINF_SUCCESS;
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| 213 | }
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| 214 |
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[43872] | 215 | #ifdef VBOX_WITH_UNUSED_CODE
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[1] | 216 |
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| 217 | /**
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| 218 | * Removes a page table based mapping.
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| 219 | *
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| 220 | * @returns VBox status code.
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[58122] | 221 | * @param pVM The cross context VM structure.
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[1] | 222 | * @param GCPtr Virtual Address. (Page table aligned!)
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[18291] | 223 | *
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| 224 | * @remarks Don't call this without passing PGMR3MAPPT_FLAGS_UNMAPPABLE to
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| 225 | * PGMR3MapPT or you'll burn in the heap.
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[1] | 226 | */
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[12989] | 227 | VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr)
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[1] | 228 | {
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| 229 | LogFlow(("PGMR3UnmapPT: GCPtr=%#x\n", GCPtr));
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[16182] | 230 | AssertReturn(pVM->pgm.s.fFinalizedMappings, VERR_WRONG_ORDER);
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[1] | 231 |
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| 232 | /*
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| 233 | * Find it.
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| 234 | */
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| 235 | PPGMMAPPING pPrev = NULL;
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[2270] | 236 | PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3;
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[1] | 237 | while (pCur)
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| 238 | {
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| 239 | if (pCur->GCPtr == GCPtr)
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| 240 | {
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| 241 | /*
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| 242 | * Unlink it.
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| 243 | */
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| 244 | if (pPrev)
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| 245 | {
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[2270] | 246 | pPrev->pNextR3 = pCur->pNextR3;
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[13019] | 247 | pPrev->pNextRC = pCur->pNextRC;
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[2270] | 248 | pPrev->pNextR0 = pCur->pNextR0;
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[1] | 249 | }
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| 250 | else
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| 251 | {
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[2270] | 252 | pVM->pgm.s.pMappingsR3 = pCur->pNextR3;
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[13019] | 253 | pVM->pgm.s.pMappingsRC = pCur->pNextRC;
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[2270] | 254 | pVM->pgm.s.pMappingsR0 = pCur->pNextR0;
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[1] | 255 | }
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| 256 |
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| 257 | /*
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| 258 | * Free the page table memory, clear page directory entries
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| 259 | * and free the page tables and node memory.
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| 260 | */
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[2270] | 261 | MMHyperFree(pVM, pCur->aPTs[0].pPTR3);
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[25935] | 262 | if (pCur->GCPtr != NIL_RTGCPTR)
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| 263 | pgmR3MapClearPDEs(pVM, pCur, pCur->GCPtr >> X86_PD_SHIFT);
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[1] | 264 | MMHyperFree(pVM, pCur);
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| 265 |
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[22890] | 266 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
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[19141] | 267 | {
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| 268 | PVMCPU pVCpu = &pVM->aCpus[i];
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| 269 | VMCPU_FF_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
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| 270 | }
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[1] | 271 | return VINF_SUCCESS;
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| 272 | }
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| 273 |
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| 274 | /* done? */
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| 275 | if (pCur->GCPtr > GCPtr)
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| 276 | break;
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| 277 |
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| 278 | /* next */
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| 279 | pPrev = pCur;
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[2270] | 280 | pCur = pCur->pNextR3;
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[1] | 281 | }
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| 282 |
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| 283 | AssertMsgFailed(("No mapping for %#x found!\n", GCPtr));
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| 284 | return VERR_INVALID_PARAMETER;
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| 285 | }
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| 286 |
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[43872] | 287 | #endif /* unused */
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[1] | 288 |
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[43872] | 289 |
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[1] | 290 | /**
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[16182] | 291 | * Checks whether a range of PDEs in the intermediate
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| 292 | * memory context are unused.
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| 293 | *
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| 294 | * We're talking 32-bit PDEs here.
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| 295 | *
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| 296 | * @returns true/false.
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[58122] | 297 | * @param pVM The cross context VM structure.
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[16182] | 298 | * @param iPD The first PDE in the range.
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| 299 | * @param cPTs The number of PDEs in the range.
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| 300 | */
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| 301 | DECLINLINE(bool) pgmR3AreIntermediatePDEsUnused(PVM pVM, unsigned iPD, unsigned cPTs)
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| 302 | {
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| 303 | if (pVM->pgm.s.pInterPD->a[iPD].n.u1Present)
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| 304 | return false;
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| 305 | while (cPTs > 1)
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| 306 | {
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| 307 | iPD++;
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| 308 | if (pVM->pgm.s.pInterPD->a[iPD].n.u1Present)
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| 309 | return false;
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| 310 | cPTs--;
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| 311 | }
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| 312 | return true;
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| 313 | }
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| 314 |
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| 315 |
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| 316 | /**
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| 317 | * Unlinks the mapping.
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| 318 | *
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| 319 | * The mapping *must* be in the list.
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| 320 | *
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[58122] | 321 | * @param pVM The cross context VM structure.
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[16182] | 322 | * @param pMapping The mapping to unlink.
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| 323 | */
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| 324 | static void pgmR3MapUnlink(PVM pVM, PPGMMAPPING pMapping)
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| 325 | {
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| 326 | PPGMMAPPING pAfterThis = pVM->pgm.s.pMappingsR3;
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| 327 | if (pAfterThis == pMapping)
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| 328 | {
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| 329 | /* head */
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| 330 | pVM->pgm.s.pMappingsR3 = pMapping->pNextR3;
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| 331 | pVM->pgm.s.pMappingsRC = pMapping->pNextRC;
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| 332 | pVM->pgm.s.pMappingsR0 = pMapping->pNextR0;
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| 333 | }
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| 334 | else
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| 335 | {
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| 336 | /* in the list */
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| 337 | while (pAfterThis->pNextR3 != pMapping)
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| 338 | {
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| 339 | pAfterThis = pAfterThis->pNextR3;
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| 340 | AssertReleaseReturnVoid(pAfterThis);
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| 341 | }
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| 342 |
|
---|
| 343 | pAfterThis->pNextR3 = pMapping->pNextR3;
|
---|
| 344 | pAfterThis->pNextRC = pMapping->pNextRC;
|
---|
| 345 | pAfterThis->pNextR0 = pMapping->pNextR0;
|
---|
| 346 | }
|
---|
| 347 | }
|
---|
| 348 |
|
---|
| 349 |
|
---|
| 350 | /**
|
---|
| 351 | * Links the mapping.
|
---|
| 352 | *
|
---|
[58122] | 353 | * @param pVM The cross context VM structure.
|
---|
[16182] | 354 | * @param pMapping The mapping to linked.
|
---|
| 355 | */
|
---|
| 356 | static void pgmR3MapLink(PVM pVM, PPGMMAPPING pMapping)
|
---|
| 357 | {
|
---|
| 358 | /*
|
---|
| 359 | * Find the list location (it's sorted by GCPhys) and link it in.
|
---|
| 360 | */
|
---|
| 361 | if ( !pVM->pgm.s.pMappingsR3
|
---|
| 362 | || pVM->pgm.s.pMappingsR3->GCPtr > pMapping->GCPtr)
|
---|
| 363 | {
|
---|
| 364 | /* head */
|
---|
| 365 | pMapping->pNextR3 = pVM->pgm.s.pMappingsR3;
|
---|
| 366 | pMapping->pNextRC = pVM->pgm.s.pMappingsRC;
|
---|
| 367 | pMapping->pNextR0 = pVM->pgm.s.pMappingsR0;
|
---|
| 368 | pVM->pgm.s.pMappingsR3 = pMapping;
|
---|
| 369 | pVM->pgm.s.pMappingsRC = MMHyperR3ToRC(pVM, pMapping);
|
---|
| 370 | pVM->pgm.s.pMappingsR0 = MMHyperR3ToR0(pVM, pMapping);
|
---|
| 371 | }
|
---|
| 372 | else
|
---|
| 373 | {
|
---|
| 374 | /* in the list */
|
---|
| 375 | PPGMMAPPING pAfterThis = pVM->pgm.s.pMappingsR3;
|
---|
| 376 | PPGMMAPPING pBeforeThis = pAfterThis->pNextR3;
|
---|
| 377 | while (pBeforeThis && pBeforeThis->GCPtr <= pMapping->GCPtr)
|
---|
| 378 | {
|
---|
| 379 | pAfterThis = pBeforeThis;
|
---|
| 380 | pBeforeThis = pBeforeThis->pNextR3;
|
---|
| 381 | }
|
---|
| 382 |
|
---|
| 383 | pMapping->pNextR3 = pAfterThis->pNextR3;
|
---|
| 384 | pMapping->pNextRC = pAfterThis->pNextRC;
|
---|
| 385 | pMapping->pNextR0 = pAfterThis->pNextR0;
|
---|
| 386 | pAfterThis->pNextR3 = pMapping;
|
---|
| 387 | pAfterThis->pNextRC = MMHyperR3ToRC(pVM, pMapping);
|
---|
| 388 | pAfterThis->pNextR0 = MMHyperR3ToR0(pVM, pMapping);
|
---|
| 389 | }
|
---|
| 390 | }
|
---|
| 391 |
|
---|
| 392 |
|
---|
| 393 | /**
|
---|
| 394 | * Finalizes the intermediate context.
|
---|
| 395 | *
|
---|
| 396 | * This is called at the end of the ring-3 init and will construct the
|
---|
| 397 | * intermediate paging structures, relocating all the mappings in the process.
|
---|
| 398 | *
|
---|
| 399 | * @returns VBox status code.
|
---|
[58122] | 400 | * @param pVM The cross context VM structure.
|
---|
[16182] | 401 | * @thread EMT(0)
|
---|
| 402 | */
|
---|
| 403 | VMMR3DECL(int) PGMR3FinalizeMappings(PVM pVM)
|
---|
| 404 | {
|
---|
| 405 | AssertReturn(!pVM->pgm.s.fFinalizedMappings, VERR_WRONG_ORDER);
|
---|
| 406 | pVM->pgm.s.fFinalizedMappings = true;
|
---|
| 407 |
|
---|
| 408 | /*
|
---|
| 409 | * Loop until all mappings have been finalized.
|
---|
| 410 | */
|
---|
| 411 | #if 0
|
---|
[25935] | 412 | unsigned iPDNext = UINT32_C(0xc0000000) >> X86_PD_SHIFT; /* makes CSAM/PATM freak out booting linux. :-/ */
|
---|
| 413 | #elif 0
|
---|
[16182] | 414 | unsigned iPDNext = MM_HYPER_AREA_ADDRESS >> X86_PD_SHIFT;
|
---|
| 415 | #else
|
---|
| 416 | unsigned iPDNext = 1 << X86_PD_SHIFT; /* no hint, map them from the top. */
|
---|
| 417 | #endif
|
---|
[25935] | 418 |
|
---|
[16182] | 419 | PPGMMAPPING pCur;
|
---|
| 420 | do
|
---|
| 421 | {
|
---|
| 422 | pCur = pVM->pgm.s.pMappingsR3;
|
---|
| 423 | while (pCur)
|
---|
| 424 | {
|
---|
| 425 | if (!pCur->fFinalized)
|
---|
| 426 | {
|
---|
| 427 | /*
|
---|
| 428 | * Find a suitable location.
|
---|
| 429 | */
|
---|
| 430 | RTGCPTR const GCPtrOld = pCur->GCPtr;
|
---|
| 431 | const unsigned cPTs = pCur->cPTs;
|
---|
| 432 | unsigned iPDNew = iPDNext;
|
---|
| 433 | if ( iPDNew + cPTs >= X86_PG_ENTRIES /* exclude the last PD */
|
---|
| 434 | || !pgmR3AreIntermediatePDEsUnused(pVM, iPDNew, cPTs)
|
---|
| 435 | || !pCur->pfnRelocate(pVM, GCPtrOld, (RTGCPTR)iPDNew << X86_PD_SHIFT, PGMRELOCATECALL_SUGGEST, pCur->pvUser))
|
---|
| 436 | {
|
---|
| 437 | /* No luck, just scan down from 4GB-4MB, giving up at 4MB. */
|
---|
| 438 | iPDNew = X86_PG_ENTRIES - cPTs - 1;
|
---|
| 439 | while ( iPDNew > 0
|
---|
| 440 | && ( !pgmR3AreIntermediatePDEsUnused(pVM, iPDNew, cPTs)
|
---|
| 441 | || !pCur->pfnRelocate(pVM, GCPtrOld, (RTGCPTR)iPDNew << X86_PD_SHIFT, PGMRELOCATECALL_SUGGEST, pCur->pvUser))
|
---|
| 442 | )
|
---|
| 443 | iPDNew--;
|
---|
| 444 | AssertLogRelReturn(iPDNew != 0, VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
| 445 | }
|
---|
| 446 |
|
---|
| 447 | /*
|
---|
| 448 | * Relocate it (something akin to pgmR3MapRelocate).
|
---|
| 449 | */
|
---|
| 450 | pgmR3MapSetPDEs(pVM, pCur, iPDNew);
|
---|
| 451 |
|
---|
| 452 | /* unlink the mapping, update the entry and relink it. */
|
---|
| 453 | pgmR3MapUnlink(pVM, pCur);
|
---|
| 454 |
|
---|
| 455 | RTGCPTR const GCPtrNew = (RTGCPTR)iPDNew << X86_PD_SHIFT;
|
---|
| 456 | pCur->GCPtr = GCPtrNew;
|
---|
| 457 | pCur->GCPtrLast = GCPtrNew + pCur->cb - 1;
|
---|
| 458 | pCur->fFinalized = true;
|
---|
| 459 |
|
---|
| 460 | pgmR3MapLink(pVM, pCur);
|
---|
| 461 |
|
---|
| 462 | /* Finally work the callback. */
|
---|
| 463 | pCur->pfnRelocate(pVM, GCPtrOld, GCPtrNew, PGMRELOCATECALL_RELOCATE, pCur->pvUser);
|
---|
| 464 |
|
---|
| 465 | /*
|
---|
| 466 | * The list order might have changed, start from the beginning again.
|
---|
| 467 | */
|
---|
| 468 | iPDNext = iPDNew + cPTs;
|
---|
| 469 | break;
|
---|
| 470 | }
|
---|
| 471 |
|
---|
| 472 | /* next */
|
---|
| 473 | pCur = pCur->pNextR3;
|
---|
| 474 | }
|
---|
| 475 | } while (pCur);
|
---|
| 476 |
|
---|
| 477 | return VINF_SUCCESS;
|
---|
| 478 | }
|
---|
| 479 |
|
---|
| 480 |
|
---|
| 481 | /**
|
---|
[1] | 482 | * Gets the size of the current guest mappings if they were to be
|
---|
[33540] | 483 | * put next to one another.
|
---|
[1] | 484 | *
|
---|
| 485 | * @returns VBox status code.
|
---|
[58122] | 486 | * @param pVM The cross context VM structure.
|
---|
[1] | 487 | * @param pcb Where to store the size.
|
---|
| 488 | */
|
---|
[12989] | 489 | VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb)
|
---|
[1] | 490 | {
|
---|
[13937] | 491 | RTGCPTR cb = 0;
|
---|
[43872] | 492 | #ifndef PGM_WITHOUT_MAPPINGS
|
---|
[2270] | 493 | for (PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3; pCur; pCur = pCur->pNextR3)
|
---|
[1] | 494 | cb += pCur->cb;
|
---|
[63429] | 495 | #else
|
---|
| 496 | RT_NOREF(pVM);
|
---|
[43872] | 497 | #endif
|
---|
[1] | 498 |
|
---|
| 499 | *pcb = cb;
|
---|
[6916] | 500 | AssertReturn(*pcb == cb, VERR_NUMBER_TOO_BIG);
|
---|
[1] | 501 | Log(("PGMR3MappingsSize: return %d (%#x) bytes\n", cb, cb));
|
---|
| 502 | return VINF_SUCCESS;
|
---|
| 503 | }
|
---|
| 504 |
|
---|
| 505 |
|
---|
| 506 | /**
|
---|
[25935] | 507 | * Fixates the guest context mappings in a range reserved from the Guest OS.
|
---|
[1] | 508 | *
|
---|
| 509 | * @returns VBox status code.
|
---|
[58122] | 510 | * @param pVM The cross context VM structure.
|
---|
[1] | 511 | * @param GCPtrBase The address of the reserved range of guest memory.
|
---|
| 512 | * @param cb The size of the range starting at GCPtrBase.
|
---|
| 513 | */
|
---|
[12989] | 514 | VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb)
|
---|
[1] | 515 | {
|
---|
[45739] | 516 | Log(("PGMR3MappingsFix: GCPtrBase=%RGv cb=%#x (fMappingsFixed=%RTbool MappingEnabled=%RTbool)\n",
|
---|
| 517 | GCPtrBase, cb, pVM->pgm.s.fMappingsFixed, pgmMapAreMappingsEnabled(pVM)));
|
---|
[1] | 518 |
|
---|
[43872] | 519 | #ifndef PGM_WITHOUT_MAPPINGS
|
---|
| 520 | if (pgmMapAreMappingsEnabled(pVM))
|
---|
[25935] | 521 | {
|
---|
[43872] | 522 | /*
|
---|
| 523 | * Only applies to VCPU 0 as we don't support SMP guests with raw mode.
|
---|
| 524 | */
|
---|
| 525 | Assert(pVM->cCpus == 1);
|
---|
| 526 | PVMCPU pVCpu = &pVM->aCpus[0];
|
---|
[11964] | 527 |
|
---|
[43872] | 528 | /*
|
---|
| 529 | * Before we do anything we'll do a forced PD sync to try make sure any
|
---|
| 530 | * pending relocations because of these mappings have been resolved.
|
---|
| 531 | */
|
---|
| 532 | PGMSyncCR3(pVCpu, CPUMGetGuestCR0(pVCpu), CPUMGetGuestCR3(pVCpu), CPUMGetGuestCR4(pVCpu), true);
|
---|
[18927] | 533 |
|
---|
[43872] | 534 | return pgmR3MappingsFixInternal(pVM, GCPtrBase, cb);
|
---|
| 535 | }
|
---|
[1] | 536 |
|
---|
[63429] | 537 | #else /* PGM_WITHOUT_MAPPINGS */
|
---|
| 538 | RT_NOREF(pVM, GCPtrBase, cb);
|
---|
| 539 | #endif /* PGM_WITHOUT_MAPPINGS */
|
---|
| 540 |
|
---|
[70948] | 541 | Assert(!VM_IS_RAW_MODE_ENABLED(pVM));
|
---|
[43872] | 542 | return VINF_SUCCESS;
|
---|
[25935] | 543 | }
|
---|
| 544 |
|
---|
| 545 |
|
---|
[43872] | 546 | #ifndef PGM_WITHOUT_MAPPINGS
|
---|
[25935] | 547 | /**
|
---|
| 548 | * Internal worker for PGMR3MappingsFix and pgmR3Load.
|
---|
| 549 | *
|
---|
| 550 | * (This does not perform a SyncCR3 before the fixation like PGMR3MappingsFix.)
|
---|
| 551 | *
|
---|
| 552 | * @returns VBox status code.
|
---|
[58122] | 553 | * @param pVM The cross context VM structure.
|
---|
[25935] | 554 | * @param GCPtrBase The address of the reserved range of guest memory.
|
---|
| 555 | * @param cb The size of the range starting at GCPtrBase.
|
---|
| 556 | */
|
---|
| 557 | int pgmR3MappingsFixInternal(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb)
|
---|
| 558 | {
|
---|
[1] | 559 | /*
|
---|
[25935] | 560 | * Check input arguments and pre-conditions.
|
---|
| 561 | */
|
---|
| 562 | AssertMsgReturn(!(GCPtrBase & X86_PAGE_4M_OFFSET_MASK), ("GCPtrBase (%#x) has to be aligned on a 4MB address!\n", GCPtrBase),
|
---|
| 563 | VERR_INVALID_PARAMETER);
|
---|
| 564 | AssertMsgReturn(cb && !(cb & X86_PAGE_4M_OFFSET_MASK), ("cb (%#x) is 0 or not aligned on a 4MB address!\n", cb),
|
---|
| 565 | VERR_INVALID_PARAMETER);
|
---|
[39402] | 566 | AssertReturn(pgmMapAreMappingsEnabled(pVM), VERR_PGM_MAPPINGS_DISABLED);
|
---|
| 567 | AssertReturn(pVM->cCpus == 1, VERR_PGM_MAPPINGS_SMP);
|
---|
[25935] | 568 |
|
---|
| 569 | /*
|
---|
[1] | 570 | * Check that it's not conflicting with a core code mapping in the intermediate page table.
|
---|
| 571 | */
|
---|
[5629] | 572 | unsigned iPDNew = GCPtrBase >> X86_PD_SHIFT;
|
---|
| 573 | unsigned i = cb >> X86_PD_SHIFT;
|
---|
[1] | 574 | while (i-- > 0)
|
---|
| 575 | {
|
---|
| 576 | if (pVM->pgm.s.pInterPD->a[iPDNew + i].n.u1Present)
|
---|
| 577 | {
|
---|
| 578 | /* Check that it's not one or our mappings. */
|
---|
[2270] | 579 | PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3;
|
---|
[1] | 580 | while (pCur)
|
---|
| 581 | {
|
---|
[5629] | 582 | if (iPDNew + i - (pCur->GCPtr >> X86_PD_SHIFT) < (pCur->cb >> X86_PD_SHIFT))
|
---|
[1] | 583 | break;
|
---|
[2270] | 584 | pCur = pCur->pNextR3;
|
---|
[1] | 585 | }
|
---|
| 586 | if (!pCur)
|
---|
| 587 | {
|
---|
[13823] | 588 | LogRel(("PGMR3MappingsFix: Conflicts with intermediate PDE %#x (GCPtrBase=%RGv cb=%#zx). The guest should retry.\n",
|
---|
[1] | 589 | iPDNew + i, GCPtrBase, cb));
|
---|
| 590 | return VERR_PGM_MAPPINGS_FIX_CONFLICT;
|
---|
| 591 | }
|
---|
| 592 | }
|
---|
| 593 | }
|
---|
| 594 |
|
---|
| 595 | /*
|
---|
[14131] | 596 | * In PAE / PAE mode, make sure we don't cross page directories.
|
---|
| 597 | */
|
---|
[25935] | 598 | PVMCPU pVCpu = &pVM->aCpus[0];
|
---|
[18927] | 599 | if ( ( pVCpu->pgm.s.enmGuestMode == PGMMODE_PAE
|
---|
| 600 | || pVCpu->pgm.s.enmGuestMode == PGMMODE_PAE_NX)
|
---|
| 601 | && ( pVCpu->pgm.s.enmShadowMode == PGMMODE_PAE
|
---|
| 602 | || pVCpu->pgm.s.enmShadowMode == PGMMODE_PAE_NX))
|
---|
[14131] | 603 | {
|
---|
| 604 | unsigned iPdptBase = GCPtrBase >> X86_PDPT_SHIFT;
|
---|
| 605 | unsigned iPdptLast = (GCPtrBase + cb - 1) >> X86_PDPT_SHIFT;
|
---|
| 606 | if (iPdptBase != iPdptLast)
|
---|
| 607 | {
|
---|
[33540] | 608 | LogRel(("PGMR3MappingsFix: Crosses PD boundary; iPdptBase=%#x iPdptLast=%#x (GCPtrBase=%RGv cb=%#zx). The guest should retry.\n",
|
---|
[14131] | 609 | iPdptBase, iPdptLast, GCPtrBase, cb));
|
---|
| 610 | return VERR_PGM_MAPPINGS_FIX_CONFLICT;
|
---|
| 611 | }
|
---|
| 612 | }
|
---|
| 613 |
|
---|
| 614 | /*
|
---|
[1] | 615 | * Loop the mappings and check that they all agree on their new locations.
|
---|
| 616 | */
|
---|
| 617 | RTGCPTR GCPtrCur = GCPtrBase;
|
---|
[2270] | 618 | PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3;
|
---|
[1] | 619 | while (pCur)
|
---|
| 620 | {
|
---|
| 621 | if (!pCur->pfnRelocate(pVM, pCur->GCPtr, GCPtrCur, PGMRELOCATECALL_SUGGEST, pCur->pvUser))
|
---|
| 622 | {
|
---|
| 623 | AssertMsgFailed(("The suggested fixed address %#x was rejected by '%s'!\n", GCPtrCur, pCur->pszDesc));
|
---|
| 624 | return VERR_PGM_MAPPINGS_FIX_REJECTED;
|
---|
| 625 | }
|
---|
| 626 | /* next */
|
---|
| 627 | GCPtrCur += pCur->cb;
|
---|
[2270] | 628 | pCur = pCur->pNextR3;
|
---|
[1] | 629 | }
|
---|
| 630 | if (GCPtrCur > GCPtrBase + cb)
|
---|
| 631 | {
|
---|
| 632 | AssertMsgFailed(("cb (%#x) is less than the required range %#x!\n", cb, GCPtrCur - GCPtrBase));
|
---|
| 633 | return VERR_PGM_MAPPINGS_FIX_TOO_SMALL;
|
---|
| 634 | }
|
---|
| 635 |
|
---|
| 636 | /*
|
---|
| 637 | * Loop the table assigning the mappings to the passed in memory
|
---|
| 638 | * and call their relocator callback.
|
---|
| 639 | */
|
---|
| 640 | GCPtrCur = GCPtrBase;
|
---|
[2270] | 641 | pCur = pVM->pgm.s.pMappingsR3;
|
---|
[1] | 642 | while (pCur)
|
---|
| 643 | {
|
---|
[25935] | 644 | RTGCPTR const GCPtrOld = pCur->GCPtr;
|
---|
[1] | 645 |
|
---|
| 646 | /*
|
---|
| 647 | * Relocate the page table(s).
|
---|
| 648 | */
|
---|
[25935] | 649 | if (pCur->GCPtr != NIL_RTGCPTR)
|
---|
| 650 | pgmR3MapClearPDEs(pVM, pCur, GCPtrOld >> X86_PD_SHIFT);
|
---|
| 651 | pgmR3MapSetPDEs(pVM, pCur, GCPtrCur >> X86_PD_SHIFT);
|
---|
[1] | 652 |
|
---|
| 653 | /*
|
---|
| 654 | * Update the entry.
|
---|
| 655 | */
|
---|
| 656 | pCur->GCPtr = GCPtrCur;
|
---|
| 657 | pCur->GCPtrLast = GCPtrCur + pCur->cb - 1;
|
---|
| 658 |
|
---|
| 659 | /*
|
---|
| 660 | * Callback to execute the relocation.
|
---|
| 661 | */
|
---|
[25935] | 662 | pCur->pfnRelocate(pVM, GCPtrOld, GCPtrCur, PGMRELOCATECALL_RELOCATE, pCur->pvUser);
|
---|
[1] | 663 |
|
---|
| 664 | /*
|
---|
| 665 | * Advance.
|
---|
| 666 | */
|
---|
| 667 | GCPtrCur += pCur->cb;
|
---|
[2270] | 668 | pCur = pCur->pNextR3;
|
---|
[1] | 669 | }
|
---|
| 670 |
|
---|
| 671 | /*
|
---|
[25935] | 672 | * Mark the mappings as fixed at this new location and return.
|
---|
[1] | 673 | */
|
---|
[25935] | 674 | pVM->pgm.s.fMappingsFixed = true;
|
---|
| 675 | pVM->pgm.s.fMappingsFixedRestored = false;
|
---|
| 676 | pVM->pgm.s.GCPtrMappingFixed = GCPtrBase;
|
---|
| 677 | pVM->pgm.s.cbMappingFixed = cb;
|
---|
[18927] | 678 |
|
---|
[25227] | 679 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
|
---|
[18927] | 680 | {
|
---|
[25227] | 681 | pVM->aCpus[idCpu].pgm.s.fSyncFlags &= ~PGM_SYNC_MONITOR_CR3;
|
---|
| 682 | VMCPU_FF_SET(&pVM->aCpus[idCpu], VMCPU_FF_PGM_SYNC_CR3);
|
---|
[18927] | 683 | }
|
---|
[1] | 684 | return VINF_SUCCESS;
|
---|
| 685 | }
|
---|
[43872] | 686 | #endif /*!PGM_WITHOUT_MAPPINGS*/
|
---|
[1] | 687 |
|
---|
[25935] | 688 |
|
---|
[16408] | 689 | /**
|
---|
[1] | 690 | * Unfixes the mappings.
|
---|
| 691 | *
|
---|
[25935] | 692 | * Unless PGMR3MappingsDisable is in effect, mapping conflict detection will be
|
---|
| 693 | * enabled after this call. If the mappings are fixed, a full CR3 resync will
|
---|
| 694 | * take place afterwards.
|
---|
| 695 | *
|
---|
[1] | 696 | * @returns VBox status code.
|
---|
[58122] | 697 | * @param pVM The cross context VM structure.
|
---|
[1] | 698 | */
|
---|
[12989] | 699 | VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM)
|
---|
[1] | 700 | {
|
---|
[45739] | 701 | Log(("PGMR3MappingsUnfix: fMappingsFixed=%RTbool MappingsEnabled=%RTbool\n", pVM->pgm.s.fMappingsFixed, pgmMapAreMappingsEnabled(pVM)));
|
---|
[36891] | 702 | if ( pgmMapAreMappingsEnabled(pVM)
|
---|
[25935] | 703 | && ( pVM->pgm.s.fMappingsFixed
|
---|
| 704 | || pVM->pgm.s.fMappingsFixedRestored)
|
---|
| 705 | )
|
---|
| 706 | {
|
---|
| 707 | bool const fResyncCR3 = pVM->pgm.s.fMappingsFixed;
|
---|
[11964] | 708 |
|
---|
[25935] | 709 | pVM->pgm.s.fMappingsFixed = false;
|
---|
| 710 | pVM->pgm.s.fMappingsFixedRestored = false;
|
---|
| 711 | pVM->pgm.s.GCPtrMappingFixed = 0;
|
---|
| 712 | pVM->pgm.s.cbMappingFixed = 0;
|
---|
[11964] | 713 |
|
---|
[25935] | 714 | if (fResyncCR3)
|
---|
| 715 | for (VMCPUID i = 0; i < pVM->cCpus; i++)
|
---|
| 716 | VMCPU_FF_SET(&pVM->aCpus[i], VMCPU_FF_PGM_SYNC_CR3);
|
---|
[18927] | 717 | }
|
---|
[1] | 718 | return VINF_SUCCESS;
|
---|
| 719 | }
|
---|
| 720 |
|
---|
| 721 |
|
---|
| 722 | /**
|
---|
[25935] | 723 | * Checks if the mappings needs re-fixing after a restore.
|
---|
| 724 | *
|
---|
| 725 | * @returns true if they need, false if not.
|
---|
[58122] | 726 | * @param pVM The cross context VM structure.
|
---|
[25935] | 727 | */
|
---|
| 728 | VMMR3DECL(bool) PGMR3MappingsNeedReFixing(PVM pVM)
|
---|
| 729 | {
|
---|
| 730 | VM_ASSERT_VALID_EXT_RETURN(pVM, false);
|
---|
| 731 | return pVM->pgm.s.fMappingsFixedRestored;
|
---|
| 732 | }
|
---|
| 733 |
|
---|
[43872] | 734 | #ifndef PGM_WITHOUT_MAPPINGS
|
---|
[25935] | 735 |
|
---|
| 736 | /**
|
---|
[1] | 737 | * Map pages into the intermediate context (switcher code).
|
---|
| 738 | *
|
---|
[25935] | 739 | * These pages are mapped at both the give virtual address and at the physical
|
---|
| 740 | * address (for identity mapping).
|
---|
| 741 | *
|
---|
[1] | 742 | * @returns VBox status code.
|
---|
[58122] | 743 | * @param pVM The cross context VM structure.
|
---|
[914] | 744 | * @param Addr Intermediate context address of the mapping.
|
---|
[1] | 745 | * @param HCPhys Start of the range of physical pages. This must be entriely below 4GB!
|
---|
| 746 | * @param cbPages Number of bytes to map.
|
---|
| 747 | *
|
---|
| 748 | * @remark This API shall not be used to anything but mapping the switcher code.
|
---|
[7658] | 749 | */
|
---|
[12989] | 750 | VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages)
|
---|
[1] | 751 | {
|
---|
[13819] | 752 | LogFlow(("PGMR3MapIntermediate: Addr=%RTptr HCPhys=%RHp cbPages=%#x\n", Addr, HCPhys, cbPages));
|
---|
[1] | 753 |
|
---|
| 754 | /*
|
---|
| 755 | * Adjust input.
|
---|
| 756 | */
|
---|
| 757 | cbPages += (uint32_t)HCPhys & PAGE_OFFSET_MASK;
|
---|
| 758 | cbPages = RT_ALIGN(cbPages, PAGE_SIZE);
|
---|
[32036] | 759 | HCPhys &= X86_PTE_PAE_PG_MASK;
|
---|
[914] | 760 | Addr &= PAGE_BASE_MASK;
|
---|
[1] | 761 | /* We only care about the first 4GB, because on AMD64 we'll be repeating them all over the address space. */
|
---|
[914] | 762 | uint32_t uAddress = (uint32_t)Addr;
|
---|
[1] | 763 |
|
---|
| 764 | /*
|
---|
| 765 | * Assert input and state.
|
---|
| 766 | */
|
---|
| 767 | AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n"));
|
---|
| 768 | AssertMsg(pVM->pgm.s.pInterPD, ("Bad init order, paging.\n"));
|
---|
| 769 | AssertMsg(cbPages <= (512 << PAGE_SHIFT), ("The mapping is too big %d bytes\n", cbPages));
|
---|
[13819] | 770 | AssertMsg(HCPhys < _4G && HCPhys + cbPages < _4G, ("Addr=%RTptr HCPhys=%RHp cbPages=%d\n", Addr, HCPhys, cbPages));
|
---|
[16182] | 771 | AssertReturn(!pVM->pgm.s.fFinalizedMappings, VERR_WRONG_ORDER);
|
---|
[1] | 772 |
|
---|
| 773 | /*
|
---|
| 774 | * Check for internal conflicts between the virtual address and the physical address.
|
---|
[16182] | 775 | * A 1:1 mapping is fine, but partial overlapping is a no-no.
|
---|
[1] | 776 | */
|
---|
| 777 | if ( uAddress != HCPhys
|
---|
| 778 | && ( uAddress < HCPhys
|
---|
| 779 | ? HCPhys - uAddress < cbPages
|
---|
| 780 | : uAddress - HCPhys < cbPages
|
---|
| 781 | )
|
---|
| 782 | )
|
---|
[13819] | 783 | AssertLogRelMsgFailedReturn(("Addr=%RTptr HCPhys=%RHp cbPages=%d\n", Addr, HCPhys, cbPages),
|
---|
[8543] | 784 | VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
[1] | 785 |
|
---|
| 786 | const unsigned cPages = cbPages >> PAGE_SHIFT;
|
---|
| 787 | int rc = pgmR3MapIntermediateCheckOne(pVM, uAddress, cPages, pVM->pgm.s.apInterPTs[0], pVM->pgm.s.apInterPaePTs[0]);
|
---|
[13816] | 788 | if (RT_FAILURE(rc))
|
---|
[1] | 789 | return rc;
|
---|
| 790 | rc = pgmR3MapIntermediateCheckOne(pVM, (uintptr_t)HCPhys, cPages, pVM->pgm.s.apInterPTs[1], pVM->pgm.s.apInterPaePTs[1]);
|
---|
[13816] | 791 | if (RT_FAILURE(rc))
|
---|
[1] | 792 | return rc;
|
---|
| 793 |
|
---|
| 794 | /*
|
---|
| 795 | * Everythings fine, do the mapping.
|
---|
| 796 | */
|
---|
| 797 | pgmR3MapIntermediateDoOne(pVM, uAddress, HCPhys, cPages, pVM->pgm.s.apInterPTs[0], pVM->pgm.s.apInterPaePTs[0]);
|
---|
| 798 | pgmR3MapIntermediateDoOne(pVM, (uintptr_t)HCPhys, HCPhys, cPages, pVM->pgm.s.apInterPTs[1], pVM->pgm.s.apInterPaePTs[1]);
|
---|
| 799 |
|
---|
| 800 | return VINF_SUCCESS;
|
---|
| 801 | }
|
---|
| 802 |
|
---|
| 803 |
|
---|
| 804 | /**
|
---|
| 805 | * Validates that there are no conflicts for this mapping into the intermediate context.
|
---|
| 806 | *
|
---|
| 807 | * @returns VBox status code.
|
---|
[58122] | 808 | * @param pVM The cross context VM structure.
|
---|
[41386] | 809 | * @param uAddress Address of the mapping.
|
---|
| 810 | * @param cPages Number of pages.
|
---|
[1] | 811 | * @param pPTDefault Pointer to the default page table for this mapping.
|
---|
| 812 | * @param pPTPaeDefault Pointer to the default page table for this mapping.
|
---|
| 813 | */
|
---|
| 814 | static int pgmR3MapIntermediateCheckOne(PVM pVM, uintptr_t uAddress, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault)
|
---|
| 815 | {
|
---|
[41386] | 816 | AssertMsg((uAddress >> X86_PD_SHIFT) + cPages <= 1024, ("64-bit fixme uAddress=%RGv cPages=%u\n", uAddress, cPages));
|
---|
[1] | 817 |
|
---|
| 818 | /*
|
---|
| 819 | * Check that the ranges are available.
|
---|
[14716] | 820 | * (This code doesn't have to be fast.)
|
---|
[1] | 821 | */
|
---|
| 822 | while (cPages > 0)
|
---|
| 823 | {
|
---|
| 824 | /*
|
---|
| 825 | * 32-Bit.
|
---|
| 826 | */
|
---|
| 827 | unsigned iPDE = (uAddress >> X86_PD_SHIFT) & X86_PD_MASK;
|
---|
| 828 | unsigned iPTE = (uAddress >> X86_PT_SHIFT) & X86_PT_MASK;
|
---|
| 829 | PX86PT pPT = pPTDefault;
|
---|
| 830 | if (pVM->pgm.s.pInterPD->a[iPDE].u)
|
---|
| 831 | {
|
---|
| 832 | RTHCPHYS HCPhysPT = pVM->pgm.s.pInterPD->a[iPDE].u & X86_PDE_PG_MASK;
|
---|
| 833 | if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[0]))
|
---|
| 834 | pPT = pVM->pgm.s.apInterPTs[0];
|
---|
| 835 | else if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPTs[1]))
|
---|
| 836 | pPT = pVM->pgm.s.apInterPTs[1];
|
---|
| 837 | else
|
---|
| 838 | {
|
---|
| 839 | /** @todo this must be handled with a relocation of the conflicting mapping!
|
---|
| 840 | * Which of course cannot be done because we're in the middle of the initialization. bad design! */
|
---|
[13819] | 841 | AssertLogRelMsgFailedReturn(("Conflict between core code and PGMR3Mapping(). uAddress=%RHv\n", uAddress),
|
---|
[8543] | 842 | VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
[1] | 843 | }
|
---|
| 844 | }
|
---|
| 845 | if (pPT->a[iPTE].u)
|
---|
[13819] | 846 | AssertLogRelMsgFailedReturn(("Conflict iPTE=%#x iPDE=%#x uAddress=%RHv pPT->a[iPTE].u=%RX32\n", iPTE, iPDE, uAddress, pPT->a[iPTE].u),
|
---|
[8543] | 847 | VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
[1] | 848 |
|
---|
| 849 | /*
|
---|
| 850 | * PAE.
|
---|
| 851 | */
|
---|
[7728] | 852 | const unsigned iPDPE= (uAddress >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
|
---|
[1] | 853 | iPDE = (uAddress >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
|
---|
| 854 | iPTE = (uAddress >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK;
|
---|
| 855 | Assert(iPDPE < 4);
|
---|
| 856 | Assert(pVM->pgm.s.apInterPaePDs[iPDPE]);
|
---|
| 857 | PX86PTPAE pPTPae = pPTPaeDefault;
|
---|
| 858 | if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u)
|
---|
| 859 | {
|
---|
[32034] | 860 | RTHCPHYS HCPhysPT = pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK;
|
---|
[1] | 861 | if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]))
|
---|
| 862 | pPTPae = pVM->pgm.s.apInterPaePTs[0];
|
---|
| 863 | else if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0]))
|
---|
| 864 | pPTPae = pVM->pgm.s.apInterPaePTs[1];
|
---|
| 865 | else
|
---|
| 866 | {
|
---|
| 867 | /** @todo this must be handled with a relocation of the conflicting mapping!
|
---|
| 868 | * Which of course cannot be done because we're in the middle of the initialization. bad design! */
|
---|
[13819] | 869 | AssertLogRelMsgFailedReturn(("Conflict between core code and PGMR3Mapping(). uAddress=%RHv\n", uAddress),
|
---|
[8543] | 870 | VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
[1] | 871 | }
|
---|
| 872 | }
|
---|
| 873 | if (pPTPae->a[iPTE].u)
|
---|
[13819] | 874 | AssertLogRelMsgFailedReturn(("Conflict iPTE=%#x iPDE=%#x uAddress=%RHv pPTPae->a[iPTE].u=%#RX64\n", iPTE, iPDE, uAddress, pPTPae->a[iPTE].u),
|
---|
[8543] | 875 | VERR_PGM_INTERMEDIATE_PAGING_CONFLICT);
|
---|
[1] | 876 |
|
---|
| 877 | /* next */
|
---|
| 878 | uAddress += PAGE_SIZE;
|
---|
| 879 | cPages--;
|
---|
| 880 | }
|
---|
| 881 |
|
---|
| 882 | return VINF_SUCCESS;
|
---|
| 883 | }
|
---|
| 884 |
|
---|
| 885 |
|
---|
| 886 |
|
---|
| 887 | /**
|
---|
| 888 | * Sets up the intermediate page tables for a verified mapping.
|
---|
| 889 | *
|
---|
[58122] | 890 | * @param pVM The cross context VM structure.
|
---|
[1] | 891 | * @param uAddress Address of the mapping.
|
---|
| 892 | * @param HCPhys The physical address of the page range.
|
---|
| 893 | * @param cPages Number of pages.
|
---|
| 894 | * @param pPTDefault Pointer to the default page table for this mapping.
|
---|
| 895 | * @param pPTPaeDefault Pointer to the default page table for this mapping.
|
---|
| 896 | */
|
---|
| 897 | static void pgmR3MapIntermediateDoOne(PVM pVM, uintptr_t uAddress, RTHCPHYS HCPhys, unsigned cPages, PX86PT pPTDefault, PX86PTPAE pPTPaeDefault)
|
---|
| 898 | {
|
---|
| 899 | while (cPages > 0)
|
---|
| 900 | {
|
---|
| 901 | /*
|
---|
| 902 | * 32-Bit.
|
---|
| 903 | */
|
---|
| 904 | unsigned iPDE = (uAddress >> X86_PD_SHIFT) & X86_PD_MASK;
|
---|
| 905 | unsigned iPTE = (uAddress >> X86_PT_SHIFT) & X86_PT_MASK;
|
---|
| 906 | PX86PT pPT;
|
---|
| 907 | if (pVM->pgm.s.pInterPD->a[iPDE].u)
|
---|
| 908 | pPT = (PX86PT)MMPagePhys2Page(pVM, pVM->pgm.s.pInterPD->a[iPDE].u & X86_PDE_PG_MASK);
|
---|
| 909 | else
|
---|
| 910 | {
|
---|
| 911 | pVM->pgm.s.pInterPD->a[iPDE].u = X86_PDE_P | X86_PDE_A | X86_PDE_RW
|
---|
| 912 | | (uint32_t)MMPage2Phys(pVM, pPTDefault);
|
---|
| 913 | pPT = pPTDefault;
|
---|
| 914 | }
|
---|
| 915 | pPT->a[iPTE].u = X86_PTE_P | X86_PTE_RW | X86_PTE_A | X86_PTE_D | (uint32_t)HCPhys;
|
---|
| 916 |
|
---|
| 917 | /*
|
---|
| 918 | * PAE
|
---|
| 919 | */
|
---|
[7728] | 920 | const unsigned iPDPE= (uAddress >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
|
---|
[1] | 921 | iPDE = (uAddress >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
|
---|
| 922 | iPTE = (uAddress >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK;
|
---|
| 923 | Assert(iPDPE < 4);
|
---|
| 924 | Assert(pVM->pgm.s.apInterPaePDs[iPDPE]);
|
---|
| 925 | PX86PTPAE pPTPae;
|
---|
| 926 | if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u)
|
---|
[32034] | 927 | pPTPae = (PX86PTPAE)MMPagePhys2Page(pVM, pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK);
|
---|
[1] | 928 | else
|
---|
| 929 | {
|
---|
| 930 | pPTPae = pPTPaeDefault;
|
---|
| 931 | pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u = X86_PDE_P | X86_PDE_A | X86_PDE_RW
|
---|
| 932 | | MMPage2Phys(pVM, pPTPaeDefault);
|
---|
| 933 | }
|
---|
| 934 | pPTPae->a[iPTE].u = X86_PTE_P | X86_PTE_RW | X86_PTE_A | X86_PTE_D | HCPhys;
|
---|
| 935 |
|
---|
| 936 | /* next */
|
---|
| 937 | cPages--;
|
---|
| 938 | HCPhys += PAGE_SIZE;
|
---|
| 939 | uAddress += PAGE_SIZE;
|
---|
| 940 | }
|
---|
| 941 | }
|
---|
| 942 |
|
---|
| 943 |
|
---|
| 944 | /**
|
---|
[16300] | 945 | * Clears all PDEs involved with the mapping in the shadow and intermediate page tables.
|
---|
[1] | 946 | *
|
---|
[58122] | 947 | * @param pVM The cross context VM structure.
|
---|
[1] | 948 | * @param pMap Pointer to the mapping in question.
|
---|
| 949 | * @param iOldPDE The index of the 32-bit PDE corresponding to the base of the mapping.
|
---|
| 950 | */
|
---|
[16300] | 951 | static void pgmR3MapClearPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iOldPDE)
|
---|
[1] | 952 | {
|
---|
[18927] | 953 | unsigned i = pMap->cPTs;
|
---|
| 954 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
[20796] | 955 | pgmLock(pVM); /* to avoid assertions */
|
---|
[16300] | 956 |
|
---|
[18927] | 957 | pgmMapClearShadowPDEs(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3), pMap, iOldPDE, false /*fDeactivateCR3*/);
|
---|
[16300] | 958 |
|
---|
[1] | 959 | iOldPDE += i;
|
---|
| 960 | while (i-- > 0)
|
---|
| 961 | {
|
---|
| 962 | iOldPDE--;
|
---|
| 963 |
|
---|
| 964 | /*
|
---|
| 965 | * 32-bit.
|
---|
| 966 | */
|
---|
[16300] | 967 | pVM->pgm.s.pInterPD->a[iOldPDE].u = 0;
|
---|
[25935] | 968 |
|
---|
[1] | 969 | /*
|
---|
| 970 | * PAE.
|
---|
| 971 | */
|
---|
[16300] | 972 | const unsigned iPD = iOldPDE / 256; /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */
|
---|
[7971] | 973 | unsigned iPDE = iOldPDE * 2 % 512;
|
---|
[16300] | 974 | pVM->pgm.s.apInterPaePDs[iPD]->a[iPDE].u = 0;
|
---|
[1] | 975 | iPDE++;
|
---|
[16300] | 976 | AssertFatal(iPDE < 512);
|
---|
| 977 | pVM->pgm.s.apInterPaePDs[iPD]->a[iPDE].u = 0;
|
---|
[1] | 978 | }
|
---|
[20796] | 979 |
|
---|
| 980 | pgmUnlock(pVM);
|
---|
[1] | 981 | }
|
---|
| 982 |
|
---|
[20796] | 983 |
|
---|
[1] | 984 | /**
|
---|
[16300] | 985 | * Sets all PDEs involved with the mapping in the shadow and intermediate page tables.
|
---|
| 986 | *
|
---|
[58122] | 987 | * @param pVM The cross context VM structure.
|
---|
[16300] | 988 | * @param pMap Pointer to the mapping in question.
|
---|
[1] | 989 | * @param iNewPDE The index of the 32-bit PDE corresponding to the base of the mapping.
|
---|
| 990 | */
|
---|
[7971] | 991 | static void pgmR3MapSetPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iNewPDE)
|
---|
[1] | 992 | {
|
---|
[18927] | 993 | PPGM pPGM = &pVM->pgm.s;
|
---|
[39034] | 994 | #ifdef VBOX_STRICT
|
---|
[18927] | 995 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
[39034] | 996 | #endif
|
---|
[20796] | 997 | pgmLock(pVM); /* to avoid assertions */
|
---|
[1] | 998 |
|
---|
[36891] | 999 | Assert(!pgmMapAreMappingsEnabled(pVM) || PGMGetGuestMode(pVCpu) <= PGMMODE_PAE_NX);
|
---|
[1] | 1000 |
|
---|
[16321] | 1001 | pgmMapSetShadowPDEs(pVM, pMap, iNewPDE);
|
---|
[16300] | 1002 |
|
---|
[1] | 1003 | /*
|
---|
| 1004 | * Init the page tables and insert them into the page directories.
|
---|
| 1005 | */
|
---|
| 1006 | unsigned i = pMap->cPTs;
|
---|
| 1007 | iNewPDE += i;
|
---|
| 1008 | while (i-- > 0)
|
---|
| 1009 | {
|
---|
| 1010 | iNewPDE--;
|
---|
| 1011 |
|
---|
| 1012 | /*
|
---|
| 1013 | * 32-bit.
|
---|
| 1014 | */
|
---|
| 1015 | X86PDE Pde;
|
---|
| 1016 | /* Default mapping page directory flags are read/write and supervisor; individual page attributes determine the final flags */
|
---|
| 1017 | Pde.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | (uint32_t)pMap->aPTs[i].HCPhysPT;
|
---|
[14147] | 1018 | pPGM->pInterPD->a[iNewPDE] = Pde;
|
---|
[45739] | 1019 |
|
---|
[1] | 1020 | /*
|
---|
| 1021 | * PAE.
|
---|
| 1022 | */
|
---|
[7971] | 1023 | const unsigned iPD = iNewPDE / 256;
|
---|
| 1024 | unsigned iPDE = iNewPDE * 2 % 512;
|
---|
[1] | 1025 | X86PDEPAE PdePae0;
|
---|
| 1026 | PdePae0.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT0;
|
---|
| 1027 | pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae0;
|
---|
| 1028 | iPDE++;
|
---|
[16300] | 1029 | AssertFatal(iPDE < 512);
|
---|
[1] | 1030 | X86PDEPAE PdePae1;
|
---|
| 1031 | PdePae1.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT1;
|
---|
| 1032 | pPGM->apInterPaePDs[iPD]->a[iPDE] = PdePae1;
|
---|
| 1033 | }
|
---|
[20796] | 1034 |
|
---|
| 1035 | pgmUnlock(pVM);
|
---|
[1] | 1036 | }
|
---|
| 1037 |
|
---|
[20796] | 1038 |
|
---|
[16300] | 1039 | /**
|
---|
[1] | 1040 | * Relocates a mapping to a new address.
|
---|
| 1041 | *
|
---|
[58122] | 1042 | * @param pVM The cross context VM structure.
|
---|
[8021] | 1043 | * @param pMapping The mapping to relocate.
|
---|
| 1044 | * @param GCPtrOldMapping The address of the start of the old mapping.
|
---|
[25935] | 1045 | * NIL_RTGCPTR if not currently mapped.
|
---|
[8021] | 1046 | * @param GCPtrNewMapping The address of the start of the new mapping.
|
---|
[1] | 1047 | */
|
---|
[25935] | 1048 | static void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, RTGCPTR GCPtrOldMapping, RTGCPTR GCPtrNewMapping)
|
---|
[1] | 1049 | {
|
---|
[13823] | 1050 | Log(("PGM: Relocating %s from %RGv to %RGv\n", pMapping->pszDesc, GCPtrOldMapping, GCPtrNewMapping));
|
---|
[25935] | 1051 | AssertMsg(GCPtrOldMapping == pMapping->GCPtr, ("%RGv vs %RGv\n", GCPtrOldMapping, pMapping->GCPtr));
|
---|
| 1052 | AssertMsg((GCPtrOldMapping >> X86_PD_SHIFT) < X86_PG_ENTRIES, ("%RGv\n", GCPtrOldMapping));
|
---|
| 1053 | AssertMsg((GCPtrNewMapping >> X86_PD_SHIFT) < X86_PG_ENTRIES, ("%RGv\n", GCPtrOldMapping));
|
---|
[1] | 1054 |
|
---|
| 1055 | /*
|
---|
| 1056 | * Relocate the page table(s).
|
---|
| 1057 | */
|
---|
[25935] | 1058 | if (GCPtrOldMapping != NIL_RTGCPTR)
|
---|
| 1059 | pgmR3MapClearPDEs(pVM, pMapping, GCPtrOldMapping >> X86_PD_SHIFT);
|
---|
| 1060 | pgmR3MapSetPDEs(pVM, pMapping, GCPtrNewMapping >> X86_PD_SHIFT);
|
---|
[1] | 1061 |
|
---|
| 1062 | /*
|
---|
| 1063 | * Update and resort the mapping list.
|
---|
| 1064 | */
|
---|
| 1065 |
|
---|
| 1066 | /* Find previous mapping for pMapping, put result into pPrevMap. */
|
---|
| 1067 | PPGMMAPPING pPrevMap = NULL;
|
---|
[2270] | 1068 | PPGMMAPPING pCur = pVM->pgm.s.pMappingsR3;
|
---|
[1] | 1069 | while (pCur && pCur != pMapping)
|
---|
| 1070 | {
|
---|
| 1071 | /* next */
|
---|
| 1072 | pPrevMap = pCur;
|
---|
[2270] | 1073 | pCur = pCur->pNextR3;
|
---|
[1] | 1074 | }
|
---|
| 1075 | Assert(pCur);
|
---|
| 1076 |
|
---|
| 1077 | /* Find mapping which >= than pMapping. */
|
---|
[25935] | 1078 | RTGCPTR GCPtrNew = GCPtrNewMapping;
|
---|
[1] | 1079 | PPGMMAPPING pPrev = NULL;
|
---|
[2270] | 1080 | pCur = pVM->pgm.s.pMappingsR3;
|
---|
[1] | 1081 | while (pCur && pCur->GCPtr < GCPtrNew)
|
---|
| 1082 | {
|
---|
| 1083 | /* next */
|
---|
| 1084 | pPrev = pCur;
|
---|
[2270] | 1085 | pCur = pCur->pNextR3;
|
---|
[1] | 1086 | }
|
---|
| 1087 |
|
---|
| 1088 | if (pCur != pMapping && pPrev != pMapping)
|
---|
| 1089 | {
|
---|
| 1090 | /*
|
---|
| 1091 | * Unlink.
|
---|
| 1092 | */
|
---|
| 1093 | if (pPrevMap)
|
---|
| 1094 | {
|
---|
[2270] | 1095 | pPrevMap->pNextR3 = pMapping->pNextR3;
|
---|
[13019] | 1096 | pPrevMap->pNextRC = pMapping->pNextRC;
|
---|
[2270] | 1097 | pPrevMap->pNextR0 = pMapping->pNextR0;
|
---|
[1] | 1098 | }
|
---|
| 1099 | else
|
---|
| 1100 | {
|
---|
[2270] | 1101 | pVM->pgm.s.pMappingsR3 = pMapping->pNextR3;
|
---|
[13019] | 1102 | pVM->pgm.s.pMappingsRC = pMapping->pNextRC;
|
---|
[2270] | 1103 | pVM->pgm.s.pMappingsR0 = pMapping->pNextR0;
|
---|
[1] | 1104 | }
|
---|
| 1105 |
|
---|
| 1106 | /*
|
---|
| 1107 | * Link
|
---|
| 1108 | */
|
---|
[2270] | 1109 | pMapping->pNextR3 = pCur;
|
---|
[1] | 1110 | if (pPrev)
|
---|
| 1111 | {
|
---|
[13019] | 1112 | pMapping->pNextRC = pPrev->pNextRC;
|
---|
[2270] | 1113 | pMapping->pNextR0 = pPrev->pNextR0;
|
---|
| 1114 | pPrev->pNextR3 = pMapping;
|
---|
[13019] | 1115 | pPrev->pNextRC = MMHyperR3ToRC(pVM, pMapping);
|
---|
[2270] | 1116 | pPrev->pNextR0 = MMHyperR3ToR0(pVM, pMapping);
|
---|
[1] | 1117 | }
|
---|
| 1118 | else
|
---|
| 1119 | {
|
---|
[13019] | 1120 | pMapping->pNextRC = pVM->pgm.s.pMappingsRC;
|
---|
[2270] | 1121 | pMapping->pNextR0 = pVM->pgm.s.pMappingsR0;
|
---|
| 1122 | pVM->pgm.s.pMappingsR3 = pMapping;
|
---|
[13019] | 1123 | pVM->pgm.s.pMappingsRC = MMHyperR3ToRC(pVM, pMapping);
|
---|
[2270] | 1124 | pVM->pgm.s.pMappingsR0 = MMHyperR3ToR0(pVM, pMapping);
|
---|
[1] | 1125 | }
|
---|
| 1126 | }
|
---|
| 1127 |
|
---|
| 1128 | /*
|
---|
| 1129 | * Update the entry.
|
---|
| 1130 | */
|
---|
| 1131 | pMapping->GCPtr = GCPtrNew;
|
---|
| 1132 | pMapping->GCPtrLast = GCPtrNew + pMapping->cb - 1;
|
---|
| 1133 |
|
---|
| 1134 | /*
|
---|
| 1135 | * Callback to execute the relocation.
|
---|
| 1136 | */
|
---|
[25935] | 1137 | pMapping->pfnRelocate(pVM, GCPtrOldMapping, GCPtrNewMapping, PGMRELOCATECALL_RELOCATE, pMapping->pvUser);
|
---|
[1] | 1138 | }
|
---|
| 1139 |
|
---|
[18291] | 1140 |
|
---|
[17622] | 1141 | /**
|
---|
| 1142 | * Checks if a new mapping address wasn't previously used and caused a clash with guest mappings.
|
---|
| 1143 | *
|
---|
| 1144 | * @returns VBox status code.
|
---|
| 1145 | * @param pMapping The mapping which conflicts.
|
---|
| 1146 | * @param GCPtr New mapping address to try
|
---|
| 1147 | */
|
---|
| 1148 | bool pgmR3MapIsKnownConflictAddress(PPGMMAPPING pMapping, RTGCPTR GCPtr)
|
---|
| 1149 | {
|
---|
[18291] | 1150 | for (unsigned i = 0; i < RT_ELEMENTS(pMapping->aGCPtrConflicts); i++)
|
---|
[17622] | 1151 | {
|
---|
[18291] | 1152 | if (GCPtr == pMapping->aGCPtrConflicts[i])
|
---|
[17622] | 1153 | return true;
|
---|
| 1154 | }
|
---|
| 1155 | return false;
|
---|
| 1156 | }
|
---|
[1] | 1157 |
|
---|
[18291] | 1158 |
|
---|
[1] | 1159 | /**
|
---|
| 1160 | * Resolves a conflict between a page table based GC mapping and
|
---|
[7629] | 1161 | * the Guest OS page tables. (32 bits version)
|
---|
[1] | 1162 | *
|
---|
| 1163 | * @returns VBox status code.
|
---|
[58122] | 1164 | * @param pVM The cross context VM structure.
|
---|
[8021] | 1165 | * @param pMapping The mapping which conflicts.
|
---|
| 1166 | * @param pPDSrc The page directory of the guest OS.
|
---|
| 1167 | * @param GCPtrOldMapping The address of the start of the current mapping.
|
---|
[1] | 1168 | */
|
---|
[8021] | 1169 | int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PX86PD pPDSrc, RTGCPTR GCPtrOldMapping)
|
---|
[1] | 1170 | {
|
---|
[16413] | 1171 | STAM_REL_COUNTER_INC(&pVM->pgm.s.cRelocations);
|
---|
[31123] | 1172 | STAM_PROFILE_START(&pVM->pgm.s.CTX_SUFF(pStats)->StatR3ResolveConflict, a);
|
---|
[1] | 1173 |
|
---|
[18927] | 1174 | /* Raw mode only which implies one VCPU. */
|
---|
[22890] | 1175 | Assert(pVM->cCpus == 1);
|
---|
[18927] | 1176 |
|
---|
[18291] | 1177 | pMapping->aGCPtrConflicts[pMapping->cConflicts & (PGMMAPPING_CONFLICT_MAX-1)] = GCPtrOldMapping;
|
---|
[17622] | 1178 | pMapping->cConflicts++;
|
---|
| 1179 |
|
---|
[1] | 1180 | /*
|
---|
| 1181 | * Scan for free page directory entries.
|
---|
| 1182 | *
|
---|
| 1183 | * Note that we do not support mappings at the very end of the
|
---|
| 1184 | * address space since that will break our GCPtrEnd assumptions.
|
---|
| 1185 | */
|
---|
| 1186 | const unsigned cPTs = pMapping->cPTs;
|
---|
[11311] | 1187 | unsigned iPDNew = RT_ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */
|
---|
[1] | 1188 | while (iPDNew-- > 0)
|
---|
| 1189 | {
|
---|
| 1190 | if (pPDSrc->a[iPDNew].n.u1Present)
|
---|
| 1191 | continue;
|
---|
[17622] | 1192 |
|
---|
| 1193 | if (pgmR3MapIsKnownConflictAddress(pMapping, iPDNew << X86_PD_SHIFT))
|
---|
| 1194 | continue;
|
---|
| 1195 |
|
---|
[1] | 1196 | if (cPTs > 1)
|
---|
| 1197 | {
|
---|
| 1198 | bool fOk = true;
|
---|
| 1199 | for (unsigned i = 1; fOk && i < cPTs; i++)
|
---|
| 1200 | if (pPDSrc->a[iPDNew + i].n.u1Present)
|
---|
| 1201 | fOk = false;
|
---|
| 1202 | if (!fOk)
|
---|
| 1203 | continue;
|
---|
| 1204 | }
|
---|
| 1205 |
|
---|
| 1206 | /*
|
---|
| 1207 | * Check that it's not conflicting with an intermediate page table mapping.
|
---|
| 1208 | */
|
---|
| 1209 | bool fOk = true;
|
---|
| 1210 | unsigned i = cPTs;
|
---|
| 1211 | while (fOk && i-- > 0)
|
---|
| 1212 | fOk = !pVM->pgm.s.pInterPD->a[iPDNew + i].n.u1Present;
|
---|
| 1213 | if (!fOk)
|
---|
| 1214 | continue;
|
---|
| 1215 | /** @todo AMD64 should check the PAE directories and skip the 32bit stuff. */
|
---|
| 1216 |
|
---|
| 1217 | /*
|
---|
[8021] | 1218 | * Ask for the mapping.
|
---|
[1] | 1219 | */
|
---|
[25935] | 1220 | RTGCPTR GCPtrNewMapping = (RTGCPTR32)iPDNew << X86_PD_SHIFT;
|
---|
[8021] | 1221 |
|
---|
| 1222 | if (pMapping->pfnRelocate(pVM, GCPtrOldMapping, GCPtrNewMapping, PGMRELOCATECALL_SUGGEST, pMapping->pvUser))
|
---|
[1] | 1223 | {
|
---|
[8021] | 1224 | pgmR3MapRelocate(pVM, pMapping, GCPtrOldMapping, GCPtrNewMapping);
|
---|
[31123] | 1225 | STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatR3ResolveConflict, a);
|
---|
[1] | 1226 | return VINF_SUCCESS;
|
---|
| 1227 | }
|
---|
| 1228 | }
|
---|
| 1229 |
|
---|
[31123] | 1230 | STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatR3ResolveConflict, a);
|
---|
[60846] | 1231 | #ifdef DEBUG_bird
|
---|
[60869] | 1232 | /*
|
---|
| 1233 | * Ended up here frequently recently with an NT4.0 VM (using SMP kernel).
|
---|
| 1234 | *
|
---|
| 1235 | * The problem is when enabling large pages (i.e. updating CR4) using the
|
---|
| 1236 | * _Ki386EnableCurrentLargePage@8 assembly routine (address 0x801c97ad-9).
|
---|
| 1237 | * The routine loads a sparsely popuplated page tables with identiy mappings
|
---|
| 1238 | * of its own code, most entries are whatever ExAllocatePool returned, which
|
---|
| 1239 | * is documented as undefined but all 0xffffffff in this case. Once loaded,
|
---|
| 1240 | * it jumps to the physical code address, disables paging, set CR4.PSE=1,
|
---|
| 1241 | * re-enables paging, restore the original page table and returns successfully.
|
---|
| 1242 | *
|
---|
| 1243 | * Theory: if CSAM/PATM patches the pushf;cli;mov eax,cr3; sequence, at the
|
---|
| 1244 | * start of that function we're apparently in trouble, if CSAM/PATM doesn't
|
---|
| 1245 | * we're switching back to REM and doing disabling of paging there instead.
|
---|
| 1246 | *
|
---|
| 1247 | * Normal PD: CR3=00030000; Problematic identity mapped PD: CR3=0x5fa000.
|
---|
| 1248 | */
|
---|
[60846] | 1249 | DBGFSTOP(pVM);
|
---|
| 1250 | #endif
|
---|
[8021] | 1251 | AssertMsgFailed(("Failed to relocate page table mapping '%s' from %#x! (cPTs=%d)\n", pMapping->pszDesc, GCPtrOldMapping, cPTs));
|
---|
[1] | 1252 | return VERR_PGM_NO_HYPERVISOR_ADDRESS;
|
---|
| 1253 | }
|
---|
| 1254 |
|
---|
[13236] | 1255 |
|
---|
[8021] | 1256 | /**
|
---|
| 1257 | * Resolves a conflict between a page table based GC mapping and
|
---|
| 1258 | * the Guest OS page tables. (PAE bits version)
|
---|
| 1259 | *
|
---|
| 1260 | * @returns VBox status code.
|
---|
[58122] | 1261 | * @param pVM The cross context VM structure.
|
---|
[8021] | 1262 | * @param pMapping The mapping which conflicts.
|
---|
| 1263 | * @param GCPtrOldMapping The address of the start of the current mapping.
|
---|
| 1264 | */
|
---|
| 1265 | int pgmR3SyncPTResolveConflictPAE(PVM pVM, PPGMMAPPING pMapping, RTGCPTR GCPtrOldMapping)
|
---|
| 1266 | {
|
---|
[16413] | 1267 | STAM_REL_COUNTER_INC(&pVM->pgm.s.cRelocations);
|
---|
[13087] | 1268 | STAM_PROFILE_START(&pVM->pgm.s.StatR3ResolveConflict, a);
|
---|
[1] | 1269 |
|
---|
[18927] | 1270 | /* Raw mode only which implies one VCPU. */
|
---|
[22890] | 1271 | Assert(pVM->cCpus == 1);
|
---|
[18927] | 1272 | PVMCPU pVCpu = VMMGetCpu(pVM);
|
---|
| 1273 |
|
---|
[18291] | 1274 | pMapping->aGCPtrConflicts[pMapping->cConflicts & (PGMMAPPING_CONFLICT_MAX-1)] = GCPtrOldMapping;
|
---|
[17622] | 1275 | pMapping->cConflicts++;
|
---|
| 1276 |
|
---|
[12909] | 1277 | for (int iPDPTE = X86_PG_PAE_PDPE_ENTRIES - 1; iPDPTE >= 0; iPDPTE--)
|
---|
[8021] | 1278 | {
|
---|
| 1279 | unsigned iPDSrc;
|
---|
[30889] | 1280 | PX86PDPAE pPDSrc = pgmGstGetPaePDPtr(pVCpu, (RTGCPTR32)iPDPTE << X86_PDPT_SHIFT, &iPDSrc, NULL);
|
---|
[8021] | 1281 |
|
---|
| 1282 | /*
|
---|
| 1283 | * Scan for free page directory entries.
|
---|
| 1284 | *
|
---|
| 1285 | * Note that we do not support mappings at the very end of the
|
---|
| 1286 | * address space since that will break our GCPtrEnd assumptions.
|
---|
[14131] | 1287 | * Nor do we support mappings crossing page directories.
|
---|
[8021] | 1288 | */
|
---|
| 1289 | const unsigned cPTs = pMapping->cb >> X86_PD_PAE_SHIFT;
|
---|
[11311] | 1290 | unsigned iPDNew = RT_ELEMENTS(pPDSrc->a) - cPTs; /* (+ 1 - 1) */
|
---|
[8021] | 1291 |
|
---|
| 1292 | while (iPDNew-- > 0)
|
---|
| 1293 | {
|
---|
| 1294 | /* Ugly assumption that mappings start on a 4 MB boundary. */
|
---|
| 1295 | if (iPDNew & 1)
|
---|
| 1296 | continue;
|
---|
| 1297 |
|
---|
[17622] | 1298 | if (pgmR3MapIsKnownConflictAddress(pMapping, ((RTGCPTR32)iPDPTE << X86_PDPT_SHIFT) + (iPDNew << X86_PD_PAE_SHIFT)))
|
---|
| 1299 | continue;
|
---|
| 1300 |
|
---|
[8021] | 1301 | if (pPDSrc)
|
---|
| 1302 | {
|
---|
| 1303 | if (pPDSrc->a[iPDNew].n.u1Present)
|
---|
| 1304 | continue;
|
---|
| 1305 | if (cPTs > 1)
|
---|
| 1306 | {
|
---|
| 1307 | bool fOk = true;
|
---|
| 1308 | for (unsigned i = 1; fOk && i < cPTs; i++)
|
---|
| 1309 | if (pPDSrc->a[iPDNew + i].n.u1Present)
|
---|
| 1310 | fOk = false;
|
---|
| 1311 | if (!fOk)
|
---|
| 1312 | continue;
|
---|
| 1313 | }
|
---|
| 1314 | }
|
---|
| 1315 | /*
|
---|
| 1316 | * Check that it's not conflicting with an intermediate page table mapping.
|
---|
| 1317 | */
|
---|
| 1318 | bool fOk = true;
|
---|
| 1319 | unsigned i = cPTs;
|
---|
| 1320 | while (fOk && i-- > 0)
|
---|
| 1321 | fOk = !pVM->pgm.s.apInterPaePDs[iPDPTE]->a[iPDNew + i].n.u1Present;
|
---|
| 1322 | if (!fOk)
|
---|
| 1323 | continue;
|
---|
| 1324 |
|
---|
| 1325 | /*
|
---|
| 1326 | * Ask for the mapping.
|
---|
| 1327 | */
|
---|
[25935] | 1328 | RTGCPTR GCPtrNewMapping = ((RTGCPTR32)iPDPTE << X86_PDPT_SHIFT) + ((RTGCPTR32)iPDNew << X86_PD_PAE_SHIFT);
|
---|
[8021] | 1329 |
|
---|
| 1330 | if (pMapping->pfnRelocate(pVM, GCPtrOldMapping, GCPtrNewMapping, PGMRELOCATECALL_SUGGEST, pMapping->pvUser))
|
---|
| 1331 | {
|
---|
| 1332 | pgmR3MapRelocate(pVM, pMapping, GCPtrOldMapping, GCPtrNewMapping);
|
---|
[31123] | 1333 | STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatR3ResolveConflict, a);
|
---|
[8021] | 1334 | return VINF_SUCCESS;
|
---|
| 1335 | }
|
---|
| 1336 | }
|
---|
| 1337 | }
|
---|
[31123] | 1338 | STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->StatR3ResolveConflict, a);
|
---|
[8021] | 1339 | AssertMsgFailed(("Failed to relocate page table mapping '%s' from %#x! (cPTs=%d)\n", pMapping->pszDesc, GCPtrOldMapping, pMapping->cb >> X86_PD_PAE_SHIFT));
|
---|
| 1340 | return VERR_PGM_NO_HYPERVISOR_ADDRESS;
|
---|
| 1341 | }
|
---|
| 1342 |
|
---|
[43872] | 1343 | #endif /* !PGM_WITHOUT_MAPPINGS */
|
---|
[18291] | 1344 |
|
---|
[1] | 1345 | /**
|
---|
| 1346 | * Read memory from the guest mappings.
|
---|
| 1347 | *
|
---|
| 1348 | * This will use the page tables associated with the mappings to
|
---|
| 1349 | * read the memory. This means that not all kind of memory is readable
|
---|
| 1350 | * since we don't necessarily know how to convert that physical address
|
---|
| 1351 | * to a HC virtual one.
|
---|
| 1352 | *
|
---|
[58170] | 1353 | * @returns VBox status code.
|
---|
[58122] | 1354 | * @param pVM The cross context VM structure.
|
---|
[1] | 1355 | * @param pvDst The destination address (HC of course).
|
---|
| 1356 | * @param GCPtrSrc The source address (GC virtual address).
|
---|
| 1357 | * @param cb Number of bytes to read.
|
---|
[12968] | 1358 | *
|
---|
| 1359 | * @remarks The is indirectly for DBGF only.
|
---|
| 1360 | * @todo Consider renaming it to indicate it's special usage, or just
|
---|
| 1361 | * reimplement it in MMR3HyperReadGCVirt.
|
---|
[1] | 1362 | */
|
---|
[12989] | 1363 | VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
|
---|
[1] | 1364 | {
|
---|
| 1365 | /*
|
---|
| 1366 | * Simplicity over speed... Chop the request up into chunks
|
---|
| 1367 | * which don't cross pages.
|
---|
| 1368 | */
|
---|
| 1369 | if (cb + (GCPtrSrc & PAGE_OFFSET_MASK) > PAGE_SIZE)
|
---|
| 1370 | {
|
---|
| 1371 | for (;;)
|
---|
| 1372 | {
|
---|
[14075] | 1373 | size_t cbRead = RT_MIN(cb, PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK));
|
---|
[1] | 1374 | int rc = PGMR3MapRead(pVM, pvDst, GCPtrSrc, cbRead);
|
---|
[13816] | 1375 | if (RT_FAILURE(rc))
|
---|
[1] | 1376 | return rc;
|
---|
| 1377 | cb -= cbRead;
|
---|
| 1378 | if (!cb)
|
---|
| 1379 | break;
|
---|
| 1380 | pvDst = (char *)pvDst + cbRead;
|
---|
| 1381 | GCPtrSrc += cbRead;
|
---|
| 1382 | }
|
---|
| 1383 | return VINF_SUCCESS;
|
---|
| 1384 | }
|
---|
| 1385 |
|
---|
| 1386 | /*
|
---|
| 1387 | * Find the mapping.
|
---|
| 1388 | */
|
---|
[13019] | 1389 | PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
|
---|
[1] | 1390 | while (pCur)
|
---|
| 1391 | {
|
---|
[13937] | 1392 | RTGCPTR off = GCPtrSrc - pCur->GCPtr;
|
---|
[1] | 1393 | if (off < pCur->cb)
|
---|
| 1394 | {
|
---|
| 1395 | if (off + cb > pCur->cb)
|
---|
| 1396 | {
|
---|
[13823] | 1397 | AssertMsgFailed(("Invalid page range %RGv LB%#x. mapping '%s' %RGv to %RGv\n",
|
---|
[1] | 1398 | GCPtrSrc, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast));
|
---|
| 1399 | return VERR_INVALID_PARAMETER;
|
---|
| 1400 | }
|
---|
| 1401 |
|
---|
[5629] | 1402 | unsigned iPT = off >> X86_PD_SHIFT;
|
---|
| 1403 | unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK;
|
---|
[11311] | 1404 | while (cb > 0 && iPTE < RT_ELEMENTS(CTXALLSUFF(pCur->aPTs[iPT].pPT)->a))
|
---|
[1] | 1405 | {
|
---|
[31775] | 1406 | PCPGMSHWPTEPAE pPte = &pCur->aPTs[iPT].CTXALLSUFF(paPaePTs)[iPTE / 512].a[iPTE % 512];
|
---|
| 1407 | if (!PGMSHWPTEPAE_IS_P(*pPte))
|
---|
[1] | 1408 | return VERR_PAGE_NOT_PRESENT;
|
---|
[31775] | 1409 | RTHCPHYS HCPhys = PGMSHWPTEPAE_GET_HCPHYS(*pPte);
|
---|
[1] | 1410 |
|
---|
| 1411 | /*
|
---|
| 1412 | * Get the virtual page from the physical one.
|
---|
| 1413 | */
|
---|
| 1414 | void *pvPage;
|
---|
| 1415 | int rc = MMR3HCPhys2HCVirt(pVM, HCPhys, &pvPage);
|
---|
[13816] | 1416 | if (RT_FAILURE(rc))
|
---|
[1] | 1417 | return rc;
|
---|
| 1418 |
|
---|
| 1419 | memcpy(pvDst, (char *)pvPage + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
|
---|
| 1420 | return VINF_SUCCESS;
|
---|
| 1421 | }
|
---|
| 1422 | }
|
---|
| 1423 |
|
---|
| 1424 | /* next */
|
---|
[2270] | 1425 | pCur = CTXALLSUFF(pCur->pNext);
|
---|
[1] | 1426 | }
|
---|
| 1427 |
|
---|
| 1428 | return VERR_INVALID_POINTER;
|
---|
| 1429 | }
|
---|
| 1430 |
|
---|
| 1431 |
|
---|
| 1432 | /**
|
---|
[6914] | 1433 | * Info callback for 'pgmhandlers'.
|
---|
[1] | 1434 | *
|
---|
[58126] | 1435 | * @param pVM The cross context VM structure.
|
---|
[6914] | 1436 | * @param pHlp The output helpers.
|
---|
| 1437 | * @param pszArgs The arguments. phys or virt.
|
---|
[1] | 1438 | */
|
---|
[6914] | 1439 | DECLCALLBACK(void) pgmR3MapInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
|
---|
[1] | 1440 | {
|
---|
[39078] | 1441 | NOREF(pszArgs);
|
---|
[45739] | 1442 | if (!pgmMapAreMappingsEnabled(pVM))
|
---|
[25935] | 1443 | pHlp->pfnPrintf(pHlp, "\nThe mappings are DISABLED.\n");
|
---|
| 1444 | else if (pVM->pgm.s.fMappingsFixed)
|
---|
| 1445 | pHlp->pfnPrintf(pHlp, "\nThe mappings are FIXED: %RGv-%RGv\n",
|
---|
| 1446 | pVM->pgm.s.GCPtrMappingFixed, pVM->pgm.s.GCPtrMappingFixed + pVM->pgm.s.cbMappingFixed - 1);
|
---|
| 1447 | else if (pVM->pgm.s.fMappingsFixedRestored)
|
---|
| 1448 | pHlp->pfnPrintf(pHlp, "\nThe mappings are FLOATING-RESTORED-FIXED: %RGv-%RGv\n",
|
---|
| 1449 | pVM->pgm.s.GCPtrMappingFixed, pVM->pgm.s.GCPtrMappingFixed + pVM->pgm.s.cbMappingFixed - 1);
|
---|
| 1450 | else
|
---|
| 1451 | pHlp->pfnPrintf(pHlp, "\nThe mappings are FLOATING.\n");
|
---|
| 1452 |
|
---|
[1] | 1453 | PPGMMAPPING pCur;
|
---|
[2270] | 1454 | for (pCur = pVM->pgm.s.pMappingsR3; pCur; pCur = pCur->pNextR3)
|
---|
[25935] | 1455 | {
|
---|
[13823] | 1456 | pHlp->pfnPrintf(pHlp, "%RGv - %RGv %s\n", pCur->GCPtr, pCur->GCPtrLast, pCur->pszDesc);
|
---|
[25935] | 1457 | if (pCur->cConflicts > 0)
|
---|
| 1458 | {
|
---|
| 1459 | pHlp->pfnPrintf(pHlp, " %u conflict%s: ", pCur->cConflicts, pCur->cConflicts == 1 ? "" : "s");
|
---|
| 1460 | uint32_t cLeft = RT_MIN(pCur->cConflicts, RT_ELEMENTS(pCur->aGCPtrConflicts));
|
---|
| 1461 | uint32_t i = pCur->cConflicts;
|
---|
| 1462 | while (cLeft-- > 0)
|
---|
| 1463 | {
|
---|
| 1464 | i = (i - 1) & (PGMMAPPING_CONFLICT_MAX - 1);
|
---|
| 1465 | pHlp->pfnPrintf(pHlp, cLeft ? "%RGv, " : "%RGv\n", pCur->aGCPtrConflicts[i]);
|
---|
| 1466 | }
|
---|
| 1467 | }
|
---|
| 1468 | }
|
---|
[1] | 1469 | }
|
---|
| 1470 |
|
---|