VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlpTracing.cpp

Last change on this file was 98103, checked in by vboxsync, 16 months ago

Copyright year updates by scm.
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1/* $Id: PDMDevHlpTracing.cpp 98103 2023-01-17 14:15:46Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helper variants when tracing is enabled.
4 */
5
6/*
7 * Copyright (C) 2020-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_PDM_DEVICE
33#define PDMPCIDEV_INCLUDE_PRIVATE /* Hack to get pdmpcidevint.h included at the right point. */
34#include "PDMInternal.h"
35#include <VBox/vmm/pdm.h>
36#include <VBox/vmm/mm.h>
37#include <VBox/vmm/hm.h>
38#include <VBox/vmm/pgm.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/dbgf.h>
41#include <VBox/vmm/ssm.h>
42#include <VBox/vmm/vmapi.h>
43#include <VBox/vmm/vmm.h>
44#include <VBox/vmm/vmcc.h>
45
46#include <VBox/version.h>
47#include <VBox/log.h>
48#include <VBox/err.h>
49#include <iprt/asm.h>
50#include <iprt/assert.h>
51#include <iprt/ctype.h>
52#include <iprt/string.h>
53#include <iprt/thread.h>
54
55#include "dtrace/VBoxVMM.h"
56#include "PDMInline.h"
57
58
59/*********************************************************************************************************************************
60* Defined Constants And Macros *
61*********************************************************************************************************************************/
62/** @name R3 DevHlp
63 * @{
64 */
65
66
67static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_IoPortNewIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
68{
69 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
70
71 Assert(!pTrack->fMmio);
72 PVM pVM = pDevIns->Internal.s.pVMR3;
73 VBOXSTRICTRC rcStrict = pTrack->u.IoPort.pfnIn(pDevIns, pTrack->pvUser, offPort, pu32, cb);
74 if (RT_SUCCESS(rcStrict))
75 DBGFTracerEvtIoPortRead(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.IoPort.hIoPorts, offPort, pu32, cb);
76
77 return rcStrict;
78}
79
80
81static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_IoPortNewInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint8_t *pbDst,
82 uint32_t *pcTransfers, unsigned cb)
83{
84 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
85
86 Assert(!pTrack->fMmio);
87 PVM pVM = pDevIns->Internal.s.pVMR3;
88 uint32_t cTransfersReq = *pcTransfers;
89 VBOXSTRICTRC rcStrict = pTrack->u.IoPort.pfnInStr(pDevIns, pTrack->pvUser, offPort, pbDst, pcTransfers, cb);
90 if (RT_SUCCESS(rcStrict))
91 DBGFTracerEvtIoPortReadStr(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.IoPort.hIoPorts, offPort, pbDst, cb,
92 cTransfersReq, cTransfersReq - *pcTransfers);
93
94 return rcStrict;
95}
96
97
98static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_IoPortNewOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
99{
100 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
101
102 Assert(!pTrack->fMmio);
103 PVM pVM = pDevIns->Internal.s.pVMR3;
104 VBOXSTRICTRC rcStrict = pTrack->u.IoPort.pfnOut(pDevIns, pTrack->pvUser, offPort, u32, cb);
105 if (RT_SUCCESS(rcStrict))
106 DBGFTracerEvtIoPortWrite(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.IoPort.hIoPorts, offPort, &u32, cb);
107
108 return rcStrict;
109}
110
111
112static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_IoPortNewOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, const uint8_t *pbSrc,
113 uint32_t *pcTransfers, unsigned cb)
114{
115 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
116
117 Assert(!pTrack->fMmio);
118 PVM pVM = pDevIns->Internal.s.pVMR3;
119 uint32_t cTransfersReq = *pcTransfers;
120 VBOXSTRICTRC rcStrict = pTrack->u.IoPort.pfnOutStr(pDevIns, pTrack->pvUser, offPort, pbSrc, pcTransfers, cb);
121 if (RT_SUCCESS(rcStrict))
122 DBGFTracerEvtIoPortWriteStr(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.IoPort.hIoPorts, offPort, pbSrc, cb,
123 cTransfersReq, cTransfersReq - *pcTransfers);
124
125 return rcStrict;
126}
127
128
129static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_MmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, uint32_t cb)
130{
131 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
132
133 Assert(pTrack->fMmio);
134 PVM pVM = pDevIns->Internal.s.pVMR3;
135 VBOXSTRICTRC rcStrict = pTrack->u.Mmio.pfnRead(pDevIns, pTrack->pvUser, off, pv, cb);
136 if (RT_SUCCESS(rcStrict))
137 DBGFTracerEvtMmioRead(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.Mmio.hMmioRegion, off, pv, cb);
138
139 return rcStrict;
140}
141
142
143static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_MmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, uint32_t cb)
144{
145 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
146
147 Assert(pTrack->fMmio);
148 PVM pVM = pDevIns->Internal.s.pVMR3;
149 VBOXSTRICTRC rcStrict = pTrack->u.Mmio.pfnWrite(pDevIns, pTrack->pvUser, off, pv, cb);
150 if (RT_SUCCESS(rcStrict))
151 DBGFTracerEvtMmioWrite(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.Mmio.hMmioRegion, off, pv, cb);
152
153 return rcStrict;
154}
155
156
157static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlpTracing_MmioFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off,
158 uint32_t u32Item, uint32_t cbItem, uint32_t cItems)
159{
160 PCPDMDEVINSDBGFTRACK pTrack = (PCPDMDEVINSDBGFTRACK)pvUser;
161
162 Assert(pTrack->fMmio);
163 PVM pVM = pDevIns->Internal.s.pVMR3;
164 VBOXSTRICTRC rcStrict = pTrack->u.Mmio.pfnFill(pDevIns, pTrack->pvUser, off, u32Item, cbItem, cItems);
165 if (RT_SUCCESS(rcStrict))
166 DBGFTracerEvtMmioFill(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, pTrack->u.Mmio.hMmioRegion, off,
167 u32Item, cbItem, cItems);
168
169 return rcStrict;
170}
171
172
173/** @interface_method_impl{PDMDEVHLPR3,pfnIoPortCreateEx} */
174DECL_HIDDEN_CALLBACK(int)
175pdmR3DevHlpTracing_IoPortCreateEx(PPDMDEVINS pDevIns, RTIOPORT cPorts, uint32_t fFlags, PPDMPCIDEV pPciDev,
176 uint32_t iPciRegion, PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
177 PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr, RTR3PTR pvUser,
178 const char *pszDesc, PCIOMIOPORTDESC paExtDescs, PIOMIOPORTHANDLE phIoPorts)
179{
180 PDMDEV_ASSERT_DEVINS(pDevIns);
181 LogFlow(("pdmR3DevHlpTracing_IoPortCreateEx: caller='%s'/%d: cPorts=%#x fFlags=%#x pPciDev=%p iPciRegion=%#x pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p pvUser=%p pszDesc=%p:{%s} paExtDescs=%p phIoPorts=%p\n",
182 pDevIns->pReg->szName, pDevIns->iInstance, cPorts, fFlags, pPciDev, iPciRegion, pfnOut, pfnIn, pfnOutStr, pfnInStr,
183 pvUser, pszDesc, pszDesc, paExtDescs, phIoPorts));
184 PVM pVM = pDevIns->Internal.s.pVMR3;
185 VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
186 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
187
188 int rc = VINF_SUCCESS;
189 if (pDevIns->Internal.s.idxDbgfTraceTrackNext < pDevIns->Internal.s.cDbgfTraceTrackMax)
190 {
191 PPDMDEVINSDBGFTRACK pTrack = &pDevIns->Internal.s.paDbgfTraceTrack[pDevIns->Internal.s.idxDbgfTraceTrackNext];
192
193 rc = IOMR3IoPortCreate(pVM, pDevIns, cPorts, fFlags, pPciDev, iPciRegion,
194 pfnOut ? pdmR3DevHlpTracing_IoPortNewOut : NULL,
195 pfnIn ? pdmR3DevHlpTracing_IoPortNewIn : NULL,
196 pfnOutStr ? pdmR3DevHlpTracing_IoPortNewOutStr : NULL,
197 pfnInStr ? pdmR3DevHlpTracing_IoPortNewInStr : NULL,
198 pTrack, pszDesc, paExtDescs, phIoPorts);
199 if (RT_SUCCESS(rc))
200 {
201 pTrack->fMmio = false;
202 pTrack->pvUser = pvUser;
203 pTrack->u.IoPort.hIoPorts = *phIoPorts;
204 pTrack->u.IoPort.pfnOut = pfnOut;
205 pTrack->u.IoPort.pfnIn = pfnIn;
206 pTrack->u.IoPort.pfnOutStr = pfnOutStr;
207 pTrack->u.IoPort.pfnInStr = pfnInStr;
208 pDevIns->Internal.s.idxDbgfTraceTrackNext++;
209 DBGFR3TracerEvtIoPortCreate(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, *phIoPorts, cPorts, fFlags, iPciRegion);
210 }
211 }
212 else
213 rc = VERR_OUT_OF_RESOURCES;
214
215 LogFlow(("pdmR3DevHlpTracing_IoPortCreateEx: caller='%s'/%d: returns %Rrc (*phIoPorts=%#x)\n",
216 pDevIns->pReg->szName, pDevIns->iInstance, rc, *phIoPorts));
217 return rc;
218}
219
220
221/** @interface_method_impl{PDMDEVHLPR3,pfnIoPortMap} */
222DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_IoPortMap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT Port)
223{
224 PDMDEV_ASSERT_DEVINS(pDevIns);
225 LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: hIoPorts=%#x Port=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, hIoPorts, Port));
226 PVM pVM = pDevIns->Internal.s.pVMR3;
227 VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
228
229 int rc = IOMR3IoPortMap(pVM, pDevIns, hIoPorts, Port);
230 DBGFTracerEvtIoPortMap(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, hIoPorts, Port);
231
232 LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
233 return rc;
234}
235
236
237/** @interface_method_impl{PDMDEVHLPR3,pfnIoPortUnmap} */
238DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_IoPortUnmap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
239{
240 PDMDEV_ASSERT_DEVINS(pDevIns);
241 LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: hIoPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, hIoPorts));
242 PVM pVM = pDevIns->Internal.s.pVMR3;
243 VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
244
245 int rc = IOMR3IoPortUnmap(pVM, pDevIns, hIoPorts);
246 DBGFTracerEvtIoPortUnmap(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, hIoPorts);
247
248 LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
249 return rc;
250}
251
252
253/** @interface_method_impl{PDMDEVHLPR3,pfnMmioCreateEx} */
254DECL_HIDDEN_CALLBACK(int)
255pdmR3DevHlpTracing_MmioCreateEx(PPDMDEVINS pDevIns, RTGCPHYS cbRegion,
256 uint32_t fFlags, PPDMPCIDEV pPciDev, uint32_t iPciRegion,
257 PFNIOMMMIONEWWRITE pfnWrite, PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill,
258 void *pvUser, const char *pszDesc, PIOMMMIOHANDLE phRegion)
259{
260 PDMDEV_ASSERT_DEVINS(pDevIns);
261 LogFlow(("pdmR3DevHlp_MmioCreateEx: caller='%s'/%d: cbRegion=%#RGp fFlags=%#x pPciDev=%p iPciRegion=%#x pfnWrite=%p pfnRead=%p pfnFill=%p pvUser=%p pszDesc=%p:{%s} phRegion=%p\n",
262 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, fFlags, pPciDev, iPciRegion, pfnWrite, pfnRead, pfnFill, pvUser, pszDesc, pszDesc, phRegion));
263 PVM pVM = pDevIns->Internal.s.pVMR3;
264 VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
265 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
266
267 /* HACK ALERT! Round the size up to page size. The PCI bus should do something similar before mapping it. */
268 /** @todo It's possible we need to do dummy MMIO fill-in of the PCI bus or
269 * guest adds more alignment to an region. */
270 cbRegion = RT_ALIGN_T(cbRegion, GUEST_PAGE_SIZE, RTGCPHYS);
271
272 int rc = VINF_SUCCESS;
273 if (pDevIns->Internal.s.idxDbgfTraceTrackNext < pDevIns->Internal.s.cDbgfTraceTrackMax)
274 {
275 PPDMDEVINSDBGFTRACK pTrack = &pDevIns->Internal.s.paDbgfTraceTrack[pDevIns->Internal.s.idxDbgfTraceTrackNext];
276
277 rc = IOMR3MmioCreate(pVM, pDevIns, cbRegion, fFlags, pPciDev, iPciRegion,
278 pfnWrite ? pdmR3DevHlpTracing_MmioWrite : NULL,
279 pfnRead ? pdmR3DevHlpTracing_MmioRead : NULL,
280 pfnFill ? pdmR3DevHlpTracing_MmioFill : NULL,
281 pTrack, pszDesc, phRegion);
282 if (RT_SUCCESS(rc))
283 {
284 pTrack->fMmio = true;
285 pTrack->pvUser = pvUser;
286 pTrack->u.Mmio.hMmioRegion = *phRegion;
287 pTrack->u.Mmio.pfnWrite = pfnWrite;
288 pTrack->u.Mmio.pfnRead = pfnRead;
289 pTrack->u.Mmio.pfnFill = pfnFill;
290 pDevIns->Internal.s.idxDbgfTraceTrackNext++;
291 DBGFR3TracerEvtMmioCreate(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, *phRegion, cbRegion, fFlags, iPciRegion);
292 }
293 }
294 else
295 rc = VERR_OUT_OF_RESOURCES;
296
297 LogFlow(("pdmR3DevHlp_MmioCreateEx: caller='%s'/%d: returns %Rrc (*phRegion=%#x)\n",
298 pDevIns->pReg->szName, pDevIns->iInstance, rc, *phRegion));
299 return rc;
300}
301
302
303/** @interface_method_impl{PDMDEVHLPR3,pfnMmioMap} */
304DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_MmioMap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS GCPhys)
305{
306 PDMDEV_ASSERT_DEVINS(pDevIns);
307 LogFlow(("pdmR3DevHlp_MmioMap: caller='%s'/%d: hRegion=%#x GCPhys=%#RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, hRegion, GCPhys));
308 PVM pVM = pDevIns->Internal.s.pVMR3;
309 VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
310
311 int rc = IOMR3MmioMap(pVM, pDevIns, hRegion, GCPhys);
312 DBGFTracerEvtMmioMap(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, hRegion, GCPhys);
313
314 LogFlow(("pdmR3DevHlp_MmioMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
315 return rc;
316}
317
318
319/** @interface_method_impl{PDMDEVHLPR3,pfnMmioUnmap} */
320DECL_HIDDEN_CALLBACK(int) pdmR3DevHlpTracing_MmioUnmap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
321{
322 PDMDEV_ASSERT_DEVINS(pDevIns);
323 LogFlow(("pdmR3DevHlp_MmioUnmap: caller='%s'/%d: hRegion=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, hRegion));
324 PVM pVM = pDevIns->Internal.s.pVMR3;
325 VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
326
327 int rc = IOMR3MmioUnmap(pVM, pDevIns, hRegion);
328 DBGFTracerEvtMmioUnmap(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, hRegion);
329
330 LogFlow(("pdmR3DevHlp_MmioUnmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
331 return rc;
332}
333
334
335/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
336DECL_HIDDEN_CALLBACK(int)
337pdmR3DevHlpTracing_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags)
338{
339 RT_NOREF(fFlags);
340
341 PDMDEV_ASSERT_DEVINS(pDevIns);
342 PVM pVM = pDevIns->Internal.s.pVMR3;
343 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
344 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
345
346#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
347 if (!VM_IS_EMT(pVM))
348 {
349 char szNames[128];
350 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
351 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
352 }
353#endif
354
355 VBOXSTRICTRC rcStrict;
356 if (VM_IS_EMT(pVM))
357 rcStrict = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
358 else
359 rcStrict = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
360 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
361
362 if (!(fFlags & PDM_DEVHLP_PHYS_RW_F_DATA_USER))
363 DBGFTracerEvtGCPhysRead(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, GCPhys, pvBuf, cbRead);
364
365 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
366 return VBOXSTRICTRC_VAL(rcStrict);
367}
368
369
370/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
371DECL_HIDDEN_CALLBACK(int)
372pdmR3DevHlpTracing_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags)
373{
374 RT_NOREF(fFlags);
375
376 PDMDEV_ASSERT_DEVINS(pDevIns);
377 PVM pVM = pDevIns->Internal.s.pVMR3;
378 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
379 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
380
381#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
382 if (!VM_IS_EMT(pVM))
383 {
384 char szNames[128];
385 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
386 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
387 }
388#endif
389
390 VBOXSTRICTRC rcStrict;
391 if (VM_IS_EMT(pVM))
392 rcStrict = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
393 else
394 rcStrict = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
395 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
396
397 if (!(fFlags & PDM_DEVHLP_PHYS_RW_F_DATA_USER))
398 DBGFTracerEvtGCPhysWrite(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, GCPhys, pvBuf, cbWrite);
399
400 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
401 return VBOXSTRICTRC_VAL(rcStrict);
402}
403
404
405/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
406DECL_HIDDEN_CALLBACK(int)
407pdmR3DevHlpTracing_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags)
408{
409 PDMDEV_ASSERT_DEVINS(pDevIns);
410 if (!pPciDev) /* NULL is an alias for the default PCI device. */
411 pPciDev = pDevIns->apPciDevs[0];
412 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
413 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
414
415#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
416 /*
417 * Just check the busmaster setting here and forward the request to the generic read helper.
418 */
419 if (PCIDevIsBusmaster(pPciDev))
420 { /* likely */ }
421 else
422 {
423 LogFunc(("caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n", pDevIns->pReg->szName,
424 pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
425 memset(pvBuf, 0xff, cbRead);
426 return VERR_PDM_NOT_PCI_BUS_MASTER;
427 }
428#endif
429
430#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
431 int rc = pdmIommuMemAccessRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, fFlags);
432 if ( rc == VERR_IOMMU_NOT_PRESENT
433 || rc == VERR_IOMMU_CANNOT_CALL_SELF)
434 { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
435 else
436 return rc;
437#endif
438
439 return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead, fFlags);
440}
441
442
443/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysWrite} */
444DECL_HIDDEN_CALLBACK(int)
445pdmR3DevHlpTracing_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags)
446{
447 PDMDEV_ASSERT_DEVINS(pDevIns);
448 if (!pPciDev) /* NULL is an alias for the default PCI device. */
449 pPciDev = pDevIns->apPciDevs[0];
450 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
451 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
452
453#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
454 /*
455 * Just check the busmaster setting here and forward the request to the generic read helper.
456 */
457 if (PCIDevIsBusmaster(pPciDev))
458 { /* likely */ }
459 else
460 {
461 Log(("pdmR3DevHlp_PCIPhysWrite: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
462 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
463 return VERR_PDM_NOT_PCI_BUS_MASTER;
464 }
465#endif
466
467#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
468 int rc = pdmIommuMemAccessWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, fFlags);
469 if ( rc == VERR_IOMMU_NOT_PRESENT
470 || rc == VERR_IOMMU_CANNOT_CALL_SELF)
471 { /* likely - ASSUMING most VMs won't be configured with an IOMMU. */ }
472 else
473 return rc;
474#endif
475
476 return pDevIns->pHlpR3->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite, fFlags);
477}
478
479
480/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
481DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
482{
483 PDMDEV_ASSERT_DEVINS(pDevIns);
484 if (!pPciDev) /* NULL is an alias for the default PCI device. */
485 pPciDev = pDevIns->apPciDevs[0];
486 AssertReturnVoid(pPciDev);
487 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
488 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
489 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
490
491 /*
492 * Validate input.
493 */
494 Assert(iIrq == 0);
495 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
496
497 /*
498 * Must have a PCI device registered!
499 */
500 PVM pVM = pDevIns->Internal.s.pVMR3;
501 size_t const idxBus = pPciDev->Int.s.idxPdmBus;
502 AssertReturnVoid(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses));
503 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus];
504
505 DBGFTracerEvtIrq(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, iIrq, iLevel);
506
507 pdmLock(pVM);
508 uint32_t uTagSrc;
509 if (iLevel & PDM_IRQ_LEVEL_HIGH)
510 {
511 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
512 if (iLevel == PDM_IRQ_LEVEL_HIGH)
513 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
514 else
515 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
516 }
517 else
518 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
519
520 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel, uTagSrc);
521
522 if (iLevel == PDM_IRQ_LEVEL_LOW)
523 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
524 pdmUnlock(pVM);
525
526 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
527}
528
529
530/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
531DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
532{
533 pdmR3DevHlpTracing_PCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
534}
535
536
537/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
538DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
539{
540 PDMDEV_ASSERT_DEVINS(pDevIns);
541 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
542
543 /*
544 * Validate input.
545 */
546 Assert(iIrq < 16);
547 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
548
549 PVM pVM = pDevIns->Internal.s.pVMR3;
550
551 DBGFTracerEvtIrq(pVM, pDevIns->Internal.s.hDbgfTraceEvtSrc, iIrq, iLevel);
552
553 /*
554 * Do the job.
555 */
556 pdmLock(pVM);
557 uint32_t uTagSrc;
558 if (iLevel & PDM_IRQ_LEVEL_HIGH)
559 {
560 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
561 if (iLevel == PDM_IRQ_LEVEL_HIGH)
562 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
563 else
564 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
565 }
566 else
567 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
568
569 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
570
571 if (iLevel == PDM_IRQ_LEVEL_LOW)
572 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
573 pdmUnlock(pVM);
574
575 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
576}
577
578
579/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
580DECL_HIDDEN_CALLBACK(void) pdmR3DevHlpTracing_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
581{
582 pdmR3DevHlpTracing_ISASetIrq(pDevIns, iIrq, iLevel);
583}
584
585
586/** @} */
587
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