VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp@ 80281

Last change on this file since 80281 was 80281, checked in by vboxsync, 5 years ago

VMM,++: Refactoring code to use VMMC & VMMCPUCC. bugref:9217
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File size: 168.6 KB
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1/* $Id: PDMDevHlp.cpp 80281 2019-08-15 07:29:37Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define VBOX_BUGREF_9217_PART_I
23#define LOG_GROUP LOG_GROUP_PDM_DEVICE
24#define PDMPCIDEV_INCLUDE_PRIVATE /* Hack to get pdmpcidevint.h included at the right point. */
25#include "PDMInternal.h"
26#include <VBox/vmm/pdm.h>
27#include <VBox/vmm/mm.h>
28#include <VBox/vmm/hm.h>
29#include <VBox/vmm/pgm.h>
30#include <VBox/vmm/iom.h>
31#ifdef VBOX_WITH_REM
32# include <VBox/vmm/rem.h>
33#endif
34#include <VBox/vmm/dbgf.h>
35#include <VBox/vmm/vmapi.h>
36#include <VBox/vmm/vmm.h>
37#include <VBox/vmm/vmcc.h>
38
39#include <VBox/version.h>
40#include <VBox/log.h>
41#include <VBox/err.h>
42#include <iprt/asm.h>
43#include <iprt/assert.h>
44#include <iprt/ctype.h>
45#include <iprt/string.h>
46#include <iprt/thread.h>
47
48#include "dtrace/VBoxVMM.h"
49#include "PDMInline.h"
50
51
52/*********************************************************************************************************************************
53* Defined Constants And Macros *
54*********************************************************************************************************************************/
55/** @def PDM_DEVHLP_DEADLOCK_DETECTION
56 * Define this to enable the deadlock detection when accessing physical memory.
57 */
58#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
59# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
60#endif
61
62
63
64/**
65 * Wrapper around PDMR3LdrGetSymbolRCLazy.
66 */
67DECLINLINE(int) pdmR3DevGetSymbolRCLazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTRCPTR ppvValue)
68{
69 PVM pVM = pDevIns->Internal.s.pVMR3;
70 if (!VM_IS_RAW_MODE_ENABLED(pVM))
71 {
72 *ppvValue = NIL_RTRCPTR;
73 return VINF_SUCCESS;
74 }
75 return PDMR3LdrGetSymbolRCLazy(pVM,
76 pDevIns->Internal.s.pDevR3->pReg->szRCMod,
77 pDevIns->Internal.s.pDevR3->pszRCSearchPath,
78 pszSymbol, ppvValue);
79}
80
81
82/**
83 * Wrapper around PDMR3LdrGetSymbolR0Lazy.
84 */
85DECLINLINE(int) pdmR3DevGetSymbolR0Lazy(PPDMDEVINS pDevIns, const char *pszSymbol, PRTR0PTR ppvValue)
86{
87 return PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3,
88 pDevIns->Internal.s.pDevR3->pReg->szR0Mod,
89 pDevIns->Internal.s.pDevR3->pszR0SearchPath,
90 pszSymbol, ppvValue);
91}
92
93
94/** @name R3 DevHlp
95 * @{
96 */
97
98
99/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
100static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
101 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
102{
103 PDMDEV_ASSERT_DEVINS(pDevIns);
104 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
105 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
106 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
107
108#if 0 /** @todo needs a real string cache for this */
109 if (pDevIns->iInstance > 0)
110 {
111 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
112 if (pszDesc2)
113 pszDesc = pszDesc2;
114 }
115#endif
116
117 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser,
118 pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
119
120 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
121 return rc;
122}
123
124
125/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
126static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
127 const char *pszOut, const char *pszIn,
128 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
129{
130 PDMDEV_ASSERT_DEVINS(pDevIns);
131 Assert(pDevIns->pReg->szRCMod[0]);
132 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
133 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
134 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
135
136#if 0
137 /*
138 * Resolve the functions (one of the can be NULL).
139 */
140 PVM pVM = pDevIns->Internal.s.pVMR3;
141 VM_ASSERT_EMT(pVM);
142 int rc = VINF_SUCCESS;
143 if ( pDevIns->pReg->szRCMod[0]
144 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
145 && VM_IS_RAW_MODE_ENABLED(pVM))
146 {
147 RTRCPTR RCPtrIn = NIL_RTRCPTR;
148 if (pszIn)
149 {
150 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszIn, &RCPtrIn);
151 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
152 }
153 RTRCPTR RCPtrOut = NIL_RTRCPTR;
154 if (pszOut && RT_SUCCESS(rc))
155 {
156 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOut, &RCPtrOut);
157 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
158 }
159 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
160 if (pszInStr && RT_SUCCESS(rc))
161 {
162 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszInStr, &RCPtrInStr);
163 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
164 }
165 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
166 if (pszOutStr && RT_SUCCESS(rc))
167 {
168 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszOutStr, &RCPtrOutStr);
169 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
170 }
171
172 if (RT_SUCCESS(rc))
173 {
174#if 0 /** @todo needs a real string cache for this */
175 if (pDevIns->iInstance > 0)
176 {
177 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
178 if (pszDesc2)
179 pszDesc = pszDesc2;
180 }
181#endif
182
183 rc = IOMR3IOPortRegisterRC(pVM, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
184 }
185 }
186 else if (VM_IS_RAW_MODE_ENABLED(pVM))
187 {
188 AssertMsgFailed(("No RC module for this driver!\n"));
189 rc = VERR_INVALID_PARAMETER;
190 }
191#else
192 RT_NOREF(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
193 int rc = VINF_SUCCESS;
194#endif
195
196 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
197 return rc;
198}
199
200
201/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
202static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
203 const char *pszOut, const char *pszIn,
204 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
205{
206 PDMDEV_ASSERT_DEVINS(pDevIns);
207 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
208 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
209 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
210
211 /*
212 * Resolve the functions (one of the can be NULL).
213 */
214 int rc = VINF_SUCCESS;
215 if ( pDevIns->pReg->szR0Mod[0]
216 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
217 {
218 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
219 if (pszIn)
220 {
221 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszIn, &pfnR0PtrIn);
222 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
223 }
224 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
225 if (pszOut && RT_SUCCESS(rc))
226 {
227 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOut, &pfnR0PtrOut);
228 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
229 }
230 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
231 if (pszInStr && RT_SUCCESS(rc))
232 {
233 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszInStr, &pfnR0PtrInStr);
234 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
235 }
236 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
237 if (pszOutStr && RT_SUCCESS(rc))
238 {
239 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszOutStr, &pfnR0PtrOutStr);
240 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
241 }
242
243 if (RT_SUCCESS(rc))
244 {
245#if 0 /** @todo needs a real string cache for this */
246 if (pDevIns->iInstance > 0)
247 {
248 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
249 if (pszDesc2)
250 pszDesc = pszDesc2;
251 }
252#endif
253
254 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
255 }
256 }
257 else
258 {
259 AssertMsgFailed(("No R0 module for this driver!\n"));
260 rc = VERR_INVALID_PARAMETER;
261 }
262
263 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
264 return rc;
265}
266
267
268/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
269static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
270{
271 PDMDEV_ASSERT_DEVINS(pDevIns);
272 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
273 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
274 Port, cPorts));
275
276 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
277
278 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
279 return rc;
280}
281
282
283/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
284static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser,
285 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
286 uint32_t fFlags, const char *pszDesc)
287{
288 PDMDEV_ASSERT_DEVINS(pDevIns);
289 PVM pVM = pDevIns->Internal.s.pVMR3;
290 VM_ASSERT_EMT(pVM);
291 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p fFlags=%#x pszDesc=%p:{%s}\n",
292 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, fFlags, pszDesc));
293
294 if (pDevIns->iInstance > 0)
295 {
296 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
297 if (pszDesc2)
298 pszDesc = pszDesc2;
299 }
300
301 int rc = IOMR3MmioRegisterR3(pVM, pDevIns, GCPhysStart, cbRange, pvUser,
302 pfnWrite, pfnRead, pfnFill, fFlags, pszDesc);
303
304 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
305 return rc;
306}
307
308
309/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
310static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser,
311 const char *pszWrite, const char *pszRead, const char *pszFill)
312{
313 PDMDEV_ASSERT_DEVINS(pDevIns);
314 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
315 Assert(pDevIns->pReg->szR0Mod[0]);
316 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
317 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
318 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
319
320#if 0
321 /*
322 * Resolve the functions.
323 * Not all function have to present, leave it to IOM to enforce this.
324 */
325 int rc = VINF_SUCCESS;
326 if ( pDevIns->pReg->szRCMod[0]
327 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
328 && VM_IS_RAW_MODE_ENABLED(pDevIns->Internal.s.pVMR3))
329 {
330 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
331 if (pszWrite)
332 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWrite, &RCPtrWrite);
333
334 RTRCPTR RCPtrRead = NIL_RTRCPTR;
335 int rc2 = VINF_SUCCESS;
336 if (pszRead)
337 rc2 = pdmR3DevGetSymbolRCLazy(pDevIns, pszRead, &RCPtrRead);
338
339 RTRCPTR RCPtrFill = NIL_RTRCPTR;
340 int rc3 = VINF_SUCCESS;
341 if (pszFill)
342 rc3 = pdmR3DevGetSymbolRCLazy(pDevIns, pszFill, &RCPtrFill);
343
344 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
345 rc = IOMR3MmioRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
346 else
347 {
348 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
349 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
350 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
351 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
352 rc = rc2;
353 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
354 rc = rc3;
355 }
356 }
357 else if (VM_IS_RAW_MODE_ENABLED(pDevIns->Internal.s.pVMR3))
358 {
359 AssertMsgFailed(("No RC module for this driver!\n"));
360 rc = VERR_INVALID_PARAMETER;
361 }
362#else
363 int rc = VINF_SUCCESS;
364 RT_NOREF(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
365#endif
366
367 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
368 return rc;
369}
370
371/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
372static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser,
373 const char *pszWrite, const char *pszRead, const char *pszFill)
374{
375 PDMDEV_ASSERT_DEVINS(pDevIns);
376 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
377 Assert(pDevIns->pReg->szR0Mod[0]);
378 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
379 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
380 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
381
382 /*
383 * Resolve the functions.
384 * Not all function have to present, leave it to IOM to enforce this.
385 */
386 int rc = VINF_SUCCESS;
387 if ( pDevIns->pReg->szR0Mod[0]
388 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
389 {
390 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
391 if (pszWrite)
392 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWrite, &pfnR0PtrWrite);
393 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
394 int rc2 = VINF_SUCCESS;
395 if (pszRead)
396 rc2 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszRead, &pfnR0PtrRead);
397 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
398 int rc3 = VINF_SUCCESS;
399 if (pszFill)
400 rc3 = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFill, &pfnR0PtrFill);
401 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
402 rc = IOMR3MmioRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser,
403 pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
404 else
405 {
406 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
407 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
408 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
409 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
410 rc = rc2;
411 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
412 rc = rc3;
413 }
414 }
415 else
416 {
417 AssertMsgFailed(("No R0 module for this driver!\n"));
418 rc = VERR_INVALID_PARAMETER;
419 }
420
421 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
422 return rc;
423}
424
425
426/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
427static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange)
428{
429 PDMDEV_ASSERT_DEVINS(pDevIns);
430 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
431 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp\n",
432 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
433
434 int rc = IOMR3MmioDeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
435
436 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
437 return rc;
438}
439
440
441/**
442 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
443 */
444static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb,
445 uint32_t fFlags, void **ppv, const char *pszDesc)
446{
447 PDMDEV_ASSERT_DEVINS(pDevIns);
448 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
449 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: pPciDev=%p (%#x) iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
450 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion,
451 cb, fFlags, ppv, pszDesc, pszDesc));
452 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
453
454/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
455 * use a real string cache. */
456 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion,
457 cb, fFlags, ppv, pszDesc);
458
459 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
460 return rc;
461}
462
463
464/**
465 * @interface_method_impl{PDMDEVHLPR3,pfnMMIOExPreRegister}
466 */
467static DECLCALLBACK(int)
468pdmR3DevHlp_MMIOExPreRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, uint32_t fFlags,
469 const char *pszDesc,
470 RTHCPTR pvUser, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
471 RTR0PTR pvUserR0, const char *pszWriteR0, const char *pszReadR0, const char *pszFillR0,
472 RTRCPTR pvUserRC, const char *pszWriteRC, const char *pszReadRC, const char *pszFillRC)
473{
474 PDMDEV_ASSERT_DEVINS(pDevIns);
475 PVM pVM = pDevIns->Internal.s.pVMR3;
476 VM_ASSERT_EMT(pVM);
477 LogFlow(("pdmR3DevHlp_MMIOExPreRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x cbRegion=%#RGp fFlags=%RX32 pszDesc=%p:{%s}\n"
478 " pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p\n"
479 " pvUserR0=%p pszWriteR0=%s pszReadR0=%s pszFillR0=%s\n"
480 " pvUserRC=%p pszWriteRC=%s pszReadRC=%s pszFillRC=%s\n",
481 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, cbRegion,
482 fFlags, pszDesc, pszDesc,
483 pvUser, pfnWrite, pfnRead, pfnFill,
484 pvUserR0, pszWriteR0, pszReadR0, pszFillR0,
485 pvUserRC, pszWriteRC, pszReadRC, pszFillRC));
486 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
487
488 /*
489 * Resolve the functions.
490 */
491 AssertLogRelReturn( (!pszWriteR0 && !pszReadR0 && !pszFillR0)
492 || (pDevIns->pReg->szR0Mod[0] && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)),
493 VERR_INVALID_PARAMETER);
494 AssertLogRelReturn( (!pszWriteRC && !pszReadRC && !pszFillRC)
495 || (pDevIns->pReg->szRCMod[0] && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)),
496 VERR_INVALID_PARAMETER);
497
498 /* Ring-0 */
499 int rc;
500 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteR0 = 0;
501 if (pszWriteR0)
502 {
503 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszWriteR0, &pfnWriteR0);
504 AssertLogRelMsgRCReturn(rc, ("pszWriteR0=%s rc=%Rrc\n", pszWriteR0, rc), rc);
505 }
506
507 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadR0 = 0;
508 if (pszReadR0)
509 {
510 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszReadR0, &pfnReadR0);
511 AssertLogRelMsgRCReturn(rc, ("pszReadR0=%s rc=%Rrc\n", pszReadR0, rc), rc);
512 }
513 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillR0 = 0;
514 if (pszFillR0)
515 {
516 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pszFillR0, &pfnFillR0);
517 AssertLogRelMsgRCReturn(rc, ("pszFillR0=%s rc=%Rrc\n", pszFillR0, rc), rc);
518 }
519
520 /* Raw-mode */
521#if 0
522 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteRC = 0;
523 if (pszWriteRC)
524 {
525 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszWriteRC, &pfnWriteRC);
526 AssertLogRelMsgRCReturn(rc, ("pszWriteRC=%s rc=%Rrc\n", pszWriteRC, rc), rc);
527 }
528
529 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadRC = 0;
530 if (pszReadRC)
531 {
532 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszReadRC, &pfnReadRC);
533 AssertLogRelMsgRCReturn(rc, ("pszReadRC=%s rc=%Rrc\n", pszReadRC, rc), rc);
534 }
535 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillRC = 0;
536 if (pszFillRC)
537 {
538 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pszFillRC, &pfnFillRC);
539 AssertLogRelMsgRCReturn(rc, ("pszFillRC=%s rc=%Rrc\n", pszFillRC, rc), rc);
540 }
541#else
542 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteRC = 0;
543 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadRC = 0;
544 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillRC = 0;
545 RT_NOREF(pszWriteRC, pszReadRC, pszFillRC);
546#endif
547
548
549 /*
550 * Call IOM to make the registration.
551 */
552 rc = IOMR3MmioExPreRegister(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, cbRegion, fFlags, pszDesc,
553 pvUser, pfnWrite, pfnRead, pfnFill,
554 pvUserR0, pfnWriteR0, pfnReadR0, pfnFillR0,
555 pvUserRC, pfnWriteRC, pfnReadRC, pfnFillRC);
556
557 LogFlow(("pdmR3DevHlp_MMIOExPreRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
558 return rc;
559}
560
561
562/**
563 * @copydoc PDMDEVHLPR3::pfnMMIOExDeregister
564 */
565static DECLCALLBACK(int) pdmR3DevHlp_MMIOExDeregister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)
566{
567 PDMDEV_ASSERT_DEVINS(pDevIns);
568 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
569 LogFlow(("pdmR3DevHlp_MMIOExDeregister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x\n",
570 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion));
571
572 AssertReturn(iRegion <= UINT8_MAX || iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
573 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
574
575 int rc = PGMR3PhysMMIOExDeregister(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion);
576
577 LogFlow(("pdmR3DevHlp_MMIOExDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
578 return rc;
579}
580
581
582/**
583 * @copydoc PDMDEVHLPR3::pfnMMIOExMap
584 */
585static DECLCALLBACK(int) pdmR3DevHlp_MMIOExMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
586{
587 PDMDEV_ASSERT_DEVINS(pDevIns);
588 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
589 LogFlow(("pdmR3DevHlp_MMIOExMap: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x GCPhys=%#RGp\n",
590 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, GCPhys));
591 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
592
593 int rc = PGMR3PhysMMIOExMap(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, GCPhys);
594
595 LogFlow(("pdmR3DevHlp_MMIOExMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
596 return rc;
597}
598
599
600/**
601 * @copydoc PDMDEVHLPR3::pfnMMIOExUnmap
602 */
603static DECLCALLBACK(int) pdmR3DevHlp_MMIOExUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
604{
605 PDMDEV_ASSERT_DEVINS(pDevIns);
606 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
607 LogFlow(("pdmR3DevHlp_MMIOExUnmap: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x GCPhys=%#RGp\n",
608 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, GCPhys));
609 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
610
611 int rc = PGMR3PhysMMIOExUnmap(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, GCPhys);
612
613 LogFlow(("pdmR3DevHlp_MMIOExUnmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
614 return rc;
615}
616
617
618/**
619 * @copydoc PDMDEVHLPR3::pfnMMIOExReduce
620 */
621static DECLCALLBACK(int) pdmR3DevHlp_MMIOExReduce(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion)
622{
623 PDMDEV_ASSERT_DEVINS(pDevIns);
624 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
625 LogFlow(("pdmR3DevHlp_MMIOExReduce: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x cbRegion=%RGp\n",
626 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, cbRegion));
627 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 != NULL, VERR_INVALID_PARAMETER);
628
629 int rc = PGMR3PhysMMIOExReduce(pDevIns->Internal.s.pVMR3, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, cbRegion);
630
631 LogFlow(("pdmR3DevHlp_MMIOExReduce: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
632 return rc;
633}
634
635
636/**
637 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
638 */
639static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
640 RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
641{
642 PDMDEV_ASSERT_DEVINS(pDevIns);
643#ifndef PGM_WITHOUT_MAPPINGS
644 PVM pVM = pDevIns->Internal.s.pVMR3;
645 VM_ASSERT_EMT(pVM);
646 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
647 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
648 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
649
650 if (pDevIns->iInstance > 0)
651 {
652 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
653 if (pszDesc2)
654 pszDesc = pszDesc2;
655 }
656
657 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, off, cb, pszDesc, pRCPtr);
658
659#else
660 RT_NOREF(pDevIns, pPciDev, iRegion, off, cb, pszDesc, pRCPtr);
661 AssertFailed();
662 int rc = VERR_RAW_MODE_NOT_SUPPORTED;
663#endif
664 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pRCPtr));
665 return rc;
666}
667
668
669/**
670 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
671 */
672static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
673 RTGCPHYS cb,const char *pszDesc, PRTR0PTR pR0Ptr)
674{
675 PDMDEV_ASSERT_DEVINS(pDevIns);
676 PVM pVM = pDevIns->Internal.s.pVMR3;
677 VM_ASSERT_EMT(pVM);
678 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
679 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
680 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
681
682 if (pDevIns->iInstance > 0)
683 {
684 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
685 if (pszDesc2)
686 pszDesc = pszDesc2;
687 }
688
689 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, off, cb, pszDesc, pR0Ptr);
690
691 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pR0Ptr));
692 return rc;
693}
694
695
696/**
697 * @copydoc PDMDEVHLPR3::pfnMMIOExChangeRegionNo
698 */
699static DECLCALLBACK(int) pdmR3DevHlp_MMIOExChangeRegionNo(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
700 uint32_t iNewRegion)
701{
702 PDMDEV_ASSERT_DEVINS(pDevIns);
703 PVM pVM = pDevIns->Internal.s.pVMR3;
704 VM_ASSERT_EMT(pVM);
705 LogFlow(("pdmR3DevHlp_MMIOExChangeRegionNo: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%#x iNewRegion=%#x\n",
706 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev ? pPciDev->uDevFn : UINT32_MAX, iRegion, iNewRegion));
707 AssertReturn(!pPciDev || pPciDev->Int.s.pDevInsR3 == pDevIns, VERR_INVALID_PARAMETER);
708
709 int rc = PGMR3PhysMMIOExChangeRegionNo(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iRegion, iNewRegion);
710
711 LogFlow(("pdmR3DevHlp_MMIOExChangeRegionNo: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
712 return rc;
713}
714
715
716/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
717static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
718 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
719{
720 PDMDEV_ASSERT_DEVINS(pDevIns);
721 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
722 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p cbBinary=%#x fFlags=%#RX32 pszDesc=%p:{%s}\n",
723 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc, pszDesc));
724
725/** @todo can we mangle pszDesc? */
726 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
727
728 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
729 return rc;
730}
731
732
733/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
734static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
735{
736 PDMDEV_ASSERT_DEVINS(pDevIns);
737 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
738 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
739
740 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
741
742 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
743 return rc;
744}
745
746
747/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
748static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
749 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
750 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
751 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
752{
753 PDMDEV_ASSERT_DEVINS(pDevIns);
754 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
755 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=%#x cbGuess=%#x pszBefore=%p:{%s}\n"
756 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
757 pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
758 pfnLivePrep, pfnLiveExec, pfnLiveVote,
759 pfnSavePrep, pfnSaveExec, pfnSaveDone,
760 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
761
762 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
763 uVersion, cbGuess, pszBefore,
764 pfnLivePrep, pfnLiveExec, pfnLiveVote,
765 pfnSavePrep, pfnSaveExec, pfnSaveDone,
766 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
767
768 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
769 return rc;
770}
771
772
773/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
774static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
775{
776 PDMDEV_ASSERT_DEVINS(pDevIns);
777 PVM pVM = pDevIns->Internal.s.pVMR3;
778 VM_ASSERT_EMT(pVM);
779 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
780 pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
781
782 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
783 {
784 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
785 if (pszDesc2)
786 pszDesc = pszDesc2;
787 }
788
789 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
790
791 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
792 return rc;
793}
794
795
796/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
797static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
798{
799 PDMDEV_ASSERT_DEVINS(pDevIns);
800 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
801 pDevIns->pReg->szName, pDevIns->iInstance, pTime));
802
803 pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
804
805 LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
806 return pTime;
807}
808
809
810/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGet} */
811static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
812{
813 PDMDEV_ASSERT_DEVINS(pDevIns);
814 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d\n",
815 pDevIns->pReg->szName, pDevIns->iInstance));
816
817 uint64_t u64Time = TMVirtualSyncGet(pDevIns->Internal.s.pVMR3);
818
819 LogFlow(("pdmR3DevHlp_TMTimeVirtGet: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Time));
820 return u64Time;
821}
822
823
824/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetFreq} */
825static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
826{
827 PDMDEV_ASSERT_DEVINS(pDevIns);
828 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d\n",
829 pDevIns->pReg->szName, pDevIns->iInstance));
830
831 uint64_t u64Freq = TMVirtualGetFreq(pDevIns->Internal.s.pVMR3);
832
833 LogFlow(("pdmR3DevHlp_TMTimeVirtGetFreq: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Freq));
834 return u64Freq;
835}
836
837
838/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimeVirtGetNano} */
839static DECLCALLBACK(uint64_t) pdmR3DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
840{
841 PDMDEV_ASSERT_DEVINS(pDevIns);
842 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d\n",
843 pDevIns->pReg->szName, pDevIns->iInstance));
844
845 uint64_t u64Time = TMVirtualGet(pDevIns->Internal.s.pVMR3);
846 uint64_t u64Nano = TMVirtualToNano(pDevIns->Internal.s.pVMR3, u64Time);
847
848 LogFlow(("pdmR3DevHlp_TMTimeVirtGetNano: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, u64Nano));
849 return u64Nano;
850}
851
852
853/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
854static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_GetSupDrvSession(PPDMDEVINS pDevIns)
855{
856 PDMDEV_ASSERT_DEVINS(pDevIns);
857 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d\n",
858 pDevIns->pReg->szName, pDevIns->iInstance));
859
860 PSUPDRVSESSION pSession = pDevIns->Internal.s.pVMR3->pSession;
861
862 LogFlow(("pdmR3DevHlp_GetSupDrvSession: caller='%s'/%d: returns %#p\n", pDevIns->pReg->szName, pDevIns->iInstance, pSession));
863 return pSession;
864}
865
866
867/** @interface_method_impl{PDMDEVHLPR3,pfnQueryGenericUserObject} */
868static DECLCALLBACK(void *) pdmR3DevHlp_QueryGenericUserObject(PPDMDEVINS pDevIns, PCRTUUID pUuid)
869{
870 PDMDEV_ASSERT_DEVINS(pDevIns);
871 LogFlow(("pdmR3DevHlp_QueryGenericUserObject: caller='%s'/%d: pUuid=%p:%RTuuid\n",
872 pDevIns->pReg->szName, pDevIns->iInstance, pUuid, pUuid));
873
874#if defined(DEBUG_bird) || defined(DEBUG_ramshankar) || defined(DEBUG_sunlover) || defined(DEBUG_michael) || defined(DEBUG_andy)
875 AssertMsgFailed(("'%s' wants %RTuuid - external only interface!\n", pDevIns->pReg->szName, pUuid));
876#endif
877
878 void *pvRet;
879 PUVM pUVM = pDevIns->Internal.s.pVMR3->pUVM;
880 if (pUVM->pVmm2UserMethods->pfnQueryGenericObject)
881 pvRet = pUVM->pVmm2UserMethods->pfnQueryGenericObject(pUVM->pVmm2UserMethods, pUVM, pUuid);
882 else
883 pvRet = NULL;
884
885 LogRel(("pdmR3DevHlp_QueryGenericUserObject: caller='%s'/%d: returns %#p for %RTuuid\n",
886 pDevIns->pReg->szName, pDevIns->iInstance, pvRet, pUuid));
887 return pvRet;
888}
889
890
891/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
892static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
893{
894 PDMDEV_ASSERT_DEVINS(pDevIns);
895 PVM pVM = pDevIns->Internal.s.pVMR3;
896 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
897 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
898
899#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
900 if (!VM_IS_EMT(pVM))
901 {
902 char szNames[128];
903 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
904 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
905 }
906#endif
907
908 VBOXSTRICTRC rcStrict;
909 if (VM_IS_EMT(pVM))
910 rcStrict = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
911 else
912 rcStrict = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
913 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
914
915 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
916 return VBOXSTRICTRC_VAL(rcStrict);
917}
918
919
920/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
921static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
922{
923 PDMDEV_ASSERT_DEVINS(pDevIns);
924 PVM pVM = pDevIns->Internal.s.pVMR3;
925 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
926 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
927
928#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
929 if (!VM_IS_EMT(pVM))
930 {
931 char szNames[128];
932 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
933 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
934 }
935#endif
936
937 VBOXSTRICTRC rcStrict;
938 if (VM_IS_EMT(pVM))
939 rcStrict = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
940 else
941 rcStrict = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
942 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
943
944 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
945 return VBOXSTRICTRC_VAL(rcStrict);
946}
947
948
949/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
950static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
951{
952 PDMDEV_ASSERT_DEVINS(pDevIns);
953 PVM pVM = pDevIns->Internal.s.pVMR3;
954 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
955 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
956 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
957
958#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
959 if (!VM_IS_EMT(pVM))
960 {
961 char szNames[128];
962 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
963 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
964 }
965#endif
966
967 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
968
969 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
970 return rc;
971}
972
973
974/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
975static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
976{
977 PDMDEV_ASSERT_DEVINS(pDevIns);
978 PVM pVM = pDevIns->Internal.s.pVMR3;
979 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
980 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
981 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
982
983#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
984 if (!VM_IS_EMT(pVM))
985 {
986 char szNames[128];
987 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
988 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
989 }
990#endif
991
992 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
993
994 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
995 return rc;
996}
997
998
999/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
1000static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
1001{
1002 PDMDEV_ASSERT_DEVINS(pDevIns);
1003 PVM pVM = pDevIns->Internal.s.pVMR3;
1004 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
1005 pDevIns->pReg->szName, pDevIns->iInstance, pLock));
1006
1007 PGMPhysReleasePageMappingLock(pVM, pLock);
1008
1009 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1010}
1011
1012
1013/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkGCPhys2CCPtr} */
1014static DECLCALLBACK(int) pdmR3DevHlp_PhysBulkGCPhys2CCPtr(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
1015 uint32_t fFlags, void **papvPages, PPGMPAGEMAPLOCK paLocks)
1016{
1017 PDMDEV_ASSERT_DEVINS(pDevIns);
1018 PVM pVM = pDevIns->Internal.s.pVMR3;
1019 LogFlow(("pdmR3DevHlp_PhysBulkGCPhys2CCPtr: caller='%s'/%d: cPages=%#x paGCPhysPages=%p (%RGp,..) fFlags=%#x papvPages=%p paLocks=%p\n",
1020 pDevIns->pReg->szName, pDevIns->iInstance, cPages, paGCPhysPages, paGCPhysPages[0], fFlags, papvPages, paLocks));
1021 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
1022 AssertReturn(cPages > 0, VERR_INVALID_PARAMETER);
1023
1024#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1025 if (!VM_IS_EMT(pVM))
1026 {
1027 char szNames[128];
1028 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
1029 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
1030 }
1031#endif
1032
1033 int rc = PGMR3PhysBulkGCPhys2CCPtrExternal(pVM, cPages, paGCPhysPages, papvPages, paLocks);
1034
1035 Log(("pdmR3DevHlp_PhysBulkGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1036 return rc;
1037}
1038
1039
1040/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkGCPhys2CCPtrReadOnly} */
1041static DECLCALLBACK(int) pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, uint32_t cPages, PCRTGCPHYS paGCPhysPages,
1042 uint32_t fFlags, const void **papvPages, PPGMPAGEMAPLOCK paLocks)
1043{
1044 PDMDEV_ASSERT_DEVINS(pDevIns);
1045 PVM pVM = pDevIns->Internal.s.pVMR3;
1046 LogFlow(("pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly: caller='%s'/%d: cPages=%#x paGCPhysPages=%p (%RGp,...) fFlags=%#x papvPages=%p paLocks=%p\n",
1047 pDevIns->pReg->szName, pDevIns->iInstance, cPages, paGCPhysPages, paGCPhysPages[0], fFlags, papvPages, paLocks));
1048 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
1049 AssertReturn(cPages > 0, VERR_INVALID_PARAMETER);
1050
1051#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1052 if (!VM_IS_EMT(pVM))
1053 {
1054 char szNames[128];
1055 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
1056 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
1057 }
1058#endif
1059
1060 int rc = PGMR3PhysBulkGCPhys2CCPtrReadOnlyExternal(pVM, cPages, paGCPhysPages, papvPages, paLocks);
1061
1062 Log(("pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1063 return rc;
1064}
1065
1066
1067/** @interface_method_impl{PDMDEVHLPR3,pfnPhysBulkReleasePageMappingLocks} */
1068static DECLCALLBACK(void) pdmR3DevHlp_PhysBulkReleasePageMappingLocks(PPDMDEVINS pDevIns, uint32_t cPages, PPGMPAGEMAPLOCK paLocks)
1069{
1070 PDMDEV_ASSERT_DEVINS(pDevIns);
1071 PVM pVM = pDevIns->Internal.s.pVMR3;
1072 LogFlow(("pdmR3DevHlp_PhysBulkReleasePageMappingLocks: caller='%s'/%d: cPages=%#x paLocks=%p\n",
1073 pDevIns->pReg->szName, pDevIns->iInstance, cPages, paLocks));
1074 Assert(cPages > 0);
1075
1076 PGMPhysBulkReleasePageMappingLocks(pVM, cPages, paLocks);
1077
1078 Log(("pdmR3DevHlp_PhysBulkReleasePageMappingLocks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1079}
1080
1081
1082/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
1083static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
1084{
1085 PDMDEV_ASSERT_DEVINS(pDevIns);
1086 PVM pVM = pDevIns->Internal.s.pVMR3;
1087 VM_ASSERT_EMT(pVM);
1088 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
1089 pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
1090
1091 PVMCPU pVCpu = VMMGetCpu(pVM);
1092 if (!pVCpu)
1093 return VERR_ACCESS_DENIED;
1094#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1095 /** @todo SMP. */
1096#endif
1097
1098 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
1099
1100 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1101
1102 return rc;
1103}
1104
1105
1106/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
1107static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
1108{
1109 PDMDEV_ASSERT_DEVINS(pDevIns);
1110 PVM pVM = pDevIns->Internal.s.pVMR3;
1111 VM_ASSERT_EMT(pVM);
1112 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
1113 pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
1114
1115 PVMCPU pVCpu = VMMGetCpu(pVM);
1116 if (!pVCpu)
1117 return VERR_ACCESS_DENIED;
1118#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1119 /** @todo SMP. */
1120#endif
1121
1122 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
1123
1124 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1125
1126 return rc;
1127}
1128
1129
1130/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
1131static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
1132{
1133 PDMDEV_ASSERT_DEVINS(pDevIns);
1134 PVM pVM = pDevIns->Internal.s.pVMR3;
1135 VM_ASSERT_EMT(pVM);
1136 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
1137 pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
1138
1139 PVMCPU pVCpu = VMMGetCpu(pVM);
1140 if (!pVCpu)
1141 return VERR_ACCESS_DENIED;
1142#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
1143 /** @todo SMP. */
1144#endif
1145
1146 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
1147
1148 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *pGCPhys));
1149
1150 return rc;
1151}
1152
1153
1154/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
1155static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
1156{
1157 PDMDEV_ASSERT_DEVINS(pDevIns);
1158 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
1159
1160 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
1161
1162 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1163 return pv;
1164}
1165
1166
1167/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
1168static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
1169{
1170 PDMDEV_ASSERT_DEVINS(pDevIns);
1171 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
1172
1173 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
1174
1175 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1176 return pv;
1177}
1178
1179
1180/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
1181static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
1182{
1183 PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
1184 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
1185
1186 MMR3HeapFree(pv);
1187
1188 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1189}
1190
1191
1192/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
1193static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1194{
1195 PDMDEV_ASSERT_DEVINS(pDevIns);
1196
1197 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1198
1199 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
1200 enmVMState, VMR3GetStateName(enmVMState)));
1201 return enmVMState;
1202}
1203
1204
1205/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
1206static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1207{
1208 PDMDEV_ASSERT_DEVINS(pDevIns);
1209
1210 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1211
1212 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
1213 fRc));
1214 return fRc;
1215}
1216
1217
1218/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
1219static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1220{
1221 PDMDEV_ASSERT_DEVINS(pDevIns);
1222 va_list args;
1223 va_start(args, pszFormat);
1224 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1225 va_end(args);
1226 return rc;
1227}
1228
1229
1230/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
1231static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1232{
1233 PDMDEV_ASSERT_DEVINS(pDevIns);
1234 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1235 return rc;
1236}
1237
1238
1239/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
1240static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
1241{
1242 PDMDEV_ASSERT_DEVINS(pDevIns);
1243 va_list args;
1244 va_start(args, pszFormat);
1245 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1246 va_end(args);
1247 return rc;
1248}
1249
1250
1251/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
1252static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
1253{
1254 PDMDEV_ASSERT_DEVINS(pDevIns);
1255 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1256 return rc;
1257}
1258
1259
1260/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
1261static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1262{
1263 PDMDEV_ASSERT_DEVINS(pDevIns);
1264#ifdef LOG_ENABLED
1265 va_list va2;
1266 va_copy(va2, args);
1267 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1268 pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1269 va_end(va2);
1270#endif
1271
1272 PVM pVM = pDevIns->Internal.s.pVMR3;
1273 VM_ASSERT_EMT(pVM);
1274 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1275 if (rc == VERR_DBGF_NOT_ATTACHED)
1276 rc = VINF_SUCCESS;
1277
1278 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1279 return rc;
1280}
1281
1282
1283/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
1284static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1285{
1286 PDMDEV_ASSERT_DEVINS(pDevIns);
1287 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1288 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1289
1290 PVM pVM = pDevIns->Internal.s.pVMR3;
1291 VM_ASSERT_EMT(pVM);
1292 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1293
1294 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1295 return rc;
1296}
1297
1298
1299/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegisterArgv} */
1300static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegisterArgv(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFINFOARGVDEV pfnHandler)
1301{
1302 PDMDEV_ASSERT_DEVINS(pDevIns);
1303 LogFlow(("pdmR3DevHlp_DBGFInfoRegisterArgv: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1304 pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1305
1306 PVM pVM = pDevIns->Internal.s.pVMR3;
1307 VM_ASSERT_EMT(pVM);
1308 int rc = DBGFR3InfoRegisterDeviceArgv(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1309
1310 LogFlow(("pdmR3DevHlp_DBGFInfoRegisterArgv: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1311 return rc;
1312}
1313
1314
1315/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFRegRegister} */
1316static DECLCALLBACK(int) pdmR3DevHlp_DBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
1317{
1318 PDMDEV_ASSERT_DEVINS(pDevIns);
1319 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: paRegisters=%p\n",
1320 pDevIns->pReg->szName, pDevIns->iInstance, paRegisters));
1321
1322 PVM pVM = pDevIns->Internal.s.pVMR3;
1323 VM_ASSERT_EMT(pVM);
1324 int rc = DBGFR3RegRegisterDevice(pVM, paRegisters, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance);
1325
1326 LogFlow(("pdmR3DevHlp_DBGFRegRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1327 return rc;
1328}
1329
1330
1331/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFTraceBuf} */
1332static DECLCALLBACK(RTTRACEBUF) pdmR3DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
1333{
1334 PDMDEV_ASSERT_DEVINS(pDevIns);
1335 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pVMR3->hTraceBufR3;
1336 LogFlow(("pdmR3DevHlp_DBGFTraceBuf: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, hTraceBuf));
1337 return hTraceBuf;
1338}
1339
1340
1341/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
1342static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName,
1343 STAMUNIT enmUnit, const char *pszDesc)
1344{
1345 PDMDEV_ASSERT_DEVINS(pDevIns);
1346 PVM pVM = pDevIns->Internal.s.pVMR3;
1347 VM_ASSERT_EMT(pVM);
1348
1349 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1350 RT_NOREF_PV(pVM); RT_NOREF6(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
1351}
1352
1353
1354
1355/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
1356static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1357 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1358{
1359 PDMDEV_ASSERT_DEVINS(pDevIns);
1360 PVM pVM = pDevIns->Internal.s.pVMR3;
1361 VM_ASSERT_EMT(pVM);
1362
1363 va_list args;
1364 va_start(args, pszName);
1365 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1366 va_end(args);
1367 AssertRC(rc);
1368
1369 NOREF(pVM);
1370}
1371
1372
1373/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
1374static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1375 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1376{
1377 PDMDEV_ASSERT_DEVINS(pDevIns);
1378 PVM pVM = pDevIns->Internal.s.pVMR3;
1379 VM_ASSERT_EMT(pVM);
1380
1381 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1382 AssertRC(rc);
1383
1384 NOREF(pVM);
1385}
1386
1387
1388/**
1389 * @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister}
1390 */
1391static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
1392 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName)
1393{
1394 PDMDEV_ASSERT_DEVINS(pDevIns);
1395 PVM pVM = pDevIns->Internal.s.pVMR3;
1396 VM_ASSERT_EMT(pVM);
1397 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs} idxDevCfg=%d fFlags=%#x uPciDevNo=%#x uPciFunNo=%#x pszName=%p:{%s}\n",
1398 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->abConfig, idxDevCfg, fFlags, uPciDevNo, uPciFunNo, pszName, pszName ? pszName : ""));
1399
1400 /*
1401 * Validate input.
1402 */
1403 AssertLogRelMsgReturn(RT_VALID_PTR(pPciDev),
1404 ("'%s'/%d: Invalid pPciDev value: %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pPciDev),
1405 VERR_INVALID_POINTER);
1406 AssertLogRelMsgReturn(PDMPciDevGetVendorId(pPciDev),
1407 ("'%s'/%d: Vendor ID is not set!\n", pDevIns->pReg->szName, pDevIns->iInstance),
1408 VERR_INVALID_POINTER);
1409 AssertLogRelMsgReturn(idxDevCfg < 256 || idxDevCfg == PDMPCIDEVREG_CFG_NEXT,
1410 ("'%s'/%d: Invalid config selector: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1411 VERR_OUT_OF_RANGE);
1412 AssertLogRelMsgReturn( uPciDevNo < 32
1413 || uPciDevNo == PDMPCIDEVREG_DEV_NO_FIRST_UNUSED
1414 || uPciDevNo == PDMPCIDEVREG_DEV_NO_SAME_AS_PREV,
1415 ("'%s'/%d: Invalid PCI device number: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, uPciDevNo),
1416 VERR_INVALID_PARAMETER);
1417 AssertLogRelMsgReturn( uPciFunNo < 8
1418 || uPciFunNo == PDMPCIDEVREG_FUN_NO_FIRST_UNUSED,
1419 ("'%s'/%d: Invalid PCI funcion number: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, uPciFunNo),
1420 VERR_INVALID_PARAMETER);
1421 AssertLogRelMsgReturn(!(fFlags & ~PDMPCIDEVREG_F_VALID_MASK),
1422 ("'%s'/%d: Invalid flags: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, fFlags),
1423 VERR_INVALID_FLAGS);
1424 if (!pszName)
1425 pszName = pDevIns->pReg->szName;
1426 AssertLogRelReturn(RT_VALID_PTR(pszName), VERR_INVALID_POINTER);
1427
1428 /*
1429 * Find the last(/previous) registered PCI device (for linking and more),
1430 * checking for duplicate registration attempts while doing so.
1431 */
1432 uint32_t idxDevCfgNext = 0;
1433 PPDMPCIDEV pPrevPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1434 while (pPrevPciDev)
1435 {
1436 AssertLogRelMsgReturn(pPrevPciDev != pPciDev,
1437 ("'%s'/%d attempted to register the same PCI device (%p) twice\n",
1438 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev),
1439 VERR_DUPLICATE);
1440 AssertLogRelMsgReturn(pPrevPciDev->Int.s.idxDevCfg != idxDevCfg,
1441 ("'%s'/%d attempted to use the same device config index (%u) twice\n",
1442 pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1443 VERR_ALREADY_LOADED);
1444 if (pPrevPciDev->Int.s.idxDevCfg >= idxDevCfgNext)
1445 idxDevCfgNext = pPrevPciDev->Int.s.idxDevCfg + 1;
1446
1447 if (!pPrevPciDev->Int.s.pNextR3)
1448 break;
1449 pPrevPciDev = pPrevPciDev->Int.s.pNextR3;
1450 }
1451
1452 /*
1453 * Resolve the PCI configuration node for the device. The default (zero'th)
1454 * is the same as the PDM device, the rest are "PciCfg1..255" CFGM sub-nodes.
1455 */
1456 if (idxDevCfg == PDMPCIDEVREG_CFG_NEXT)
1457 {
1458 idxDevCfg = idxDevCfgNext;
1459 AssertLogRelMsgReturn(idxDevCfg < 256, ("'%s'/%d: PDMPCIDEVREG_IDX_DEV_CFG_NEXT ran out of valid indexes (ends at 255)\n",
1460 pDevIns->pReg->szName, pDevIns->iInstance),
1461 VERR_OUT_OF_RANGE);
1462 }
1463
1464 PCFGMNODE pCfg = pDevIns->Internal.s.pCfgHandle;
1465 if (idxDevCfg != 0)
1466 pCfg = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "PciCfg%u", idxDevCfg);
1467
1468 /*
1469 * We resolve PDMPCIDEVREG_DEV_NO_SAME_AS_PREV, the PCI bus handles
1470 * PDMPCIDEVREG_DEV_NO_FIRST_UNUSED and PDMPCIDEVREG_FUN_NO_FIRST_UNUSED.
1471 */
1472 uint8_t const uPciDevNoRaw = uPciDevNo;
1473 uint32_t uDefPciBusNo = 0;
1474 if (uPciDevNo == PDMPCIDEVREG_DEV_NO_SAME_AS_PREV)
1475 {
1476 if (pPrevPciDev)
1477 {
1478 uPciDevNo = pPrevPciDev->uDevFn >> 3;
1479 uDefPciBusNo = pPrevPciDev->Int.s.pPdmBusR3->iBus;
1480 }
1481 else
1482 {
1483 /* Look for PCI device registered with an earlier device instance so we can more
1484 easily have multiple functions spanning multiple PDM device instances. */
1485 PPDMPCIDEV pOtherPciDev = NULL;
1486 PPDMDEVINS pPrevIns = pDevIns->Internal.s.pDevR3->pInstances;
1487 while (pPrevIns != pDevIns && pPrevIns)
1488 {
1489 pOtherPciDev = pPrevIns->Internal.s.pHeadPciDevR3;
1490 pPrevIns = pPrevIns->Internal.s.pNextR3;
1491 }
1492 Assert(pPrevIns == pDevIns);
1493 AssertLogRelMsgReturn(pOtherPciDev,
1494 ("'%s'/%d: Can't use PDMPCIDEVREG_DEV_NO_SAME_AS_PREV without a previously registered PCI device by the same or earlier PDM device instance!\n",
1495 pDevIns->pReg->szName, pDevIns->iInstance),
1496 VERR_WRONG_ORDER);
1497
1498 while (pOtherPciDev->Int.s.pNextR3)
1499 pOtherPciDev = pOtherPciDev->Int.s.pNextR3;
1500 uPciDevNo = pOtherPciDev->uDevFn >> 3;
1501 uDefPciBusNo = pOtherPciDev->Int.s.pPdmBusR3->iBus;
1502 }
1503 }
1504
1505 /*
1506 * Choose the PCI bus for the device.
1507 *
1508 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1509 * configuration value will be set. If not the default bus is 0.
1510 */
1511 /** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIBusNo, uint8_t, 0, 7, 0}
1512 * Selects the PCI bus number of a device. The default value isn't necessarily
1513 * zero if the device is registered using PDMPCIDEVREG_DEV_NO_SAME_AS_PREV, it
1514 * will then also inherit the bus number from the previously registered device.
1515 */
1516 uint8_t u8Bus;
1517 int rc = CFGMR3QueryU8Def(pCfg, "PCIBusNo", &u8Bus, (uint8_t)uDefPciBusNo);
1518 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1519 rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1520 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1521 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1522 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1523 VERR_PDM_NO_PCI_BUS);
1524 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1525 if (pBus->pDevInsR3)
1526 {
1527 /*
1528 * Check the configuration for PCI device and function assignment.
1529 */
1530 /** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIDeviceNo, uint8_t, 0, 31}
1531 * Overrides the default PCI device number of a device.
1532 */
1533 uint8_t uCfgDevice;
1534 rc = CFGMR3QueryU8(pCfg, "PCIDeviceNo", &uCfgDevice);
1535 if (RT_SUCCESS(rc))
1536 {
1537 AssertMsgReturn(uCfgDevice <= 31,
1538 ("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d/%d)\n",
1539 uCfgDevice, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1540 VERR_PDM_BAD_PCI_CONFIG);
1541 uPciDevNo = uCfgDevice;
1542 }
1543 else
1544 AssertMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_NO_PARENT,
1545 ("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d/%d)\n",
1546 rc, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1547 rc);
1548
1549 /** @cfgm{/Devices/NAME/XX/[PciCfgYY/]PCIFunctionNo, uint8_t, 0, 7}
1550 * Overrides the default PCI function number of a device.
1551 */
1552 uint8_t uCfgFunction;
1553 rc = CFGMR3QueryU8(pCfg, "PCIFunctionNo", &uCfgFunction);
1554 if (RT_SUCCESS(rc))
1555 {
1556 AssertMsgReturn(uCfgFunction <= 7,
1557 ("Configuration error: PCIFunctionNo=%#x, max is 7. (%s/%d/%d)\n",
1558 uCfgFunction, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1559 VERR_PDM_BAD_PCI_CONFIG);
1560 uPciFunNo = uCfgFunction;
1561 }
1562 else
1563 AssertMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_NO_PARENT,
1564 ("Configuration error: PCIFunctionNo query failed with rc=%Rrc (%s/%d/%d)\n",
1565 rc, pDevIns->pReg->szName, pDevIns->iInstance, idxDevCfg),
1566 rc);
1567
1568
1569 /*
1570 * Initialize the internal data. We only do the wipe and the members
1571 * owned by PDM, the PCI bus does the rest in the registration call.
1572 */
1573 RT_ZERO(pPciDev->Int);
1574
1575 pPciDev->Int.s.idxDevCfg = idxDevCfg;
1576 pPciDev->Int.s.fReassignableDevNo = uPciDevNoRaw >= VBOX_PCI_MAX_DEVICES;
1577 pPciDev->Int.s.fReassignableFunNo = uPciFunNo >= VBOX_PCI_MAX_FUNCTIONS;
1578 pPciDev->Int.s.pDevInsR3 = pDevIns;
1579 pPciDev->Int.s.pPdmBusR3 = pBus;
1580 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1581 {
1582 pPciDev->Int.s.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
1583 pPciDev->Int.s.pPdmBusR0 = MMHyperR3ToR0(pVM, pBus);
1584 }
1585 else
1586 {
1587 pPciDev->Int.s.pDevInsR0 = NIL_RTR0PTR;
1588 pPciDev->Int.s.pPdmBusR0 = NIL_RTR0PTR;
1589 }
1590
1591 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1592 {
1593 pPciDev->Int.s.pDevInsRC = MMHyperR3ToRC(pVM, pDevIns);
1594 pPciDev->Int.s.pPdmBusRC = MMHyperR3ToRC(pVM, pBus);
1595 }
1596 else
1597 {
1598 pPciDev->Int.s.pDevInsRC = NIL_RTRCPTR;
1599 pPciDev->Int.s.pPdmBusRC = NIL_RTRCPTR;
1600 }
1601
1602 /* Set some of the public members too. */
1603 pPciDev->pszNameR3 = pszName;
1604
1605 /*
1606 * Call the pci bus device to do the actual registration.
1607 */
1608 pdmLock(pVM);
1609 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName);
1610 pdmUnlock(pVM);
1611 if (RT_SUCCESS(rc))
1612 {
1613
1614 /*
1615 * Link it.
1616 */
1617 if (pPrevPciDev)
1618 {
1619 Assert(!pPrevPciDev->Int.s.pNextR3);
1620 pPrevPciDev->Int.s.pNextR3 = pPciDev;
1621 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1622 pPrevPciDev->Int.s.pNextR0 = MMHyperR3ToR0(pVM, pPciDev);
1623 else
1624 pPrevPciDev->Int.s.pNextR0 = NIL_RTR0PTR;
1625 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1626 pPrevPciDev->Int.s.pNextRC = MMHyperR3ToRC(pVM, pPciDev);
1627 else
1628 pPrevPciDev->Int.s.pNextRC = NIL_RTRCPTR;
1629 }
1630 else
1631 {
1632 Assert(!pDevIns->Internal.s.pHeadPciDevR3);
1633 pDevIns->Internal.s.pHeadPciDevR3 = pPciDev;
1634 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1635 pDevIns->Internal.s.pHeadPciDevR0 = MMHyperR3ToR0(pVM, pPciDev);
1636 else
1637 pDevIns->Internal.s.pHeadPciDevR0 = NIL_RTR0PTR;
1638 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1639 pDevIns->Internal.s.pHeadPciDevRC = MMHyperR3ToRC(pVM, pPciDev);
1640 else
1641 pDevIns->Internal.s.pHeadPciDevRC = NIL_RTRCPTR;
1642 }
1643
1644 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1645 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->uDevFn, pBus->iBus));
1646 }
1647 }
1648 else
1649 {
1650 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1651 rc = VERR_PDM_NO_PCI_BUS;
1652 }
1653
1654 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1655 return rc;
1656}
1657
1658
1659/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1660static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
1661{
1662 PDMDEV_ASSERT_DEVINS(pDevIns);
1663 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1664 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1665 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1666 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: pPciDev=%p:{%#x} pMsgReg=%p:{cMsiVectors=%d, cMsixVectors=%d}\n",
1667 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, pMsiReg, pMsiReg->cMsiVectors, pMsiReg->cMsixVectors));
1668
1669 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; Assert(pBus);
1670 PVM pVM = pDevIns->Internal.s.pVMR3;
1671 pdmLock(pVM);
1672 int rc;
1673 if (pBus->pfnRegisterMsiR3)
1674 rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1675 else
1676 rc = VERR_NOT_IMPLEMENTED;
1677 pdmUnlock(pVM);
1678
1679 LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1680 return rc;
1681}
1682
1683
1684/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1685static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
1686 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1687{
1688 PDMDEV_ASSERT_DEVINS(pDevIns);
1689 PVM pVM = pDevIns->Internal.s.pVMR3;
1690 VM_ASSERT_EMT(pVM);
1691 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1692 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1693 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1694 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%d cbRegion=%RGp enmType=%d pfnCallback=%p\n",
1695 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iRegion, cbRegion, enmType, pfnCallback));
1696
1697 /*
1698 * Validate input.
1699 */
1700 if (iRegion >= VBOX_PCI_NUM_REGIONS)
1701 {
1702 Assert(iRegion < VBOX_PCI_NUM_REGIONS);
1703 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1704 return VERR_INVALID_PARAMETER;
1705 }
1706
1707 switch ((int)enmType)
1708 {
1709 case PCI_ADDRESS_SPACE_IO:
1710 /*
1711 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1712 */
1713 AssertLogRelMsgReturn(cbRegion <= _32K,
1714 ("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1715 VERR_INVALID_PARAMETER);
1716 break;
1717
1718 case PCI_ADDRESS_SPACE_MEM:
1719 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1720 /*
1721 * Sanity check: Don't allow to register more than 2GB of the PCI MMIO space.
1722 */
1723 AssertLogRelMsgReturn(cbRegion <= MM_MMIO_32_MAX,
1724 ("caller='%s'/%d: %RGp (max %RGp)\n",
1725 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, (RTGCPHYS)MM_MMIO_32_MAX),
1726 VERR_OUT_OF_RANGE);
1727 break;
1728
1729 case PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM:
1730 case PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH:
1731 /*
1732 * Sanity check: Don't allow to register more than 64GB of the 64-bit PCI MMIO space.
1733 */
1734 AssertLogRelMsgReturn(cbRegion <= MM_MMIO_64_MAX,
1735 ("caller='%s'/%d: %RGp (max %RGp)\n",
1736 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, MM_MMIO_64_MAX),
1737 VERR_OUT_OF_RANGE);
1738 break;
1739
1740 default:
1741 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1742 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1743 return VERR_INVALID_PARAMETER;
1744 }
1745 if (!pfnCallback)
1746 {
1747 Assert(pfnCallback);
1748 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1749 return VERR_INVALID_PARAMETER;
1750 }
1751 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1752
1753 /*
1754 * We're currently restricted to page aligned MMIO regions.
1755 */
1756 if ( ((enmType & ~(PCI_ADDRESS_SPACE_BAR64 | PCI_ADDRESS_SPACE_MEM_PREFETCH)) == PCI_ADDRESS_SPACE_MEM)
1757 && cbRegion != RT_ALIGN_64(cbRegion, PAGE_SIZE))
1758 {
1759 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %RGp -> %RGp\n",
1760 pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_64(cbRegion, PAGE_SIZE)));
1761 cbRegion = RT_ALIGN_64(cbRegion, PAGE_SIZE);
1762 }
1763
1764 /*
1765 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1766 */
1767 int iLastSet = ASMBitLastSetU64(cbRegion);
1768 Assert(iLastSet > 0);
1769 uint64_t cbRegionAligned = RT_BIT_64(iLastSet - 1);
1770 if (cbRegion > cbRegionAligned)
1771 cbRegion = cbRegionAligned * 2; /* round up */
1772
1773 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1774 Assert(pBus);
1775 pdmLock(pVM);
1776 int rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1777 pdmUnlock(pVM);
1778
1779 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1780 return rc;
1781}
1782
1783
1784/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1785static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1786 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1787{
1788 PDMDEV_ASSERT_DEVINS(pDevIns);
1789 PVM pVM = pDevIns->Internal.s.pVMR3;
1790 VM_ASSERT_EMT(pVM);
1791 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1792 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1793 AssertReturnVoid(pPciDev);
1794 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1795 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1796
1797 /*
1798 * Validate input and resolve defaults.
1799 */
1800 AssertPtr(pfnRead);
1801 AssertPtr(pfnWrite);
1802 AssertPtrNull(ppfnReadOld);
1803 AssertPtrNull(ppfnWriteOld);
1804 AssertPtrNull(pPciDev);
1805
1806 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1807 AssertRelease(pBus);
1808 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1809
1810 /*
1811 * Do the job.
1812 */
1813 pdmLock(pVM);
1814 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1815 pdmUnlock(pVM);
1816
1817 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1818}
1819
1820
1821/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
1822static DECLCALLBACK(int)
1823pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1824{
1825 PDMDEV_ASSERT_DEVINS(pDevIns);
1826 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1827 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1828 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1829
1830#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1831 /*
1832 * Just check the busmaster setting here and forward the request to the generic read helper.
1833 */
1834 if (PCIDevIsBusmaster(pPciDev))
1835 { /* likely */ }
1836 else
1837 {
1838 Log(("pdmR3DevHlp_PCIPhysRead: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
1839 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
1840 memset(pvBuf, 0xff, cbRead);
1841 return VERR_PDM_NOT_PCI_BUS_MASTER;
1842 }
1843#endif
1844
1845 return pDevIns->pHlpR3->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
1846}
1847
1848
1849/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysWrite} */
1850static DECLCALLBACK(int)
1851pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1852{
1853 PDMDEV_ASSERT_DEVINS(pDevIns);
1854 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1855 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1856 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
1857
1858#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
1859 /*
1860 * Just check the busmaster setting here and forward the request to the generic read helper.
1861 */
1862 if (PCIDevIsBusmaster(pPciDev))
1863 { /* likely */ }
1864 else
1865 {
1866 Log(("pdmR3DevHlp_PCIPhysWrite: caller='%s'/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
1867 pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
1868 return VERR_PDM_NOT_PCI_BUS_MASTER;
1869 }
1870#endif
1871
1872 return pDevIns->pHlpR3->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
1873}
1874
1875
1876/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1877static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
1878{
1879 PDMDEV_ASSERT_DEVINS(pDevIns);
1880 if (!pPciDev) /* NULL is an alias for the default PCI device. */
1881 pPciDev = pDevIns->Internal.s.pHeadPciDevR3;
1882 AssertReturnVoid(pPciDev);
1883 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
1884 pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
1885
1886 /*
1887 * Validate input.
1888 */
1889 Assert(iIrq == 0);
1890 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1891
1892 /*
1893 * Must have a PCI device registered!
1894 */
1895 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
1896 Assert(pBus);
1897 PVM pVM = pDevIns->Internal.s.pVMR3;
1898
1899 pdmLock(pVM);
1900 uint32_t uTagSrc;
1901 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1902 {
1903 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1904 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1905 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1906 else
1907 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1908 }
1909 else
1910 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1911
1912 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel, uTagSrc);
1913
1914 if (iLevel == PDM_IRQ_LEVEL_LOW)
1915 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1916 pdmUnlock(pVM);
1917
1918 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1919}
1920
1921
1922/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1923static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
1924{
1925 pdmR3DevHlp_PCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
1926}
1927
1928
1929/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1930static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1931{
1932 PDMDEV_ASSERT_DEVINS(pDevIns);
1933 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1934
1935 /*
1936 * Validate input.
1937 */
1938 Assert(iIrq < 16);
1939 Assert((uint32_t)iLevel <= PDM_IRQ_LEVEL_FLIP_FLOP);
1940
1941 PVM pVM = pDevIns->Internal.s.pVMR3;
1942
1943 /*
1944 * Do the job.
1945 */
1946 pdmLock(pVM);
1947 uint32_t uTagSrc;
1948 if (iLevel & PDM_IRQ_LEVEL_HIGH)
1949 {
1950 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1951 if (iLevel == PDM_IRQ_LEVEL_HIGH)
1952 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1953 else
1954 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1955 }
1956 else
1957 uTagSrc = pDevIns->Internal.s.uLastIrqTag;
1958
1959 PDMIsaSetIrq(pVM, iIrq, iLevel, uTagSrc); /* (The API takes the lock recursively.) */
1960
1961 if (iLevel == PDM_IRQ_LEVEL_LOW)
1962 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1963 pdmUnlock(pVM);
1964
1965 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1966}
1967
1968
1969/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1970static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1971{
1972 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1973}
1974
1975
1976/** @interface_method_impl{PDMDEVHLPR3,pfnIoApicSendMsi} */
1977static DECLCALLBACK(void) pdmR3DevHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue)
1978{
1979 PDMDEV_ASSERT_DEVINS(pDevIns);
1980 LogFlow(("pdmR3DevHlp_IoApicSendMsi: caller='%s'/%d: GCPhys=%RGp uValue=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, uValue));
1981
1982 /*
1983 * Validate input.
1984 */
1985 Assert(GCPhys != 0);
1986 Assert(uValue != 0);
1987
1988 PVM pVM = pDevIns->Internal.s.pVMR3;
1989
1990 /*
1991 * Do the job.
1992 */
1993 pdmLock(pVM);
1994 uint32_t uTagSrc;
1995 pDevIns->Internal.s.uLastIrqTag = uTagSrc = pdmCalcIrqTag(pVM, pDevIns->idTracing);
1996 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
1997
1998 PDMIoApicSendMsi(pVM, GCPhys, uValue, uTagSrc); /* (The API takes the lock recursively.) */
1999
2000 pdmUnlock(pVM);
2001
2002 LogFlow(("pdmR3DevHlp_IoApicSendMsi: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
2003}
2004
2005
2006/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
2007static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
2008{
2009 PDMDEV_ASSERT_DEVINS(pDevIns);
2010 PVM pVM = pDevIns->Internal.s.pVMR3;
2011 VM_ASSERT_EMT(pVM);
2012 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
2013 pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
2014
2015 /*
2016 * Lookup the LUN, it might already be registered.
2017 */
2018 PPDMLUN pLunPrev = NULL;
2019 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
2020 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
2021 if (pLun->iLun == iLun)
2022 break;
2023
2024 /*
2025 * Create the LUN if if wasn't found, else check if driver is already attached to it.
2026 */
2027 if (!pLun)
2028 {
2029 if ( !pBaseInterface
2030 || !pszDesc
2031 || !*pszDesc)
2032 {
2033 Assert(pBaseInterface);
2034 Assert(pszDesc || *pszDesc);
2035 return VERR_INVALID_PARAMETER;
2036 }
2037
2038 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
2039 if (!pLun)
2040 return VERR_NO_MEMORY;
2041
2042 pLun->iLun = iLun;
2043 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
2044 pLun->pTop = NULL;
2045 pLun->pBottom = NULL;
2046 pLun->pDevIns = pDevIns;
2047 pLun->pUsbIns = NULL;
2048 pLun->pszDesc = pszDesc;
2049 pLun->pBase = pBaseInterface;
2050 if (!pLunPrev)
2051 pDevIns->Internal.s.pLunsR3 = pLun;
2052 else
2053 pLunPrev->pNext = pLun;
2054 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
2055 iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
2056 }
2057 else if (pLun->pTop)
2058 {
2059 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
2060 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
2061 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
2062 }
2063 Assert(pLun->pBase == pBaseInterface);
2064
2065
2066 /*
2067 * Get the attached driver configuration.
2068 */
2069 int rc;
2070 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
2071 if (pNode)
2072 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
2073 else
2074 rc = VERR_PDM_NO_ATTACHED_DRIVER;
2075
2076 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2077 return rc;
2078}
2079
2080
2081/** @interface_method_impl{PDMDEVHLPR3,pfnDriverDetach} */
2082static DECLCALLBACK(int) pdmR3DevHlp_DriverDetach(PPDMDEVINS pDevIns, PPDMDRVINS pDrvIns, uint32_t fFlags)
2083{
2084 PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
2085 LogFlow(("pdmR3DevHlp_DriverDetach: caller='%s'/%d: pDrvIns=%p\n",
2086 pDevIns->pReg->szName, pDevIns->iInstance, pDrvIns));
2087
2088#ifdef VBOX_STRICT
2089 PVM pVM = pDevIns->Internal.s.pVMR3;
2090 VM_ASSERT_EMT(pVM);
2091#endif
2092
2093 int rc = pdmR3DrvDetach(pDrvIns, fFlags);
2094
2095 LogFlow(("pdmR3DevHlp_DriverDetach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2096 return rc;
2097}
2098
2099
2100/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
2101static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
2102 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
2103{
2104 PDMDEV_ASSERT_DEVINS(pDevIns);
2105 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fRZEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
2106 pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, pszName, ppQueue));
2107
2108 PVM pVM = pDevIns->Internal.s.pVMR3;
2109 VM_ASSERT_EMT(pVM);
2110
2111 if (pDevIns->iInstance > 0)
2112 {
2113 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
2114 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
2115 }
2116
2117 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
2118
2119 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppQueue));
2120 return rc;
2121}
2122
2123
2124/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
2125static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2126 const char *pszNameFmt, va_list va)
2127{
2128 PDMDEV_ASSERT_DEVINS(pDevIns);
2129 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
2130 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
2131
2132 PVM pVM = pDevIns->Internal.s.pVMR3;
2133 VM_ASSERT_EMT(pVM);
2134 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
2135
2136 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2137 return rc;
2138}
2139
2140
2141/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNop} */
2142static DECLCALLBACK(PPDMCRITSECT) pdmR3DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
2143{
2144 PDMDEV_ASSERT_DEVINS(pDevIns);
2145 PVM pVM = pDevIns->Internal.s.pVMR3;
2146 VM_ASSERT_EMT(pVM);
2147
2148 PPDMCRITSECT pCritSect = PDMR3CritSectGetNop(pVM);
2149 LogFlow(("pdmR3DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n",
2150 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2151 return pCritSect;
2152}
2153
2154
2155/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopR0} */
2156static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopR0(PPDMDEVINS pDevIns)
2157{
2158 PDMDEV_ASSERT_DEVINS(pDevIns);
2159 PVM pVM = pDevIns->Internal.s.pVMR3;
2160 VM_ASSERT_EMT(pVM);
2161
2162 R0PTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopR0(pVM);
2163 LogFlow(("pdmR3DevHlp_CritSectGetNopR0: caller='%s'/%d: return %RHv\n",
2164 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2165 return pCritSect;
2166}
2167
2168
2169/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectGetNopRC} */
2170static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3DevHlp_CritSectGetNopRC(PPDMDEVINS pDevIns)
2171{
2172 PDMDEV_ASSERT_DEVINS(pDevIns);
2173 PVM pVM = pDevIns->Internal.s.pVMR3;
2174 VM_ASSERT_EMT(pVM);
2175
2176 RCPTRTYPE(PPDMCRITSECT) pCritSect = PDMR3CritSectGetNopRC(pVM);
2177 LogFlow(("pdmR3DevHlp_CritSectGetNopRC: caller='%s'/%d: return %RRv\n",
2178 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
2179 return pCritSect;
2180}
2181
2182
2183/** @interface_method_impl{PDMDEVHLPR3,pfnSetDeviceCritSect} */
2184static DECLCALLBACK(int) pdmR3DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
2185{
2186 /*
2187 * Validate input.
2188 *
2189 * Note! We only allow the automatically created default critical section
2190 * to be replaced by this API.
2191 */
2192 PDMDEV_ASSERT_DEVINS(pDevIns);
2193 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
2194 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
2195 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
2196 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
2197 PVM pVM = pDevIns->Internal.s.pVMR3;
2198 AssertReturn(pCritSect->s.pVMR3 == pVM, VERR_INVALID_PARAMETER);
2199
2200 VM_ASSERT_EMT(pVM);
2201 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
2202
2203 AssertReturn(pDevIns->pCritSectRoR3, VERR_PDM_DEV_IPE_1);
2204 AssertReturn(pDevIns->pCritSectRoR3->s.fAutomaticDefaultCritsect, VERR_WRONG_ORDER);
2205 AssertReturn(!pDevIns->pCritSectRoR3->s.fUsedByTimerOrSimilar, VERR_WRONG_ORDER);
2206 AssertReturn(pDevIns->pCritSectRoR3 != pCritSect, VERR_INVALID_PARAMETER);
2207
2208 /*
2209 * Replace the critical section and destroy the automatic default section.
2210 */
2211 PPDMCRITSECT pOldCritSect = pDevIns->pCritSectRoR3;
2212 pDevIns->pCritSectRoR3 = pCritSect;
2213 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2214 pDevIns->pCritSectRoR0 = MMHyperCCToR0(pVM, pDevIns->pCritSectRoR3);
2215 else
2216 Assert(pDevIns->pCritSectRoR0 == NIL_RTRCPTR);
2217
2218 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2219 pDevIns->pCritSectRoRC = MMHyperCCToRC(pVM, pDevIns->pCritSectRoR3);
2220 else
2221 Assert(pDevIns->pCritSectRoRC == NIL_RTRCPTR);
2222
2223 PDMR3CritSectDelete(pOldCritSect);
2224 if (pDevIns->pReg->fFlags & (PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0))
2225 MMHyperFree(pVM, pOldCritSect);
2226 else
2227 MMR3HeapFree(pOldCritSect);
2228
2229 LogFlow(("pdmR3DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2230 return VINF_SUCCESS;
2231}
2232
2233
2234/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
2235static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2236 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
2237{
2238 PDMDEV_ASSERT_DEVINS(pDevIns);
2239 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2240 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
2241 pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
2242
2243 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
2244
2245 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
2246 rc, *ppThread));
2247 return rc;
2248}
2249
2250
2251/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
2252static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2253{
2254 PDMDEV_ASSERT_DEVINS(pDevIns);
2255 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2256 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
2257
2258 int rc = VINF_SUCCESS;
2259 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2260 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2261 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2262 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2263 AssertStmt( enmVMState == VMSTATE_SUSPENDING
2264 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2265 || enmVMState == VMSTATE_SUSPENDING_LS
2266 || enmVMState == VMSTATE_RESETTING
2267 || enmVMState == VMSTATE_RESETTING_LS
2268 || enmVMState == VMSTATE_POWERING_OFF
2269 || enmVMState == VMSTATE_POWERING_OFF_LS,
2270 rc = VERR_INVALID_STATE);
2271
2272 if (RT_SUCCESS(rc))
2273 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2274
2275 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2276 return rc;
2277}
2278
2279
2280/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
2281static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2282{
2283 PDMDEV_ASSERT_DEVINS(pDevIns);
2284 PVM pVM = pDevIns->Internal.s.pVMR3;
2285
2286 VMSTATE enmVMState = VMR3GetState(pVM);
2287 if ( enmVMState == VMSTATE_SUSPENDING
2288 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2289 || enmVMState == VMSTATE_SUSPENDING_LS
2290 || enmVMState == VMSTATE_RESETTING
2291 || enmVMState == VMSTATE_RESETTING_LS
2292 || enmVMState == VMSTATE_POWERING_OFF
2293 || enmVMState == VMSTATE_POWERING_OFF_LS)
2294 {
2295 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
2296 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2297 }
2298 else
2299 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
2300}
2301
2302
2303/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
2304static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
2305{
2306 PDMDEV_ASSERT_DEVINS(pDevIns);
2307 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2308 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
2309 pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
2310 pRtcReg->pfnWrite, ppRtcHlp));
2311
2312 /*
2313 * Validate input.
2314 */
2315 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
2316 {
2317 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
2318 PDM_RTCREG_VERSION));
2319 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
2320 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2321 return VERR_INVALID_PARAMETER;
2322 }
2323 if ( !pRtcReg->pfnWrite
2324 || !pRtcReg->pfnRead)
2325 {
2326 Assert(pRtcReg->pfnWrite);
2327 Assert(pRtcReg->pfnRead);
2328 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2329 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2330 return VERR_INVALID_PARAMETER;
2331 }
2332
2333 if (!ppRtcHlp)
2334 {
2335 Assert(ppRtcHlp);
2336 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
2337 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2338 return VERR_INVALID_PARAMETER;
2339 }
2340
2341 /*
2342 * Only one DMA device.
2343 */
2344 PVM pVM = pDevIns->Internal.s.pVMR3;
2345 if (pVM->pdm.s.pRtc)
2346 {
2347 AssertMsgFailed(("Only one RTC device is supported!\n"));
2348 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
2349 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2350 return VERR_INVALID_PARAMETER;
2351 }
2352
2353 /*
2354 * Allocate and initialize pci bus structure.
2355 */
2356 int rc = VINF_SUCCESS;
2357 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
2358 if (pRtc)
2359 {
2360 pRtc->pDevIns = pDevIns;
2361 pRtc->Reg = *pRtcReg;
2362 pVM->pdm.s.pRtc = pRtc;
2363
2364 /* set the helper pointer. */
2365 *ppRtcHlp = &g_pdmR3DevRtcHlp;
2366 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
2367 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2368 }
2369 else
2370 rc = VERR_NO_MEMORY;
2371
2372 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
2373 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2374 return rc;
2375}
2376
2377
2378/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
2379static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2380{
2381 PDMDEV_ASSERT_DEVINS(pDevIns);
2382 PVM pVM = pDevIns->Internal.s.pVMR3;
2383 VM_ASSERT_EMT(pVM);
2384 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2385 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2386 int rc = VINF_SUCCESS;
2387 if (pVM->pdm.s.pDmac)
2388 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2389 else
2390 {
2391 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2392 rc = VERR_PDM_NO_DMAC_INSTANCE;
2393 }
2394 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2395 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2396 return rc;
2397}
2398
2399
2400/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
2401static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2402{
2403 PDMDEV_ASSERT_DEVINS(pDevIns);
2404 PVM pVM = pDevIns->Internal.s.pVMR3;
2405 VM_ASSERT_EMT(pVM);
2406 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2407 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2408 int rc = VINF_SUCCESS;
2409 if (pVM->pdm.s.pDmac)
2410 {
2411 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2412 if (pcbRead)
2413 *pcbRead = cb;
2414 }
2415 else
2416 {
2417 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2418 rc = VERR_PDM_NO_DMAC_INSTANCE;
2419 }
2420 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2421 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2422 return rc;
2423}
2424
2425
2426/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
2427static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2428{
2429 PDMDEV_ASSERT_DEVINS(pDevIns);
2430 PVM pVM = pDevIns->Internal.s.pVMR3;
2431 VM_ASSERT_EMT(pVM);
2432 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2433 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2434 int rc = VINF_SUCCESS;
2435 if (pVM->pdm.s.pDmac)
2436 {
2437 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2438 if (pcbWritten)
2439 *pcbWritten = cb;
2440 }
2441 else
2442 {
2443 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2444 rc = VERR_PDM_NO_DMAC_INSTANCE;
2445 }
2446 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2447 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2448 return rc;
2449}
2450
2451
2452/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
2453static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2454{
2455 PDMDEV_ASSERT_DEVINS(pDevIns);
2456 PVM pVM = pDevIns->Internal.s.pVMR3;
2457 VM_ASSERT_EMT(pVM);
2458 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2459 pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
2460 int rc = VINF_SUCCESS;
2461 if (pVM->pdm.s.pDmac)
2462 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2463 else
2464 {
2465 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2466 rc = VERR_PDM_NO_DMAC_INSTANCE;
2467 }
2468 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2469 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2470 return rc;
2471}
2472
2473/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
2474static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2475{
2476 PDMDEV_ASSERT_DEVINS(pDevIns);
2477 PVM pVM = pDevIns->Internal.s.pVMR3;
2478 VM_ASSERT_EMT(pVM);
2479 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2480 pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
2481 uint8_t u8Mode;
2482 if (pVM->pdm.s.pDmac)
2483 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2484 else
2485 {
2486 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2487 u8Mode = 3 << 2 /* illegal mode type */;
2488 }
2489 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2490 pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
2491 return u8Mode;
2492}
2493
2494/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
2495static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2496{
2497 PDMDEV_ASSERT_DEVINS(pDevIns);
2498 PVM pVM = pDevIns->Internal.s.pVMR3;
2499 VM_ASSERT_EMT(pVM);
2500 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2501 pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_IS_SET(pVM, VM_FF_PDM_DMA)));
2502
2503 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2504 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2505#ifdef VBOX_WITH_REM
2506 REMR3NotifyDmaPending(pVM);
2507#endif
2508 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2509}
2510
2511
2512/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
2513static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2514{
2515 PDMDEV_ASSERT_DEVINS(pDevIns);
2516 PVM pVM = pDevIns->Internal.s.pVMR3;
2517 VM_ASSERT_EMT(pVM);
2518
2519 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2520 pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
2521 int rc;
2522 if (pVM->pdm.s.pRtc)
2523 {
2524 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2525 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2526 if (RT_SUCCESS(rc))
2527 {
2528 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pDevInsRtc, iReg, u8Value);
2529 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2530 }
2531 }
2532 else
2533 rc = VERR_PDM_NO_RTC_INSTANCE;
2534
2535 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2536 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2537 return rc;
2538}
2539
2540
2541/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
2542static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2543{
2544 PDMDEV_ASSERT_DEVINS(pDevIns);
2545 PVM pVM = pDevIns->Internal.s.pVMR3;
2546 VM_ASSERT_EMT(pVM);
2547
2548 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2549 pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
2550 int rc;
2551 if (pVM->pdm.s.pRtc)
2552 {
2553 PPDMDEVINS pDevInsRtc = pVM->pdm.s.pRtc->pDevIns;
2554 rc = PDMCritSectEnter(pDevInsRtc->pCritSectRoR3, VERR_IGNORED);
2555 if (RT_SUCCESS(rc))
2556 {
2557 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pDevInsRtc, iReg, pu8Value);
2558 PDMCritSectLeave(pDevInsRtc->pCritSectRoR3);
2559 }
2560 }
2561 else
2562 rc = VERR_PDM_NO_RTC_INSTANCE;
2563
2564 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2565 pDevIns->pReg->szName, pDevIns->iInstance, rc));
2566 return rc;
2567}
2568
2569
2570/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
2571static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2572{
2573 PDMDEV_ASSERT_DEVINS(pDevIns);
2574 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2575 return true;
2576
2577 char szMsg[100];
2578 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2579 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2580 AssertBreakpoint();
2581 return false;
2582}
2583
2584
2585/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
2586static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2587{
2588 PDMDEV_ASSERT_DEVINS(pDevIns);
2589 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
2590 return true;
2591
2592 char szMsg[100];
2593 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
2594 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
2595 AssertBreakpoint();
2596 return false;
2597}
2598
2599
2600/** @interface_method_impl{PDMDEVHLPR3,pfnLdrGetRCInterfaceSymbols} */
2601static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2602 const char *pszSymPrefix, const char *pszSymList)
2603{
2604 PDMDEV_ASSERT_DEVINS(pDevIns);
2605 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2606 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2607 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2608
2609 int rc;
2610 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2611 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2612 {
2613 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
2614 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2615 pvInterface, cbInterface,
2616 pDevIns->pReg->szRCMod, pDevIns->Internal.s.pDevR3->pszRCSearchPath,
2617 pszSymPrefix, pszSymList,
2618 false /*fRing0OrRC*/);
2619 else
2620 {
2621 AssertMsgFailed(("Not a raw-mode enabled driver\n"));
2622 rc = VERR_PERMISSION_DENIED;
2623 }
2624 }
2625 else
2626 {
2627 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2628 pszSymPrefix, pDevIns->pReg->szName));
2629 rc = VERR_INVALID_NAME;
2630 }
2631
2632 LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2633 pDevIns->iInstance, rc));
2634 return rc;
2635}
2636
2637
2638/** @interface_method_impl{PDMDEVHLPR3,pfnLdrGetR0InterfaceSymbols} */
2639static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
2640 const char *pszSymPrefix, const char *pszSymList)
2641{
2642 PDMDEV_ASSERT_DEVINS(pDevIns);
2643 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2644 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
2645 pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
2646
2647 int rc;
2648 if ( strncmp(pszSymPrefix, "dev", 3) == 0
2649 && RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
2650 {
2651 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2652 rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3,
2653 pvInterface, cbInterface,
2654 pDevIns->pReg->szR0Mod, pDevIns->Internal.s.pDevR3->pszR0SearchPath,
2655 pszSymPrefix, pszSymList,
2656 true /*fRing0OrRC*/);
2657 else
2658 {
2659 AssertMsgFailed(("Not a ring-0 enabled driver\n"));
2660 rc = VERR_PERMISSION_DENIED;
2661 }
2662 }
2663 else
2664 {
2665 AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
2666 pszSymPrefix, pDevIns->pReg->szName));
2667 rc = VERR_INVALID_NAME;
2668 }
2669
2670 LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2671 pDevIns->iInstance, rc));
2672 return rc;
2673}
2674
2675
2676/** @interface_method_impl{PDMDEVHLPR3,pfnCallR0} */
2677static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
2678{
2679 PDMDEV_ASSERT_DEVINS(pDevIns);
2680 PVM pVM = pDevIns->Internal.s.pVMR3;
2681 VM_ASSERT_EMT(pVM);
2682 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
2683 pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
2684
2685 /*
2686 * Resolve the ring-0 entry point. There is not need to remember this like
2687 * we do for drivers since this is mainly for construction time hacks and
2688 * other things that aren't performance critical.
2689 */
2690 int rc;
2691 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
2692 {
2693 char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
2694 strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
2695 szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
2696
2697 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
2698 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, szSymbol, &pfnReqHandlerR0);
2699 if (RT_SUCCESS(rc))
2700 {
2701 /*
2702 * Make the ring-0 call.
2703 */
2704 PDMDEVICECALLREQHANDLERREQ Req;
2705 Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
2706 Req.Hdr.cbReq = sizeof(Req);
2707 Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2708 Req.pfnReqHandlerR0 = pfnReqHandlerR0;
2709 Req.uOperation = uOperation;
2710 Req.u32Alignment = 0;
2711 Req.u64Arg = u64Arg;
2712 rc = SUPR3CallVMMR0Ex(VMCC_GET_VMR0_FOR_CALL(pVM), NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
2713 }
2714 else
2715 pfnReqHandlerR0 = NIL_RTR0PTR;
2716 }
2717 else
2718 rc = VERR_ACCESS_DENIED;
2719 LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
2720 pDevIns->iInstance, rc));
2721 return rc;
2722}
2723
2724
2725/** @interface_method_impl{PDMDEVHLPR3,pfnVMGetSuspendReason} */
2726static DECLCALLBACK(VMSUSPENDREASON) pdmR3DevHlp_VMGetSuspendReason(PPDMDEVINS pDevIns)
2727{
2728 PDMDEV_ASSERT_DEVINS(pDevIns);
2729 PVM pVM = pDevIns->Internal.s.pVMR3;
2730 VM_ASSERT_EMT(pVM);
2731 VMSUSPENDREASON enmReason = VMR3GetSuspendReason(pVM->pUVM);
2732 LogFlow(("pdmR3DevHlp_VMGetSuspendReason: caller='%s'/%d: returns %d\n",
2733 pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2734 return enmReason;
2735}
2736
2737
2738/** @interface_method_impl{PDMDEVHLPR3,pfnVMGetResumeReason} */
2739static DECLCALLBACK(VMRESUMEREASON) pdmR3DevHlp_VMGetResumeReason(PPDMDEVINS pDevIns)
2740{
2741 PDMDEV_ASSERT_DEVINS(pDevIns);
2742 PVM pVM = pDevIns->Internal.s.pVMR3;
2743 VM_ASSERT_EMT(pVM);
2744 VMRESUMEREASON enmReason = VMR3GetResumeReason(pVM->pUVM);
2745 LogFlow(("pdmR3DevHlp_VMGetResumeReason: caller='%s'/%d: returns %d\n",
2746 pDevIns->pReg->szName, pDevIns->iInstance, enmReason));
2747 return enmReason;
2748}
2749
2750
2751/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
2752static DECLCALLBACK(PUVM) pdmR3DevHlp_GetUVM(PPDMDEVINS pDevIns)
2753{
2754 PDMDEV_ASSERT_DEVINS(pDevIns);
2755 LogFlow(("pdmR3DevHlp_GetUVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2756 return pDevIns->Internal.s.pVMR3->pUVM;
2757}
2758
2759
2760/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2761static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2762{
2763 PDMDEV_ASSERT_DEVINS(pDevIns);
2764 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
2765 return pDevIns->Internal.s.pVMR3;
2766}
2767
2768
2769/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2770static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
2771{
2772 PDMDEV_ASSERT_DEVINS(pDevIns);
2773 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2774 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
2775 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
2776}
2777
2778
2779/** @interface_method_impl{PDMDEVHLPR3,pfnGetCurrentCpuId} */
2780static DECLCALLBACK(VMCPUID) pdmR3DevHlp_GetCurrentCpuId(PPDMDEVINS pDevIns)
2781{
2782 PDMDEV_ASSERT_DEVINS(pDevIns);
2783 VMCPUID idCpu = VMMGetCpuId(pDevIns->Internal.s.pVMR3);
2784 LogFlow(("pdmR3DevHlp_GetCurrentCpuId: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, idCpu));
2785 return idCpu;
2786}
2787
2788
2789/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
2790static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg,
2791 PCPDMPCIHLPR3 *ppPciHlpR3, uint32_t *piBus)
2792{
2793 PDMDEV_ASSERT_DEVINS(pDevIns);
2794 PVM pVM = pDevIns->Internal.s.pVMR3;
2795 VM_ASSERT_EMT(pVM);
2796 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, "
2797 ".pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p piBus=%p\n",
2798 pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
2799 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC,
2800 pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3, piBus));
2801
2802 /*
2803 * Validate the structure.
2804 */
2805 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2806 {
2807 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2808 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2809 return VERR_INVALID_PARAMETER;
2810 }
2811 if ( !pPciBusReg->pfnRegisterR3
2812 || !pPciBusReg->pfnIORegionRegisterR3
2813 || !pPciBusReg->pfnSetIrqR3)
2814 {
2815 Assert(pPciBusReg->pfnRegisterR3);
2816 Assert(pPciBusReg->pfnIORegionRegisterR3);
2817 Assert(pPciBusReg->pfnSetIrqR3);
2818 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2819 return VERR_INVALID_PARAMETER;
2820 }
2821 if ( pPciBusReg->pszSetIrqRC
2822 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
2823 {
2824 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
2825 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2826 return VERR_INVALID_PARAMETER;
2827 }
2828 if ( pPciBusReg->pszSetIrqR0
2829 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2830 {
2831 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2832 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2833 return VERR_INVALID_PARAMETER;
2834 }
2835 if (!ppPciHlpR3)
2836 {
2837 Assert(ppPciHlpR3);
2838 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2839 return VERR_INVALID_PARAMETER;
2840 }
2841 AssertLogRelMsgReturn(RT_VALID_PTR(piBus) || !piBus,
2842 ("caller='%s'/%d: piBus=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, piBus),
2843 VERR_INVALID_POINTER);
2844
2845 /*
2846 * Find free PCI bus entry.
2847 */
2848 unsigned iBus = 0;
2849 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2850 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2851 break;
2852 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2853 {
2854 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2855 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2856 return VERR_INVALID_PARAMETER;
2857 }
2858 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2859
2860 /*
2861 * Resolve and init the RC bits.
2862 */
2863 if (pPciBusReg->pszSetIrqRC)
2864 {
2865 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2866 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2867 if (RT_FAILURE(rc))
2868 {
2869 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2870 return rc;
2871 }
2872 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2873 }
2874 else
2875 {
2876 pPciBus->pfnSetIrqRC = 0;
2877 pPciBus->pDevInsRC = 0;
2878 }
2879
2880 /*
2881 * Resolve and init the R0 bits.
2882 */
2883 if (pPciBusReg->pszSetIrqR0)
2884 {
2885 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2886 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2887 if (RT_FAILURE(rc))
2888 {
2889 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2890 return rc;
2891 }
2892 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2893 }
2894 else
2895 {
2896 pPciBus->pfnSetIrqR0 = 0;
2897 pPciBus->pDevInsR0 = 0;
2898 }
2899
2900 /*
2901 * Init the R3 bits.
2902 */
2903 pPciBus->iBus = iBus;
2904 pPciBus->pDevInsR3 = pDevIns;
2905 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2906 pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2907 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2908 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2909 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2910
2911 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2912
2913 /* set the helper pointer and return. */
2914 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2915 if (piBus)
2916 *piBus = iBus;
2917 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc *piBus=%u\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS, iBus));
2918 return VINF_SUCCESS;
2919}
2920
2921
2922/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2923static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2924{
2925 PDMDEV_ASSERT_DEVINS(pDevIns);
2926 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2927 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2928 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2929 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2930 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2931 ppPicHlpR3));
2932
2933 /*
2934 * Validate input.
2935 */
2936 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2937 {
2938 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2939 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2940 return VERR_INVALID_PARAMETER;
2941 }
2942 if ( !pPicReg->pfnSetIrqR3
2943 || !pPicReg->pfnGetInterruptR3)
2944 {
2945 Assert(pPicReg->pfnSetIrqR3);
2946 Assert(pPicReg->pfnGetInterruptR3);
2947 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2948 return VERR_INVALID_PARAMETER;
2949 }
2950 if ( ( pPicReg->pszSetIrqRC
2951 || pPicReg->pszGetInterruptRC)
2952 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
2953 || !VALID_PTR(pPicReg->pszGetInterruptRC))
2954 )
2955 {
2956 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2957 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2958 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2959 return VERR_INVALID_PARAMETER;
2960 }
2961 if ( pPicReg->pszSetIrqRC
2962 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2963 {
2964 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2965 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2966 return VERR_INVALID_PARAMETER;
2967 }
2968 if ( pPicReg->pszSetIrqR0
2969 && !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2970 {
2971 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2972 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2973 return VERR_INVALID_PARAMETER;
2974 }
2975 if (!ppPicHlpR3)
2976 {
2977 Assert(ppPicHlpR3);
2978 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2979 return VERR_INVALID_PARAMETER;
2980 }
2981
2982 /*
2983 * Only one PIC device.
2984 */
2985 PVM pVM = pDevIns->Internal.s.pVMR3;
2986 if (pVM->pdm.s.Pic.pDevInsR3)
2987 {
2988 AssertMsgFailed(("Only one pic device is supported!\n"));
2989 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2990 return VERR_INVALID_PARAMETER;
2991 }
2992
2993 /*
2994 * RC stuff.
2995 */
2996 if (pPicReg->pszSetIrqRC)
2997 {
2998 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2999 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
3000 if (RT_SUCCESS(rc))
3001 {
3002 rc = pdmR3DevGetSymbolRCLazy(pDevIns, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
3003 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
3004 }
3005 if (RT_FAILURE(rc))
3006 {
3007 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3008 return rc;
3009 }
3010 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3011 }
3012 else
3013 {
3014 pVM->pdm.s.Pic.pDevInsRC = 0;
3015 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
3016 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
3017 }
3018
3019 /*
3020 * R0 stuff.
3021 */
3022 if (pPicReg->pszSetIrqR0)
3023 {
3024 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
3025 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
3026 if (RT_SUCCESS(rc))
3027 {
3028 rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
3029 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
3030 }
3031 if (RT_FAILURE(rc))
3032 {
3033 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3034 return rc;
3035 }
3036 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3037 Assert(pVM->pdm.s.Pic.pDevInsR0);
3038 }
3039 else
3040 {
3041 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
3042 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
3043 pVM->pdm.s.Pic.pDevInsR0 = 0;
3044 }
3045
3046 /*
3047 * R3 stuff.
3048 */
3049 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
3050 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
3051 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
3052 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3053
3054 /* set the helper pointer and return. */
3055 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
3056 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3057 return VINF_SUCCESS;
3058}
3059
3060
3061/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
3062static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns)
3063{
3064 PDMDEV_ASSERT_DEVINS(pDevIns);
3065 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3066
3067 /*
3068 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
3069 * as they need to communicate and share state easily.
3070 */
3071 PVM pVM = pDevIns->Internal.s.pVMR3;
3072 if (pVM->pdm.s.Apic.pDevInsR3)
3073 {
3074 AssertMsgFailed(("Only one APIC device is supported!\n"));
3075 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3076 return VERR_INVALID_PARAMETER;
3077 }
3078
3079 /*
3080 * Initialize the RC, R0 and HC bits.
3081 */
3082 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3083 Assert(pVM->pdm.s.Apic.pDevInsRC);
3084
3085 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3086 Assert(pVM->pdm.s.Apic.pDevInsR0);
3087
3088 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
3089 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3090 return VINF_SUCCESS;
3091}
3092
3093
3094/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
3095static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
3096{
3097 PDMDEV_ASSERT_DEVINS(pDevIns);
3098 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3099 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
3100 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
3101 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
3102
3103 /*
3104 * Validate input.
3105 */
3106 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
3107 {
3108 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
3109 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3110 return VERR_INVALID_PARAMETER;
3111 }
3112 if (!pIoApicReg->pfnSetIrqR3 || !pIoApicReg->pfnSendMsiR3 || !pIoApicReg->pfnSetEoiR3)
3113 {
3114 Assert(pIoApicReg->pfnSetIrqR3);
3115 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3116 return VERR_INVALID_PARAMETER;
3117 }
3118 if ( pIoApicReg->pszSetIrqRC
3119 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
3120 {
3121 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
3122 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3123 return VERR_INVALID_PARAMETER;
3124 }
3125 if ( pIoApicReg->pszSendMsiRC
3126 && !VALID_PTR(pIoApicReg->pszSendMsiRC))
3127 {
3128 Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
3129 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3130 return VERR_INVALID_PARAMETER;
3131 }
3132 if ( pIoApicReg->pszSetEoiRC
3133 && !VALID_PTR(pIoApicReg->pszSetEoiRC))
3134 {
3135 Assert(VALID_PTR(pIoApicReg->pszSetEoiRC));
3136 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3137 return VERR_INVALID_PARAMETER;
3138 }
3139 if ( pIoApicReg->pszSetIrqR0
3140 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
3141 {
3142 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
3143 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3144 return VERR_INVALID_PARAMETER;
3145 }
3146 if ( pIoApicReg->pszSendMsiR0
3147 && !VALID_PTR(pIoApicReg->pszSendMsiR0))
3148 {
3149 Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
3150 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3151 return VERR_INVALID_PARAMETER;
3152 }
3153 if ( pIoApicReg->pszSetEoiR0
3154 && !VALID_PTR(pIoApicReg->pszSetEoiR0))
3155 {
3156 Assert(VALID_PTR(pIoApicReg->pszSetEoiR0));
3157 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3158 return VERR_INVALID_PARAMETER;
3159 }
3160 if (!ppIoApicHlpR3)
3161 {
3162 Assert(ppIoApicHlpR3);
3163 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3164 return VERR_INVALID_PARAMETER;
3165 }
3166
3167 /*
3168 * The I/O APIC requires the APIC to be present (hacks++).
3169 * If the I/O APIC does GC stuff so must the APIC.
3170 */
3171 PVM pVM = pDevIns->Internal.s.pVMR3;
3172 if (!pVM->pdm.s.Apic.pDevInsR3)
3173 {
3174 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
3175 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3176 return VERR_INVALID_PARAMETER;
3177 }
3178 if ( pIoApicReg->pszSetIrqRC
3179 && !pVM->pdm.s.Apic.pDevInsRC)
3180 {
3181 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
3182 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3183 return VERR_INVALID_PARAMETER;
3184 }
3185
3186 /*
3187 * Only one I/O APIC device.
3188 */
3189 if (pVM->pdm.s.IoApic.pDevInsR3)
3190 {
3191 AssertMsgFailed(("Only one ioapic device is supported!\n"));
3192 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3193 return VERR_INVALID_PARAMETER;
3194 }
3195
3196 /*
3197 * Resolve & initialize the GC bits.
3198 */
3199 if (pIoApicReg->pszSetIrqRC)
3200 {
3201 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
3202 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
3203 if (RT_FAILURE(rc))
3204 {
3205 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3206 return rc;
3207 }
3208 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3209 }
3210 else
3211 {
3212 pVM->pdm.s.IoApic.pDevInsRC = 0;
3213 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
3214 }
3215
3216 if (pIoApicReg->pszSendMsiRC)
3217 {
3218 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSendMsiRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
3219 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
3220 if (RT_FAILURE(rc))
3221 {
3222 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3223 return rc;
3224 }
3225 }
3226 else
3227 {
3228 pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
3229 }
3230
3231 if (pIoApicReg->pszSetEoiRC)
3232 {
3233 int rc = pdmR3DevGetSymbolRCLazy(pDevIns, pIoApicReg->pszSetEoiRC, &pVM->pdm.s.IoApic.pfnSetEoiRC);
3234 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetEoiRC, rc));
3235 if (RT_FAILURE(rc))
3236 {
3237 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3238 return rc;
3239 }
3240 }
3241 else
3242 {
3243 pVM->pdm.s.IoApic.pfnSetEoiRC = 0;
3244 }
3245
3246 /*
3247 * Resolve & initialize the R0 bits.
3248 */
3249 if (pIoApicReg->pszSetIrqR0)
3250 {
3251 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3252 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3253 if (RT_FAILURE(rc))
3254 {
3255 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3256 return rc;
3257 }
3258 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3259 Assert(pVM->pdm.s.IoApic.pDevInsR0);
3260 }
3261 else
3262 {
3263 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3264 pVM->pdm.s.IoApic.pDevInsR0 = 0;
3265 }
3266
3267 if (pIoApicReg->pszSendMsiR0)
3268 {
3269 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSendMsiR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
3270 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
3271 if (RT_FAILURE(rc))
3272 {
3273 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3274 return rc;
3275 }
3276 }
3277 else
3278 {
3279 pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
3280 }
3281
3282 if (pIoApicReg->pszSetEoiR0)
3283 {
3284 int rc = pdmR3DevGetSymbolR0Lazy(pDevIns, pIoApicReg->pszSetEoiR0, &pVM->pdm.s.IoApic.pfnSetEoiR0);
3285 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetEoiR0, rc));
3286 if (RT_FAILURE(rc))
3287 {
3288 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3289 return rc;
3290 }
3291 }
3292 else
3293 {
3294 pVM->pdm.s.IoApic.pfnSetEoiR0 = 0;
3295 }
3296
3297
3298 /*
3299 * Initialize the R3 bits.
3300 */
3301 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3302 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
3303 pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
3304 pVM->pdm.s.IoApic.pfnSetEoiR3 = pIoApicReg->pfnSetEoiR3;
3305 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3306
3307 /* set the helper pointer and return. */
3308 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3309 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3310 return VINF_SUCCESS;
3311}
3312
3313
3314/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
3315static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
3316{
3317 PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
3318 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3319 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
3320
3321 /*
3322 * Validate input.
3323 */
3324 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
3325 {
3326 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
3327 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3328 return VERR_INVALID_PARAMETER;
3329 }
3330
3331 if (!ppHpetHlpR3)
3332 {
3333 Assert(ppHpetHlpR3);
3334 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3335 return VERR_INVALID_PARAMETER;
3336 }
3337
3338 /* set the helper pointer and return. */
3339 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
3340 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3341 return VINF_SUCCESS;
3342}
3343
3344
3345/** @interface_method_impl{PDMDEVHLPR3,pfnPciRawRegister} */
3346static DECLCALLBACK(int) pdmR3DevHlp_PciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
3347{
3348 PDMDEV_ASSERT_DEVINS(pDevIns); RT_NOREF_PV(pDevIns);
3349 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3350 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
3351
3352 /*
3353 * Validate input.
3354 */
3355 if (pPciRawReg->u32Version != PDM_PCIRAWREG_VERSION)
3356 {
3357 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciRawReg->u32Version, PDM_PCIRAWREG_VERSION));
3358 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3359 return VERR_INVALID_PARAMETER;
3360 }
3361
3362 if (!ppPciRawHlpR3)
3363 {
3364 Assert(ppPciRawHlpR3);
3365 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc (ppPciRawHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3366 return VERR_INVALID_PARAMETER;
3367 }
3368
3369 /* set the helper pointer and return. */
3370 *ppPciRawHlpR3 = &g_pdmR3DevPciRawHlp;
3371 LogFlow(("pdmR3DevHlp_PciRawRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3372 return VINF_SUCCESS;
3373}
3374
3375
3376/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
3377static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3378{
3379 PDMDEV_ASSERT_DEVINS(pDevIns);
3380 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3381 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3382 pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3383 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3384
3385 /*
3386 * Validate input.
3387 */
3388 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3389 {
3390 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3391 PDM_DMACREG_VERSION));
3392 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
3393 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3394 return VERR_INVALID_PARAMETER;
3395 }
3396 if ( !pDmacReg->pfnRun
3397 || !pDmacReg->pfnRegister
3398 || !pDmacReg->pfnReadMemory
3399 || !pDmacReg->pfnWriteMemory
3400 || !pDmacReg->pfnSetDREQ
3401 || !pDmacReg->pfnGetChannelMode)
3402 {
3403 Assert(pDmacReg->pfnRun);
3404 Assert(pDmacReg->pfnRegister);
3405 Assert(pDmacReg->pfnReadMemory);
3406 Assert(pDmacReg->pfnWriteMemory);
3407 Assert(pDmacReg->pfnSetDREQ);
3408 Assert(pDmacReg->pfnGetChannelMode);
3409 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3410 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3411 return VERR_INVALID_PARAMETER;
3412 }
3413
3414 if (!ppDmacHlp)
3415 {
3416 Assert(ppDmacHlp);
3417 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
3418 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3419 return VERR_INVALID_PARAMETER;
3420 }
3421
3422 /*
3423 * Only one DMA device.
3424 */
3425 PVM pVM = pDevIns->Internal.s.pVMR3;
3426 if (pVM->pdm.s.pDmac)
3427 {
3428 AssertMsgFailed(("Only one DMA device is supported!\n"));
3429 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3430 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3431 return VERR_INVALID_PARAMETER;
3432 }
3433
3434 /*
3435 * Allocate and initialize pci bus structure.
3436 */
3437 int rc = VINF_SUCCESS;
3438 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3439 if (pDmac)
3440 {
3441 pDmac->pDevIns = pDevIns;
3442 pDmac->Reg = *pDmacReg;
3443 pVM->pdm.s.pDmac = pDmac;
3444
3445 /* set the helper pointer. */
3446 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3447 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3448 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3449 }
3450 else
3451 rc = VERR_NO_MEMORY;
3452
3453 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
3454 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3455 return rc;
3456}
3457
3458
3459/**
3460 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3461 */
3462static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbHeap)
3463{
3464 PDMDEV_ASSERT_DEVINS(pDevIns);
3465 PVM pVM = pDevIns->Internal.s.pVMR3;
3466 VM_ASSERT_EMT(pVM);
3467 LogFlow(("pdmR3DevHlp_RegisterVMMDevHeap: caller='%s'/%d: GCPhys=%RGp pvHeap=%p cbHeap=%#x\n",
3468 pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvHeap, cbHeap));
3469
3470 if (pVM->pdm.s.pvVMMDevHeap == NULL)
3471 {
3472 pVM->pdm.s.pvVMMDevHeap = pvHeap;
3473 pVM->pdm.s.GCPhysVMMDevHeap = GCPhys;
3474 pVM->pdm.s.cbVMMDevHeap = cbHeap;
3475 pVM->pdm.s.cbVMMDevHeapLeft = cbHeap;
3476 }
3477 else
3478 {
3479 Assert(pVM->pdm.s.pvVMMDevHeap == pvHeap);
3480 Assert(pVM->pdm.s.cbVMMDevHeap == cbHeap);
3481 Assert(pVM->pdm.s.GCPhysVMMDevHeap != GCPhys || GCPhys == NIL_RTGCPHYS);
3482 if (pVM->pdm.s.GCPhysVMMDevHeap != GCPhys)
3483 {
3484 pVM->pdm.s.GCPhysVMMDevHeap = GCPhys;
3485 if (pVM->pdm.s.pfnVMMDevHeapNotify)
3486 pVM->pdm.s.pfnVMMDevHeapNotify(pVM, pvHeap, GCPhys);
3487 }
3488 }
3489
3490 LogFlow(("pdmR3DevHlp_RegisterVMMDevHeap: caller='%s'/%d: returns %Rrc\n",
3491 pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
3492 return VINF_SUCCESS;
3493}
3494
3495
3496/**
3497 * @interface_method_impl{PDMDEVHLPR3,pfnFirmwareRegister}
3498 */
3499static DECLCALLBACK(int) pdmR3DevHlp_FirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
3500{
3501 PDMDEV_ASSERT_DEVINS(pDevIns);
3502 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3503 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: pFWReg=%p:{.u32Version=%#x, .pfnIsHardReset=%p, .u32TheEnd=%#x} ppFwHlp=%p\n",
3504 pDevIns->pReg->szName, pDevIns->iInstance, pFwReg, pFwReg->u32Version, pFwReg->pfnIsHardReset, pFwReg->u32TheEnd, ppFwHlp));
3505
3506 /*
3507 * Validate input.
3508 */
3509 if (pFwReg->u32Version != PDM_FWREG_VERSION)
3510 {
3511 AssertMsgFailed(("u32Version=%#x expected %#x\n", pFwReg->u32Version, PDM_FWREG_VERSION));
3512 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (version)\n",
3513 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3514 return VERR_INVALID_PARAMETER;
3515 }
3516 if (!pFwReg->pfnIsHardReset)
3517 {
3518 Assert(pFwReg->pfnIsHardReset);
3519 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
3520 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3521 return VERR_INVALID_PARAMETER;
3522 }
3523
3524 if (!ppFwHlp)
3525 {
3526 Assert(ppFwHlp);
3527 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc (ppFwHlp)\n",
3528 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3529 return VERR_INVALID_PARAMETER;
3530 }
3531
3532 /*
3533 * Only one DMA device.
3534 */
3535 PVM pVM = pDevIns->Internal.s.pVMR3;
3536 if (pVM->pdm.s.pFirmware)
3537 {
3538 AssertMsgFailed(("Only one firmware device is supported!\n"));
3539 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc\n",
3540 pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3541 return VERR_INVALID_PARAMETER;
3542 }
3543
3544 /*
3545 * Allocate and initialize pci bus structure.
3546 */
3547 int rc = VINF_SUCCESS;
3548 PPDMFW pFirmware = (PPDMFW)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pFirmware));
3549 if (pFirmware)
3550 {
3551 pFirmware->pDevIns = pDevIns;
3552 pFirmware->Reg = *pFwReg;
3553 pVM->pdm.s.pFirmware = pFirmware;
3554
3555 /* set the helper pointer. */
3556 *ppFwHlp = &g_pdmR3DevFirmwareHlp;
3557 Log(("PDM: Registered firmware device '%s'/%d pDevIns=%p\n",
3558 pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
3559 }
3560 else
3561 rc = VERR_NO_MEMORY;
3562
3563 LogFlow(("pdmR3DevHlp_FirmwareRegister: caller='%s'/%d: returns %Rrc\n",
3564 pDevIns->pReg->szName, pDevIns->iInstance, rc));
3565 return rc;
3566}
3567
3568
3569/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3570static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
3571{
3572 PDMDEV_ASSERT_DEVINS(pDevIns);
3573 PVM pVM = pDevIns->Internal.s.pVMR3;
3574 VM_ASSERT_EMT(pVM);
3575 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: fFlags=%#x VM_FF_RESET %d -> 1\n",
3576 pDevIns->pReg->szName, pDevIns->iInstance, fFlags, VM_FF_IS_SET(pVM, VM_FF_RESET)));
3577
3578 /*
3579 * We postpone this operation because we're likely to be inside a I/O instruction
3580 * and the EIP will be updated when we return.
3581 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3582 */
3583 bool fHaltOnReset;
3584 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3585 if (RT_SUCCESS(rc) && fHaltOnReset)
3586 {
3587 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3588 rc = VINF_EM_HALT;
3589 }
3590 else
3591 {
3592 pVM->pdm.s.fResetFlags = fFlags;
3593 VM_FF_SET(pVM, VM_FF_RESET);
3594 rc = VINF_EM_RESET;
3595 }
3596
3597 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3598 return rc;
3599}
3600
3601
3602/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3603static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3604{
3605 int rc;
3606 PDMDEV_ASSERT_DEVINS(pDevIns);
3607 PVM pVM = pDevIns->Internal.s.pVMR3;
3608 VM_ASSERT_EMT(pVM);
3609 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3610 pDevIns->pReg->szName, pDevIns->iInstance));
3611
3612 /** @todo Always take the SMP path - fewer code paths. */
3613 if (pVM->cCpus > 1)
3614 {
3615 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
3616 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 2, pVM->pUVM, VMSUSPENDREASON_VM);
3617 AssertRC(rc);
3618 rc = VINF_EM_SUSPEND;
3619 }
3620 else
3621 rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3622
3623 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3624 return rc;
3625}
3626
3627
3628/**
3629 * Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
3630 * EMT request to avoid deadlocks.
3631 *
3632 * @returns VBox status code fit for scheduling.
3633 * @param pVM The cross context VM structure.
3634 * @param pDevIns The device that triggered this action.
3635 */
3636static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
3637{
3638 /*
3639 * Suspend the VM first then do the saving.
3640 */
3641 int rc = VMR3Suspend(pVM->pUVM, VMSUSPENDREASON_VM);
3642 if (RT_SUCCESS(rc))
3643 {
3644 PUVM pUVM = pVM->pUVM;
3645 rc = pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pUVM);
3646
3647 /*
3648 * On success, power off the VM, on failure we'll leave it suspended.
3649 */
3650 if (RT_SUCCESS(rc))
3651 {
3652 rc = VMR3PowerOff(pVM->pUVM);
3653 if (RT_FAILURE(rc))
3654 LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
3655 }
3656 else
3657 LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
3658 }
3659 else
3660 LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
3661 return rc;
3662}
3663
3664
3665/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3666static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3667{
3668 PDMDEV_ASSERT_DEVINS(pDevIns);
3669 PVM pVM = pDevIns->Internal.s.pVMR3;
3670 VM_ASSERT_EMT(pVM);
3671 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
3672 pDevIns->pReg->szName, pDevIns->iInstance));
3673
3674 int rc;
3675 if ( pVM->pUVM->pVmm2UserMethods
3676 && pVM->pUVM->pVmm2UserMethods->pfnSaveState)
3677 {
3678 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
3679 if (RT_SUCCESS(rc))
3680 {
3681 LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
3682 rc = VINF_EM_SUSPEND;
3683 }
3684 }
3685 else
3686 rc = VERR_NOT_SUPPORTED;
3687
3688 LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3689 return rc;
3690}
3691
3692
3693/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3694static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3695{
3696 int rc;
3697 PDMDEV_ASSERT_DEVINS(pDevIns);
3698 PVM pVM = pDevIns->Internal.s.pVMR3;
3699 VM_ASSERT_EMT(pVM);
3700 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3701 pDevIns->pReg->szName, pDevIns->iInstance));
3702
3703 /** @todo Always take the SMP path - fewer code paths. */
3704 if (pVM->cCpus > 1)
3705 {
3706 /* We might be holding locks here and could cause a deadlock since
3707 VMR3PowerOff rendezvous with the other CPUs. */
3708 rc = VMR3ReqCallNoWait(pVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM->pUVM);
3709 AssertRC(rc);
3710 /* Set the VCPU state to stopped here as well to make sure no
3711 inconsistency with the EM state occurs. */
3712 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
3713 rc = VINF_EM_OFF;
3714 }
3715 else
3716 rc = VMR3PowerOff(pVM->pUVM);
3717
3718 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3719 return rc;
3720}
3721
3722
3723/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3724static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3725{
3726 PDMDEV_ASSERT_DEVINS(pDevIns);
3727 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3728
3729 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3730
3731 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3732 return fRc;
3733}
3734
3735
3736/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3737static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3738{
3739 PDMDEV_ASSERT_DEVINS(pDevIns);
3740 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3741 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3742 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3743}
3744
3745
3746/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3747static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3748 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3749{
3750 PDMDEV_ASSERT_DEVINS(pDevIns);
3751 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3752
3753 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3754 pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3755 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3756
3757 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, 0 /*iSubLeaf*/, pEax, pEbx, pEcx, pEdx);
3758
3759 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3760 pDevIns->pReg->szName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3761}
3762
3763
3764/**
3765 * The device helper structure for trusted devices.
3766 */
3767const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3768{
3769 PDM_DEVHLPR3_VERSION,
3770 pdmR3DevHlp_IOPortRegister,
3771 pdmR3DevHlp_IOPortRegisterRC,
3772 pdmR3DevHlp_IOPortRegisterR0,
3773 pdmR3DevHlp_IOPortDeregister,
3774 pdmR3DevHlp_MMIORegister,
3775 pdmR3DevHlp_MMIORegisterRC,
3776 pdmR3DevHlp_MMIORegisterR0,
3777 pdmR3DevHlp_MMIODeregister,
3778 pdmR3DevHlp_MMIO2Register,
3779 pdmR3DevHlp_MMIOExPreRegister,
3780 pdmR3DevHlp_MMIOExDeregister,
3781 pdmR3DevHlp_MMIOExMap,
3782 pdmR3DevHlp_MMIOExUnmap,
3783 pdmR3DevHlp_MMIOExReduce,
3784 pdmR3DevHlp_MMHyperMapMMIO2,
3785 pdmR3DevHlp_MMIO2MapKernel,
3786 pdmR3DevHlp_ROMRegister,
3787 pdmR3DevHlp_ROMProtectShadow,
3788 pdmR3DevHlp_SSMRegister,
3789 pdmR3DevHlp_TMTimerCreate,
3790 pdmR3DevHlp_TMUtcNow,
3791 pdmR3DevHlp_PhysRead,
3792 pdmR3DevHlp_PhysWrite,
3793 pdmR3DevHlp_PhysGCPhys2CCPtr,
3794 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3795 pdmR3DevHlp_PhysReleasePageMappingLock,
3796 pdmR3DevHlp_PhysReadGCVirt,
3797 pdmR3DevHlp_PhysWriteGCVirt,
3798 pdmR3DevHlp_PhysGCPtr2GCPhys,
3799 pdmR3DevHlp_MMHeapAlloc,
3800 pdmR3DevHlp_MMHeapAllocZ,
3801 pdmR3DevHlp_MMHeapFree,
3802 pdmR3DevHlp_VMState,
3803 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3804 pdmR3DevHlp_VMSetError,
3805 pdmR3DevHlp_VMSetErrorV,
3806 pdmR3DevHlp_VMSetRuntimeError,
3807 pdmR3DevHlp_VMSetRuntimeErrorV,
3808 pdmR3DevHlp_DBGFStopV,
3809 pdmR3DevHlp_DBGFInfoRegister,
3810 pdmR3DevHlp_DBGFInfoRegisterArgv,
3811 pdmR3DevHlp_DBGFRegRegister,
3812 pdmR3DevHlp_DBGFTraceBuf,
3813 pdmR3DevHlp_STAMRegister,
3814 pdmR3DevHlp_STAMRegisterF,
3815 pdmR3DevHlp_STAMRegisterV,
3816 pdmR3DevHlp_PCIRegister,
3817 pdmR3DevHlp_PCIRegisterMsi,
3818 pdmR3DevHlp_PCIIORegionRegister,
3819 pdmR3DevHlp_PCISetConfigCallbacks,
3820 pdmR3DevHlp_PCIPhysRead,
3821 pdmR3DevHlp_PCIPhysWrite,
3822 pdmR3DevHlp_PCISetIrq,
3823 pdmR3DevHlp_PCISetIrqNoWait,
3824 pdmR3DevHlp_ISASetIrq,
3825 pdmR3DevHlp_ISASetIrqNoWait,
3826 pdmR3DevHlp_IoApicSendMsi,
3827 pdmR3DevHlp_DriverAttach,
3828 pdmR3DevHlp_DriverDetach,
3829 pdmR3DevHlp_QueueCreate,
3830 pdmR3DevHlp_CritSectInit,
3831 pdmR3DevHlp_CritSectGetNop,
3832 pdmR3DevHlp_CritSectGetNopR0,
3833 pdmR3DevHlp_CritSectGetNopRC,
3834 pdmR3DevHlp_SetDeviceCritSect,
3835 pdmR3DevHlp_ThreadCreate,
3836 pdmR3DevHlp_SetAsyncNotification,
3837 pdmR3DevHlp_AsyncNotificationCompleted,
3838 pdmR3DevHlp_RTCRegister,
3839 pdmR3DevHlp_PCIBusRegister,
3840 pdmR3DevHlp_PICRegister,
3841 pdmR3DevHlp_APICRegister,
3842 pdmR3DevHlp_IOAPICRegister,
3843 pdmR3DevHlp_HPETRegister,
3844 pdmR3DevHlp_PciRawRegister,
3845 pdmR3DevHlp_DMACRegister,
3846 pdmR3DevHlp_DMARegister,
3847 pdmR3DevHlp_DMAReadMemory,
3848 pdmR3DevHlp_DMAWriteMemory,
3849 pdmR3DevHlp_DMASetDREQ,
3850 pdmR3DevHlp_DMAGetChannelMode,
3851 pdmR3DevHlp_DMASchedule,
3852 pdmR3DevHlp_CMOSWrite,
3853 pdmR3DevHlp_CMOSRead,
3854 pdmR3DevHlp_AssertEMT,
3855 pdmR3DevHlp_AssertOther,
3856 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3857 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3858 pdmR3DevHlp_CallR0,
3859 pdmR3DevHlp_VMGetSuspendReason,
3860 pdmR3DevHlp_VMGetResumeReason,
3861 pdmR3DevHlp_PhysBulkGCPhys2CCPtr,
3862 pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly,
3863 pdmR3DevHlp_PhysBulkReleasePageMappingLocks,
3864 pdmR3DevHlp_MMIOExChangeRegionNo,
3865 0,
3866 0,
3867 0,
3868 0,
3869 0,
3870 0,
3871 0,
3872 0,
3873 0,
3874 0,
3875 pdmR3DevHlp_GetUVM,
3876 pdmR3DevHlp_GetVM,
3877 pdmR3DevHlp_GetVMCPU,
3878 pdmR3DevHlp_GetCurrentCpuId,
3879 pdmR3DevHlp_RegisterVMMDevHeap,
3880 pdmR3DevHlp_FirmwareRegister,
3881 pdmR3DevHlp_VMReset,
3882 pdmR3DevHlp_VMSuspend,
3883 pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3884 pdmR3DevHlp_VMPowerOff,
3885 pdmR3DevHlp_A20IsEnabled,
3886 pdmR3DevHlp_A20Set,
3887 pdmR3DevHlp_GetCpuId,
3888 pdmR3DevHlp_TMTimeVirtGet,
3889 pdmR3DevHlp_TMTimeVirtGetFreq,
3890 pdmR3DevHlp_TMTimeVirtGetNano,
3891 pdmR3DevHlp_GetSupDrvSession,
3892 pdmR3DevHlp_QueryGenericUserObject,
3893 PDM_DEVHLPR3_VERSION /* the end */
3894};
3895
3896
3897
3898
3899/** @interface_method_impl{PDMDEVHLPR3,pfnGetUVM} */
3900static DECLCALLBACK(PUVM) pdmR3DevHlp_Untrusted_GetUVM(PPDMDEVINS pDevIns)
3901{
3902 PDMDEV_ASSERT_DEVINS(pDevIns);
3903 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3904 return NULL;
3905}
3906
3907
3908/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3909static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3910{
3911 PDMDEV_ASSERT_DEVINS(pDevIns);
3912 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3913 return NULL;
3914}
3915
3916
3917/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3918static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3919{
3920 PDMDEV_ASSERT_DEVINS(pDevIns);
3921 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3922 return NULL;
3923}
3924
3925
3926/** @interface_method_impl{PDMDEVHLPR3,pfnGetCurrentCpuId} */
3927static DECLCALLBACK(VMCPUID) pdmR3DevHlp_Untrusted_GetCurrentCpuId(PPDMDEVINS pDevIns)
3928{
3929 PDMDEV_ASSERT_DEVINS(pDevIns);
3930 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3931 return NIL_VMCPUID;
3932}
3933
3934
3935/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3936static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys,
3937 RTR3PTR pvHeap, unsigned cbHeap)
3938{
3939 PDMDEV_ASSERT_DEVINS(pDevIns);
3940 NOREF(GCPhys); NOREF(pvHeap); NOREF(cbHeap);
3941 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3942 return VERR_ACCESS_DENIED;
3943}
3944
3945
3946/** @interface_method_impl{PDMDEVHLPR3,pfnFirmwareRegister} */
3947static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_FirmwareRegister(PPDMDEVINS pDevIns, PCPDMFWREG pFwReg, PCPDMFWHLPR3 *ppFwHlp)
3948{
3949 PDMDEV_ASSERT_DEVINS(pDevIns);
3950 NOREF(pFwReg); NOREF(ppFwHlp);
3951 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3952 return VERR_ACCESS_DENIED;
3953}
3954
3955
3956/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3957static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns, uint32_t fFlags)
3958{
3959 PDMDEV_ASSERT_DEVINS(pDevIns); NOREF(fFlags);
3960 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3961 return VERR_ACCESS_DENIED;
3962}
3963
3964
3965/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3966static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3967{
3968 PDMDEV_ASSERT_DEVINS(pDevIns);
3969 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3970 return VERR_ACCESS_DENIED;
3971}
3972
3973
3974/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3975static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3976{
3977 PDMDEV_ASSERT_DEVINS(pDevIns);
3978 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3979 return VERR_ACCESS_DENIED;
3980}
3981
3982
3983/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3984static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3985{
3986 PDMDEV_ASSERT_DEVINS(pDevIns);
3987 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3988 return VERR_ACCESS_DENIED;
3989}
3990
3991
3992/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3993static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3994{
3995 PDMDEV_ASSERT_DEVINS(pDevIns);
3996 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3997 return false;
3998}
3999
4000
4001/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
4002static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
4003{
4004 PDMDEV_ASSERT_DEVINS(pDevIns);
4005 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
4006 NOREF(fEnable);
4007}
4008
4009
4010/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
4011static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
4012 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4013{
4014 PDMDEV_ASSERT_DEVINS(pDevIns);
4015 NOREF(iLeaf); NOREF(pEax); NOREF(pEbx); NOREF(pEcx); NOREF(pEdx);
4016 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
4017}
4018
4019
4020/** @interface_method_impl{PDMDEVHLPR3,pfnGetSupDrvSession} */
4021static DECLCALLBACK(PSUPDRVSESSION) pdmR3DevHlp_Untrusted_GetSupDrvSession(PPDMDEVINS pDevIns)
4022{
4023 PDMDEV_ASSERT_DEVINS(pDevIns);
4024 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
4025 return (PSUPDRVSESSION)0;
4026}
4027
4028
4029/** @interface_method_impl{PDMDEVHLPR3,pfnQueryGenericUserObject} */
4030static DECLCALLBACK(void *) pdmR3DevHlp_Untrusted_QueryGenericUserObject(PPDMDEVINS pDevIns, PCRTUUID pUuid)
4031{
4032 PDMDEV_ASSERT_DEVINS(pDevIns);
4033 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d %RTuuid\n",
4034 pDevIns->pReg->szName, pDevIns->iInstance, pUuid));
4035 return NULL;
4036}
4037
4038
4039/**
4040 * The device helper structure for non-trusted devices.
4041 */
4042const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
4043{
4044 PDM_DEVHLPR3_VERSION,
4045 pdmR3DevHlp_IOPortRegister,
4046 pdmR3DevHlp_IOPortRegisterRC,
4047 pdmR3DevHlp_IOPortRegisterR0,
4048 pdmR3DevHlp_IOPortDeregister,
4049 pdmR3DevHlp_MMIORegister,
4050 pdmR3DevHlp_MMIORegisterRC,
4051 pdmR3DevHlp_MMIORegisterR0,
4052 pdmR3DevHlp_MMIODeregister,
4053 pdmR3DevHlp_MMIO2Register,
4054 pdmR3DevHlp_MMIOExPreRegister,
4055 pdmR3DevHlp_MMIOExDeregister,
4056 pdmR3DevHlp_MMIOExMap,
4057 pdmR3DevHlp_MMIOExUnmap,
4058 pdmR3DevHlp_MMIOExReduce,
4059 pdmR3DevHlp_MMHyperMapMMIO2,
4060 pdmR3DevHlp_MMIO2MapKernel,
4061 pdmR3DevHlp_ROMRegister,
4062 pdmR3DevHlp_ROMProtectShadow,
4063 pdmR3DevHlp_SSMRegister,
4064 pdmR3DevHlp_TMTimerCreate,
4065 pdmR3DevHlp_TMUtcNow,
4066 pdmR3DevHlp_PhysRead,
4067 pdmR3DevHlp_PhysWrite,
4068 pdmR3DevHlp_PhysGCPhys2CCPtr,
4069 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
4070 pdmR3DevHlp_PhysReleasePageMappingLock,
4071 pdmR3DevHlp_PhysReadGCVirt,
4072 pdmR3DevHlp_PhysWriteGCVirt,
4073 pdmR3DevHlp_PhysGCPtr2GCPhys,
4074 pdmR3DevHlp_MMHeapAlloc,
4075 pdmR3DevHlp_MMHeapAllocZ,
4076 pdmR3DevHlp_MMHeapFree,
4077 pdmR3DevHlp_VMState,
4078 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
4079 pdmR3DevHlp_VMSetError,
4080 pdmR3DevHlp_VMSetErrorV,
4081 pdmR3DevHlp_VMSetRuntimeError,
4082 pdmR3DevHlp_VMSetRuntimeErrorV,
4083 pdmR3DevHlp_DBGFStopV,
4084 pdmR3DevHlp_DBGFInfoRegister,
4085 pdmR3DevHlp_DBGFInfoRegisterArgv,
4086 pdmR3DevHlp_DBGFRegRegister,
4087 pdmR3DevHlp_DBGFTraceBuf,
4088 pdmR3DevHlp_STAMRegister,
4089 pdmR3DevHlp_STAMRegisterF,
4090 pdmR3DevHlp_STAMRegisterV,
4091 pdmR3DevHlp_PCIRegister,
4092 pdmR3DevHlp_PCIRegisterMsi,
4093 pdmR3DevHlp_PCIIORegionRegister,
4094 pdmR3DevHlp_PCISetConfigCallbacks,
4095 pdmR3DevHlp_PCIPhysRead,
4096 pdmR3DevHlp_PCIPhysWrite,
4097 pdmR3DevHlp_PCISetIrq,
4098 pdmR3DevHlp_PCISetIrqNoWait,
4099 pdmR3DevHlp_ISASetIrq,
4100 pdmR3DevHlp_ISASetIrqNoWait,
4101 pdmR3DevHlp_IoApicSendMsi,
4102 pdmR3DevHlp_DriverAttach,
4103 pdmR3DevHlp_DriverDetach,
4104 pdmR3DevHlp_QueueCreate,
4105 pdmR3DevHlp_CritSectInit,
4106 pdmR3DevHlp_CritSectGetNop,
4107 pdmR3DevHlp_CritSectGetNopR0,
4108 pdmR3DevHlp_CritSectGetNopRC,
4109 pdmR3DevHlp_SetDeviceCritSect,
4110 pdmR3DevHlp_ThreadCreate,
4111 pdmR3DevHlp_SetAsyncNotification,
4112 pdmR3DevHlp_AsyncNotificationCompleted,
4113 pdmR3DevHlp_RTCRegister,
4114 pdmR3DevHlp_PCIBusRegister,
4115 pdmR3DevHlp_PICRegister,
4116 pdmR3DevHlp_APICRegister,
4117 pdmR3DevHlp_IOAPICRegister,
4118 pdmR3DevHlp_HPETRegister,
4119 pdmR3DevHlp_PciRawRegister,
4120 pdmR3DevHlp_DMACRegister,
4121 pdmR3DevHlp_DMARegister,
4122 pdmR3DevHlp_DMAReadMemory,
4123 pdmR3DevHlp_DMAWriteMemory,
4124 pdmR3DevHlp_DMASetDREQ,
4125 pdmR3DevHlp_DMAGetChannelMode,
4126 pdmR3DevHlp_DMASchedule,
4127 pdmR3DevHlp_CMOSWrite,
4128 pdmR3DevHlp_CMOSRead,
4129 pdmR3DevHlp_AssertEMT,
4130 pdmR3DevHlp_AssertOther,
4131 pdmR3DevHlp_LdrGetRCInterfaceSymbols,
4132 pdmR3DevHlp_LdrGetR0InterfaceSymbols,
4133 pdmR3DevHlp_CallR0,
4134 pdmR3DevHlp_VMGetSuspendReason,
4135 pdmR3DevHlp_VMGetResumeReason,
4136 pdmR3DevHlp_PhysBulkGCPhys2CCPtr,
4137 pdmR3DevHlp_PhysBulkGCPhys2CCPtrReadOnly,
4138 pdmR3DevHlp_PhysBulkReleasePageMappingLocks,
4139 pdmR3DevHlp_MMIOExChangeRegionNo,
4140 0,
4141 0,
4142 0,
4143 0,
4144 0,
4145 0,
4146 0,
4147 0,
4148 0,
4149 0,
4150 pdmR3DevHlp_Untrusted_GetUVM,
4151 pdmR3DevHlp_Untrusted_GetVM,
4152 pdmR3DevHlp_Untrusted_GetVMCPU,
4153 pdmR3DevHlp_Untrusted_GetCurrentCpuId,
4154 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
4155 pdmR3DevHlp_Untrusted_FirmwareRegister,
4156 pdmR3DevHlp_Untrusted_VMReset,
4157 pdmR3DevHlp_Untrusted_VMSuspend,
4158 pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
4159 pdmR3DevHlp_Untrusted_VMPowerOff,
4160 pdmR3DevHlp_Untrusted_A20IsEnabled,
4161 pdmR3DevHlp_Untrusted_A20Set,
4162 pdmR3DevHlp_Untrusted_GetCpuId,
4163 pdmR3DevHlp_TMTimeVirtGet,
4164 pdmR3DevHlp_TMTimeVirtGetFreq,
4165 pdmR3DevHlp_TMTimeVirtGetNano,
4166 pdmR3DevHlp_Untrusted_GetSupDrvSession,
4167 pdmR3DevHlp_Untrusted_QueryGenericUserObject,
4168 PDM_DEVHLPR3_VERSION /* the end */
4169};
4170
4171
4172
4173/**
4174 * Queue consumer callback for internal component.
4175 *
4176 * @returns Success indicator.
4177 * If false the item will not be removed and the flushing will stop.
4178 * @param pVM The cross context VM structure.
4179 * @param pItem The item to consume. Upon return this item will be freed.
4180 */
4181DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
4182{
4183 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
4184 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
4185 switch (pTask->enmOp)
4186 {
4187 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
4188 PDMIsaSetIrq(pVM, pTask->u.IsaSetIRQ.iIrq, pTask->u.IsaSetIRQ.iLevel, pTask->u.IsaSetIRQ.uTagSrc);
4189 break;
4190
4191 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
4192 {
4193 /* Same as pdmR3DevHlp_PCISetIrq, except we've got a tag already. */
4194 PPDMPCIDEV pPciDev = pTask->u.PciSetIRQ.pPciDevR3;
4195 if (pPciDev)
4196 {
4197 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3;
4198 Assert(pBus);
4199
4200 pdmLock(pVM);
4201 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, pTask->u.PciSetIRQ.iIrq,
4202 pTask->u.PciSetIRQ.iLevel, pTask->u.PciSetIRQ.uTagSrc);
4203 pdmUnlock(pVM);
4204 }
4205 else
4206 AssertReleaseMsgFailed(("No PCI device registered!\n"));
4207 break;
4208 }
4209
4210 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
4211 PDMIoApicSetIrq(pVM, pTask->u.IoApicSetIRQ.iIrq, pTask->u.IoApicSetIRQ.iLevel, pTask->u.IoApicSetIRQ.uTagSrc);
4212 break;
4213
4214 default:
4215 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
4216 break;
4217 }
4218 return true;
4219}
4220
4221/** @} */
4222
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