[70918] | 1 | /* $Id: NEMR3.cpp 99370 2023-04-11 00:32:33Z vboxsync $ */
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| 2 | /** @file
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| 3 | * NEM - Native execution manager.
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| 4 | */
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| 5 |
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| 6 | /*
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[98103] | 7 | * Copyright (C) 2018-2023 Oracle and/or its affiliates.
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[70918] | 8 | *
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[96407] | 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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[70918] | 26 | */
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| 27 |
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| 28 | /** @page pg_nem NEM - Native Execution Manager.
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| 29 | *
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[71283] | 30 | * This is an alternative execution manage to HM and raw-mode. On one host
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| 31 | * (Windows) we're forced to use this, on the others we just do it because we
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| 32 | * can. Since this is host specific in nature, information about an
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| 33 | * implementation is contained in the NEMR3Native-xxxx.cpp files.
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[70918] | 34 | *
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[71284] | 35 | * @ref pg_nem_win
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[70918] | 36 | */
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| 37 |
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| 38 |
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| 39 | /*********************************************************************************************************************************
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| 40 | * Header Files *
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| 41 | *********************************************************************************************************************************/
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| 42 | #define LOG_GROUP LOG_GROUP_NEM
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[93787] | 43 | #include <VBox/vmm/dbgf.h>
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[70918] | 44 | #include <VBox/vmm/nem.h>
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[72470] | 45 | #include <VBox/vmm/gim.h>
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[70918] | 46 | #include "NEMInternal.h"
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| 47 | #include <VBox/vmm/vm.h>
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[72267] | 48 | #include <VBox/vmm/uvm.h>
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[76397] | 49 | #include <VBox/err.h>
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[70918] | 50 |
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[70948] | 51 | #include <iprt/asm.h>
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[99370] | 52 | #include <iprt/string.h>
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[70918] | 53 |
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| 54 |
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[70948] | 55 |
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[70918] | 56 | /**
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| 57 | * Basic init and configuration reading.
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| 58 | *
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| 59 | * Always call NEMR3Term after calling this.
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| 60 | *
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| 61 | * @returns VBox status code.
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[70945] | 62 | * @param pVM The cross context VM structure.
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[70918] | 63 | */
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| 64 | VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
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| 65 | {
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| 66 | LogFlow(("NEMR3Init\n"));
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| 67 |
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| 68 | /*
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| 69 | * Assert alignment and sizes.
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| 70 | */
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| 71 | AssertCompileMemberAlignment(VM, nem.s, 64);
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| 72 | AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
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| 73 |
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| 74 | /*
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| 75 | * Initialize state info so NEMR3Term will always be happy.
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| 76 | * No returning prior to setting magics!
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| 77 | */
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| 78 | pVM->nem.s.u32Magic = NEM_MAGIC;
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[80191] | 79 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 80 | {
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| 81 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 82 | pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
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| 83 | }
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[70918] | 84 |
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| 85 | /*
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| 86 | * Read configuration.
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| 87 | */
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| 88 | PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
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| 89 |
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| 90 | /*
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| 91 | * Validate the NEM settings.
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| 92 | */
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| 93 | int rc = CFGMR3ValidateConfig(pCfgNem,
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| 94 | "/NEM/",
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[72343] | 95 | "Enabled"
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[72924] | 96 | "|Allow64BitGuests"
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[86115] | 97 | "|LovelyMesaDrvWorkaround"
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[72924] | 98 | #ifdef RT_OS_WINDOWS
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| 99 | "|UseRing0Runloop"
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[93722] | 100 | #elif defined(RT_OS_DARWIN)
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| 101 | "|VmxPleGap"
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| 102 | "|VmxPleWindow"
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| 103 | "|VmxLbr"
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[72924] | 104 | #endif
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| 105 | ,
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[70918] | 106 | "" /* pszValidNodes */, "NEM" /* pszWho */, 0 /* uInstance */);
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| 107 | if (RT_FAILURE(rc))
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| 108 | return rc;
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| 109 |
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| 110 | /** @cfgm{/NEM/NEMEnabled, bool, true}
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| 111 | * Whether NEM is enabled. */
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| 112 | rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
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| 113 | AssertLogRelRCReturn(rc, rc);
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| 114 |
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[72343] | 115 |
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| 116 | #ifdef VBOX_WITH_64_BITS_GUESTS
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[72924] | 117 | /** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
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[72343] | 118 | * Enables AMD64 CPU features.
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| 119 | * On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
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| 120 | * already have the support. */
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| 121 | rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
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| 122 | AssertLogRelRCReturn(rc, rc);
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| 123 | #else
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| 124 | pVM->nem.s.fAllow64BitGuests = false;
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| 125 | #endif
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| 126 |
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[86117] | 127 | /** @cfgm{/NEM/LovelyMesaDrvWorkaround, bool, false}
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[86115] | 128 | * Workaround for mesa vmsvga 3d driver making incorrect assumptions about
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| 129 | * the hypervisor it is running under. */
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| 130 | bool f;
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| 131 | rc = CFGMR3QueryBoolDef(pCfgNem, "LovelyMesaDrvWorkaround", &f, false);
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| 132 | AssertLogRelRCReturn(rc, rc);
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| 133 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 134 | {
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| 135 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 136 | pVCpu->nem.s.fTrapXcptGpForLovelyMesaDrv = f;
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| 137 | }
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| 138 |
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[70918] | 139 | return VINF_SUCCESS;
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| 140 | }
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| 141 |
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| 142 |
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| 143 | /**
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| 144 | * This is called by HMR3Init() when HM cannot be used.
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| 145 | *
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[70948] | 146 | * Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
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| 147 | * native hypervisor API to execute the VM.
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[70918] | 148 | *
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| 149 | * @returns VBox status code.
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[70945] | 150 | * @param pVM The cross context VM structure.
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[70918] | 151 | * @param fFallback Whether this is a fallback call. Cleared if the VM is
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| 152 | * configured to use NEM instead of HM.
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| 153 | * @param fForced Whether /HM/HMForced was set. If set and we fail to
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| 154 | * enable NEM, we'll return a failure status code.
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| 155 | * Otherwise we'll assume HMR3Init falls back on raw-mode.
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| 156 | */
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| 157 | VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
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| 158 | {
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[70948] | 159 | Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
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[70918] | 160 | int rc;
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| 161 | if (pVM->nem.s.fEnabled)
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| 162 | {
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| 163 | #ifdef VBOX_WITH_NATIVE_NEM
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| 164 | rc = nemR3NativeInit(pVM, fFallback, fForced);
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[70948] | 165 | ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
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[70918] | 166 | #else
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| 167 | RT_NOREF(fFallback);
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| 168 | rc = VINF_SUCCESS;
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| 169 | #endif
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| 170 | if (RT_SUCCESS(rc))
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| 171 | {
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[70948] | 172 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[92225] | 173 | {
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| 174 | #ifdef RT_OS_WINDOWS /* The WHv* API is extremely slow at handling VM exits. The AppleHv and
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| 175 | KVM APIs are much faster, thus the different mode name. :-) */
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| 176 | LogRel(("NEM:\n"
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| 177 | "NEM: NEMR3Init: Snail execution mode is active!\n"
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| 178 | "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
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| 179 | "NEM: To see VirtualBox run at max speed you need to disable all Windows features\n"
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| 180 | "NEM: making use of Hyper-V. That is a moving target, so google how and carefully\n"
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| 181 | "NEM: consider the consequences of disabling these features.\n"
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| 182 | "NEM:\n"));
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| 183 | #else
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| 184 | LogRel(("NEM:\n"
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| 185 | "NEM: NEMR3Init: Turtle execution mode is active!\n"
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| 186 | "NEM: Note! VirtualBox is not able to run at its full potential in this execution mode.\n"
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| 187 | "NEM:\n"));
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| 188 | #endif
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| 189 | }
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[70918] | 190 | else
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| 191 | {
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| 192 | LogRel(("NEM: NEMR3Init: Not available.\n"));
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| 193 | if (fForced)
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| 194 | rc = VERR_NEM_NOT_AVAILABLE;
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| 195 | }
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| 196 | }
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| 197 | else
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| 198 | LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
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| 199 | }
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| 200 | else
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| 201 | {
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| 202 | LogRel(("NEM: NEMR3Init: Disabled.\n"));
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| 203 | rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
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| 204 | }
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| 205 | return rc;
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| 206 | }
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| 207 |
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| 208 |
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| 209 | /**
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[70945] | 210 | * Perform initialization that depends on CPUM working.
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| 211 | *
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| 212 | * This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
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| 213 | *
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| 214 | * @returns VBox status code.
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| 215 | * @param pVM The cross context VM structure.
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| 216 | */
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| 217 | VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
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| 218 | {
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| 219 | int rc = VINF_SUCCESS;
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[72343] | 220 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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| 221 | {
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| 222 | /*
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| 223 | * Do native after-CPUM init.
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| 224 | */
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[70945] | 225 | #ifdef VBOX_WITH_NATIVE_NEM
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| 226 | rc = nemR3NativeInitAfterCPUM(pVM);
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[70946] | 227 | #else
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[72343] | 228 | RT_NOREF(pVM);
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[70945] | 229 | #endif
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[72343] | 230 | }
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[70945] | 231 | return rc;
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| 232 | }
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| 233 |
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| 234 |
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| 235 | /**
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[70918] | 236 | * Called when a init phase has completed.
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| 237 | *
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| 238 | * @returns VBox status code.
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[70945] | 239 | * @param pVM The cross context VM structure.
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| 240 | * @param enmWhat The phase that completed.
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[70918] | 241 | */
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| 242 | VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
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| 243 | {
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[72470] | 244 | /*
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| 245 | * Check if GIM needs #UD, since that applies to everyone.
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| 246 | */
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| 247 | if (enmWhat == VMINITCOMPLETED_RING3)
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[80191] | 248 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 249 | {
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| 250 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 251 | pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
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| 252 | }
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[72470] | 253 |
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| 254 | /*
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| 255 | * Call native code.
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| 256 | */
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[70918] | 257 | int rc = VINF_SUCCESS;
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| 258 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 259 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 260 | rc = nemR3NativeInitCompleted(pVM, enmWhat);
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| 261 | #else
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| 262 | RT_NOREF(pVM, enmWhat);
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| 263 | #endif
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| 264 | return rc;
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| 265 | }
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| 266 |
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| 267 |
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| 268 | /**
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| 269 | *
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| 270 | * @returns VBox status code.
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[70945] | 271 | * @param pVM The cross context VM structure.
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[70918] | 272 | */
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| 273 | VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
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| 274 | {
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| 275 | AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
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[80191] | 276 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 277 | AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
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[70918] | 278 |
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| 279 | /* Do native termination. */
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| 280 | int rc = VINF_SUCCESS;
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| 281 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 282 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 283 | rc = nemR3NativeTerm(pVM);
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| 284 | #endif
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| 285 |
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| 286 | /* Mark it as terminated. */
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[80191] | 287 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 288 | {
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| 289 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 290 | pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
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| 291 | }
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[70918] | 292 | pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
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| 293 | return rc;
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| 294 | }
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| 295 |
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[72267] | 296 | /**
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| 297 | * External interface for querying whether native execution API is used.
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| 298 | *
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| 299 | * @returns true if NEM is being used, otherwise false.
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| 300 | * @param pUVM The user mode VM handle.
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| 301 | * @sa HMR3IsEnabled
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| 302 | */
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| 303 | VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
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| 304 | {
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| 305 | UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
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| 306 | PVM pVM = pUVM->pVM;
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| 307 | VM_ASSERT_VALID_EXT_RETURN(pVM, false);
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| 308 | return VM_IS_NEM_ENABLED(pVM);
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| 309 | }
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[70918] | 310 |
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[72267] | 311 |
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[70918] | 312 | /**
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| 313 | * The VM is being reset.
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| 314 | *
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| 315 | * @param pVM The cross context VM structure.
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| 316 | */
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| 317 | VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
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| 318 | {
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| 319 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 320 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 321 | nemR3NativeReset(pVM);
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| 322 | #else
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| 323 | RT_NOREF(pVM);
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| 324 | #endif
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| 325 | }
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| 326 |
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| 327 |
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| 328 | /**
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| 329 | * Resets a virtual CPU.
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| 330 | *
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| 331 | * Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
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| 332 | *
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[71040] | 333 | * @param pVCpu The cross context virtual CPU structure to reset.
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| 334 | * @param fInitIpi Set if being reset due to INIT IPI.
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[70918] | 335 | */
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[71040] | 336 | VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
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[70918] | 337 | {
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| 338 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 339 | if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[71040] | 340 | nemR3NativeResetCpu(pVCpu, fInitIpi);
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[70918] | 341 | #else
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[71040] | 342 | RT_NOREF(pVCpu, fInitIpi);
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[70918] | 343 | #endif
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| 344 | }
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| 345 |
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[70954] | 346 |
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[72526] | 347 | /**
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| 348 | * Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
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| 349 | *
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| 350 | * @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
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| 351 | * @param pVM The cross context VM structure.
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| 352 | */
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| 353 | VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
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| 354 | {
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| 355 | #ifdef VBOX_WITH_NATIVE_NEM
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| 356 | if (VM_IS_NEM_ENABLED(pVM))
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| 357 | return true;
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| 358 | #else
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| 359 | RT_NOREF(pVM);
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| 360 | #endif
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| 361 | return false;
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| 362 | }
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| 363 |
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| 364 |
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[72555] | 365 | /**
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| 366 | * Gets the name of a generic NEM exit code.
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| 367 | *
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| 368 | * @returns Pointer to read only string if @a uExit is known, otherwise NULL.
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| 369 | * @param uExit The NEM exit to name.
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| 370 | */
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| 371 | VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
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| 372 | {
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| 373 | switch ((NEMEXITTYPE)uExit)
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| 374 | {
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[92525] | 375 | case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
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| 376 | case NEMEXITTYPE_HALT: return "NEM halt";
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| 377 |
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[72555] | 378 | case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
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| 379 | case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
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| 380 | case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
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| 381 | case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
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| 382 | case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
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| 383 | case NEMEXITTYPE_CANCELED: return "NEM canceled";
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[72575] | 384 | case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
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[92525] | 385 |
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| 386 | case NEMEXITTYPE_INTERNAL_ERROR_EMULATION: return "NEM emulation IPE";
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| 387 | case NEMEXITTYPE_INTERNAL_ERROR_FATAL: return "NEM fatal IPE";
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| 388 | case NEMEXITTYPE_INTERRUPTED: return "NEM interrupted";
|
---|
| 389 | case NEMEXITTYPE_FAILED_ENTRY: return "NEM failed VT-x/AMD-V entry";
|
---|
| 390 |
|
---|
| 391 | case NEMEXITTYPE_INVALID:
|
---|
| 392 | case NEMEXITTYPE_END:
|
---|
| 393 | break;
|
---|
[72555] | 394 | }
|
---|
[72526] | 395 |
|
---|
[72555] | 396 | return NULL;
|
---|
| 397 | }
|
---|
| 398 |
|
---|
| 399 |
|
---|
[70979] | 400 | VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
|
---|
| 401 | {
|
---|
| 402 | Assert(VM_IS_NEM_ENABLED(pVM));
|
---|
[70980] | 403 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
[70979] | 404 | return nemR3NativeRunGC(pVM, pVCpu);
|
---|
[70980] | 405 | #else
|
---|
| 406 | NOREF(pVM); NOREF(pVCpu);
|
---|
| 407 | return VERR_INTERNAL_ERROR_3;
|
---|
| 408 | #endif
|
---|
[70979] | 409 | }
|
---|
| 410 |
|
---|
| 411 |
|
---|
[92120] | 412 | #ifndef VBOX_WITH_NATIVE_NEM
|
---|
[72634] | 413 | VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
|
---|
[70979] | 414 | {
|
---|
[92120] | 415 | RT_NOREF(pVM, pVCpu);
|
---|
[70980] | 416 | return false;
|
---|
[92120] | 417 | }
|
---|
[70980] | 418 | #endif
|
---|
[70979] | 419 |
|
---|
| 420 |
|
---|
| 421 | VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
|
---|
| 422 | {
|
---|
| 423 | Assert(VM_IS_NEM_ENABLED(pVM));
|
---|
[70980] | 424 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
[70979] | 425 | return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
|
---|
[70980] | 426 | #else
|
---|
| 427 | NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
|
---|
| 428 | return false;
|
---|
| 429 | #endif
|
---|
[70979] | 430 | }
|
---|
| 431 |
|
---|
| 432 |
|
---|
[71040] | 433 | VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
|
---|
| 434 | {
|
---|
| 435 | AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
|
---|
| 436 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 437 | nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
|
---|
| 438 | #else
|
---|
| 439 | RT_NOREF(pVM, pVCpu, fFlags);
|
---|
| 440 | #endif
|
---|
| 441 | }
|
---|
[70979] | 442 |
|
---|
[93905] | 443 | #ifndef VBOX_WITH_NATIVE_NEM
|
---|
[71040] | 444 |
|
---|
[70954] | 445 | VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
|
---|
| 446 | {
|
---|
[92120] | 447 | RT_NOREF(pVCpu, fEnabled);
|
---|
| 448 | }
|
---|
[70954] | 449 |
|
---|
[93905] | 450 | # ifdef VBOX_WITH_PGM_NEM_MODE
|
---|
[93787] | 451 |
|
---|
[93905] | 452 | VMMR3_INT_DECL(bool) NEMR3IsMmio2DirtyPageTrackingSupported(PVM pVM)
|
---|
| 453 | {
|
---|
| 454 | RT_NOREF(pVM);
|
---|
| 455 | return false;
|
---|
| 456 | }
|
---|
| 457 |
|
---|
| 458 |
|
---|
| 459 | VMMR3_INT_DECL(int) NEMR3PhysMmio2QueryAndResetDirtyBitmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t uNemRange,
|
---|
| 460 | void *pvBitmap, size_t cbBitmap)
|
---|
| 461 | {
|
---|
| 462 | RT_NOREF(pVM, GCPhys, cb, uNemRange, pvBitmap, cbBitmap);
|
---|
| 463 | AssertFailed();
|
---|
| 464 | return VERR_INTERNAL_ERROR_2;
|
---|
| 465 | }
|
---|
| 466 |
|
---|
| 467 |
|
---|
| 468 | VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMapEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags,
|
---|
| 469 | void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange)
|
---|
| 470 | {
|
---|
| 471 | RT_NOREF(pVM, GCPhys, cb, fFlags, pvRam, pvMmio2, pu2State, puNemRange);
|
---|
| 472 | AssertFailed();
|
---|
| 473 | return VERR_INTERNAL_ERROR_2;
|
---|
| 474 | }
|
---|
| 475 |
|
---|
| 476 | # endif /* VBOX_WITH_PGM_NEM_MODE */
|
---|
| 477 | #endif /* !VBOX_WITH_NATIVE_NEM */
|
---|
| 478 |
|
---|
[93787] | 479 | /**
|
---|
| 480 | * Notification callback from DBGF when interrupt breakpoints or generic debug
|
---|
| 481 | * event settings changes.
|
---|
| 482 | *
|
---|
| 483 | * DBGF will call NEMR3NotifyDebugEventChangedPerCpu on each CPU afterwards, this
|
---|
| 484 | * function is just updating the VM globals.
|
---|
| 485 | *
|
---|
| 486 | * @param pVM The VM cross context VM structure.
|
---|
| 487 | * @thread EMT(0)
|
---|
| 488 | */
|
---|
| 489 | VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChanged(PVM pVM)
|
---|
| 490 | {
|
---|
| 491 | AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
|
---|
| 492 |
|
---|
[93788] | 493 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
[93787] | 494 | /* Interrupts. */
|
---|
| 495 | bool fUseDebugLoop = pVM->dbgf.ro.cSoftIntBreakpoints > 0
|
---|
| 496 | || pVM->dbgf.ro.cHardIntBreakpoints > 0;
|
---|
| 497 |
|
---|
| 498 | /* CPU Exceptions. */
|
---|
| 499 | for (DBGFEVENTTYPE enmEvent = DBGFEVENT_XCPT_FIRST;
|
---|
| 500 | !fUseDebugLoop && enmEvent <= DBGFEVENT_XCPT_LAST;
|
---|
| 501 | enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
|
---|
| 502 | fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
|
---|
| 503 |
|
---|
| 504 | /* Common VM exits. */
|
---|
| 505 | for (DBGFEVENTTYPE enmEvent = DBGFEVENT_EXIT_FIRST;
|
---|
| 506 | !fUseDebugLoop && enmEvent <= DBGFEVENT_EXIT_LAST_COMMON;
|
---|
| 507 | enmEvent = (DBGFEVENTTYPE)(enmEvent + 1))
|
---|
| 508 | fUseDebugLoop = DBGF_IS_EVENT_ENABLED(pVM, enmEvent);
|
---|
| 509 |
|
---|
| 510 | /* Done. */
|
---|
| 511 | pVM->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChanged(pVM, fUseDebugLoop);
|
---|
[93788] | 512 | #else
|
---|
| 513 | RT_NOREF(pVM);
|
---|
| 514 | #endif
|
---|
[93787] | 515 | }
|
---|
| 516 |
|
---|
| 517 |
|
---|
| 518 | /**
|
---|
| 519 | * Follow up notification callback to NEMR3NotifyDebugEventChanged for each CPU.
|
---|
| 520 | *
|
---|
| 521 | * NEM uses this to combine the decision made NEMR3NotifyDebugEventChanged with
|
---|
| 522 | * per CPU settings.
|
---|
| 523 | *
|
---|
| 524 | * @param pVM The VM cross context VM structure.
|
---|
| 525 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
|
---|
| 526 | */
|
---|
| 527 | VMMR3_INT_DECL(void) NEMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu)
|
---|
| 528 | {
|
---|
| 529 | AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
|
---|
| 530 |
|
---|
[93788] | 531 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
[93787] | 532 | pVCpu->nem.s.fUseDebugLoop = nemR3NativeNotifyDebugEventChangedPerCpu(pVM, pVCpu,
|
---|
| 533 | pVCpu->nem.s.fSingleInstruction | pVM->nem.s.fUseDebugLoop);
|
---|
[93788] | 534 | #else
|
---|
| 535 | RT_NOREF(pVM, pVCpu);
|
---|
| 536 | #endif
|
---|
[93787] | 537 | }
|
---|
[99370] | 538 |
|
---|
| 539 |
|
---|
| 540 | /**
|
---|
| 541 | * Disables a CPU ISA extension, like MONITOR/MWAIT.
|
---|
| 542 | *
|
---|
| 543 | * @returns VBox status code
|
---|
| 544 | * @param pVM The cross context VM structure.
|
---|
| 545 | * @param pszIsaExt The ISA extension name in the config tree.
|
---|
| 546 | */
|
---|
| 547 | int nemR3DisableCpuIsaExt(PVM pVM, const char *pszIsaExt)
|
---|
| 548 | {
|
---|
| 549 | /*
|
---|
| 550 | * Get IsaExts config node under CPUM.
|
---|
| 551 | */
|
---|
| 552 | PCFGMNODE pIsaExts = CFGMR3GetChild(CFGMR3GetRoot(pVM), "/CPUM/IsaExts");
|
---|
| 553 | if (!pIsaExts)
|
---|
| 554 | {
|
---|
| 555 | int rc = CFGMR3InsertNode(CFGMR3GetRoot(pVM), "/CPUM/IsaExts", &pIsaExts);
|
---|
| 556 | AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertNode: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
|
---|
| 557 | }
|
---|
| 558 |
|
---|
| 559 | /*
|
---|
| 560 | * Look for a value by the given name (pszIsaExt).
|
---|
| 561 | */
|
---|
| 562 | /* Integer values 1 (CPUMISAEXTCFG_ENABLED_SUPPORTED) and 9 (CPUMISAEXTCFG_ENABLED_PORTABLE) will be replaced. */
|
---|
| 563 | uint64_t u64Value;
|
---|
| 564 | int rc = CFGMR3QueryInteger(pIsaExts, pszIsaExt, &u64Value);
|
---|
| 565 | if (RT_SUCCESS(rc))
|
---|
| 566 | {
|
---|
| 567 | if (u64Value != 1 && u64Value != 9)
|
---|
| 568 | {
|
---|
| 569 | LogRel(("NEM: Not disabling IsaExt '%s', already configured with int value %lld\n", pszIsaExt, u64Value));
|
---|
| 570 | return VINF_SUCCESS;
|
---|
| 571 | }
|
---|
| 572 | CFGMR3RemoveValue(pIsaExts, pszIsaExt);
|
---|
| 573 | }
|
---|
| 574 | /* String value 'default', 'enabled' and 'portable' will be replaced. */
|
---|
| 575 | else if (rc == VERR_CFGM_NOT_INTEGER)
|
---|
| 576 | {
|
---|
| 577 | char szValue[32];
|
---|
| 578 | rc = CFGMR3QueryString(pIsaExts, pszIsaExt, szValue, sizeof(szValue));
|
---|
| 579 | AssertRCReturn(rc, VINF_SUCCESS);
|
---|
| 580 |
|
---|
| 581 | if ( RTStrICmpAscii(szValue, "default") != 0
|
---|
| 582 | && RTStrICmpAscii(szValue, "def") != 0
|
---|
| 583 | && RTStrICmpAscii(szValue, "enabled") != 0
|
---|
| 584 | && RTStrICmpAscii(szValue, "enable") != 0
|
---|
| 585 | && RTStrICmpAscii(szValue, "on") != 0
|
---|
| 586 | && RTStrICmpAscii(szValue, "yes") != 0
|
---|
| 587 | && RTStrICmpAscii(szValue, "portable") != 0)
|
---|
| 588 | {
|
---|
| 589 | LogRel(("NEM: Not disabling IsaExt '%s', already configured with string value '%s'\n", pszIsaExt, szValue));
|
---|
| 590 | return VINF_SUCCESS;
|
---|
| 591 | }
|
---|
| 592 | CFGMR3RemoveValue(pIsaExts, pszIsaExt);
|
---|
| 593 | }
|
---|
| 594 | else
|
---|
| 595 | AssertLogRelMsgReturn(rc == VERR_CFGM_VALUE_NOT_FOUND, ("CFGMR3QueryInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt),
|
---|
| 596 | VERR_NEM_IPE_8);
|
---|
| 597 |
|
---|
| 598 | /*
|
---|
| 599 | * Insert the disabling value.
|
---|
| 600 | */
|
---|
| 601 | rc = CFGMR3InsertInteger(pIsaExts, pszIsaExt, 0 /* disabled */);
|
---|
| 602 | AssertLogRelMsgReturn(RT_SUCCESS(rc), ("CFGMR3InsertInteger: rc=%Rrc pszIsaExt=%s\n", rc, pszIsaExt), rc);
|
---|
| 603 |
|
---|
| 604 | return VINF_SUCCESS;
|
---|
| 605 | }
|
---|
| 606 |
|
---|