[70918] | 1 | /* $Id: NEMR3.cpp 80191 2019-08-08 00:36:57Z vboxsync $ */
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| 2 | /** @file
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| 3 | * NEM - Native execution manager.
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| 4 | */
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| 5 |
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| 6 | /*
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[76553] | 7 | * Copyright (C) 2018-2019 Oracle Corporation
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[70918] | 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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| 18 | /** @page pg_nem NEM - Native Execution Manager.
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| 19 | *
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[71283] | 20 | * This is an alternative execution manage to HM and raw-mode. On one host
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| 21 | * (Windows) we're forced to use this, on the others we just do it because we
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| 22 | * can. Since this is host specific in nature, information about an
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| 23 | * implementation is contained in the NEMR3Native-xxxx.cpp files.
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[70918] | 24 | *
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[71284] | 25 | * @ref pg_nem_win
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[70918] | 26 | */
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| 27 |
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| 28 |
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| 29 | /*********************************************************************************************************************************
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| 30 | * Header Files *
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| 31 | *********************************************************************************************************************************/
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[80191] | 32 | #define VBOX_BUGREF_9217_PART_I
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[70918] | 33 | #define LOG_GROUP LOG_GROUP_NEM
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| 34 | #include <VBox/vmm/nem.h>
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[72470] | 35 | #include <VBox/vmm/gim.h>
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[70918] | 36 | #include "NEMInternal.h"
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| 37 | #include <VBox/vmm/vm.h>
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[72267] | 38 | #include <VBox/vmm/uvm.h>
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[76397] | 39 | #include <VBox/err.h>
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[70918] | 40 |
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[70948] | 41 | #include <iprt/asm.h>
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[70918] | 42 |
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| 43 |
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[70948] | 44 |
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[70918] | 45 | /**
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| 46 | * Basic init and configuration reading.
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| 47 | *
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| 48 | * Always call NEMR3Term after calling this.
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| 49 | *
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| 50 | * @returns VBox status code.
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[70945] | 51 | * @param pVM The cross context VM structure.
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[70918] | 52 | */
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| 53 | VMMR3_INT_DECL(int) NEMR3InitConfig(PVM pVM)
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| 54 | {
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| 55 | LogFlow(("NEMR3Init\n"));
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| 56 |
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| 57 | /*
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| 58 | * Assert alignment and sizes.
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| 59 | */
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| 60 | AssertCompileMemberAlignment(VM, nem.s, 64);
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| 61 | AssertCompile(sizeof(pVM->nem.s) <= sizeof(pVM->nem.padding));
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| 62 |
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| 63 | /*
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| 64 | * Initialize state info so NEMR3Term will always be happy.
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| 65 | * No returning prior to setting magics!
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| 66 | */
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| 67 | pVM->nem.s.u32Magic = NEM_MAGIC;
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[80191] | 68 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 69 | {
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| 70 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 71 | pVCpu->nem.s.u32Magic = NEMCPU_MAGIC;
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| 72 | }
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[70918] | 73 |
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| 74 | /*
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| 75 | * Read configuration.
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| 76 | */
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| 77 | PCFGMNODE pCfgNem = CFGMR3GetChild(CFGMR3GetRoot(pVM), "NEM/");
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| 78 |
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| 79 | /*
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| 80 | * Validate the NEM settings.
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| 81 | */
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| 82 | int rc = CFGMR3ValidateConfig(pCfgNem,
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| 83 | "/NEM/",
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[72343] | 84 | "Enabled"
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[72924] | 85 | "|Allow64BitGuests"
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| 86 | #ifdef RT_OS_WINDOWS
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| 87 | "|UseRing0Runloop"
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| 88 | #endif
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| 89 | ,
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[70918] | 90 | "" /* pszValidNodes */, "NEM" /* pszWho */, 0 /* uInstance */);
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| 91 | if (RT_FAILURE(rc))
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| 92 | return rc;
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| 93 |
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| 94 | /** @cfgm{/NEM/NEMEnabled, bool, true}
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| 95 | * Whether NEM is enabled. */
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| 96 | rc = CFGMR3QueryBoolDef(pCfgNem, "Enabled", &pVM->nem.s.fEnabled, true);
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| 97 | AssertLogRelRCReturn(rc, rc);
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| 98 |
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[72343] | 99 |
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| 100 | #ifdef VBOX_WITH_64_BITS_GUESTS
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[72924] | 101 | /** @cfgm{/NEM/Allow64BitGuests, bool, 32-bit:false, 64-bit:true}
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[72343] | 102 | * Enables AMD64 CPU features.
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| 103 | * On 32-bit hosts this isn't default and require host CPU support. 64-bit hosts
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| 104 | * already have the support. */
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| 105 | rc = CFGMR3QueryBoolDef(pCfgNem, "Allow64BitGuests", &pVM->nem.s.fAllow64BitGuests, HC_ARCH_BITS == 64);
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| 106 | AssertLogRelRCReturn(rc, rc);
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| 107 | #else
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| 108 | pVM->nem.s.fAllow64BitGuests = false;
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| 109 | #endif
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| 110 |
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[72924] | 111 | #ifdef RT_OS_WINDOWS
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| 112 | /** @cfgm{/NEM/UseRing0Runloop, bool, true}
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| 113 | * Whether to use the ring-0 runloop (if enabled in the build) or the ring-3 one.
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| 114 | * The latter is generally slower. This option serves as a way out in case
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| 115 | * something breaks in the ring-0 loop. */
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| 116 | # ifdef NEM_WIN_USE_RING0_RUNLOOP_BY_DEFAULT
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| 117 | bool fUseRing0Runloop = true;
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| 118 | # else
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| 119 | bool fUseRing0Runloop = false;
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| 120 | # endif
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| 121 | rc = CFGMR3QueryBoolDef(pCfgNem, "UseRing0Runloop", &fUseRing0Runloop, fUseRing0Runloop);
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| 122 | AssertLogRelRCReturn(rc, rc);
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| 123 | pVM->nem.s.fUseRing0Runloop = fUseRing0Runloop;
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| 124 | #endif
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[72343] | 125 |
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[70918] | 126 | return VINF_SUCCESS;
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| 127 | }
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| 128 |
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| 129 |
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| 130 | /**
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| 131 | * This is called by HMR3Init() when HM cannot be used.
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| 132 | *
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[70948] | 133 | * Sets VM::bMainExecutionEngine to VM_EXEC_ENGINE_NATIVE_API if we can use a
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| 134 | * native hypervisor API to execute the VM.
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[70918] | 135 | *
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| 136 | * @returns VBox status code.
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[70945] | 137 | * @param pVM The cross context VM structure.
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[70918] | 138 | * @param fFallback Whether this is a fallback call. Cleared if the VM is
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| 139 | * configured to use NEM instead of HM.
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| 140 | * @param fForced Whether /HM/HMForced was set. If set and we fail to
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| 141 | * enable NEM, we'll return a failure status code.
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| 142 | * Otherwise we'll assume HMR3Init falls back on raw-mode.
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| 143 | */
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| 144 | VMMR3_INT_DECL(int) NEMR3Init(PVM pVM, bool fFallback, bool fForced)
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| 145 | {
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[70948] | 146 | Assert(pVM->bMainExecutionEngine != VM_EXEC_ENGINE_NATIVE_API);
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[70918] | 147 | int rc;
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| 148 | if (pVM->nem.s.fEnabled)
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| 149 | {
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| 150 | #ifdef VBOX_WITH_NATIVE_NEM
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| 151 | rc = nemR3NativeInit(pVM, fFallback, fForced);
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[70948] | 152 | ASMCompilerBarrier(); /* May have changed bMainExecutionEngine. */
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[70918] | 153 | #else
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| 154 | RT_NOREF(fFallback);
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| 155 | rc = VINF_SUCCESS;
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| 156 | #endif
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| 157 | if (RT_SUCCESS(rc))
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| 158 | {
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[70948] | 159 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 160 | LogRel(("NEM: NEMR3Init: Active.\n"));
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| 161 | else
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| 162 | {
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| 163 | LogRel(("NEM: NEMR3Init: Not available.\n"));
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| 164 | if (fForced)
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| 165 | rc = VERR_NEM_NOT_AVAILABLE;
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| 166 | }
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| 167 | }
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| 168 | else
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| 169 | LogRel(("NEM: NEMR3Init: Native init failed: %Rrc.\n", rc));
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| 170 | }
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| 171 | else
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| 172 | {
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| 173 | LogRel(("NEM: NEMR3Init: Disabled.\n"));
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| 174 | rc = fForced ? VERR_NEM_NOT_ENABLED : VINF_SUCCESS;
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| 175 | }
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| 176 | return rc;
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| 177 | }
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| 178 |
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| 179 |
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| 180 | /**
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[70945] | 181 | * Perform initialization that depends on CPUM working.
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| 182 | *
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| 183 | * This is a noop if NEM wasn't activated by a previous NEMR3Init() call.
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| 184 | *
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| 185 | * @returns VBox status code.
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| 186 | * @param pVM The cross context VM structure.
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| 187 | */
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| 188 | VMMR3_INT_DECL(int) NEMR3InitAfterCPUM(PVM pVM)
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| 189 | {
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| 190 | int rc = VINF_SUCCESS;
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[72343] | 191 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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| 192 | {
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| 193 | /*
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| 194 | * Enable CPU features making general ASSUMPTIONS (there are two similar
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| 195 | * blocks of code in HM.cpp), to avoid duplicating this code. The
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| 196 | * native backend can make check capabilities and adjust as needed.
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| 197 | */
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| 198 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP);
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| 199 | if (CPUMGetGuestCpuVendor(pVM) == CPUMCPUVENDOR_AMD)
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| 200 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL); /* 64 bits only on Intel CPUs */
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| 201 | if (pVM->nem.s.fAllow64BitGuests)
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| 202 | {
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| 203 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL);
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| 204 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE);
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| 205 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LONG_MODE);
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| 206 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LAHF);
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| 207 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX);
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| 208 | }
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| 209 | /* Turn on NXE if PAE has been enabled. */
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| 210 | else if (CPUMR3GetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE))
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| 211 | CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX);
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| 212 |
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| 213 | /*
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| 214 | * Do native after-CPUM init.
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| 215 | */
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[70945] | 216 | #ifdef VBOX_WITH_NATIVE_NEM
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| 217 | rc = nemR3NativeInitAfterCPUM(pVM);
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[70946] | 218 | #else
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[72343] | 219 | RT_NOREF(pVM);
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[70945] | 220 | #endif
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[72343] | 221 | }
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[70945] | 222 | return rc;
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| 223 | }
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| 224 |
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| 225 |
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| 226 | /**
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[70918] | 227 | * Called when a init phase has completed.
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| 228 | *
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| 229 | * @returns VBox status code.
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[70945] | 230 | * @param pVM The cross context VM structure.
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| 231 | * @param enmWhat The phase that completed.
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[70918] | 232 | */
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| 233 | VMMR3_INT_DECL(int) NEMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
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| 234 | {
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[72470] | 235 | /*
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| 236 | * Check if GIM needs #UD, since that applies to everyone.
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| 237 | */
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| 238 | if (enmWhat == VMINITCOMPLETED_RING3)
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[80191] | 239 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 240 | {
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| 241 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 242 | pVCpu->nem.s.fGIMTrapXcptUD = GIMShouldTrapXcptUD(pVCpu);
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| 243 | }
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[72470] | 244 |
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| 245 | /*
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| 246 | * Call native code.
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| 247 | */
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[70918] | 248 | int rc = VINF_SUCCESS;
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| 249 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 250 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 251 | rc = nemR3NativeInitCompleted(pVM, enmWhat);
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| 252 | #else
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| 253 | RT_NOREF(pVM, enmWhat);
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| 254 | #endif
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| 255 | return rc;
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| 256 | }
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| 257 |
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| 258 |
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| 259 | /**
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| 260 | *
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| 261 | * @returns VBox status code.
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[70945] | 262 | * @param pVM The cross context VM structure.
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[70918] | 263 | */
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| 264 | VMMR3_INT_DECL(int) NEMR3Term(PVM pVM)
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| 265 | {
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| 266 | AssertReturn(pVM->nem.s.u32Magic == NEM_MAGIC, VERR_WRONG_ORDER);
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[80191] | 267 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 268 | AssertReturn(pVM->apCpusR3[idCpu]->nem.s.u32Magic == NEMCPU_MAGIC, VERR_WRONG_ORDER);
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[70918] | 269 |
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| 270 | /* Do native termination. */
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| 271 | int rc = VINF_SUCCESS;
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| 272 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 273 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 274 | rc = nemR3NativeTerm(pVM);
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| 275 | #endif
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| 276 |
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| 277 | /* Mark it as terminated. */
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[80191] | 278 | for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
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| 279 | {
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| 280 | PVMCPU pVCpu = pVM->apCpusR3[idCpu];
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| 281 | pVCpu->nem.s.u32Magic = NEMCPU_MAGIC_DEAD;
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| 282 | }
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[70918] | 283 | pVM->nem.s.u32Magic = NEM_MAGIC_DEAD;
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| 284 | return rc;
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| 285 | }
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| 286 |
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[72267] | 287 | /**
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| 288 | * External interface for querying whether native execution API is used.
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| 289 | *
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| 290 | * @returns true if NEM is being used, otherwise false.
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| 291 | * @param pUVM The user mode VM handle.
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| 292 | * @sa HMR3IsEnabled
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| 293 | */
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| 294 | VMMR3DECL(bool) NEMR3IsEnabled(PUVM pUVM)
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| 295 | {
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| 296 | UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
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| 297 | PVM pVM = pUVM->pVM;
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| 298 | VM_ASSERT_VALID_EXT_RETURN(pVM, false);
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| 299 | return VM_IS_NEM_ENABLED(pVM);
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| 300 | }
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[70918] | 301 |
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[72267] | 302 |
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[70918] | 303 | /**
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| 304 | * The VM is being reset.
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| 305 | *
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| 306 | * @param pVM The cross context VM structure.
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| 307 | */
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| 308 | VMMR3_INT_DECL(void) NEMR3Reset(PVM pVM)
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| 309 | {
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| 310 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 311 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[70918] | 312 | nemR3NativeReset(pVM);
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| 313 | #else
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| 314 | RT_NOREF(pVM);
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| 315 | #endif
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| 316 | }
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| 317 |
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| 318 |
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| 319 | /**
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| 320 | * Resets a virtual CPU.
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| 321 | *
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| 322 | * Used to bring up secondary CPUs on SMP as well as CPU hot plugging.
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| 323 | *
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[71040] | 324 | * @param pVCpu The cross context virtual CPU structure to reset.
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| 325 | * @param fInitIpi Set if being reset due to INIT IPI.
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[70918] | 326 | */
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[71040] | 327 | VMMR3_INT_DECL(void) NEMR3ResetCpu(PVMCPU pVCpu, bool fInitIpi)
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[70918] | 328 | {
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| 329 | #ifdef VBOX_WITH_NATIVE_NEM
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[70948] | 330 | if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
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[71040] | 331 | nemR3NativeResetCpu(pVCpu, fInitIpi);
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[70918] | 332 | #else
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[71040] | 333 | RT_NOREF(pVCpu, fInitIpi);
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[70918] | 334 | #endif
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| 335 | }
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| 336 |
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[70954] | 337 |
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[72526] | 338 | /**
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| 339 | * Indicates to TM that TMTSCMODE_NATIVE_API should be used for TSC.
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| 340 | *
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| 341 | * @returns true if TMTSCMODE_NATIVE_API must be used, otherwise @c false.
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| 342 | * @param pVM The cross context VM structure.
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| 343 | */
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| 344 | VMMR3_INT_DECL(bool) NEMR3NeedSpecialTscMode(PVM pVM)
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| 345 | {
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| 346 | #ifdef VBOX_WITH_NATIVE_NEM
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| 347 | # ifdef RT_OS_WINDOWS
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| 348 | if (VM_IS_NEM_ENABLED(pVM))
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| 349 | return true;
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| 350 | # endif
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| 351 | #else
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| 352 | RT_NOREF(pVM);
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| 353 | #endif
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| 354 | return false;
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| 355 | }
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| 356 |
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| 357 |
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[72555] | 358 | /**
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| 359 | * Gets the name of a generic NEM exit code.
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| 360 | *
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| 361 | * @returns Pointer to read only string if @a uExit is known, otherwise NULL.
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| 362 | * @param uExit The NEM exit to name.
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| 363 | */
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| 364 | VMMR3DECL(const char *) NEMR3GetExitName(uint32_t uExit)
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| 365 | {
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| 366 | switch ((NEMEXITTYPE)uExit)
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| 367 | {
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| 368 | case NEMEXITTYPE_UNRECOVERABLE_EXCEPTION: return "NEM unrecoverable exception";
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| 369 | case NEMEXITTYPE_INVALID_VP_REGISTER_VALUE: return "NEM invalid vp register value";
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| 370 | case NEMEXITTYPE_INTTERRUPT_WINDOW: return "NEM interrupt window";
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| 371 | case NEMEXITTYPE_HALT: return "NEM halt";
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| 372 | case NEMEXITTYPE_XCPT_UD: return "NEM #UD";
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| 373 | case NEMEXITTYPE_XCPT_DB: return "NEM #DB";
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| 374 | case NEMEXITTYPE_XCPT_BP: return "NEM #BP";
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| 375 | case NEMEXITTYPE_CANCELED: return "NEM canceled";
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[72575] | 376 | case NEMEXITTYPE_MEMORY_ACCESS: return "NEM memory access";
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[72555] | 377 | }
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[72526] | 378 |
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[72555] | 379 | return NULL;
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| 380 | }
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| 381 |
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| 382 |
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[70979] | 383 | VMMR3_INT_DECL(VBOXSTRICTRC) NEMR3RunGC(PVM pVM, PVMCPU pVCpu)
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| 384 | {
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| 385 | Assert(VM_IS_NEM_ENABLED(pVM));
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[70980] | 386 | #ifdef VBOX_WITH_NATIVE_NEM
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[70979] | 387 | return nemR3NativeRunGC(pVM, pVCpu);
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[70980] | 388 | #else
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| 389 | NOREF(pVM); NOREF(pVCpu);
|
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| 390 | return VERR_INTERNAL_ERROR_3;
|
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| 391 | #endif
|
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[70979] | 392 | }
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| 393 |
|
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| 394 |
|
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[72634] | 395 | VMMR3_INT_DECL(bool) NEMR3CanExecuteGuest(PVM pVM, PVMCPU pVCpu)
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[70979] | 396 | {
|
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| 397 | Assert(VM_IS_NEM_ENABLED(pVM));
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[70980] | 398 | #ifdef VBOX_WITH_NATIVE_NEM
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[72634] | 399 | return nemR3NativeCanExecuteGuest(pVM, pVCpu);
|
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[70980] | 400 | #else
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[72634] | 401 | NOREF(pVM); NOREF(pVCpu);
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[70980] | 402 | return false;
|
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| 403 | #endif
|
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[70979] | 404 | }
|
---|
| 405 |
|
---|
| 406 |
|
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| 407 | VMMR3_INT_DECL(bool) NEMR3SetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable)
|
---|
| 408 | {
|
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| 409 | Assert(VM_IS_NEM_ENABLED(pVM));
|
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[70980] | 410 | #ifdef VBOX_WITH_NATIVE_NEM
|
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[70979] | 411 | return nemR3NativeSetSingleInstruction(pVM, pVCpu, fEnable);
|
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[70980] | 412 | #else
|
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| 413 | NOREF(pVM); NOREF(pVCpu); NOREF(fEnable);
|
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| 414 | return false;
|
---|
| 415 | #endif
|
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[70979] | 416 | }
|
---|
| 417 |
|
---|
| 418 |
|
---|
[71040] | 419 | VMMR3_INT_DECL(void) NEMR3NotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
|
---|
| 420 | {
|
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| 421 | AssertLogRelReturnVoid(VM_IS_NEM_ENABLED(pVM));
|
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| 422 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 423 | nemR3NativeNotifyFF(pVM, pVCpu, fFlags);
|
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| 424 | #else
|
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| 425 | RT_NOREF(pVM, pVCpu, fFlags);
|
---|
| 426 | #endif
|
---|
| 427 | }
|
---|
[70979] | 428 |
|
---|
[71040] | 429 |
|
---|
| 430 |
|
---|
| 431 |
|
---|
[70954] | 432 | VMMR3_INT_DECL(int) NEMR3NotifyPhysRamRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb)
|
---|
| 433 | {
|
---|
| 434 | int rc = VINF_SUCCESS;
|
---|
| 435 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 436 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
| 437 | rc = nemR3NativeNotifyPhysRamRegister(pVM, GCPhys, cb);
|
---|
| 438 | #else
|
---|
| 439 | NOREF(pVM); NOREF(GCPhys); NOREF(cb);
|
---|
| 440 | #endif
|
---|
| 441 | return rc;
|
---|
| 442 | }
|
---|
| 443 |
|
---|
| 444 |
|
---|
[70977] | 445 | VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExMap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags, void *pvMmio2)
|
---|
[70954] | 446 | {
|
---|
| 447 | int rc = VINF_SUCCESS;
|
---|
| 448 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 449 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
[70977] | 450 | rc = nemR3NativeNotifyPhysMmioExMap(pVM, GCPhys, cb, fFlags, pvMmio2);
|
---|
[70954] | 451 | #else
|
---|
[70977] | 452 | NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags); NOREF(pvMmio2);
|
---|
[70954] | 453 | #endif
|
---|
| 454 | return rc;
|
---|
| 455 | }
|
---|
| 456 |
|
---|
| 457 |
|
---|
| 458 | VMMR3_INT_DECL(int) NEMR3NotifyPhysMmioExUnmap(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
|
---|
| 459 | {
|
---|
| 460 | int rc = VINF_SUCCESS;
|
---|
| 461 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 462 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
| 463 | rc = nemR3NativeNotifyPhysMmioExUnmap(pVM, GCPhys, cb, fFlags);
|
---|
| 464 | #else
|
---|
| 465 | NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
|
---|
| 466 | #endif
|
---|
| 467 | return rc;
|
---|
| 468 | }
|
---|
| 469 |
|
---|
| 470 |
|
---|
[70977] | 471 | VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterEarly(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
|
---|
[70954] | 472 | {
|
---|
| 473 | int rc = VINF_SUCCESS;
|
---|
| 474 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 475 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
| 476 | rc = nemR3NativeNotifyPhysRomRegisterEarly(pVM, GCPhys, cb, fFlags);
|
---|
| 477 | #else
|
---|
| 478 | NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
|
---|
| 479 | #endif
|
---|
| 480 | return rc;
|
---|
| 481 | }
|
---|
| 482 |
|
---|
| 483 |
|
---|
[70977] | 484 | /**
|
---|
| 485 | * Called after the ROM range has been fully completed.
|
---|
| 486 | *
|
---|
| 487 | * This will be preceeded by a NEMR3NotifyPhysRomRegisterEarly() call as well a
|
---|
| 488 | * number of NEMHCNotifyPhysPageProtChanged calls.
|
---|
| 489 | *
|
---|
| 490 | * @returns VBox status code
|
---|
| 491 | * @param pVM The cross context VM structure.
|
---|
| 492 | * @param GCPhys The ROM address (page aligned).
|
---|
| 493 | * @param cb The size (page aligned).
|
---|
| 494 | * @param fFlags NEM_NOTIFY_PHYS_ROM_F_XXX.
|
---|
| 495 | */
|
---|
| 496 | VMMR3_INT_DECL(int) NEMR3NotifyPhysRomRegisterLate(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, uint32_t fFlags)
|
---|
[70954] | 497 | {
|
---|
| 498 | int rc = VINF_SUCCESS;
|
---|
| 499 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 500 | if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
| 501 | rc = nemR3NativeNotifyPhysRomRegisterLate(pVM, GCPhys, cb, fFlags);
|
---|
| 502 | #else
|
---|
| 503 | NOREF(pVM); NOREF(GCPhys); NOREF(cb); NOREF(fFlags);
|
---|
| 504 | #endif
|
---|
| 505 | return rc;
|
---|
| 506 | }
|
---|
| 507 |
|
---|
| 508 |
|
---|
| 509 | VMMR3_INT_DECL(void) NEMR3NotifySetA20(PVMCPU pVCpu, bool fEnabled)
|
---|
| 510 | {
|
---|
| 511 | #ifdef VBOX_WITH_NATIVE_NEM
|
---|
| 512 | if (pVCpu->pVMR3->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API)
|
---|
| 513 | nemR3NativeNotifySetA20(pVCpu, fEnabled);
|
---|
| 514 | #else
|
---|
| 515 | NOREF(pVCpu); NOREF(fEnabled);
|
---|
| 516 | #endif
|
---|
| 517 | }
|
---|
| 518 |
|
---|