VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOMR3IoPort.cpp@ 92716

Last change on this file since 92716 was 92716, checked in by vboxsync, 3 years ago

VMM/IOM: Made I/O port and MMIO registrations work in driverless mode. bugref:10138
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 30.2 KB
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1/* $Id: IOMR3IoPort.cpp 92716 2021-12-02 21:17:42Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor, I/O port related APIs.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_IOM_IOPORT
23#include <VBox/vmm/iom.h>
24#include <VBox/sup.h>
25#include <VBox/vmm/mm.h>
26#include <VBox/vmm/stam.h>
27#include <VBox/vmm/dbgf.h>
28#include <VBox/vmm/pdmapi.h>
29#include <VBox/vmm/pdmdev.h>
30#include "IOMInternal.h"
31#include <VBox/vmm/vm.h>
32
33#include <VBox/param.h>
34#include <iprt/assert.h>
35#include <iprt/mem.h>
36#include <iprt/string.h>
37#include <VBox/log.h>
38#include <VBox/err.h>
39
40#include "IOMInline.h"
41
42
43#ifdef VBOX_WITH_STATISTICS
44
45/**
46 * Register statistics for an I/O port entry.
47 */
48void iomR3IoPortRegStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry)
49{
50 bool const fDoRZ = pRegEntry->fRing0 || pRegEntry->fRawMode;
51 PIOMIOPORTSTATSENTRY pStats = &pVM->iom.s.paIoPortStats[pRegEntry->idxStats];
52 PCIOMIOPORTDESC pExtDesc = pRegEntry->paExtDescs;
53 unsigned uPort = pRegEntry->uPort;
54 unsigned const uFirstPort = uPort;
55 unsigned const uEndPort = uPort + pRegEntry->cPorts;
56
57 /* Register a dummy statistics for the prefix. */
58 char szName[80];
59 size_t cchPrefix;
60 if (uFirstPort < uEndPort - 1)
61 cchPrefix = RTStrPrintf(szName, sizeof(szName), "/IOM/IoPorts/%04x-%04x", uFirstPort, uEndPort - 1);
62 else
63 cchPrefix = RTStrPrintf(szName, sizeof(szName), "/IOM/IoPorts/%04x", uPort);
64 const char *pszDesc = pRegEntry->pszDesc;
65 char *pszFreeDesc = NULL;
66 if (pRegEntry->pDevIns && pRegEntry->pDevIns->iInstance > 0 && pszDesc)
67 pszDesc = pszFreeDesc = RTStrAPrintf2("%u / %s", pRegEntry->pDevIns->iInstance, pszDesc);
68 int rc = STAMR3Register(pVM, &pStats->Total, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, szName,
69 STAMUNIT_NONE, pRegEntry->pszDesc);
70 AssertRC(rc);
71 RTStrFree(pszFreeDesc);
72
73 /* Register stats for each port under it */
74 do
75 {
76 size_t cchBaseNm;
77 if (uFirstPort < uEndPort - 1)
78 cchBaseNm = cchPrefix + RTStrPrintf(&szName[cchPrefix], sizeof(szName) - cchPrefix, "/%04x-", uPort);
79 else
80 {
81 szName[cchPrefix] = '/';
82 cchBaseNm = cchPrefix + 1;
83 }
84
85# define SET_NM_SUFFIX(a_sz) memcpy(&szName[cchBaseNm], a_sz, sizeof(a_sz));
86 const char * const pszInDesc = pExtDesc ? pExtDesc->pszIn : NULL;
87 const char * const pszOutDesc = pExtDesc ? pExtDesc->pszOut : NULL;
88
89 /* register the statistics counters. */
90 SET_NM_SUFFIX("In-R3");
91 rc = STAMR3Register(pVM, &pStats->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszInDesc); AssertRC(rc);
92 SET_NM_SUFFIX("Out-R3");
93 rc = STAMR3Register(pVM, &pStats->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszOutDesc); AssertRC(rc);
94 if (fDoRZ)
95 {
96 SET_NM_SUFFIX("In-RZ");
97 rc = STAMR3Register(pVM, &pStats->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszInDesc); AssertRC(rc);
98 SET_NM_SUFFIX("Out-RZ");
99 rc = STAMR3Register(pVM, &pStats->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszOutDesc); AssertRC(rc);
100 SET_NM_SUFFIX("In-RZtoR3");
101 rc = STAMR3Register(pVM, &pStats->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
102 SET_NM_SUFFIX("Out-RZtoR3");
103 rc = STAMR3Register(pVM, &pStats->OutRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, NULL); AssertRC(rc);
104 }
105
106 /* Profiling */
107 SET_NM_SUFFIX("In-R3-Prof");
108 rc = STAMR3Register(pVM, &pStats->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszInDesc); AssertRC(rc);
109 SET_NM_SUFFIX("Out-R3-Prof");
110 rc = STAMR3Register(pVM, &pStats->ProfOutR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszOutDesc); AssertRC(rc);
111 if (fDoRZ)
112 {
113 SET_NM_SUFFIX("In-RZ-Prof");
114 rc = STAMR3Register(pVM, &pStats->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszInDesc); AssertRC(rc);
115 SET_NM_SUFFIX("Out-RZ-Prof");
116 rc = STAMR3Register(pVM, &pStats->ProfOutRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszOutDesc); AssertRC(rc);
117 }
118
119 pStats++;
120 uPort++;
121 if (pExtDesc)
122 pExtDesc = pszInDesc || pszOutDesc ? pExtDesc + 1 : NULL;
123 } while (uPort < uEndPort);
124}
125
126
127/**
128 * Deregister statistics for an I/O port entry.
129 */
130static void iomR3IoPortDeregStats(PVM pVM, PIOMIOPORTENTRYR3 pRegEntry, unsigned uPort)
131{
132 char szPrefix[80];
133 size_t cchPrefix;
134 if (pRegEntry->cPorts > 1)
135 cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/IoPorts/%04x-%04x", uPort, uPort + pRegEntry->cPorts - 1);
136 else
137 cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/IoPorts/%04x", uPort);
138 STAMR3DeregisterByPrefix(pVM->pUVM, szPrefix);
139}
140
141#endif /* VBOX_WITH_STATISTICS */
142
143
144/**
145 * @callback_method_impl{FNIOMIOPORTNEWIN,
146 * Dummy Port I/O Handler for IN operations.}
147 */
148static DECLCALLBACK(VBOXSTRICTRC)
149iomR3IOPortDummyNewIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
150{
151 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
152 switch (cb)
153 {
154 case 1: *pu32 = 0xff; break;
155 case 2: *pu32 = 0xffff; break;
156 case 4: *pu32 = UINT32_C(0xffffffff); break;
157 default:
158 AssertReleaseMsgFailed(("cb=%d\n", cb));
159 return VERR_IOM_IOPORT_IPE_2;
160 }
161 return VINF_SUCCESS;
162}
163
164
165/**
166 * @callback_method_impl{FNIOMIOPORTNEWINSTRING,
167 * Dummy Port I/O Handler for string IN operations.}
168 */
169static DECLCALLBACK(VBOXSTRICTRC)
170iomR3IOPortDummyNewInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint8_t *pbDst, uint32_t *pcTransfer, unsigned cb)
171{
172 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pbDst); NOREF(pcTransfer); NOREF(cb);
173 return VINF_SUCCESS;
174}
175
176
177/**
178 * @callback_method_impl{FNIOMIOPORTNEWOUT,
179 * Dummy Port I/O Handler for OUT operations.}
180 */
181static DECLCALLBACK(VBOXSTRICTRC)
182iomR3IOPortDummyNewOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
183{
184 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
185 return VINF_SUCCESS;
186}
187
188
189/**
190 * @callback_method_impl{FNIOMIOPORTNEWOUTSTRING,
191 * Dummy Port I/O Handler for string OUT operations.}
192 */
193static DECLCALLBACK(VBOXSTRICTRC)
194iomR3IOPortDummyNewOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint8_t const *pbSrc, uint32_t *pcTransfer, unsigned cb)
195{
196 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pbSrc); NOREF(pcTransfer); NOREF(cb);
197 return VINF_SUCCESS;
198}
199
200
201#ifdef VBOX_WITH_STATISTICS
202/**
203 * Grows the statistics table.
204 *
205 * @returns VBox status code.
206 * @param pVM The cross context VM structure.
207 * @param cNewEntries The minimum number of new entrie.
208 * @see IOMR0IoPortGrowStatisticsTable
209 */
210static int iomR3IoPortGrowStatisticsTable(PVM pVM, uint32_t cNewEntries)
211{
212 AssertReturn(cNewEntries <= _64K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
213
214 int rc;
215 if (!SUPR3IsDriverless())
216 {
217 rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_IO_PORT_STATS, cNewEntries, NULL);
218 AssertLogRelRCReturn(rc, rc);
219 AssertReturn(cNewEntries <= pVM->iom.s.cIoPortStatsAllocation, VERR_IOM_IOPORT_IPE_2);
220 }
221 else
222 {
223 /*
224 * Validate input and state.
225 */
226 uint32_t const cOldEntries = pVM->iom.s.cIoPortStatsAllocation;
227 AssertReturn(cNewEntries > cOldEntries, VERR_IOM_IOPORT_IPE_1);
228 AssertReturn(pVM->iom.s.cIoPortStats <= cOldEntries, VERR_IOM_IOPORT_IPE_2);
229
230 /*
231 * Calc size and allocate a new table.
232 */
233 uint32_t const cbNew = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTSTATSENTRY), PAGE_SIZE);
234 cNewEntries = cbNew / sizeof(IOMIOPORTSTATSENTRY);
235
236 PIOMIOPORTSTATSENTRY const paIoPortStats = (PIOMIOPORTSTATSENTRY)RTMemPageAllocZ(cbNew);
237 if (paIoPortStats)
238 {
239 /*
240 * Anything to copy over, update and free the old one.
241 */
242 PIOMIOPORTSTATSENTRY const pOldIoPortStats = pVM->iom.s.paIoPortStats;
243 if (pOldIoPortStats)
244 memcpy(paIoPortStats, pOldIoPortStats, cOldEntries * sizeof(IOMIOPORTSTATSENTRY));
245
246 pVM->iom.s.paIoPortStats = paIoPortStats;
247 pVM->iom.s.cIoPortStatsAllocation = cNewEntries;
248
249 RTMemPageFree(pOldIoPortStats, RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTSTATSENTRY), PAGE_SIZE));
250
251 rc = VINF_SUCCESS;
252 }
253 else
254 rc = VERR_NO_PAGE_MEMORY;
255 }
256
257 return rc;
258}
259#endif
260
261
262/**
263 * Grows the I/O port registration statistics table.
264 *
265 * @returns VBox status code.
266 * @param pVM The cross context VM structure.
267 * @param cNewEntries The minimum number of new entrie.
268 * @see IOMR0IoPortGrowRegistrationTables
269 */
270static int iomR3IoPortGrowTable(PVM pVM, uint32_t cNewEntries)
271{
272 AssertReturn(cNewEntries <= _4K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
273
274 int rc;
275 if (!SUPR3IsDriverless())
276 {
277 rc = VMMR3CallR0Emt(pVM, pVM->apCpusR3[0], VMMR0_DO_IOM_GROW_IO_PORTS, cNewEntries, NULL);
278 AssertLogRelRCReturn(rc, rc);
279 AssertReturn(cNewEntries <= pVM->iom.s.cIoPortAlloc, VERR_IOM_IOPORT_IPE_2);
280 }
281 else
282 {
283 /*
284 * Validate input and state.
285 */
286 uint32_t const cOldEntries = pVM->iom.s.cIoPortAlloc;
287 AssertReturn(cNewEntries >= cOldEntries, VERR_IOM_IOPORT_IPE_1);
288
289 /*
290 * Allocate the new tables. We use a single allocation for the three tables (ring-0,
291 * ring-3, lookup) and does a partial mapping of the result to ring-3.
292 */
293 uint32_t const cbRing3 = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTENTRYR3), PAGE_SIZE);
294 uint32_t const cbShared = RT_ALIGN_32(cNewEntries * sizeof(IOMIOPORTLOOKUPENTRY), PAGE_SIZE);
295 uint32_t const cbNew = cbRing3 + cbShared;
296
297 /* Use the rounded up space as best we can. */
298 cNewEntries = RT_MIN(cbRing3 / sizeof(IOMIOPORTENTRYR3), cbShared / sizeof(IOMIOPORTLOOKUPENTRY));
299
300 PIOMIOPORTENTRYR3 const paRing3 = (PIOMIOPORTENTRYR3)RTMemPageAllocZ(cbNew);
301 if (paRing3)
302 {
303 PIOMIOPORTLOOKUPENTRY const paLookup = (PIOMIOPORTLOOKUPENTRY)((uintptr_t)paRing3 + cbRing3);
304
305 /*
306 * Copy over the old info and initialize the idxSelf and idxStats members.
307 */
308 if (pVM->iom.s.paIoPortRegs != NULL)
309 {
310 memcpy(paRing3, pVM->iom.s.paIoPortRegs, sizeof(paRing3[0]) * cOldEntries);
311 memcpy(paLookup, pVM->iom.s.paIoPortLookup, sizeof(paLookup[0]) * cOldEntries);
312 }
313
314 size_t i = cbRing3 / sizeof(*paRing3);
315 while (i-- > cOldEntries)
316 {
317 paRing3[i].idxSelf = (uint16_t)i;
318 paRing3[i].idxStats = UINT16_MAX;
319 }
320
321 /*
322 * Update the variables and free the old memory.
323 */
324 void * const pvFree = pVM->iom.s.paIoPortRegs;
325
326 pVM->iom.s.paIoPortRegs = paRing3;
327 pVM->iom.s.paIoPortLookup = paLookup;
328 pVM->iom.s.cIoPortAlloc = cNewEntries;
329
330 RTMemPageFree(pvFree,
331 RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTENTRYR3), PAGE_SIZE)
332 + RT_ALIGN_32(cOldEntries * sizeof(IOMIOPORTLOOKUPENTRY), PAGE_SIZE));
333
334 rc = VINF_SUCCESS;
335 }
336 else
337 rc = VERR_NO_PAGE_MEMORY;
338 }
339 return rc;
340}
341
342
343/**
344 * Worker for PDMDEVHLPR3::pfnIoPortCreateEx.
345 */
346VMMR3_INT_DECL(int) IOMR3IoPortCreate(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT cPorts, uint32_t fFlags, PPDMPCIDEV pPciDev,
347 uint32_t iPciRegion, PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
348 PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr, RTR3PTR pvUser,
349 const char *pszDesc, PCIOMIOPORTDESC paExtDescs, PIOMIOPORTHANDLE phIoPorts)
350{
351 /*
352 * Validate input.
353 */
354 AssertPtrReturn(phIoPorts, VERR_INVALID_POINTER);
355 *phIoPorts = UINT32_MAX;
356 VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
357 VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
358
359 AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
360
361 AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%#x\n", cPorts), VERR_OUT_OF_RANGE);
362 AssertReturn(!(fFlags & ~IOM_IOPORT_F_VALID_MASK), VERR_INVALID_FLAGS);
363
364 AssertReturn(pfnOut || pfnIn || pfnOutStr || pfnInStr, VERR_INVALID_PARAMETER);
365 AssertPtrNullReturn(pfnOut, VERR_INVALID_POINTER);
366 AssertPtrNullReturn(pfnIn, VERR_INVALID_POINTER);
367 AssertPtrNullReturn(pfnOutStr, VERR_INVALID_POINTER);
368 AssertPtrNullReturn(pfnInStr, VERR_INVALID_POINTER);
369 AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
370 AssertReturn(*pszDesc != '\0', VERR_INVALID_POINTER);
371 AssertReturn(strlen(pszDesc) < 128, VERR_INVALID_POINTER);
372 if (paExtDescs)
373 {
374 AssertPtrReturn(paExtDescs, VERR_INVALID_POINTER);
375 for (size_t i = 0;; i++)
376 {
377 const char *pszIn = paExtDescs[i].pszIn;
378 const char *pszOut = paExtDescs[i].pszIn;
379 if (!pszIn && !pszOut)
380 break;
381 AssertReturn(i < _8K, VERR_OUT_OF_RANGE);
382 AssertReturn(!pszIn || strlen(pszIn) < 128, VERR_INVALID_POINTER);
383 AssertReturn(!pszOut || strlen(pszOut) < 128, VERR_INVALID_POINTER);
384 }
385 }
386
387 /*
388 * Ensure that we've got table space for it.
389 */
390#ifndef VBOX_WITH_STATISTICS
391 uint16_t const idxStats = UINT16_MAX;
392#else
393 uint32_t const idxStats = pVM->iom.s.cIoPortStats;
394 uint32_t const cNewIoPortStats = idxStats + cPorts;
395 AssertReturn(cNewIoPortStats <= _64K, VERR_IOM_TOO_MANY_IOPORT_REGISTRATIONS);
396 if (cNewIoPortStats > pVM->iom.s.cIoPortStatsAllocation)
397 {
398 int rc = iomR3IoPortGrowStatisticsTable(pVM, cNewIoPortStats);
399 AssertRCReturn(rc, rc);
400 AssertReturn(idxStats == pVM->iom.s.cIoPortStats, VERR_IOM_IOPORT_IPE_1);
401 }
402#endif
403
404 uint32_t idx = pVM->iom.s.cIoPortRegs;
405 if (idx >= pVM->iom.s.cIoPortAlloc)
406 {
407 int rc = iomR3IoPortGrowTable(pVM, pVM->iom.s.cIoPortAlloc + 1);
408 AssertRCReturn(rc, rc);
409 AssertReturn(idx == pVM->iom.s.cIoPortRegs, VERR_IOM_IOPORT_IPE_1);
410 AssertReturn(idx < pVM->iom.s.cIoPortAlloc, VERR_IOM_IOPORT_IPE_2);
411 }
412
413 /*
414 * Enter it.
415 */
416 pVM->iom.s.paIoPortRegs[idx].pvUser = pvUser;
417 pVM->iom.s.paIoPortRegs[idx].pDevIns = pDevIns;
418 pVM->iom.s.paIoPortRegs[idx].pfnOutCallback = pfnOut ? pfnOut : iomR3IOPortDummyNewOut;
419 pVM->iom.s.paIoPortRegs[idx].pfnInCallback = pfnIn ? pfnIn : iomR3IOPortDummyNewIn;
420 pVM->iom.s.paIoPortRegs[idx].pfnOutStrCallback = pfnOutStr ? pfnOutStr : iomR3IOPortDummyNewOutStr;
421 pVM->iom.s.paIoPortRegs[idx].pfnInStrCallback = pfnInStr ? pfnInStr : iomR3IOPortDummyNewInStr;
422 pVM->iom.s.paIoPortRegs[idx].pszDesc = pszDesc;
423 pVM->iom.s.paIoPortRegs[idx].paExtDescs = paExtDescs;
424 pVM->iom.s.paIoPortRegs[idx].pPciDev = pPciDev;
425 pVM->iom.s.paIoPortRegs[idx].iPciRegion = iPciRegion;
426 pVM->iom.s.paIoPortRegs[idx].cPorts = cPorts;
427 pVM->iom.s.paIoPortRegs[idx].uPort = UINT16_MAX;
428 pVM->iom.s.paIoPortRegs[idx].idxStats = (uint16_t)idxStats;
429 pVM->iom.s.paIoPortRegs[idx].fMapped = false;
430 pVM->iom.s.paIoPortRegs[idx].fFlags = (uint8_t)fFlags;
431 pVM->iom.s.paIoPortRegs[idx].idxSelf = idx;
432
433 pVM->iom.s.cIoPortRegs = idx + 1;
434#ifdef VBOX_WITH_STATISTICS
435 pVM->iom.s.cIoPortStats = cNewIoPortStats;
436#endif
437 *phIoPorts = idx;
438 LogFlow(("IOMR3IoPortCreate: idx=%#x cPorts=%u %s\n", idx, cPorts, pszDesc));
439 return VINF_SUCCESS;
440}
441
442
443/**
444 * Worker for PDMDEVHLPR3::pfnIoPortMap.
445 */
446VMMR3_INT_DECL(int) IOMR3IoPortMap(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT uPort)
447{
448 /*
449 * Validate input and state.
450 */
451 AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
452 AssertReturn(hIoPorts < pVM->iom.s.cIoPortRegs, VERR_IOM_INVALID_IOPORT_HANDLE);
453 PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
454 AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
455
456 RTIOPORT const cPorts = pRegEntry->cPorts;
457 AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%s\n", cPorts), VERR_IOM_IOPORT_IPE_1);
458 AssertReturn((uint32_t)uPort + cPorts <= _64K, VERR_OUT_OF_RANGE);
459 RTIOPORT const uLastPort = uPort + cPorts - 1;
460 LogFlow(("IOMR3IoPortMap: hIoPorts=%#RX64 %RTiop..%RTiop (%u ports)\n", hIoPorts, uPort, uLastPort, cPorts));
461
462 /*
463 * Do the mapping.
464 */
465 int rc = VINF_SUCCESS;
466 IOM_LOCK_EXCL(pVM);
467
468 if (!pRegEntry->fMapped)
469 {
470 uint32_t const cEntries = RT_MIN(pVM->iom.s.cIoPortLookupEntries, pVM->iom.s.cIoPortRegs);
471 Assert(pVM->iom.s.cIoPortLookupEntries == cEntries);
472
473 PIOMIOPORTLOOKUPENTRY paEntries = pVM->iom.s.paIoPortLookup;
474 PIOMIOPORTLOOKUPENTRY pEntry;
475 if (cEntries > 0)
476 {
477 uint32_t iFirst = 0;
478 uint32_t iEnd = cEntries;
479 uint32_t i = cEntries / 2;
480 for (;;)
481 {
482 pEntry = &paEntries[i];
483 if (pEntry->uLastPort < uPort)
484 {
485 i += 1;
486 if (i < iEnd)
487 iFirst = i;
488 else
489 {
490 /* Insert after the entry we just considered: */
491 pEntry += 1;
492 if (i < cEntries)
493 memmove(pEntry + 1, pEntry, sizeof(*pEntry) * (cEntries - i));
494 break;
495 }
496 }
497 else if (pEntry->uFirstPort > uLastPort)
498 {
499 if (i > iFirst)
500 iEnd = i;
501 else
502 {
503 /* Insert at the entry we just considered: */
504 if (i < cEntries)
505 memmove(pEntry + 1, pEntry, sizeof(*pEntry) * (cEntries - i));
506 break;
507 }
508 }
509 else
510 {
511 /* Oops! We've got a conflict. */
512 AssertLogRelMsgFailed(("%x..%x (%s) conflicts with existing mapping %x..%x (%s)\n",
513 uPort, uLastPort, pRegEntry->pszDesc,
514 pEntry->uFirstPort, pEntry->uLastPort, pVM->iom.s.paIoPortRegs[pEntry->idx].pszDesc));
515 IOM_UNLOCK_EXCL(pVM);
516 return VERR_IOM_IOPORT_RANGE_CONFLICT;
517 }
518
519 i = iFirst + (iEnd - iFirst) / 2;
520 }
521 }
522 else
523 pEntry = paEntries;
524
525 /*
526 * Fill in the entry and bump the table size.
527 */
528 pEntry->idx = hIoPorts;
529 pEntry->uFirstPort = uPort;
530 pEntry->uLastPort = uLastPort;
531 pVM->iom.s.cIoPortLookupEntries = cEntries + 1;
532
533 pRegEntry->uPort = uPort;
534 pRegEntry->fMapped = true;
535
536#ifdef VBOX_WITH_STATISTICS
537 /* Don't register stats here when we're creating the VM as the
538 statistics table may still be reallocated. */
539 if (pVM->enmVMState >= VMSTATE_CREATED)
540 iomR3IoPortRegStats(pVM, pRegEntry);
541#endif
542
543#ifdef VBOX_STRICT
544 /*
545 * Assert table sanity.
546 */
547 AssertMsg(paEntries[0].uLastPort >= paEntries[0].uFirstPort, ("%#x %#x\n", paEntries[0].uLastPort, paEntries[0].uFirstPort));
548 AssertMsg(paEntries[0].idx < pVM->iom.s.cIoPortRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cIoPortRegs));
549
550 RTIOPORT uPortPrev = paEntries[0].uLastPort;
551 for (size_t i = 1; i <= cEntries; i++)
552 {
553 AssertMsg(paEntries[i].uLastPort >= paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, paEntries[i].uLastPort, paEntries[i].uFirstPort));
554 AssertMsg(paEntries[i].idx < pVM->iom.s.cIoPortRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cIoPortRegs));
555 AssertMsg(uPortPrev < paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, uPortPrev, paEntries[i].uFirstPort));
556 AssertMsg(paEntries[i].uLastPort - paEntries[i].uFirstPort + 1 == pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts,
557 ("%u: %#x %#x..%#x -> %u, expected %u\n", i, uPortPrev, paEntries[i].uFirstPort, paEntries[i].uLastPort,
558 paEntries[i].uLastPort - paEntries[i].uFirstPort + 1, pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts));
559 uPortPrev = paEntries[i].uLastPort;
560 }
561#endif
562 }
563 else
564 {
565 AssertFailed();
566 rc = VERR_IOM_IOPORTS_ALREADY_MAPPED;
567 }
568
569 IOM_UNLOCK_EXCL(pVM);
570 return rc;
571}
572
573
574/**
575 * Worker for PDMDEVHLPR3::pfnIoPortUnmap.
576 */
577VMMR3_INT_DECL(int) IOMR3IoPortUnmap(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
578{
579 /*
580 * Validate input and state.
581 */
582 AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
583 AssertReturn(hIoPorts < pVM->iom.s.cIoPortRegs, VERR_IOM_INVALID_IOPORT_HANDLE);
584 PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
585 AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
586
587 /*
588 * Do the mapping.
589 */
590 int rc;
591 IOM_LOCK_EXCL(pVM);
592
593 if (pRegEntry->fMapped)
594 {
595 RTIOPORT const uPort = pRegEntry->uPort;
596 RTIOPORT const uLastPort = uPort + pRegEntry->cPorts - 1;
597 uint32_t const cEntries = RT_MIN(pVM->iom.s.cIoPortLookupEntries, pVM->iom.s.cIoPortRegs);
598 Assert(pVM->iom.s.cIoPortLookupEntries == cEntries);
599 Assert(cEntries > 0);
600 LogFlow(("IOMR3IoPortUnmap: hIoPorts=%#RX64 %RTiop..%RTiop (%u ports)\n", hIoPorts, uPort, uLastPort, pRegEntry->cPorts));
601
602 PIOMIOPORTLOOKUPENTRY paEntries = pVM->iom.s.paIoPortLookup;
603 uint32_t iFirst = 0;
604 uint32_t iEnd = cEntries;
605 uint32_t i = cEntries / 2;
606 for (;;)
607 {
608 PIOMIOPORTLOOKUPENTRY pEntry = &paEntries[i];
609 if (pEntry->uLastPort < uPort)
610 {
611 i += 1;
612 if (i < iEnd)
613 iFirst = i;
614 else
615 {
616 rc = VERR_IOM_IOPORT_IPE_1;
617 AssertLogRelMsgFailedBreak(("%x..%x (%s) not found!\n", uPort, uLastPort, pRegEntry->pszDesc));
618 }
619 }
620 else if (pEntry->uFirstPort > uLastPort)
621 {
622 if (i > iFirst)
623 iEnd = i;
624 else
625 {
626 rc = VERR_IOM_IOPORT_IPE_1;
627 AssertLogRelMsgFailedBreak(("%x..%x (%s) not found!\n", uPort, uLastPort, pRegEntry->pszDesc));
628 }
629 }
630 else if (pEntry->idx == hIoPorts)
631 {
632 Assert(pEntry->uFirstPort == uPort);
633 Assert(pEntry->uLastPort == uLastPort);
634#ifdef VBOX_WITH_STATISTICS
635 iomR3IoPortDeregStats(pVM, pRegEntry, uPort);
636#endif
637 if (i + 1 < cEntries)
638 memmove(pEntry, pEntry + 1, sizeof(*pEntry) * (cEntries - i - 1));
639 pVM->iom.s.cIoPortLookupEntries = cEntries - 1;
640 pRegEntry->uPort = UINT16_MAX;
641 pRegEntry->fMapped = false;
642 rc = VINF_SUCCESS;
643 break;
644 }
645 else
646 {
647 AssertLogRelMsgFailed(("Lookig for %x..%x (%s), found %x..%x (%s) instead!\n",
648 uPort, uLastPort, pRegEntry->pszDesc,
649 pEntry->uFirstPort, pEntry->uLastPort, pVM->iom.s.paIoPortRegs[pEntry->idx].pszDesc));
650 rc = VERR_IOM_IOPORT_IPE_1;
651 break;
652 }
653
654 i = iFirst + (iEnd - iFirst) / 2;
655 }
656
657#ifdef VBOX_STRICT
658 /*
659 * Assert table sanity.
660 */
661 AssertMsg(paEntries[0].uLastPort >= paEntries[0].uFirstPort, ("%#x %#x\n", paEntries[0].uLastPort, paEntries[0].uFirstPort));
662 AssertMsg(paEntries[0].idx < pVM->iom.s.cIoPortRegs, ("%#x %#x\n", paEntries[0].idx, pVM->iom.s.cIoPortRegs));
663
664 RTIOPORT uPortPrev = paEntries[0].uLastPort;
665 for (i = 1; i < cEntries - 1; i++)
666 {
667 AssertMsg(paEntries[i].uLastPort >= paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, paEntries[i].uLastPort, paEntries[i].uFirstPort));
668 AssertMsg(paEntries[i].idx < pVM->iom.s.cIoPortRegs, ("%u: %#x %#x\n", i, paEntries[i].idx, pVM->iom.s.cIoPortRegs));
669 AssertMsg(uPortPrev < paEntries[i].uFirstPort, ("%u: %#x %#x\n", i, uPortPrev, paEntries[i].uFirstPort));
670 AssertMsg(paEntries[i].uLastPort - paEntries[i].uFirstPort + 1 == pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts,
671 ("%u: %#x %#x..%#x -> %u, expected %u\n", i, uPortPrev, paEntries[i].uFirstPort, paEntries[i].uLastPort,
672 paEntries[i].uLastPort - paEntries[i].uFirstPort + 1, pVM->iom.s.paIoPortRegs[paEntries[i].idx].cPorts));
673 uPortPrev = paEntries[i].uLastPort;
674 }
675#endif
676 }
677 else
678 {
679 AssertFailed();
680 rc = VERR_IOM_IOPORTS_NOT_MAPPED;
681 }
682
683 IOM_UNLOCK_EXCL(pVM);
684 return rc;
685}
686
687
688/**
689 * Validates @a hIoPorts, making sure it belongs to @a pDevIns.
690 *
691 * @returns VBox status code.
692 * @param pVM The cross context VM structure.
693 * @param pDevIns The device which allegedly owns @a hIoPorts.
694 * @param hIoPorts The handle to validate.
695 */
696VMMR3_INT_DECL(int) IOMR3IoPortValidateHandle(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
697{
698 AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
699 AssertReturn(hIoPorts < RT_MIN(pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc), VERR_IOM_INVALID_IOPORT_HANDLE);
700 PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
701 AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
702 return VINF_SUCCESS;
703}
704
705
706/**
707 * Gets the mapping address of I/O ports @a hIoPorts.
708 *
709 * @returns Mapping address if mapped, UINT32_MAX if not mapped or invalid
710 * input.
711 * @param pVM The cross context VM structure.
712 * @param pDevIns The device which allegedly owns @a hRegion.
713 * @param hIoPorts The handle to I/O port region.
714 */
715VMMR3_INT_DECL(uint32_t) IOMR3IoPortGetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
716{
717 AssertPtrReturn(pDevIns, UINT32_MAX);
718 AssertReturn(hIoPorts < RT_MIN(pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc), UINT32_MAX);
719 IOMIOPORTENTRYR3 volatile * const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
720 AssertReturn(pRegEntry->pDevIns == pDevIns, UINT32_MAX);
721 for (uint32_t iTry = 0; ; iTry++)
722 {
723 bool fMapped = pRegEntry->fMapped;
724 RTIOPORT uPort = pRegEntry->uPort;
725 if ( ( ASMAtomicReadBool(&pRegEntry->fMapped) == fMapped
726 && uPort == pRegEntry->uPort)
727 || iTry > 1024)
728 return fMapped ? uPort : UINT32_MAX;
729 ASMNopPause();
730 }
731}
732
733
734/**
735 * Display all registered I/O port ranges.
736 *
737 * @param pVM The cross context VM structure.
738 * @param pHlp The info helpers.
739 * @param pszArgs Arguments, ignored.
740 */
741DECLCALLBACK(void) iomR3IoPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
742{
743 RT_NOREF(pszArgs);
744
745 /* No locking needed here as registerations are only happening during VMSTATE_CREATING. */
746 pHlp->pfnPrintf(pHlp,
747 "I/O port registrations: %u (%u allocated)\n"
748 " ## Ctx Ports Mapping PCI Description\n",
749 pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc);
750 PIOMIOPORTENTRYR3 paRegs = pVM->iom.s.paIoPortRegs;
751 for (uint32_t i = 0; i < pVM->iom.s.cIoPortRegs; i++)
752 {
753 const char * const pszRing = paRegs[i].fRing0 ? paRegs[i].fRawMode ? "+0+C" : "+0 "
754 : paRegs[i].fRawMode ? "+C " : " ";
755 if (paRegs[i].fMapped && paRegs[i].pPciDev)
756 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
757 paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1,
758 paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
759 else if (paRegs[i].fMapped && !paRegs[i].pPciDev)
760 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
761 paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1, paRegs[i].pszDesc);
762 else if (paRegs[i].pPciDev)
763 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts,
764 paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc);
765 else
766 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped %s\n",
767 paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, paRegs[i].pszDesc);
768 }
769}
770
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