VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 50653

Last change on this file since 50653 was 45808, checked in by vboxsync, 11 years ago

VMM,DevVGA: Don't resolve RC symbols when HM is enabled (part 1).
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1/* $Id: IOM.cpp 45808 2013-04-29 12:41:07Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/hm.h>
108#include <VBox/vmm/mm.h>
109#include <VBox/vmm/stam.h>
110#include <VBox/vmm/dbgf.h>
111#include <VBox/vmm/pdmapi.h>
112#include <VBox/vmm/pdmdev.h>
113#include "IOMInternal.h"
114#include <VBox/vmm/vm.h>
115
116#include <VBox/param.h>
117#include <iprt/assert.h>
118#include <iprt/alloc.h>
119#include <iprt/string.h>
120#include <VBox/log.h>
121#include <VBox/err.h>
122
123#include "IOMInline.h"
124
125
126/*******************************************************************************
127* Internal Functions *
128*******************************************************************************/
129static void iomR3FlushCache(PVM pVM);
130static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
131static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
132static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
134static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
137static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
138
139#ifdef VBOX_WITH_STATISTICS
140static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
141#endif
142
143
144/**
145 * Initializes the IOM.
146 *
147 * @returns VBox status code.
148 * @param pVM Pointer to the VM.
149 */
150VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
151{
152 LogFlow(("IOMR3Init:\n"));
153
154 /*
155 * Assert alignment and sizes.
156 */
157 AssertCompileMemberAlignment(VM, iom.s, 32);
158 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
159 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
160
161 /*
162 * Setup any fixed pointers and offsets.
163 */
164 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
165
166 /*
167 * Initialize the REM critical section.
168 */
169#ifdef IOM_WITH_CRIT_SECT_RW
170 int rc = PDMR3CritSectRwInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
171#else
172 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
173#endif
174 AssertRCReturn(rc, rc);
175
176 /*
177 * Allocate the trees structure.
178 */
179 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
180 if (RT_SUCCESS(rc))
181 {
182 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
183 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
184 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
185 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
186
187 /*
188 * Info.
189 */
190 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
191 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
192
193 /*
194 * Statistics.
195 */
196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
207 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
208 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
211 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
212#ifdef IOM_WITH_MOVS_SUPPORT
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
214 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
215 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
216 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
217#endif
218 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
219 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
220 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
221 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
222 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
223 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
224 }
225
226 /* Redundant, but just in case we change something in the future */
227 iomR3FlushCache(pVM);
228
229 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
230 return rc;
231}
232
233
234/**
235 * Flushes the IOM port & statistics lookup cache
236 *
237 * @param pVM The VM.
238 */
239static void iomR3FlushCache(PVM pVM)
240{
241 /*
242 * Since all relevant (1) cache use requires at least read access to the
243 * critical section, we can exclude all other EMTs by grabbing exclusive
244 * access to the critical section and then safely update the caches of
245 * other EMTs.
246 * (1) The irrelvant access not holding the lock is in assertion code.
247 */
248 IOM_LOCK_EXCL(pVM);
249 VMCPUID iCpu = pVM->cCpus;
250 while (iCpu-- > 0)
251 {
252 PVMCPU pVCpu = &pVM->aCpus[iCpu];
253 pVCpu->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
254 pVCpu->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
255 pVCpu->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
256 pVCpu->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
257 pVCpu->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
258 pVCpu->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
259
260 pVCpu->iom.s.pRangeLastReadR3 = NULL;
261 pVCpu->iom.s.pRangeLastWriteR3 = NULL;
262 pVCpu->iom.s.pStatsLastReadR3 = NULL;
263 pVCpu->iom.s.pStatsLastWriteR3 = NULL;
264 pVCpu->iom.s.pMMIORangeLastR3 = NULL;
265 pVCpu->iom.s.pMMIOStatsLastR3 = NULL;
266
267 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
268 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
269 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
270 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
271 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
272 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
273 }
274
275 IOM_UNLOCK_EXCL(pVM);
276}
277
278
279/**
280 * The VM is being reset.
281 *
282 * @param pVM Pointer to the VM.
283 */
284VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
285{
286 iomR3FlushCache(pVM);
287}
288
289
290/**
291 * Applies relocations to data and code managed by this
292 * component. This function will be called at init and
293 * whenever the VMM need to relocate it self inside the GC.
294 *
295 * The IOM will update the addresses used by the switcher.
296 *
297 * @param pVM The VM.
298 * @param offDelta Relocation delta relative to old location.
299 */
300VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
301{
302 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
303
304 /*
305 * Apply relocations to the GC callbacks.
306 */
307 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
308 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
309 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
310
311 if (pVM->iom.s.pfnMMIOHandlerRC != NIL_RTRCPTR)
312 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
313
314 /*
315 * Reset the raw-mode cache (don't bother relocating it).
316 */
317 VMCPUID iCpu = pVM->cCpus;
318 while (iCpu-- > 0)
319 {
320 PVMCPU pVCpu = &pVM->aCpus[iCpu];
321 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
322 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
323 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
324 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
325 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
326 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
327 }
328}
329
330
331/**
332 * Callback function for relocating a I/O port range.
333 *
334 * @returns 0 (continue enum)
335 * @param pNode Pointer to a IOMIOPORTRANGERC node.
336 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
337 * not certain the delta will fit in a void pointer for all possible configs.
338 */
339static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
340{
341 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
342 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
343
344 Assert(pRange->pDevIns);
345 pRange->pDevIns += offDelta;
346 if (pRange->pfnOutCallback)
347 pRange->pfnOutCallback += offDelta;
348 if (pRange->pfnInCallback)
349 pRange->pfnInCallback += offDelta;
350 if (pRange->pfnOutStrCallback)
351 pRange->pfnOutStrCallback += offDelta;
352 if (pRange->pfnInStrCallback)
353 pRange->pfnInStrCallback += offDelta;
354 if (pRange->pvUser > _64K)
355 pRange->pvUser += offDelta;
356 return 0;
357}
358
359
360/**
361 * Callback function for relocating a MMIO range.
362 *
363 * @returns 0 (continue enum)
364 * @param pNode Pointer to a IOMMMIORANGE node.
365 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
366 * not certain the delta will fit in a void pointer for all possible configs.
367 */
368static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
369{
370 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
371 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
372
373 if (pRange->pDevInsRC)
374 pRange->pDevInsRC += offDelta;
375 if (pRange->pfnWriteCallbackRC)
376 pRange->pfnWriteCallbackRC += offDelta;
377 if (pRange->pfnReadCallbackRC)
378 pRange->pfnReadCallbackRC += offDelta;
379 if (pRange->pfnFillCallbackRC)
380 pRange->pfnFillCallbackRC += offDelta;
381 if (pRange->pvUserRC > _64K)
382 pRange->pvUserRC += offDelta;
383
384 return 0;
385}
386
387
388/**
389 * Terminates the IOM.
390 *
391 * Termination means cleaning up and freeing all resources,
392 * the VM it self is at this point powered off or suspended.
393 *
394 * @returns VBox status code.
395 * @param pVM Pointer to the VM.
396 */
397VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
398{
399 /*
400 * IOM is not owning anything but automatically freed resources,
401 * so there's nothing to do here.
402 */
403 NOREF(pVM);
404 return VINF_SUCCESS;
405}
406
407#ifdef VBOX_WITH_STATISTICS
408
409/**
410 * Create the statistics node for an I/O port.
411 *
412 * @returns Pointer to new stats node.
413 *
414 * @param pVM Pointer to the VM.
415 * @param Port Port.
416 * @param pszDesc Description.
417 */
418static PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
419{
420 IOM_LOCK_EXCL(pVM);
421
422 /* check if it already exists. */
423 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
424 if (pPort)
425 {
426 IOM_UNLOCK_EXCL(pVM);
427 return pPort;
428 }
429
430 /* allocate stats node. */
431 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
432 AssertRC(rc);
433 if (RT_SUCCESS(rc))
434 {
435 /* insert into the tree. */
436 pPort->Core.Key = Port;
437 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
438 {
439 IOM_UNLOCK_EXCL(pVM);
440
441 /* put a name on common ports. */
442 if (!pszDesc)
443 pszDesc = iomR3IOPortGetStandardName(Port);
444
445 /* register the statistics counters. */
446 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
447 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
448 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
449 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
450 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
451 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
452
453 /* Profiling */
454 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
455 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
456 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
457 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
458
459 return pPort;
460 }
461
462 AssertMsgFailed(("what! Port=%d\n", Port));
463 MMHyperFree(pVM, pPort);
464 }
465 IOM_UNLOCK_EXCL(pVM);
466 return NULL;
467}
468
469
470/**
471 * Create the statistics node for an MMIO address.
472 *
473 * @returns Pointer to new stats node.
474 *
475 * @param pVM Pointer to the VM.
476 * @param GCPhys The address.
477 * @param pszDesc Description.
478 */
479PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
480{
481 IOM_LOCK_EXCL(pVM);
482
483 /* check if it already exists. */
484 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
485 if (pStats)
486 {
487 IOM_UNLOCK_EXCL(pVM);
488 return pStats;
489 }
490
491 /* allocate stats node. */
492 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
493 AssertRC(rc);
494 if (RT_SUCCESS(rc))
495 {
496 /* insert into the tree. */
497 pStats->Core.Key = GCPhys;
498 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
499 {
500 IOM_UNLOCK_EXCL(pVM);
501
502 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
503 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
504 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
505 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
506 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
507 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
508 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
509
510 return pStats;
511 }
512 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
513 MMHyperFree(pVM, pStats);
514 }
515 IOM_UNLOCK_EXCL(pVM);
516 return NULL;
517}
518
519#endif /* VBOX_WITH_STATISTICS */
520
521/**
522 * Registers a I/O port ring-3 handler.
523 *
524 * This API is called by PDM on behalf of a device. Devices must first register
525 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
526 * and IOMR3IOPortRegisterR0().
527 *
528 *
529 * @returns VBox status code.
530 *
531 * @param pVM Pointer to the VM.
532 * @param pDevIns PDM device instance owning the port range.
533 * @param PortStart First port number in the range.
534 * @param cPorts Number of ports to register.
535 * @param pvUser User argument for the callbacks.
536 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
537 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
538 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
539 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
540 * @param pszDesc Pointer to description string. This must not be freed.
541 */
542VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
543 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
544 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
545{
546 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
547 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
548
549 /*
550 * Validate input.
551 */
552 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
553 || (RTUINT)PortStart + cPorts > 0x10000)
554 {
555 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
556 return VERR_IOM_INVALID_IOPORT_RANGE;
557 }
558 if (!pfnOutCallback && !pfnInCallback)
559 {
560 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
561 return VERR_INVALID_PARAMETER;
562 }
563 if (!pfnOutCallback)
564 pfnOutCallback = iomR3IOPortDummyOut;
565 if (!pfnInCallback)
566 pfnInCallback = iomR3IOPortDummyIn;
567 if (!pfnOutStrCallback)
568 pfnOutStrCallback = iomR3IOPortDummyOutStr;
569 if (!pfnInStrCallback)
570 pfnInStrCallback = iomR3IOPortDummyInStr;
571
572 /* Flush the IO port lookup cache */
573 iomR3FlushCache(pVM);
574
575 /*
576 * Allocate new range record and initialize it.
577 */
578 PIOMIOPORTRANGER3 pRange;
579 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
580 if (RT_SUCCESS(rc))
581 {
582 pRange->Core.Key = PortStart;
583 pRange->Core.KeyLast = PortStart + (cPorts - 1);
584 pRange->Port = PortStart;
585 pRange->cPorts = cPorts;
586 pRange->pvUser = pvUser;
587 pRange->pDevIns = pDevIns;
588 pRange->pfnOutCallback = pfnOutCallback;
589 pRange->pfnInCallback = pfnInCallback;
590 pRange->pfnOutStrCallback = pfnOutStrCallback;
591 pRange->pfnInStrCallback = pfnInStrCallback;
592 pRange->pszDesc = pszDesc;
593
594 /*
595 * Try Insert it.
596 */
597 IOM_LOCK_EXCL(pVM);
598 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
599 {
600#ifdef VBOX_WITH_STATISTICS
601 for (unsigned iPort = 0; iPort < cPorts; iPort++)
602 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
603#endif
604 IOM_UNLOCK_EXCL(pVM);
605 return VINF_SUCCESS;
606 }
607 IOM_UNLOCK_EXCL(pVM);
608
609 /* conflict. */
610 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
611 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
612 MMHyperFree(pVM, pRange);
613 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
614 }
615
616 return rc;
617}
618
619
620/**
621 * Registers a I/O port RC handler.
622 *
623 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
624 * using IOMIOPortRegisterR3() before calling this function.
625 *
626 *
627 * @returns VBox status code.
628 *
629 * @param pVM Pointer to the VM.
630 * @param pDevIns PDM device instance owning the port range.
631 * @param PortStart First port number in the range.
632 * @param cPorts Number of ports to register.
633 * @param pvUser User argument for the callbacks.
634 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
635 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
636 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
637 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
638 * @param pszDesc Pointer to description string. This must not be freed.
639 */
640VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
641 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
642 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
643{
644 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
645 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
646 AssertReturn(!HMIsEnabled(pVM), VERR_IOM_HM_IPE);
647
648 /*
649 * Validate input.
650 */
651 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
652 || (RTUINT)PortStart + cPorts > 0x10000)
653 {
654 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
655 return VERR_IOM_INVALID_IOPORT_RANGE;
656 }
657 RTIOPORT PortLast = PortStart + (cPorts - 1);
658 if (!pfnOutCallback && !pfnInCallback)
659 {
660 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
661 return VERR_INVALID_PARAMETER;
662 }
663
664 IOM_LOCK_EXCL(pVM);
665
666 /*
667 * Validate that there are ring-3 ranges for the ports.
668 */
669 RTIOPORT Port = PortStart;
670 while (Port <= PortLast && Port >= PortStart)
671 {
672 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
673 if (!pRange)
674 {
675 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
676 IOM_UNLOCK_EXCL(pVM);
677 return VERR_IOM_NO_R3_IOPORT_RANGE;
678 }
679#ifndef IOM_NO_PDMINS_CHECKS
680# ifndef IN_RC
681 if (pRange->pDevIns != pDevIns)
682# else
683 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
684# endif
685 {
686 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
687 IOM_UNLOCK_EXCL(pVM);
688 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
689 }
690#endif
691 Port = pRange->Core.KeyLast + 1;
692 }
693
694 /* Flush the IO port lookup cache */
695 iomR3FlushCache(pVM);
696
697 /*
698 * Allocate new range record and initialize it.
699 */
700 PIOMIOPORTRANGERC pRange;
701 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
702 if (RT_SUCCESS(rc))
703 {
704 pRange->Core.Key = PortStart;
705 pRange->Core.KeyLast = PortLast;
706 pRange->Port = PortStart;
707 pRange->cPorts = cPorts;
708 pRange->pvUser = pvUser;
709 pRange->pfnOutCallback = pfnOutCallback;
710 pRange->pfnInCallback = pfnInCallback;
711 pRange->pfnOutStrCallback = pfnOutStrCallback;
712 pRange->pfnInStrCallback = pfnInStrCallback;
713 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
714 pRange->pszDesc = pszDesc;
715
716 /*
717 * Insert it.
718 */
719 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
720 {
721 IOM_UNLOCK_EXCL(pVM);
722 return VINF_SUCCESS;
723 }
724
725 /* conflict. */
726 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
727 MMHyperFree(pVM, pRange);
728 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
729 }
730 IOM_UNLOCK_EXCL(pVM);
731 return rc;
732}
733
734
735/**
736 * Registers a Port IO R0 handler.
737 *
738 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
739 * using IOMR3IOPortRegisterR3() before calling this function.
740 *
741 *
742 * @returns VBox status code.
743 *
744 * @param pVM Pointer to the VM.
745 * @param pDevIns PDM device instance owning the port range.
746 * @param PortStart First port number in the range.
747 * @param cPorts Number of ports to register.
748 * @param pvUser User argument for the callbacks.
749 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
750 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
751 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
752 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
753 * @param pszDesc Pointer to description string. This must not be freed.
754 */
755VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
756 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
757 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
758 const char *pszDesc)
759{
760 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
761 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
762
763 /*
764 * Validate input.
765 */
766 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
767 || (RTUINT)PortStart + cPorts > 0x10000)
768 {
769 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
770 return VERR_IOM_INVALID_IOPORT_RANGE;
771 }
772 RTIOPORT PortLast = PortStart + (cPorts - 1);
773 if (!pfnOutCallback && !pfnInCallback)
774 {
775 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
776 return VERR_INVALID_PARAMETER;
777 }
778
779 IOM_LOCK_EXCL(pVM);
780
781 /*
782 * Validate that there are ring-3 ranges for the ports.
783 */
784 RTIOPORT Port = PortStart;
785 while (Port <= PortLast && Port >= PortStart)
786 {
787 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
788 if (!pRange)
789 {
790 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
791 IOM_UNLOCK_EXCL(pVM);
792 return VERR_IOM_NO_R3_IOPORT_RANGE;
793 }
794#ifndef IOM_NO_PDMINS_CHECKS
795# ifndef IN_RC
796 if (pRange->pDevIns != pDevIns)
797# else
798 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
799# endif
800 {
801 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
802 IOM_UNLOCK_EXCL(pVM);
803 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
804 }
805#endif
806 Port = pRange->Core.KeyLast + 1;
807 }
808
809 /* Flush the IO port lookup cache */
810 iomR3FlushCache(pVM);
811
812 /*
813 * Allocate new range record and initialize it.
814 */
815 PIOMIOPORTRANGER0 pRange;
816 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
817 if (RT_SUCCESS(rc))
818 {
819 pRange->Core.Key = PortStart;
820 pRange->Core.KeyLast = PortLast;
821 pRange->Port = PortStart;
822 pRange->cPorts = cPorts;
823 pRange->pvUser = pvUser;
824 pRange->pfnOutCallback = pfnOutCallback;
825 pRange->pfnInCallback = pfnInCallback;
826 pRange->pfnOutStrCallback = pfnOutStrCallback;
827 pRange->pfnInStrCallback = pfnInStrCallback;
828 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
829 pRange->pszDesc = pszDesc;
830
831 /*
832 * Insert it.
833 */
834 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
835 {
836 IOM_UNLOCK_EXCL(pVM);
837 return VINF_SUCCESS;
838 }
839
840 /* conflict. */
841 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
842 MMHyperFree(pVM, pRange);
843 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
844 }
845 IOM_UNLOCK_EXCL(pVM);
846 return rc;
847}
848
849
850/**
851 * Deregisters a I/O Port range.
852 *
853 * The specified range must be registered using IOMR3IOPortRegister previous to
854 * this call. The range does can be a smaller part of the range specified to
855 * IOMR3IOPortRegister, but it can never be larger.
856 *
857 * This function will remove GC, R0 and R3 context port handlers for this range.
858 *
859 * @returns VBox status code.
860 *
861 * @param pVM The virtual machine.
862 * @param pDevIns The device instance associated with the range.
863 * @param PortStart First port number in the range.
864 * @param cPorts Number of ports to remove starting at PortStart.
865 *
866 * @remark This function mainly for PCI PnP Config and will not do
867 * all the checks you might expect it to do.
868 */
869VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
870{
871 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
872
873 /*
874 * Validate input.
875 */
876 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
877 || (RTUINT)PortStart + cPorts > 0x10000)
878 {
879 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
880 return VERR_IOM_INVALID_IOPORT_RANGE;
881 }
882
883 IOM_LOCK_EXCL(pVM);
884
885 /* Flush the IO port lookup cache */
886 iomR3FlushCache(pVM);
887
888 /*
889 * Check ownership.
890 */
891 RTIOPORT PortLast = PortStart + (cPorts - 1);
892 RTIOPORT Port = PortStart;
893 while (Port <= PortLast && Port >= PortStart)
894 {
895 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
896 if (pRange)
897 {
898 Assert(Port <= pRange->Core.KeyLast);
899#ifndef IOM_NO_PDMINS_CHECKS
900 if (pRange->pDevIns != pDevIns)
901 {
902 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
903 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
904 IOM_UNLOCK_EXCL(pVM);
905 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
906 }
907#endif /* !IOM_NO_PDMINS_CHECKS */
908 Port = pRange->Core.KeyLast;
909 }
910 Port++;
911 }
912
913 /*
914 * Remove any RC ranges first.
915 */
916 int rc = VINF_SUCCESS;
917 Port = PortStart;
918 while (Port <= PortLast && Port >= PortStart)
919 {
920 /*
921 * Try find range.
922 */
923 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
924 if (pRange)
925 {
926 if ( pRange->Core.Key == Port
927 && pRange->Core.KeyLast <= PortLast)
928 {
929 /*
930 * Kick out the entire range.
931 */
932 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
933 Assert(pv == (void *)pRange); NOREF(pv);
934 Port += pRange->cPorts;
935 MMHyperFree(pVM, pRange);
936 }
937 else if (pRange->Core.Key == Port)
938 {
939 /*
940 * Cut of the head of the range, done.
941 */
942 pRange->cPorts -= Port - pRange->Port;
943 pRange->Core.Key = Port;
944 pRange->Port = Port;
945 break;
946 }
947 else if (pRange->Core.KeyLast <= PortLast)
948 {
949 /*
950 * Just cut of the tail.
951 */
952 unsigned c = pRange->Core.KeyLast - Port + 1;
953 pRange->Core.KeyLast -= c;
954 pRange->cPorts -= c;
955 Port += c;
956 }
957 else
958 {
959 /*
960 * Split the range, done.
961 */
962 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
963 /* create tail. */
964 PIOMIOPORTRANGERC pRangeNew;
965 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
966 if (RT_FAILURE(rc2))
967 {
968 IOM_UNLOCK_EXCL(pVM);
969 return rc2;
970 }
971 *pRangeNew = *pRange;
972 pRangeNew->Core.Key = PortLast;
973 pRangeNew->Port = PortLast;
974 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
975
976 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
977
978 /* adjust head */
979 pRange->Core.KeyLast = Port - 1;
980 pRange->cPorts = Port - pRange->Port;
981
982 /* insert */
983 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
984 {
985 AssertMsgFailed(("This cannot happen!\n"));
986 MMHyperFree(pVM, pRangeNew);
987 rc = VERR_IOM_IOPORT_IPE_1;
988 }
989 break;
990 }
991 }
992 else /* next port */
993 Port++;
994 } /* for all ports - RC. */
995
996
997 /*
998 * Remove any R0 ranges.
999 */
1000 Port = PortStart;
1001 while (Port <= PortLast && Port >= PortStart)
1002 {
1003 /*
1004 * Try find range.
1005 */
1006 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1007 if (pRange)
1008 {
1009 if ( pRange->Core.Key == Port
1010 && pRange->Core.KeyLast <= PortLast)
1011 {
1012 /*
1013 * Kick out the entire range.
1014 */
1015 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
1016 Assert(pv == (void *)pRange); NOREF(pv);
1017 Port += pRange->cPorts;
1018 MMHyperFree(pVM, pRange);
1019 }
1020 else if (pRange->Core.Key == Port)
1021 {
1022 /*
1023 * Cut of the head of the range, done.
1024 */
1025 pRange->cPorts -= Port - pRange->Port;
1026 pRange->Core.Key = Port;
1027 pRange->Port = Port;
1028 break;
1029 }
1030 else if (pRange->Core.KeyLast <= PortLast)
1031 {
1032 /*
1033 * Just cut of the tail.
1034 */
1035 unsigned c = pRange->Core.KeyLast - Port + 1;
1036 pRange->Core.KeyLast -= c;
1037 pRange->cPorts -= c;
1038 Port += c;
1039 }
1040 else
1041 {
1042 /*
1043 * Split the range, done.
1044 */
1045 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1046 /* create tail. */
1047 PIOMIOPORTRANGER0 pRangeNew;
1048 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1049 if (RT_FAILURE(rc2))
1050 {
1051 IOM_UNLOCK_EXCL(pVM);
1052 return rc2;
1053 }
1054 *pRangeNew = *pRange;
1055 pRangeNew->Core.Key = PortLast;
1056 pRangeNew->Port = PortLast;
1057 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1058
1059 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1060
1061 /* adjust head */
1062 pRange->Core.KeyLast = Port - 1;
1063 pRange->cPorts = Port - pRange->Port;
1064
1065 /* insert */
1066 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1067 {
1068 AssertMsgFailed(("This cannot happen!\n"));
1069 MMHyperFree(pVM, pRangeNew);
1070 rc = VERR_IOM_IOPORT_IPE_1;
1071 }
1072 break;
1073 }
1074 }
1075 else /* next port */
1076 Port++;
1077 } /* for all ports - R0. */
1078
1079 /*
1080 * And the same procedure for ring-3 ranges.
1081 */
1082 Port = PortStart;
1083 while (Port <= PortLast && Port >= PortStart)
1084 {
1085 /*
1086 * Try find range.
1087 */
1088 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1089 if (pRange)
1090 {
1091 if ( pRange->Core.Key == Port
1092 && pRange->Core.KeyLast <= PortLast)
1093 {
1094 /*
1095 * Kick out the entire range.
1096 */
1097 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1098 Assert(pv == (void *)pRange); NOREF(pv);
1099 Port += pRange->cPorts;
1100 MMHyperFree(pVM, pRange);
1101 }
1102 else if (pRange->Core.Key == Port)
1103 {
1104 /*
1105 * Cut of the head of the range, done.
1106 */
1107 pRange->cPorts -= Port - pRange->Port;
1108 pRange->Core.Key = Port;
1109 pRange->Port = Port;
1110 break;
1111 }
1112 else if (pRange->Core.KeyLast <= PortLast)
1113 {
1114 /*
1115 * Just cut of the tail.
1116 */
1117 unsigned c = pRange->Core.KeyLast - Port + 1;
1118 pRange->Core.KeyLast -= c;
1119 pRange->cPorts -= c;
1120 Port += c;
1121 }
1122 else
1123 {
1124 /*
1125 * Split the range, done.
1126 */
1127 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1128 /* create tail. */
1129 PIOMIOPORTRANGER3 pRangeNew;
1130 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1131 if (RT_FAILURE(rc2))
1132 {
1133 IOM_UNLOCK_EXCL(pVM);
1134 return rc2;
1135 }
1136 *pRangeNew = *pRange;
1137 pRangeNew->Core.Key = PortLast;
1138 pRangeNew->Port = PortLast;
1139 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1140
1141 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1142
1143 /* adjust head */
1144 pRange->Core.KeyLast = Port - 1;
1145 pRange->cPorts = Port - pRange->Port;
1146
1147 /* insert */
1148 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1149 {
1150 AssertMsgFailed(("This cannot happen!\n"));
1151 MMHyperFree(pVM, pRangeNew);
1152 rc = VERR_IOM_IOPORT_IPE_1;
1153 }
1154 break;
1155 }
1156 }
1157 else /* next port */
1158 Port++;
1159 } /* for all ports - ring-3. */
1160
1161 /* done */
1162 IOM_UNLOCK_EXCL(pVM);
1163 return rc;
1164}
1165
1166
1167/**
1168 * Dummy Port I/O Handler for IN operations.
1169 *
1170 * @returns VBox status code.
1171 *
1172 * @param pDevIns The device instance.
1173 * @param pvUser User argument.
1174 * @param Port Port number used for the IN operation.
1175 * @param pu32 Where to store the result.
1176 * @param cb Number of bytes read.
1177 */
1178static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1179{
1180 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1181 switch (cb)
1182 {
1183 case 1: *pu32 = 0xff; break;
1184 case 2: *pu32 = 0xffff; break;
1185 case 4: *pu32 = UINT32_C(0xffffffff); break;
1186 default:
1187 AssertReleaseMsgFailed(("cb=%d\n", cb));
1188 return VERR_IOM_IOPORT_IPE_2;
1189 }
1190 return VINF_SUCCESS;
1191}
1192
1193
1194/**
1195 * Dummy Port I/O Handler for string IN operations.
1196 *
1197 * @returns VBox status code.
1198 *
1199 * @param pDevIns The device instance.
1200 * @param pvUser User argument.
1201 * @param Port Port number used for the string IN operation.
1202 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1203 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1204 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1205 */
1206static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1207 PRTGCUINTREG pcTransfer, unsigned cb)
1208{
1209 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1210 return VINF_SUCCESS;
1211}
1212
1213
1214/**
1215 * Dummy Port I/O Handler for OUT operations.
1216 *
1217 * @returns VBox status code.
1218 *
1219 * @param pDevIns The device instance.
1220 * @param pvUser User argument.
1221 * @param Port Port number used for the OUT operation.
1222 * @param u32 The value to output.
1223 * @param cb The value size in bytes.
1224 */
1225static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1226{
1227 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1228 return VINF_SUCCESS;
1229}
1230
1231
1232/**
1233 * Dummy Port I/O Handler for string OUT operations.
1234 *
1235 * @returns VBox status code.
1236 *
1237 * @param pDevIns The device instance.
1238 * @param pvUser User argument.
1239 * @param Port Port number used for the string OUT operation.
1240 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1241 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1242 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1243 */
1244static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1245 PRTGCUINTREG pcTransfer, unsigned cb)
1246{
1247 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1248 return VINF_SUCCESS;
1249}
1250
1251
1252/**
1253 * Display a single I/O port ring-3 range.
1254 *
1255 * @returns 0
1256 * @param pNode Pointer to I/O port HC range.
1257 * @param pvUser Pointer to info output callback structure.
1258 */
1259static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1260{
1261 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1262 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1263 pHlp->pfnPrintf(pHlp,
1264 "%04x-%04x %p %p %p %p %s\n",
1265 pRange->Core.Key,
1266 pRange->Core.KeyLast,
1267 pRange->pDevIns,
1268 pRange->pfnInCallback,
1269 pRange->pfnOutCallback,
1270 pRange->pvUser,
1271 pRange->pszDesc);
1272 return 0;
1273}
1274
1275
1276/**
1277 * Display a single I/O port GC range.
1278 *
1279 * @returns 0
1280 * @param pNode Pointer to IOPORT GC range.
1281 * @param pvUser Pointer to info output callback structure.
1282 */
1283static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1284{
1285 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1286 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1287 pHlp->pfnPrintf(pHlp,
1288 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1289 pRange->Core.Key,
1290 pRange->Core.KeyLast,
1291 pRange->pDevIns,
1292 pRange->pfnInCallback,
1293 pRange->pfnOutCallback,
1294 pRange->pvUser,
1295 pRange->pszDesc);
1296 return 0;
1297}
1298
1299
1300/**
1301 * Display all registered I/O port ranges.
1302 *
1303 * @param pVM Pointer to the VM.
1304 * @param pHlp The info helpers.
1305 * @param pszArgs Arguments, ignored.
1306 */
1307static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1308{
1309 NOREF(pszArgs);
1310 pHlp->pfnPrintf(pHlp,
1311 "I/O Port R3 ranges (pVM=%p)\n"
1312 "Range %.*s %.*s %.*s %.*s Description\n",
1313 pVM,
1314 sizeof(RTHCPTR) * 2, "pDevIns ",
1315 sizeof(RTHCPTR) * 2, "In ",
1316 sizeof(RTHCPTR) * 2, "Out ",
1317 sizeof(RTHCPTR) * 2, "pvUser ");
1318 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1319
1320 pHlp->pfnPrintf(pHlp,
1321 "I/O Port R0 ranges (pVM=%p)\n"
1322 "Range %.*s %.*s %.*s %.*s Description\n",
1323 pVM,
1324 sizeof(RTHCPTR) * 2, "pDevIns ",
1325 sizeof(RTHCPTR) * 2, "In ",
1326 sizeof(RTHCPTR) * 2, "Out ",
1327 sizeof(RTHCPTR) * 2, "pvUser ");
1328 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1329
1330 pHlp->pfnPrintf(pHlp,
1331 "I/O Port GC ranges (pVM=%p)\n"
1332 "Range %.*s %.*s %.*s %.*s Description\n",
1333 pVM,
1334 sizeof(RTRCPTR) * 2, "pDevIns ",
1335 sizeof(RTRCPTR) * 2, "In ",
1336 sizeof(RTRCPTR) * 2, "Out ",
1337 sizeof(RTRCPTR) * 2, "pvUser ");
1338 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1339}
1340
1341
1342/**
1343 * Registers a Memory Mapped I/O R3 handler.
1344 *
1345 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1346 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1347 *
1348 * @returns VBox status code.
1349 *
1350 * @param pVM Pointer to the VM.
1351 * @param pDevIns PDM device instance owning the MMIO range.
1352 * @param GCPhysStart First physical address in the range.
1353 * @param cbRange The size of the range (in bytes).
1354 * @param pvUser User argument for the callbacks.
1355 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1356 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1357 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1358 * @param pszDesc Pointer to description string. This must not be freed.
1359 */
1360VMMR3_INT_DECL(int)
1361IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1362 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1363 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1364{
1365 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1366 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1367 int rc;
1368
1369 /*
1370 * Validate input.
1371 */
1372 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1373 VERR_IOM_INVALID_MMIO_RANGE);
1374 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1375 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1376 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1377 ("%#x\n", fFlags),
1378 VERR_INVALID_PARAMETER);
1379
1380 /*
1381 * Resolve the GC/R0 handler addresses lazily because of init order.
1382 */
1383 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1384 {
1385 if (!HMIsEnabled(pVM))
1386 {
1387 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1388 AssertLogRelRCReturn(rc, rc);
1389 }
1390 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1391 AssertLogRelRCReturn(rc, rc);
1392 }
1393
1394 /*
1395 * Allocate new range record and initialize it.
1396 */
1397 PIOMMMIORANGE pRange;
1398 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1399 if (RT_SUCCESS(rc))
1400 {
1401 pRange->Core.Key = GCPhysStart;
1402 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1403 pRange->GCPhys = GCPhysStart;
1404 pRange->cb = cbRange;
1405 pRange->cRefs = 1; /* The tree reference. */
1406 pRange->pszDesc = pszDesc;
1407
1408 //pRange->pvUserR0 = NIL_RTR0PTR;
1409 //pRange->pDevInsR0 = NIL_RTR0PTR;
1410 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1411 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1412 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1413
1414 //pRange->pvUserRC = NIL_RTRCPTR;
1415 //pRange->pDevInsRC = NIL_RTRCPTR;
1416 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1417 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1418 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1419
1420 pRange->fFlags = fFlags;
1421
1422 pRange->pvUserR3 = pvUser;
1423 pRange->pDevInsR3 = pDevIns;
1424 pRange->pfnReadCallbackR3 = pfnReadCallback;
1425 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1426 pRange->pfnFillCallbackR3 = pfnFillCallback;
1427
1428 /*
1429 * Try register it with PGM and then insert it into the tree.
1430 */
1431 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1432 IOMR3MMIOHandler, pRange,
1433 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1434 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1435 if (RT_SUCCESS(rc))
1436 {
1437 IOM_LOCK_EXCL(pVM);
1438 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1439 {
1440 iomR3FlushCache(pVM);
1441 IOM_UNLOCK_EXCL(pVM);
1442 return VINF_SUCCESS;
1443 }
1444
1445 /* bail out */
1446 IOM_UNLOCK_EXCL(pVM);
1447 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1448 AssertMsgFailed(("This cannot happen!\n"));
1449 rc = VERR_IOM_IOPORT_IPE_3;
1450 }
1451
1452 MMHyperFree(pVM, pRange);
1453 }
1454 if (pDevIns->iInstance > 0)
1455 MMR3HeapFree((void *)pszDesc);
1456 return rc;
1457}
1458
1459
1460/**
1461 * Registers a Memory Mapped I/O RC handler range.
1462 *
1463 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1464 * using IOMMMIORegisterR3() before calling this function.
1465 *
1466 *
1467 * @returns VBox status code.
1468 *
1469 * @param pVM Pointer to the VM.
1470 * @param pDevIns PDM device instance owning the MMIO range.
1471 * @param GCPhysStart First physical address in the range.
1472 * @param cbRange The size of the range (in bytes).
1473 * @param pvUser User argument for the callbacks.
1474 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1475 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1476 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1477 * @thread EMT
1478 */
1479VMMR3_INT_DECL(int)
1480IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1481 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1482 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1483{
1484 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1485 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1486 AssertReturn(!HMIsEnabled(pVM), VERR_IOM_HM_IPE);
1487
1488 /*
1489 * Validate input.
1490 */
1491 if (!pfnWriteCallback && !pfnReadCallback)
1492 {
1493 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1494 return VERR_INVALID_PARAMETER;
1495 }
1496 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1497
1498 /*
1499 * Find the MMIO range and check that the input matches.
1500 */
1501 IOM_LOCK_EXCL(pVM);
1502 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1503 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1504 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1505 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1506 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1507
1508 pRange->pvUserRC = pvUser;
1509 pRange->pfnReadCallbackRC = pfnReadCallback;
1510 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1511 pRange->pfnFillCallbackRC = pfnFillCallback;
1512 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1513 IOM_UNLOCK_EXCL(pVM);
1514
1515 return VINF_SUCCESS;
1516}
1517
1518
1519/**
1520 * Registers a Memory Mapped I/O R0 handler range.
1521 *
1522 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1523 * using IOMMR3MIORegisterHC() before calling this function.
1524 *
1525 *
1526 * @returns VBox status code.
1527 *
1528 * @param pVM Pointer to the VM.
1529 * @param pDevIns PDM device instance owning the MMIO range.
1530 * @param GCPhysStart First physical address in the range.
1531 * @param cbRange The size of the range (in bytes).
1532 * @param pvUser User argument for the callbacks.
1533 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1534 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1535 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1536 * @thread EMT
1537 */
1538VMMR3_INT_DECL(int)
1539IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1540 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1541 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1542 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1543{
1544 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1545 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1546
1547 /*
1548 * Validate input.
1549 */
1550 if (!pfnWriteCallback && !pfnReadCallback)
1551 {
1552 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1553 return VERR_INVALID_PARAMETER;
1554 }
1555 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1556
1557 /*
1558 * Find the MMIO range and check that the input matches.
1559 */
1560 IOM_LOCK_EXCL(pVM);
1561 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhysStart);
1562 AssertReturnStmt(pRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1563 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK_EXCL(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1564 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1565 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK_EXCL(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1566
1567 pRange->pvUserR0 = pvUser;
1568 pRange->pfnReadCallbackR0 = pfnReadCallback;
1569 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1570 pRange->pfnFillCallbackR0 = pfnFillCallback;
1571 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1572 IOM_UNLOCK_EXCL(pVM);
1573
1574 return VINF_SUCCESS;
1575}
1576
1577
1578/**
1579 * Deregisters a Memory Mapped I/O handler range.
1580 *
1581 * Registered GC, R0, and R3 ranges are affected.
1582 *
1583 * @returns VBox status code.
1584 *
1585 * @param pVM The virtual machine.
1586 * @param pDevIns Device instance which the MMIO region is registered.
1587 * @param GCPhysStart First physical address (GC) in the range.
1588 * @param cbRange Number of bytes to deregister.
1589 *
1590 * @remark This function mainly for PCI PnP Config and will not do
1591 * all the checks you might expect it to do.
1592 */
1593VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1594{
1595 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1596
1597 /*
1598 * Validate input.
1599 */
1600 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1601 if (GCPhysLast < GCPhysStart)
1602 {
1603 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1604 return VERR_IOM_INVALID_MMIO_RANGE;
1605 }
1606 PVMCPU pVCpu = VMMGetCpu(pVM); Assert(pVCpu);
1607
1608 IOM_LOCK_EXCL(pVM);
1609
1610 /*
1611 * Check ownership and such for the entire area.
1612 */
1613 RTGCPHYS GCPhys = GCPhysStart;
1614 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1615 {
1616 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, pVCpu, GCPhys);
1617 if (!pRange)
1618 {
1619 IOM_UNLOCK_EXCL(pVM);
1620 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1621 }
1622 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1623 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1624 IOM_UNLOCK_EXCL(pVM),
1625 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1626 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1627 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1628 IOM_UNLOCK_EXCL(pVM),
1629 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1630
1631 /* next */
1632 Assert(GCPhys <= pRange->Core.KeyLast);
1633 GCPhys = pRange->Core.KeyLast + 1;
1634 }
1635
1636 /*
1637 * Do the actual removing of the MMIO ranges.
1638 */
1639 GCPhys = GCPhysStart;
1640 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1641 {
1642 iomR3FlushCache(pVM);
1643
1644 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1645 Assert(pRange);
1646 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1647 IOM_UNLOCK_EXCL(pVM); /* Lock order fun. */
1648
1649 /* remove it from PGM */
1650 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1651 AssertRC(rc);
1652
1653 IOM_LOCK_EXCL(pVM);
1654
1655 /* advance and free. */
1656 GCPhys = pRange->Core.KeyLast + 1;
1657 if (pDevIns->iInstance > 0)
1658 {
1659 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1660 MMR3HeapFree(pvDesc);
1661 }
1662 iomMmioReleaseRange(pVM, pRange);
1663 }
1664
1665 IOM_UNLOCK_EXCL(pVM);
1666 return VINF_SUCCESS;
1667}
1668
1669
1670/**
1671 * Display a single MMIO range.
1672 *
1673 * @returns 0
1674 * @param pNode Pointer to MMIO R3 range.
1675 * @param pvUser Pointer to info output callback structure.
1676 */
1677static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1678{
1679 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1680 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1681 pHlp->pfnPrintf(pHlp,
1682 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1683 pRange->Core.Key,
1684 pRange->Core.KeyLast,
1685 pRange->pDevInsR3,
1686 pRange->pfnReadCallbackR3,
1687 pRange->pfnWriteCallbackR3,
1688 pRange->pfnFillCallbackR3,
1689 pRange->pvUserR3,
1690 pRange->pszDesc);
1691 pHlp->pfnPrintf(pHlp,
1692 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1693 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1694 pRange->pDevInsR0,
1695 pRange->pfnReadCallbackR0,
1696 pRange->pfnWriteCallbackR0,
1697 pRange->pfnFillCallbackR0,
1698 pRange->pvUserR0);
1699 pHlp->pfnPrintf(pHlp,
1700 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1701 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1702 pRange->pDevInsRC,
1703 pRange->pfnReadCallbackRC,
1704 pRange->pfnWriteCallbackRC,
1705 pRange->pfnFillCallbackRC,
1706 pRange->pvUserRC);
1707 return 0;
1708}
1709
1710
1711/**
1712 * Display registered MMIO ranges to the log.
1713 *
1714 * @param pVM Pointer to the VM.
1715 * @param pHlp The info helpers.
1716 * @param pszArgs Arguments, ignored.
1717 */
1718static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1719{
1720 NOREF(pszArgs);
1721 pHlp->pfnPrintf(pHlp,
1722 "MMIO ranges (pVM=%p)\n"
1723 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1724 pVM,
1725 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1726 sizeof(RTHCPTR) * 2, "pDevIns ",
1727 sizeof(RTHCPTR) * 2, "Read ",
1728 sizeof(RTHCPTR) * 2, "Write ",
1729 sizeof(RTHCPTR) * 2, "Fill ",
1730 sizeof(RTHCPTR) * 2, "pvUser ",
1731 "Description");
1732 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1733}
1734
1735
1736#ifdef VBOX_WITH_STATISTICS
1737/**
1738 * Tries to come up with the standard name for a port.
1739 *
1740 * @returns Pointer to readonly string if known.
1741 * @returns NULL if unknown port number.
1742 *
1743 * @param Port The port to name.
1744 */
1745static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1746{
1747 switch (Port)
1748 {
1749 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1750 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1751 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1752 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1753 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1754 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1755 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1756 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1757 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1758 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1759 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1760 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1761 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1762 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1763 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1764 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1765
1766 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1767 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1768 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1769 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1770 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1771 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1772 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1773 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1774 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1775 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1776 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1777 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1778 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1779 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1780 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1781 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1782 return "System Reserved";
1783
1784 case 0x60:
1785 case 0x64:
1786 return "Keyboard & Mouse";
1787
1788 case 0x378:
1789 case 0x379:
1790 case 0x37a:
1791 case 0x37b:
1792 case 0x37c:
1793 case 0x37d:
1794 case 0x37e:
1795 case 0x37f:
1796 case 0x3bc:
1797 case 0x3bd:
1798 case 0x3be:
1799 case 0x3bf:
1800 case 0x278:
1801 case 0x279:
1802 case 0x27a:
1803 case 0x27b:
1804 case 0x27c:
1805 case 0x27d:
1806 case 0x27e:
1807 case 0x27f:
1808 return "LPT1/2/3";
1809
1810 case 0x3f8:
1811 case 0x3f9:
1812 case 0x3fa:
1813 case 0x3fb:
1814 case 0x3fc:
1815 case 0x3fd:
1816 case 0x3fe:
1817 case 0x3ff:
1818 return "COM1";
1819
1820 case 0x2f8:
1821 case 0x2f9:
1822 case 0x2fa:
1823 case 0x2fb:
1824 case 0x2fc:
1825 case 0x2fd:
1826 case 0x2fe:
1827 case 0x2ff:
1828 return "COM2";
1829
1830 case 0x3e8:
1831 case 0x3e9:
1832 case 0x3ea:
1833 case 0x3eb:
1834 case 0x3ec:
1835 case 0x3ed:
1836 case 0x3ee:
1837 case 0x3ef:
1838 return "COM3";
1839
1840 case 0x2e8:
1841 case 0x2e9:
1842 case 0x2ea:
1843 case 0x2eb:
1844 case 0x2ec:
1845 case 0x2ed:
1846 case 0x2ee:
1847 case 0x2ef:
1848 return "COM4";
1849
1850 case 0x200:
1851 case 0x201:
1852 case 0x202:
1853 case 0x203:
1854 case 0x204:
1855 case 0x205:
1856 case 0x206:
1857 case 0x207:
1858 return "Joystick";
1859
1860 case 0x3f0:
1861 case 0x3f1:
1862 case 0x3f2:
1863 case 0x3f3:
1864 case 0x3f4:
1865 case 0x3f5:
1866 case 0x3f6:
1867 case 0x3f7:
1868 return "Floppy";
1869
1870 case 0x1f0:
1871 case 0x1f1:
1872 case 0x1f2:
1873 case 0x1f3:
1874 case 0x1f4:
1875 case 0x1f5:
1876 case 0x1f6:
1877 case 0x1f7:
1878 //case 0x3f6:
1879 //case 0x3f7:
1880 return "IDE 1st";
1881
1882 case 0x170:
1883 case 0x171:
1884 case 0x172:
1885 case 0x173:
1886 case 0x174:
1887 case 0x175:
1888 case 0x176:
1889 case 0x177:
1890 case 0x376:
1891 case 0x377:
1892 return "IDE 2nd";
1893
1894 case 0x1e0:
1895 case 0x1e1:
1896 case 0x1e2:
1897 case 0x1e3:
1898 case 0x1e4:
1899 case 0x1e5:
1900 case 0x1e6:
1901 case 0x1e7:
1902 case 0x3e6:
1903 case 0x3e7:
1904 return "IDE 3rd";
1905
1906 case 0x160:
1907 case 0x161:
1908 case 0x162:
1909 case 0x163:
1910 case 0x164:
1911 case 0x165:
1912 case 0x166:
1913 case 0x167:
1914 case 0x366:
1915 case 0x367:
1916 return "IDE 4th";
1917
1918 case 0x130: case 0x140: case 0x150:
1919 case 0x131: case 0x141: case 0x151:
1920 case 0x132: case 0x142: case 0x152:
1921 case 0x133: case 0x143: case 0x153:
1922 case 0x134: case 0x144: case 0x154:
1923 case 0x135: case 0x145: case 0x155:
1924 case 0x136: case 0x146: case 0x156:
1925 case 0x137: case 0x147: case 0x157:
1926 case 0x138: case 0x148: case 0x158:
1927 case 0x139: case 0x149: case 0x159:
1928 case 0x13a: case 0x14a: case 0x15a:
1929 case 0x13b: case 0x14b: case 0x15b:
1930 case 0x13c: case 0x14c: case 0x15c:
1931 case 0x13d: case 0x14d: case 0x15d:
1932 case 0x13e: case 0x14e: case 0x15e:
1933 case 0x13f: case 0x14f: case 0x15f:
1934 case 0x220: case 0x230:
1935 case 0x221: case 0x231:
1936 case 0x222: case 0x232:
1937 case 0x223: case 0x233:
1938 case 0x224: case 0x234:
1939 case 0x225: case 0x235:
1940 case 0x226: case 0x236:
1941 case 0x227: case 0x237:
1942 case 0x228: case 0x238:
1943 case 0x229: case 0x239:
1944 case 0x22a: case 0x23a:
1945 case 0x22b: case 0x23b:
1946 case 0x22c: case 0x23c:
1947 case 0x22d: case 0x23d:
1948 case 0x22e: case 0x23e:
1949 case 0x22f: case 0x23f:
1950 case 0x330: case 0x340: case 0x350:
1951 case 0x331: case 0x341: case 0x351:
1952 case 0x332: case 0x342: case 0x352:
1953 case 0x333: case 0x343: case 0x353:
1954 case 0x334: case 0x344: case 0x354:
1955 case 0x335: case 0x345: case 0x355:
1956 case 0x336: case 0x346: case 0x356:
1957 case 0x337: case 0x347: case 0x357:
1958 case 0x338: case 0x348: case 0x358:
1959 case 0x339: case 0x349: case 0x359:
1960 case 0x33a: case 0x34a: case 0x35a:
1961 case 0x33b: case 0x34b: case 0x35b:
1962 case 0x33c: case 0x34c: case 0x35c:
1963 case 0x33d: case 0x34d: case 0x35d:
1964 case 0x33e: case 0x34e: case 0x35e:
1965 case 0x33f: case 0x34f: case 0x35f:
1966 return "SCSI (typically)";
1967
1968 case 0x320:
1969 case 0x321:
1970 case 0x322:
1971 case 0x323:
1972 case 0x324:
1973 case 0x325:
1974 case 0x326:
1975 case 0x327:
1976 return "XT HD";
1977
1978 case 0x3b0:
1979 case 0x3b1:
1980 case 0x3b2:
1981 case 0x3b3:
1982 case 0x3b4:
1983 case 0x3b5:
1984 case 0x3b6:
1985 case 0x3b7:
1986 case 0x3b8:
1987 case 0x3b9:
1988 case 0x3ba:
1989 case 0x3bb:
1990 return "VGA";
1991
1992 case 0x3c0: case 0x3d0:
1993 case 0x3c1: case 0x3d1:
1994 case 0x3c2: case 0x3d2:
1995 case 0x3c3: case 0x3d3:
1996 case 0x3c4: case 0x3d4:
1997 case 0x3c5: case 0x3d5:
1998 case 0x3c6: case 0x3d6:
1999 case 0x3c7: case 0x3d7:
2000 case 0x3c8: case 0x3d8:
2001 case 0x3c9: case 0x3d9:
2002 case 0x3ca: case 0x3da:
2003 case 0x3cb: case 0x3db:
2004 case 0x3cc: case 0x3dc:
2005 case 0x3cd: case 0x3dd:
2006 case 0x3ce: case 0x3de:
2007 case 0x3cf: case 0x3df:
2008 return "VGA/EGA";
2009
2010 case 0x240: case 0x260: case 0x280:
2011 case 0x241: case 0x261: case 0x281:
2012 case 0x242: case 0x262: case 0x282:
2013 case 0x243: case 0x263: case 0x283:
2014 case 0x244: case 0x264: case 0x284:
2015 case 0x245: case 0x265: case 0x285:
2016 case 0x246: case 0x266: case 0x286:
2017 case 0x247: case 0x267: case 0x287:
2018 case 0x248: case 0x268: case 0x288:
2019 case 0x249: case 0x269: case 0x289:
2020 case 0x24a: case 0x26a: case 0x28a:
2021 case 0x24b: case 0x26b: case 0x28b:
2022 case 0x24c: case 0x26c: case 0x28c:
2023 case 0x24d: case 0x26d: case 0x28d:
2024 case 0x24e: case 0x26e: case 0x28e:
2025 case 0x24f: case 0x26f: case 0x28f:
2026 case 0x300:
2027 case 0x301:
2028 case 0x388:
2029 case 0x389:
2030 case 0x38a:
2031 case 0x38b:
2032 return "Sound Card (typically)";
2033
2034 default:
2035 return NULL;
2036 }
2037}
2038#endif /* VBOX_WITH_STATISTICS */
2039
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