VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMR3Nem.cpp@ 99370

Last change on this file since 99370 was 99220, checked in by vboxsync, 14 months ago

Disassember,*: Start separating the disassembler into a architecture specific and common part, bugref:10394
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1/* $Id: EMR3Nem.cpp 99220 2023-03-30 12:40:46Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - NEM interface.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_EM
33#define VMCPU_INCL_CPUM_GST_CTX
34#include <VBox/vmm/em.h>
35#include <VBox/vmm/vmm.h>
36#include <VBox/vmm/selm.h>
37#include <VBox/vmm/trpm.h>
38#include <VBox/vmm/iem.h>
39#include <VBox/vmm/iom.h>
40#include <VBox/vmm/nem.h>
41#include <VBox/vmm/dbgf.h>
42#include <VBox/vmm/pgm.h>
43#include <VBox/vmm/tm.h>
44#include <VBox/vmm/mm.h>
45#include <VBox/vmm/ssm.h>
46#include <VBox/vmm/pdmapi.h>
47#include <VBox/vmm/pdmcritsect.h>
48#include <VBox/vmm/pdmqueue.h>
49#include "EMInternal.h"
50#include <VBox/vmm/vm.h>
51#include <VBox/vmm/gim.h>
52#include <VBox/vmm/cpumdis.h>
53#include <VBox/dis.h>
54#include <VBox/err.h>
55#include <VBox/vmm/dbgf.h>
56#include "VMMTracing.h"
57
58#include <iprt/asm.h>
59
60
61/*********************************************************************************************************************************
62* Internal Functions *
63*********************************************************************************************************************************/
64static int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
65DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
66static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
67static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu);
68
69#define EMHANDLERC_WITH_NEM
70#define emR3ExecuteInstruction emR3NemExecuteInstruction
71#define emR3ExecuteIOInstruction emR3NemExecuteIOInstruction
72#include "EMHandleRCTmpl.h"
73
74
75/**
76 * Executes instruction in NEM mode if we can.
77 *
78 * This is somewhat comparable to REMR3EmulateInstruction.
79 *
80 * @returns VBox strict status code.
81 * @retval VINF_EM_DBG_STEPPED on success.
82 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
83 * HM right now.
84 *
85 * @param pVM The cross context VM structure.
86 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
87 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
88 * @thread EMT.
89 */
90VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
91{
92 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
93
94 if (!NEMR3CanExecuteGuest(pVM, pVCpu))
95 return VINF_EM_RESCHEDULE;
96
97#if defined(VBOX_VMM_TARGET_ARMV8)
98 uint64_t const uOldPc = pVCpu->cpum.GstCtx.Pc.u64;
99#else
100 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
101#endif
102 for (;;)
103 {
104 /*
105 * Service necessary FFs before going into HM.
106 */
107 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
108 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
109 {
110 VBOXSTRICTRC rcStrict = emR3NemForcedActions(pVM, pVCpu);
111 if (rcStrict != VINF_SUCCESS)
112 {
113 Log(("emR3NemSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
114 return rcStrict;
115 }
116 }
117
118 /*
119 * Go execute it.
120 */
121 bool fOld = NEMR3SetSingleInstruction(pVM, pVCpu, true);
122 VBOXSTRICTRC rcStrict = NEMR3RunGC(pVM, pVCpu);
123 NEMR3SetSingleInstruction(pVM, pVCpu, fOld);
124 LogFlow(("emR3NemSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
125
126 /*
127 * Handle high priority FFs and informational status codes. We don't do
128 * normal FF processing the caller or the next call can deal with them.
129 */
130 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
131 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
132 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
133 {
134 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
135 LogFlow(("emR3NemSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
136 }
137
138 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
139 {
140 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
141 Log(("emR3NemSingleInstruction: emR3NemHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
142 }
143
144 /*
145 * Done?
146 */
147#if defined(VBOX_VMM_TARGET_ARMV8)
148 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_PC);
149 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
150 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
151 || pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
152 {
153 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.Pc.u64 != uOldPc)
154 rcStrict = VINF_EM_DBG_STEPPED;
155 Log(("emR3NemSingleInstruction: returns %Rrc (pc %llx -> %llx)\n",
156 VBOXSTRICTRC_VAL(rcStrict), uOldPc, pVCpu->cpum.GstCtx.Pc.u64));
157 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
158 return rcStrict;
159 }
160#else
161 CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_RIP);
162 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
163 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
164 || pVCpu->cpum.GstCtx.rip != uOldRip)
165 {
166 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
167 rcStrict = VINF_EM_DBG_STEPPED;
168 Log(("emR3NemSingleInstruction: returns %Rrc (rip %llx -> %llx)\n",
169 VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
170 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
171 return rcStrict;
172 }
173#endif
174 }
175}
176
177
178/**
179 * Executes one (or perhaps a few more) instruction(s).
180 *
181 * @returns VBox status code suitable for EM.
182 *
183 * @param pVM The cross context VM structure.
184 * @param pVCpu The cross context virtual CPU structure.
185 * @param rcRC Return code from RC.
186 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
187 * instruction and prefix the log output with this text.
188 */
189#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
190static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
191#else
192static int emR3NemExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
193#endif
194{
195 NOREF(rcRC);
196
197#ifdef LOG_ENABLED
198 /*
199 * Log it.
200 */
201#ifdef VBOX_VMM_TARGET_ARMV8
202 Log(("EMINS: %RGv SP_EL0=%RGv SP_EL1=%RGv\n", (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64,
203 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[0].u64,
204 (RTGCPTR)pVCpu->cpum.GstCtx.aSpReg[1].u64));
205 if (pszPrefix)
206 {
207 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
208 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
209 }
210# else
211 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
212 if (pszPrefix)
213 {
214 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
215 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
216 }
217# endif
218#endif
219
220 /*
221 * Use IEM and fallback on REM if the functionality is missing.
222 * Once IEM gets mature enough, nothing should ever fall back.
223 */
224 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
225
226 VBOXSTRICTRC rcStrict;
227 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
228 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
229 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
230 {
231 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
232 rcStrict = IEMExecOne(pVCpu);
233 }
234 else
235 {
236 RT_UNTRUSTED_VALIDATED_FENCE();
237 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
238 LogFlow(("emR3NemExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
239 }
240
241 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
242
243 NOREF(pVM);
244 return VBOXSTRICTRC_TODO(rcStrict);
245}
246
247
248/**
249 * Executes one (or perhaps a few more) instruction(s).
250 * This is just a wrapper for discarding pszPrefix in non-logging builds.
251 *
252 * @returns VBox status code suitable for EM.
253 * @param pVM The cross context VM structure.
254 * @param pVCpu The cross context virtual CPU structure.
255 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
256 * instruction and prefix the log output with this text.
257 * @param rcGC GC return code
258 */
259DECLINLINE(int) emR3NemExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
260{
261#ifdef LOG_ENABLED
262 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
263#else
264 RT_NOREF_PV(pszPrefix);
265 return emR3NemExecuteInstructionWorker(pVM, pVCpu, rcGC);
266#endif
267}
268
269/**
270 * Executes one (or perhaps a few more) IO instruction(s).
271 *
272 * @returns VBox status code suitable for EM.
273 * @param pVM The cross context VM structure.
274 * @param pVCpu The cross context virtual CPU structure.
275 */
276static int emR3NemExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
277{
278 RT_NOREF_PV(pVM);
279 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
280
281 /*
282 * Hand it over to the interpreter.
283 */
284 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
285 VBOXSTRICTRC rcStrict;
286 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
287 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
288 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
289 {
290 rcStrict = IEMExecOne(pVCpu);
291 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (IEMExecOne)\n", VBOXSTRICTRC_VAL(rcStrict)));
292 STAM_COUNTER_INC(&pVCpu->em.s.StatIoIem);
293 }
294 else
295 {
296 RT_UNTRUSTED_VALIDATED_FENCE();
297 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
298 LogFlow(("emR3NemExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
299 STAM_COUNTER_INC(&pVCpu->em.s.StatIoRestarted);
300 }
301
302 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
303 return VBOXSTRICTRC_TODO(rcStrict);
304}
305
306
307/**
308 * Process NEM specific forced actions.
309 *
310 * This function is called when any FFs in VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
311 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
312 *
313 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
314 * EM statuses.
315 * @param pVM The cross context VM structure.
316 * @param pVCpu The cross context virtual CPU structure.
317 */
318static int emR3NemForcedActions(PVM pVM, PVMCPU pVCpu)
319{
320 /*
321 * Sync page directory should not happen in NEM mode.
322 */
323 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
324 {
325 Log(("NEM: TODO: Make VMCPU_FF_PGM_SYNC_CR3 / VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL quiet! (%#RX64)\n", (uint64_t)pVCpu->fLocalForcedActions));
326 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
327 }
328
329 /*
330 * Allocate handy pages (just in case the above actions have consumed some pages).
331 */
332 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
333 {
334 int rc = PGMR3PhysAllocateHandyPages(pVM);
335 if (RT_FAILURE(rc))
336 return rc;
337 }
338
339 /*
340 * Check whether we're out of memory now.
341 *
342 * This may stem from some of the above actions or operations that has been executed
343 * since we ran FFs. The allocate handy pages must for instance always be followed by
344 * this check.
345 */
346 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
347 return VINF_EM_NO_MEMORY;
348
349 return VINF_SUCCESS;
350}
351
352
353/**
354 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
355 *
356 * This function contains the raw-mode version of the inner
357 * execution loop (the outer loop being in EMR3ExecuteVM()).
358 *
359 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
360 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
361 *
362 * @param pVM The cross context VM structure.
363 * @param pVCpu The cross context virtual CPU structure.
364 * @param pfFFDone Where to store an indicator telling whether or not
365 * FFs were done before returning.
366 */
367VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
368{
369 VBOXSTRICTRC rcStrict = VERR_IPE_UNINITIALIZED_STATUS;
370
371#ifdef VBOX_VMM_TARGET_ARMV8
372 LogFlow(("emR3NemExecute%d: (pc=%RGv)\n", pVCpu->idCpu, (RTGCPTR)pVCpu->cpum.GstCtx.Pc.u64));
373#else
374 LogFlow(("emR3NemExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
375#endif
376 *pfFFDone = false;
377
378 STAM_REL_COUNTER_INC(&pVCpu->em.s.StatNEMExecuteCalled);
379
380 /*
381 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
382 */
383 for (;;)
384 {
385 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatNEMEntry, a);
386
387 /*
388 * Check that we can execute in NEM mode.
389 */
390 if (NEMR3CanExecuteGuest(pVM, pVCpu))
391 { /* likely */ }
392 else
393 {
394 rcStrict = VINF_EM_RESCHEDULE_REM;
395 break;
396 }
397
398 /*
399 * Process high priority pre-execution raw-mode FFs.
400 */
401 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
402 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
403 {
404 rcStrict = emR3NemForcedActions(pVM, pVCpu);
405 if (rcStrict != VINF_SUCCESS)
406 break;
407 }
408
409#if defined(LOG_ENABLED) && !defined(VBOX_VMM_TARGET_ARMV8)
410 /*
411 * Log important stuff before entering GC.
412 */
413 if (TRPMHasTrap(pVCpu))
414 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
415
416 if (!(pVCpu->cpum.GstCtx.fExtrn & ( CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS
417 | CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER)))
418 {
419 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
420 if (pVM->cCpus == 1)
421 {
422 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
423 Log(("NEMV86: %08x IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
424 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
425 Log(("NEMR%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
426 else
427 Log(("NEMR%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
428 }
429 else
430 {
431 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
432 Log(("NEMV86-CPU%d: %08x IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
433 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
434 Log(("NEMR%d-CPU%d: %04x:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
435 else
436 Log(("NEMR%d-CPU%d: %04x:%08x ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
437 }
438 }
439 else if (pVM->cCpus == 1)
440 Log(("NEMRx: -> NEMR3RunGC\n"));
441 else
442 Log(("NEMRx-CPU%u: -> NEMR3RunGC\n", pVCpu->idCpu));
443#endif /* LOG_ENABLED */
444
445 /*
446 * Execute the code.
447 */
448 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
449 {
450 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
451 STAM_REL_PROFILE_START(&pVCpu->em.s.StatNEMExec, x);
452 rcStrict = NEMR3RunGC(pVM, pVCpu);
453 STAM_REL_PROFILE_STOP(&pVCpu->em.s.StatNEMExec, x);
454 }
455 else
456 {
457 /* Give up this time slice; virtual time continues */
458 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatNEMEntry, a);
459 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
460 RTThreadSleep(5);
461 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
462 rcStrict = VINF_SUCCESS;
463 }
464
465
466 /*
467 * Deal with high priority post execution FFs before doing anything else.
468 */
469 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
470 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
471 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
472 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
473
474 /*
475 * Process the returned status code.
476 */
477 if (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST)
478 break;
479
480 rcStrict = emR3NemHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
481 if (rcStrict != VINF_SUCCESS)
482 break;
483
484 /*
485 * Check and execute forced actions.
486 */
487#ifdef VBOX_HIGH_RES_TIMERS_HACK
488 TMTimerPollVoid(pVM, pVCpu);
489#endif
490 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
491 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
492 {
493 rcStrict = emR3ForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
494 VBOXVMM_EM_FF_ALL_RET(pVCpu, VBOXSTRICTRC_VAL(rcStrict));
495 if ( rcStrict != VINF_SUCCESS
496 && rcStrict != VINF_EM_RESCHEDULE_HM)
497 {
498 *pfFFDone = true;
499 break;
500 }
501 }
502 }
503
504 /*
505 * Return to outer loop, making sure the fetch all state as we leave.
506 *
507 * Note! Not using CPUM_IMPORT_EXTRN_RET here, to prioritize an rcStrict error
508 * status over import errors.
509 */
510 if (pVCpu->cpum.GstCtx.fExtrn)
511 {
512 int rcImport = NEMImportStateOnDemand(pVCpu, pVCpu->cpum.GstCtx.fExtrn);
513 AssertReturn(RT_SUCCESS(rcImport) || RT_FAILURE_NP(rcStrict), rcImport);
514 }
515#if defined(LOG_ENABLED) && defined(DEBUG)
516 RTLogFlush(NULL);
517#endif
518 return rcStrict;
519}
520
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