VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 56064

Last change on this file since 56064 was 56064, checked in by vboxsync, 9 years ago

Committed the VBOX_WITH_FIRST_IEM_STEP code, removing the #else cases.
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File size: 17.9 KB
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1/* $Id: EMHM.cpp 56064 2015-05-25 16:09:01Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - hardware virtualization
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Header Files *
20*******************************************************************************/
21#define LOG_GROUP LOG_GROUP_EM
22#include <VBox/vmm/em.h>
23#include <VBox/vmm/vmm.h>
24#include <VBox/vmm/csam.h>
25#include <VBox/vmm/selm.h>
26#include <VBox/vmm/trpm.h>
27#include <VBox/vmm/iem.h>
28#include <VBox/vmm/iom.h>
29#include <VBox/vmm/dbgf.h>
30#include <VBox/vmm/pgm.h>
31#ifdef VBOX_WITH_REM
32# include <VBox/vmm/rem.h>
33#endif
34#include <VBox/vmm/tm.h>
35#include <VBox/vmm/mm.h>
36#include <VBox/vmm/ssm.h>
37#include <VBox/vmm/pdmapi.h>
38#include <VBox/vmm/pdmcritsect.h>
39#include <VBox/vmm/pdmqueue.h>
40#include <VBox/vmm/hm.h>
41#include "EMInternal.h"
42#include <VBox/vmm/vm.h>
43#include <VBox/vmm/cpumdis.h>
44#include <VBox/dis.h>
45#include <VBox/disopcode.h>
46#include <VBox/vmm/dbgf.h>
47#include "VMMTracing.h"
48
49#include <iprt/asm.h>
50
51
52/*******************************************************************************
53* Defined Constants And Macros *
54*******************************************************************************/
55#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
56#define EM_NOTIFY_HM
57#endif
58
59
60/*******************************************************************************
61* Internal Functions *
62*******************************************************************************/
63DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
64static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
65static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
66
67#define EMHANDLERC_WITH_HM
68#define emR3ExecuteInstruction emR3HmExecuteInstruction
69#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
70#include "EMHandleRCTmpl.h"
71
72
73/**
74 * Executes instruction in HM mode if we can.
75 *
76 * This is somewhat comparable to REMR3EmulateInstruction.
77 *
78 * @returns VBox strict status code.
79 * @retval VINF_EM_DBG_STEPPED on success.
80 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
81 * HM right now.
82 *
83 * @param pVM Pointer to the cross context VM structure.
84 * @param pVCpu Pointer to the cross context CPU structure for
85 * the calling EMT.
86 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
87 * @thread EMT.
88 */
89VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
90{
91 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
92 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
93
94 if (!HMR3CanExecuteGuest(pVM, pCtx))
95 return VINF_EM_RESCHEDULE;
96
97 uint64_t const uOldRip = pCtx->rip;
98 for (;;)
99 {
100 /*
101 * Service necessary FFs before going into HM.
102 */
103 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
104 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
105 {
106 VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
107 if (rcStrict != VINF_SUCCESS)
108 {
109 Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
110 return rcStrict;
111 }
112 }
113
114 /*
115 * Go execute it.
116 */
117 bool fOld = HMSetSingleInstruction(pVCpu, true);
118 VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
119 HMSetSingleInstruction(pVCpu, fOld);
120 LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
121
122 /*
123 * Handle high priority FFs and informational status codes. We don't do
124 * normal FF processing the caller or the next call can deal with them.
125 */
126 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
127 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
128 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
129 {
130 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
131 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
132 }
133
134 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
135 {
136 rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
137 Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
138 }
139
140 /*
141 * Done?
142 */
143 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
144 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
145 || pCtx->rip != uOldRip)
146 {
147 if (rcStrict == VINF_SUCCESS && pCtx->rip != uOldRip)
148 rcStrict = VINF_EM_DBG_STEPPED;
149 Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip));
150 return rcStrict;
151 }
152 }
153}
154
155
156/**
157 * Executes one (or perhaps a few more) instruction(s).
158 *
159 * @returns VBox status code suitable for EM.
160 *
161 * @param pVM Pointer to the VM.
162 * @param pVCpu Pointer to the VMCPU.
163 * @param rcRC Return code from RC.
164 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
165 * instruction and prefix the log output with this text.
166 */
167#ifdef LOG_ENABLED
168static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
169#else
170static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
171#endif
172{
173#ifdef LOG_ENABLED
174 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
175#endif
176 int rc;
177 NOREF(rcRC);
178
179#ifdef LOG_ENABLED
180 /*
181 * Log it.
182 */
183 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
184 if (pszPrefix)
185 {
186 DBGFR3_INFO_LOG(pVM, "cpumguest", pszPrefix);
187 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
188 }
189#endif
190
191 /*
192 * Use IEM and fallback on REM if the functionality is missing.
193 * Once IEM gets mature enough, nothing should ever fall back.
194 */
195 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
196 rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
197 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
198
199 if ( rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
200 || rc == VERR_IEM_INSTR_NOT_IMPLEMENTED)
201 {
202#ifdef VBOX_WITH_REM
203 STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
204 EMRemLock(pVM);
205 /* Flush the recompiler TLB if the VCPU has changed. */
206 if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
207 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
208 pVM->em.s.idLastRemCpu = pVCpu->idCpu;
209
210 rc = REMR3EmulateInstruction(pVM, pVCpu);
211 EMRemUnlock(pVM);
212 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
213#else /* !VBOX_WITH_REM */
214 NOREF(pVM);
215#endif /* !VBOX_WITH_REM */
216 }
217
218#ifdef EM_NOTIFY_HM
219 if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
220 HMR3NotifyEmulated(pVCpu);
221#endif
222 return rc;
223}
224
225
226/**
227 * Executes one (or perhaps a few more) instruction(s).
228 * This is just a wrapper for discarding pszPrefix in non-logging builds.
229 *
230 * @returns VBox status code suitable for EM.
231 * @param pVM Pointer to the VM.
232 * @param pVCpu Pointer to the VMCPU.
233 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
234 * instruction and prefix the log output with this text.
235 * @param rcGC GC return code
236 */
237DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
238{
239#ifdef LOG_ENABLED
240 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
241#else
242 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
243#endif
244}
245
246/**
247 * Executes one (or perhaps a few more) IO instruction(s).
248 *
249 * @returns VBox status code suitable for EM.
250 * @param pVM Pointer to the VM.
251 * @param pVCpu Pointer to the VMCPU.
252 */
253static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
254{
255 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
256
257 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
258
259 /*
260 * Try to restart the io instruction that was refused in ring-0.
261 */
262 VBOXSTRICTRC rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
263 if (IOM_SUCCESS(rcStrict))
264 {
265 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
266 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
267 return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
268 }
269 AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
270 RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
271
272 /*
273 * Hand it over to the interpreter.
274 */
275 rcStrict = IEMExecOne(pVCpu);
276 LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
277 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
278 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
279 return VBOXSTRICTRC_TODO(rcStrict);
280}
281
282
283/**
284 * Process raw-mode specific forced actions.
285 *
286 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK is pending.
287 *
288 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
289 * EM statuses.
290 * @param pVM Pointer to the VM.
291 * @param pVCpu Pointer to the VMCPU.
292 * @param pCtx Pointer to the guest CPU context.
293 */
294static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
295{
296 /*
297 * Sync page directory.
298 */
299 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
300 {
301 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
302 int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
303 if (RT_FAILURE(rc))
304 return rc;
305
306#ifdef VBOX_WITH_RAW_MODE
307 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
308#endif
309
310 /* Prefetch pages for EIP and ESP. */
311 /** @todo This is rather expensive. Should investigate if it really helps at all. */
312 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
313 if (rc == VINF_SUCCESS)
314 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
315 if (rc != VINF_SUCCESS)
316 {
317 if (rc != VINF_PGM_SYNC_CR3)
318 {
319 AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
320 return rc;
321 }
322 rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
323 if (RT_FAILURE(rc))
324 return rc;
325 }
326 /** @todo maybe prefetch the supervisor stack page as well */
327#ifdef VBOX_WITH_RAW_MODE
328 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
329#endif
330 }
331
332 /*
333 * Allocate handy pages (just in case the above actions have consumed some pages).
334 */
335 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
336 {
337 int rc = PGMR3PhysAllocateHandyPages(pVM);
338 if (RT_FAILURE(rc))
339 return rc;
340 }
341
342 /*
343 * Check whether we're out of memory now.
344 *
345 * This may stem from some of the above actions or operations that has been executed
346 * since we ran FFs. The allocate handy pages must for instance always be followed by
347 * this check.
348 */
349 if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
350 return VINF_EM_NO_MEMORY;
351
352 return VINF_SUCCESS;
353}
354
355
356/**
357 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
358 *
359 * This function contains the raw-mode version of the inner
360 * execution loop (the outer loop being in EMR3ExecuteVM()).
361 *
362 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
363 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
364 *
365 * @param pVM Pointer to the VM.
366 * @param pVCpu Pointer to the VMCPU.
367 * @param pfFFDone Where to store an indicator telling whether or not
368 * FFs were done before returning.
369 */
370int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
371{
372 int rc = VERR_IPE_UNINITIALIZED_STATUS;
373 PCPUMCTX pCtx = pVCpu->em.s.pCtx;
374
375 LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
376 *pfFFDone = false;
377
378 STAM_COUNTER_INC(&pVCpu->em.s.StatHmExecuteEntry);
379
380#ifdef EM_NOTIFY_HM
381 HMR3NotifyScheduled(pVCpu);
382#endif
383
384 /*
385 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
386 */
387 for (;;)
388 {
389 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHmEntry, a);
390
391 /* Check if a forced reschedule is pending. */
392 if (HMR3IsRescheduleRequired(pVM, pCtx))
393 {
394 rc = VINF_EM_RESCHEDULE;
395 break;
396 }
397
398 /*
399 * Process high priority pre-execution raw-mode FFs.
400 */
401#ifdef VBOX_WITH_RAW_MODE
402 Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
403#endif
404 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
405 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
406 {
407 rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
408 if (rc != VINF_SUCCESS)
409 break;
410 }
411
412#ifdef LOG_ENABLED
413 /*
414 * Log important stuff before entering GC.
415 */
416 if (TRPMHasTrap(pVCpu))
417 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
418
419 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
420
421 if (pVM->cCpus == 1)
422 {
423 if (pCtx->eflags.Bits.u1VM)
424 Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
425 else if (CPUMIsGuestIn64BitCodeEx(pCtx))
426 Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
427 else
428 Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
429 }
430 else
431 {
432 if (pCtx->eflags.Bits.u1VM)
433 Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
434 else if (CPUMIsGuestIn64BitCodeEx(pCtx))
435 Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
436 else
437 Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
438 }
439#endif /* LOG_ENABLED */
440
441 /*
442 * Execute the code.
443 */
444 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHmEntry, a);
445
446 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
447 {
448 STAM_PROFILE_START(&pVCpu->em.s.StatHmExec, x);
449 rc = VMMR3HmRunGC(pVM, pVCpu);
450 STAM_PROFILE_STOP(&pVCpu->em.s.StatHmExec, x);
451 }
452 else
453 {
454 /* Give up this time slice; virtual time continues */
455 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
456 RTThreadSleep(5);
457 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
458 rc = VINF_SUCCESS;
459 }
460
461
462 /*
463 * Deal with high priority post execution FFs before doing anything else.
464 */
465 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
466 if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
467 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
468 rc = emR3HighPriorityPostForcedActions(pVM, pVCpu, rc);
469
470 /*
471 * Process the returned status code.
472 */
473 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
474 break;
475
476 rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
477 if (rc != VINF_SUCCESS)
478 break;
479
480 /*
481 * Check and execute forced actions.
482 */
483#ifdef VBOX_HIGH_RES_TIMERS_HACK
484 TMTimerPollVoid(pVM, pVCpu);
485#endif
486 if ( VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
487 || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
488 {
489 rc = emR3ForcedActions(pVM, pVCpu, rc);
490 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
491 if ( rc != VINF_SUCCESS
492 && rc != VINF_EM_RESCHEDULE_HM)
493 {
494 *pfFFDone = true;
495 break;
496 }
497 }
498 }
499
500 /*
501 * Return to outer loop.
502 */
503#if defined(LOG_ENABLED) && defined(DEBUG)
504 RTLogFlush(NULL);
505#endif
506 return rc;
507}
508
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