VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/PDMR0DevHlp.cpp@ 84044

Last change on this file since 84044 was 84007, checked in by vboxsync, 4 years ago

VMMR0: Move the PDM R0 device helper into its own file like it is done in R3, move the PDM R0 driver helpers to PDMR0Driver as it belongs there really
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File size: 64.9 KB
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1/* $Id: PDMR0DevHlp.cpp 84007 2020-04-27 13:23:11Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, R0 Device Helper parts.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#define PDMPCIDEV_INCLUDE_PRIVATE /* Hack to get pdmpcidevint.h included at the right point. */
24#include "PDMInternal.h"
25#include <VBox/vmm/pdm.h>
26#include <VBox/vmm/apic.h>
27#include <VBox/vmm/mm.h>
28#include <VBox/vmm/pgm.h>
29#include <VBox/vmm/gvm.h>
30#include <VBox/vmm/vmm.h>
31#include <VBox/vmm/vmcc.h>
32#include <VBox/vmm/gvmm.h>
33
34#include <VBox/log.h>
35#include <VBox/err.h>
36#include <VBox/sup.h>
37#include <iprt/asm.h>
38#include <iprt/assert.h>
39#include <iprt/ctype.h>
40#include <iprt/string.h>
41
42#include "dtrace/VBoxVMM.h"
43#include "PDMInline.h"
44
45
46/*********************************************************************************************************************************
47* Global Variables *
48*********************************************************************************************************************************/
49RT_C_DECLS_BEGIN
50extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp;
51extern DECLEXPORT(const PDMPICHLP) g_pdmR0PicHlp;
52extern DECLEXPORT(const PDMIOAPICHLP) g_pdmR0IoApicHlp;
53extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp;
54extern DECLEXPORT(const PDMIOMMUHLPR0) g_pdmR0IommuHlp;
55extern DECLEXPORT(const PDMHPETHLPR0) g_pdmR0HpetHlp;
56extern DECLEXPORT(const PDMPCIRAWHLPR0) g_pdmR0PciRawHlp;
57RT_C_DECLS_END
58
59
60/*********************************************************************************************************************************
61* Internal Functions *
62*********************************************************************************************************************************/
63static bool pdmR0IsaSetIrq(PGVM pGVM, int iIrq, int iLevel, uint32_t uTagSrc);
64
65
66/** @name Ring-0 Device Helpers
67 * @{
68 */
69
70/** @interface_method_impl{PDMDEVHLPR0,pfnIoPortSetUpContextEx} */
71static DECLCALLBACK(int) pdmR0DevHlp_IoPortSetUpContextEx(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts,
72 PFNIOMIOPORTNEWOUT pfnOut, PFNIOMIOPORTNEWIN pfnIn,
73 PFNIOMIOPORTNEWOUTSTRING pfnOutStr, PFNIOMIOPORTNEWINSTRING pfnInStr,
74 void *pvUser)
75{
76 PDMDEV_ASSERT_DEVINS(pDevIns);
77 LogFlow(("pdmR0DevHlp_IoPortSetUpContextEx: caller='%s'/%d: hIoPorts=%#x pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p pvUser=%p\n",
78 pDevIns->pReg->szName, pDevIns->iInstance, hIoPorts, pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser));
79 PGVM pGVM = pDevIns->Internal.s.pGVM;
80 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
81 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
82
83 int rc = IOMR0IoPortSetUpContext(pGVM, pDevIns, hIoPorts, pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser);
84
85 LogFlow(("pdmR0DevHlp_IoPortSetUpContextEx: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
86 return rc;
87}
88
89
90/** @interface_method_impl{PDMDEVHLPR0,pfnMmioSetUpContextEx} */
91static DECLCALLBACK(int) pdmR0DevHlp_MmioSetUpContextEx(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIONEWWRITE pfnWrite,
92 PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill, void *pvUser)
93{
94 PDMDEV_ASSERT_DEVINS(pDevIns);
95 LogFlow(("pdmR0DevHlp_MmioSetUpContextEx: caller='%s'/%d: hRegion=%#x pfnWrite=%p pfnRead=%p pfnFill=%p pvUser=%p\n",
96 pDevIns->pReg->szName, pDevIns->iInstance, hRegion, pfnWrite, pfnRead, pfnFill, pvUser));
97 PGVM pGVM = pDevIns->Internal.s.pGVM;
98 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
99 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
100
101 int rc = IOMR0MmioSetUpContext(pGVM, pDevIns, hRegion, pfnWrite, pfnRead, pfnFill, pvUser);
102
103 LogFlow(("pdmR0DevHlp_MmioSetUpContextEx: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
104 return rc;
105}
106
107
108/** @interface_method_impl{PDMDEVHLPR0,pfnMmio2SetUpContext} */
109static DECLCALLBACK(int) pdmR0DevHlp_Mmio2SetUpContext(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion,
110 size_t offSub, size_t cbSub, void **ppvMapping)
111{
112 PDMDEV_ASSERT_DEVINS(pDevIns);
113 LogFlow(("pdmR0DevHlp_Mmio2SetUpContext: caller='%s'/%d: hRegion=%#x offSub=%#zx cbSub=%#zx ppvMapping=%p\n",
114 pDevIns->pReg->szName, pDevIns->iInstance, hRegion, offSub, cbSub, ppvMapping));
115 *ppvMapping = NULL;
116
117 PGVM pGVM = pDevIns->Internal.s.pGVM;
118 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
119 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
120
121 int rc = PGMR0PhysMMIO2MapKernel(pGVM, pDevIns, hRegion, offSub, cbSub, ppvMapping);
122
123 LogFlow(("pdmR0DevHlp_Mmio2SetUpContext: caller='%s'/%d: returns %Rrc (%p)\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, *ppvMapping));
124 return rc;
125}
126
127
128/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysRead} */
129static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
130 void *pvBuf, size_t cbRead)
131{
132 PDMDEV_ASSERT_DEVINS(pDevIns);
133 if (!pPciDev) /* NULL is an alias for the default PCI device. */
134 pPciDev = pDevIns->apPciDevs[0];
135 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
136 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
137
138#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
139 /*
140 * Just check the busmaster setting here and forward the request to the generic read helper.
141 */
142 if (PCIDevIsBusmaster(pPciDev))
143 { /* likely */ }
144 else
145 {
146 Log(("pdmRCDevHlp_PCIPhysRead: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbRead=%#zx\n",
147 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbRead));
148 memset(pvBuf, 0xff, cbRead);
149 return VERR_PDM_NOT_PCI_BUS_MASTER;
150 }
151#endif
152
153#ifdef VBOX_WITH_IOMMU_AMD
154 /** @todo IOMMU: Optimize/re-organize things here later. */
155 PGVM pGVM = pDevIns->Internal.s.pGVM;
156 PPDMIOMMUR0 pIommu = &pGVM->pdmr0.s.aIommus[0];
157 PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
158 if ( pDevInsIommu
159 && pDevInsIommu != pDevIns)
160 {
161 RTGCPHYS GCPhysOut;
162 uint16_t const uDeviceId = VBOX_PCI_BUSDEVFN_MAKE(pPciDev->Int.s.idxPdmBus, pPciDev->uDevFn);
163 int rc = pIommu->pfnMemRead(pDevInsIommu, uDeviceId, GCPhys, cbRead, &GCPhysOut);
164 if (RT_FAILURE(rc))
165 {
166 Log(("pdmR0DevHlp_PCIPhysRead: IOMMU translation failed. uDeviceId=%#x GCPhys=%#RGp cb=%u rc=%Rrc\n", uDeviceId,
167 GCPhys, cbRead, rc));
168 return rc;
169 }
170 }
171#endif
172
173 return pDevIns->pHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
174}
175
176
177/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysWrite} */
178static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
179 const void *pvBuf, size_t cbWrite)
180{
181 PDMDEV_ASSERT_DEVINS(pDevIns);
182 if (!pPciDev) /* NULL is an alias for the default PCI device. */
183 pPciDev = pDevIns->apPciDevs[0];
184 AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
185 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
186
187#ifndef PDM_DO_NOT_RESPECT_PCI_BM_BIT
188 /*
189 * Just check the busmaster setting here and forward the request to the generic read helper.
190 */
191 if (PCIDevIsBusmaster(pPciDev))
192 { /* likely */ }
193 else
194 {
195 Log(("pdmRCDevHlp_PCIPhysWrite: caller=%p/%d: returns %Rrc - Not bus master! GCPhys=%RGp cbWrite=%#zx\n",
196 pDevIns, pDevIns->iInstance, VERR_PDM_NOT_PCI_BUS_MASTER, GCPhys, cbWrite));
197 return VERR_PDM_NOT_PCI_BUS_MASTER;
198 }
199#endif
200
201#ifdef VBOX_WITH_IOMMU_AMD
202 /** @todo IOMMU: Optimize/re-organize things here later. */
203 PGVM pGVM = pDevIns->Internal.s.pGVM;
204 PPDMIOMMUR0 pIommu = &pGVM->pdmr0.s.aIommus[0];
205 PPDMDEVINS pDevInsIommu = pIommu->CTX_SUFF(pDevIns);
206 if ( pDevInsIommu
207 && pDevInsIommu != pDevIns)
208 {
209 RTGCPHYS GCPhysOut;
210 uint16_t const uDeviceId = VBOX_PCI_BUSDEVFN_MAKE(pPciDev->Int.s.idxPdmBus, pPciDev->uDevFn);
211 int rc = pIommu->pfnMemWrite(pDevInsIommu, uDeviceId, GCPhys, cbWrite, &GCPhysOut);
212 if (RT_FAILURE(rc))
213 {
214 Log(("pdmR0DevHlp_PCIPhysWrite: IOMMU translation failed. uDeviceId=%#x GCPhys=%#RGp cb=%u rc=%Rrc\n", uDeviceId,
215 GCPhys, cbWrite, rc));
216 return rc;
217 }
218 }
219#endif
220
221 return pDevIns->pHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
222}
223
224
225/** @interface_method_impl{PDMDEVHLPR0,pfnPCISetIrq} */
226static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
227{
228 PDMDEV_ASSERT_DEVINS(pDevIns);
229 if (!pPciDev) /* NULL is an alias for the default PCI device. */
230 pPciDev = pDevIns->apPciDevs[0];
231 AssertReturnVoid(pPciDev);
232 LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: pPciDev=%p:{%#x} iIrq=%d iLevel=%d\n",
233 pDevIns, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel));
234 PDMPCIDEV_ASSERT_VALID_AND_REGISTERED(pDevIns, pPciDev);
235
236 PGVM pGVM = pDevIns->Internal.s.pGVM;
237 size_t const idxBus = pPciDev->Int.s.idxPdmBus;
238 AssertReturnVoid(idxBus < RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses));
239 PPDMPCIBUSR0 pPciBusR0 = &pGVM->pdmr0.s.aPciBuses[idxBus];
240
241 pdmLock(pGVM);
242
243 uint32_t uTagSrc;
244 if (iLevel & PDM_IRQ_LEVEL_HIGH)
245 {
246 pDevIns->Internal.s.pIntR3R0->uLastIrqTag = uTagSrc = pdmCalcIrqTag(pGVM, pDevIns->Internal.s.pInsR3R0->idTracing);
247 if (iLevel == PDM_IRQ_LEVEL_HIGH)
248 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
249 else
250 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
251 }
252 else
253 uTagSrc = pDevIns->Internal.s.pIntR3R0->uLastIrqTag;
254
255 if (pPciBusR0->pDevInsR0)
256 {
257 pPciBusR0->pfnSetIrqR0(pPciBusR0->pDevInsR0, pPciDev, iIrq, iLevel, uTagSrc);
258
259 pdmUnlock(pGVM);
260
261 if (iLevel == PDM_IRQ_LEVEL_LOW)
262 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
263 }
264 else
265 {
266 pdmUnlock(pGVM);
267
268 /* queue for ring-3 execution. */
269 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
270 AssertReturnVoid(pTask);
271
272 pTask->enmOp = PDMDEVHLPTASKOP_PCI_SET_IRQ;
273 pTask->pDevInsR3 = PDMDEVINS_2_R3PTR(pDevIns);
274 pTask->u.PciSetIRQ.iIrq = iIrq;
275 pTask->u.PciSetIRQ.iLevel = iLevel;
276 pTask->u.PciSetIRQ.uTagSrc = uTagSrc;
277 pTask->u.PciSetIRQ.pPciDevR3 = MMHyperR0ToR3(pGVM, pPciDev);
278
279 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
280 }
281
282 LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
283}
284
285
286/** @interface_method_impl{PDMDEVHLPR0,pfnISASetIrq} */
287static DECLCALLBACK(void) pdmR0DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
288{
289 PDMDEV_ASSERT_DEVINS(pDevIns);
290 LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
291 PGVM pGVM = pDevIns->Internal.s.pGVM;
292
293 pdmLock(pGVM);
294 uint32_t uTagSrc;
295 if (iLevel & PDM_IRQ_LEVEL_HIGH)
296 {
297 pDevIns->Internal.s.pIntR3R0->uLastIrqTag = uTagSrc = pdmCalcIrqTag(pGVM, pDevIns->Internal.s.pInsR3R0->idTracing);
298 if (iLevel == PDM_IRQ_LEVEL_HIGH)
299 VBOXVMM_PDM_IRQ_HIGH(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
300 else
301 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
302 }
303 else
304 uTagSrc = pDevIns->Internal.s.pIntR3R0->uLastIrqTag;
305
306 bool fRc = pdmR0IsaSetIrq(pGVM, iIrq, iLevel, uTagSrc);
307
308 if (iLevel == PDM_IRQ_LEVEL_LOW && fRc)
309 VBOXVMM_PDM_IRQ_LOW(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
310 pdmUnlock(pGVM);
311 LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
312}
313
314
315/** @interface_method_impl{PDMDEVHLPR0,pfnIoApicSendMsi} */
316static DECLCALLBACK(void) pdmR0DevHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue)
317{
318 PDMDEV_ASSERT_DEVINS(pDevIns);
319 LogFlow(("pdmR0DevHlp_IoApicSendMsi: caller=%p/%d: GCPhys=%RGp uValue=%#x\n", pDevIns, pDevIns->iInstance, GCPhys, uValue));
320 PGVM pGVM = pDevIns->Internal.s.pGVM;
321
322 uint32_t uTagSrc;
323 pDevIns->Internal.s.pIntR3R0->uLastIrqTag = uTagSrc = pdmCalcIrqTag(pGVM, pDevIns->Internal.s.pInsR3R0->idTracing);
324 VBOXVMM_PDM_IRQ_HILO(VMMGetCpu(pGVM), RT_LOWORD(uTagSrc), RT_HIWORD(uTagSrc));
325
326 if (pGVM->pdm.s.IoApic.pDevInsR0)
327 pGVM->pdm.s.IoApic.pfnSendMsiR0(pGVM->pdm.s.IoApic.pDevInsR0, GCPhys, uValue, uTagSrc);
328 else
329 AssertFatalMsgFailed(("Lazy bastards!"));
330
331 LogFlow(("pdmR0DevHlp_IoApicSendMsi: caller=%p/%d: returns void; uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, uTagSrc));
332}
333
334
335/** @interface_method_impl{PDMDEVHLPR0,pfnPhysRead} */
336static DECLCALLBACK(int) pdmR0DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
337{
338 PDMDEV_ASSERT_DEVINS(pDevIns);
339 LogFlow(("pdmR0DevHlp_PhysRead: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
340 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
341
342 VBOXSTRICTRC rcStrict = PGMPhysRead(pDevIns->Internal.s.pGVM, GCPhys, pvBuf, cbRead, PGMACCESSORIGIN_DEVICE);
343 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
344
345 Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
346 return VBOXSTRICTRC_VAL(rcStrict);
347}
348
349
350/** @interface_method_impl{PDMDEVHLPR0,pfnPhysWrite} */
351static DECLCALLBACK(int) pdmR0DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
352{
353 PDMDEV_ASSERT_DEVINS(pDevIns);
354 LogFlow(("pdmR0DevHlp_PhysWrite: caller=%p/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
355 pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
356
357 VBOXSTRICTRC rcStrict = PGMPhysWrite(pDevIns->Internal.s.pGVM, GCPhys, pvBuf, cbWrite, PGMACCESSORIGIN_DEVICE);
358 AssertMsg(rcStrict == VINF_SUCCESS, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); /** @todo track down the users for this bugger. */
359
360 Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns %Rrc\n", pDevIns, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict) ));
361 return VBOXSTRICTRC_VAL(rcStrict);
362}
363
364
365/** @interface_method_impl{PDMDEVHLPR0,pfnA20IsEnabled} */
366static DECLCALLBACK(bool) pdmR0DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
367{
368 PDMDEV_ASSERT_DEVINS(pDevIns);
369 LogFlow(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
370
371 bool fEnabled = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pGVM));
372
373 Log(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
374 return fEnabled;
375}
376
377
378/** @interface_method_impl{PDMDEVHLPR0,pfnVMState} */
379static DECLCALLBACK(VMSTATE) pdmR0DevHlp_VMState(PPDMDEVINS pDevIns)
380{
381 PDMDEV_ASSERT_DEVINS(pDevIns);
382
383 VMSTATE enmVMState = pDevIns->Internal.s.pGVM->enmVMState;
384
385 LogFlow(("pdmR0DevHlp_VMState: caller=%p/%d: returns %d\n", pDevIns, pDevIns->iInstance, enmVMState));
386 return enmVMState;
387}
388
389
390/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetError} */
391static DECLCALLBACK(int) pdmR0DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
392{
393 PDMDEV_ASSERT_DEVINS(pDevIns);
394 va_list args;
395 va_start(args, pszFormat);
396 int rc2 = VMSetErrorV(pDevIns->Internal.s.pGVM, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
397 va_end(args);
398 return rc;
399}
400
401
402/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetErrorV} */
403static DECLCALLBACK(int) pdmR0DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
404{
405 PDMDEV_ASSERT_DEVINS(pDevIns);
406 int rc2 = VMSetErrorV(pDevIns->Internal.s.pGVM, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
407 return rc;
408}
409
410
411/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetRuntimeError} */
412static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
413{
414 PDMDEV_ASSERT_DEVINS(pDevIns);
415 va_list va;
416 va_start(va, pszFormat);
417 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pGVM, fFlags, pszErrorId, pszFormat, va);
418 va_end(va);
419 return rc;
420}
421
422
423/** @interface_method_impl{PDMDEVHLPR0,pfnVMSetRuntimeErrorV} */
424static DECLCALLBACK(int) pdmR0DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
425{
426 PDMDEV_ASSERT_DEVINS(pDevIns);
427 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pGVM, fFlags, pszErrorId, pszFormat, va);
428 return rc;
429}
430
431
432
433/** @interface_method_impl{PDMDEVHLPR0,pfnGetVM} */
434static DECLCALLBACK(PVMCC) pdmR0DevHlp_GetVM(PPDMDEVINS pDevIns)
435{
436 PDMDEV_ASSERT_DEVINS(pDevIns);
437 LogFlow(("pdmR0DevHlp_GetVM: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
438 return pDevIns->Internal.s.pGVM;
439}
440
441
442/** @interface_method_impl{PDMDEVHLPR0,pfnGetVMCPU} */
443static DECLCALLBACK(PVMCPUCC) pdmR0DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
444{
445 PDMDEV_ASSERT_DEVINS(pDevIns);
446 LogFlow(("pdmR0DevHlp_GetVMCPU: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
447 return VMMGetCpu(pDevIns->Internal.s.pGVM);
448}
449
450
451/** @interface_method_impl{PDMDEVHLPRC,pfnGetCurrentCpuId} */
452static DECLCALLBACK(VMCPUID) pdmR0DevHlp_GetCurrentCpuId(PPDMDEVINS pDevIns)
453{
454 PDMDEV_ASSERT_DEVINS(pDevIns);
455 VMCPUID idCpu = VMMGetCpuId(pDevIns->Internal.s.pGVM);
456 LogFlow(("pdmR0DevHlp_GetCurrentCpuId: caller='%p'/%d for CPU %u\n", pDevIns, pDevIns->iInstance, idCpu));
457 return idCpu;
458}
459
460
461/** @interface_method_impl{PDMDEVHLPR0,pfnTimerToPtr} */
462static DECLCALLBACK(PTMTIMERR0) pdmR0DevHlp_TimerToPtr(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
463{
464 PDMDEV_ASSERT_DEVINS(pDevIns);
465 RT_NOREF(pDevIns);
466 return (PTMTIMERR0)MMHyperR3ToCC(pDevIns->Internal.s.pGVM, hTimer);
467}
468
469
470/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromMicro} */
471static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicroSecs)
472{
473 return TMTimerFromMicro(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMicroSecs);
474}
475
476
477/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromMilli} */
478static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromMilli(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliSecs)
479{
480 return TMTimerFromMilli(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMilliSecs);
481}
482
483
484/** @interface_method_impl{PDMDEVHLPR0,pfnTimerFromNano} */
485static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerFromNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanoSecs)
486{
487 return TMTimerFromNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cNanoSecs);
488}
489
490/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGet} */
491static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
492{
493 return TMTimerGet(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
494}
495
496
497/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGetFreq} */
498static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGetFreq(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
499{
500 return TMTimerGetFreq(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
501}
502
503
504/** @interface_method_impl{PDMDEVHLPR0,pfnTimerGetNano} */
505static DECLCALLBACK(uint64_t) pdmR0DevHlp_TimerGetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
506{
507 return TMTimerGetNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
508}
509
510
511/** @interface_method_impl{PDMDEVHLPR0,pfnTimerIsActive} */
512static DECLCALLBACK(bool) pdmR0DevHlp_TimerIsActive(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
513{
514 return TMTimerIsActive(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
515}
516
517
518/** @interface_method_impl{PDMDEVHLPR0,pfnTimerIsLockOwner} */
519static DECLCALLBACK(bool) pdmR0DevHlp_TimerIsLockOwner(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
520{
521 return TMTimerIsLockOwner(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
522}
523
524
525/** @interface_method_impl{PDMDEVHLPR0,pfnTimerLockClock} */
526static DECLCALLBACK(VBOXSTRICTRC) pdmR0DevHlp_TimerLockClock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, int rcBusy)
527{
528 return TMTimerLock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), rcBusy);
529}
530
531
532/** @interface_method_impl{PDMDEVHLPR0,pfnTimerLockClock2} */
533static DECLCALLBACK(VBOXSTRICTRC) pdmR0DevHlp_TimerLockClock2(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer,
534 PPDMCRITSECT pCritSect, int rcBusy)
535{
536 VBOXSTRICTRC rc = TMTimerLock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), rcBusy);
537 if (rc == VINF_SUCCESS)
538 {
539 rc = PDMCritSectEnter(pCritSect, rcBusy);
540 if (rc == VINF_SUCCESS)
541 return rc;
542 AssertRC(VBOXSTRICTRC_VAL(rc));
543 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
544 }
545 else
546 AssertRC(VBOXSTRICTRC_VAL(rc));
547 return rc;
548}
549
550
551/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSet} */
552static DECLCALLBACK(int) pdmR0DevHlp_TimerSet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t uExpire)
553{
554 return TMTimerSet(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), uExpire);
555}
556
557
558/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetFrequencyHint} */
559static DECLCALLBACK(int) pdmR0DevHlp_TimerSetFrequencyHint(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint32_t uHz)
560{
561 return TMTimerSetFrequencyHint(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), uHz);
562}
563
564
565/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetMicro} */
566static DECLCALLBACK(int) pdmR0DevHlp_TimerSetMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicrosToNext)
567{
568 return TMTimerSetMicro(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMicrosToNext);
569}
570
571
572/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetMillies} */
573static DECLCALLBACK(int) pdmR0DevHlp_TimerSetMillies(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliesToNext)
574{
575 return TMTimerSetMillies(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cMilliesToNext);
576}
577
578
579/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetNano} */
580static DECLCALLBACK(int) pdmR0DevHlp_TimerSetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanosToNext)
581{
582 return TMTimerSetNano(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cNanosToNext);
583}
584
585
586/** @interface_method_impl{PDMDEVHLPR0,pfnTimerSetRelative} */
587static DECLCALLBACK(int) pdmR0DevHlp_TimerSetRelative(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cTicksToNext, uint64_t *pu64Now)
588{
589 return TMTimerSetRelative(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer), cTicksToNext, pu64Now);
590}
591
592
593/** @interface_method_impl{PDMDEVHLPR0,pfnTimerStop} */
594static DECLCALLBACK(int) pdmR0DevHlp_TimerStop(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
595{
596 return TMTimerStop(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
597}
598
599
600/** @interface_method_impl{PDMDEVHLPR0,pfnTimerUnlockClock} */
601static DECLCALLBACK(void) pdmR0DevHlp_TimerUnlockClock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)
602{
603 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
604}
605
606
607/** @interface_method_impl{PDMDEVHLPR0,pfnTimerUnlockClock2} */
608static DECLCALLBACK(void) pdmR0DevHlp_TimerUnlockClock2(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PPDMCRITSECT pCritSect)
609{
610 TMTimerUnlock(pdmR0DevHlp_TimerToPtr(pDevIns, hTimer));
611 int rc = PDMCritSectLeave(pCritSect);
612 AssertRC(rc);
613}
614
615
616/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGet} */
617static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGet(PPDMDEVINS pDevIns)
618{
619 PDMDEV_ASSERT_DEVINS(pDevIns);
620 LogFlow(("pdmR0DevHlp_TMTimeVirtGet: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
621 return TMVirtualGet(pDevIns->Internal.s.pGVM);
622}
623
624
625/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGetFreq} */
626static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGetFreq(PPDMDEVINS pDevIns)
627{
628 PDMDEV_ASSERT_DEVINS(pDevIns);
629 LogFlow(("pdmR0DevHlp_TMTimeVirtGetFreq: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
630 return TMVirtualGetFreq(pDevIns->Internal.s.pGVM);
631}
632
633
634/** @interface_method_impl{PDMDEVHLPR0,pfnTMTimeVirtGetNano} */
635static DECLCALLBACK(uint64_t) pdmR0DevHlp_TMTimeVirtGetNano(PPDMDEVINS pDevIns)
636{
637 PDMDEV_ASSERT_DEVINS(pDevIns);
638 LogFlow(("pdmR0DevHlp_TMTimeVirtGetNano: caller='%p'/%d\n", pDevIns, pDevIns->iInstance));
639 return TMVirtualToNano(pDevIns->Internal.s.pGVM, TMVirtualGet(pDevIns->Internal.s.pGVM));
640}
641
642
643/** @interface_method_impl{PDMDEVHLPR0,pfnQueueToPtr} */
644static DECLCALLBACK(PPDMQUEUE) pdmR0DevHlp_QueueToPtr(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
645{
646 PDMDEV_ASSERT_DEVINS(pDevIns);
647 RT_NOREF(pDevIns);
648 return (PPDMQUEUE)MMHyperR3ToCC(pDevIns->Internal.s.pGVM, hQueue);
649}
650
651
652/** @interface_method_impl{PDMDEVHLPR0,pfnQueueAlloc} */
653static DECLCALLBACK(PPDMQUEUEITEMCORE) pdmR0DevHlp_QueueAlloc(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
654{
655 return PDMQueueAlloc(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue));
656}
657
658
659/** @interface_method_impl{PDMDEVHLPR0,pfnQueueInsert} */
660static DECLCALLBACK(void) pdmR0DevHlp_QueueInsert(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue, PPDMQUEUEITEMCORE pItem)
661{
662 return PDMQueueInsert(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue), pItem);
663}
664
665
666/** @interface_method_impl{PDMDEVHLPR0,pfnQueueInsertEx} */
667static DECLCALLBACK(void) pdmR0DevHlp_QueueInsertEx(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue, PPDMQUEUEITEMCORE pItem,
668 uint64_t cNanoMaxDelay)
669{
670 return PDMQueueInsertEx(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue), pItem, cNanoMaxDelay);
671}
672
673
674/** @interface_method_impl{PDMDEVHLPR0,pfnQueueFlushIfNecessary} */
675static DECLCALLBACK(bool) pdmR0DevHlp_QueueFlushIfNecessary(PPDMDEVINS pDevIns, PDMQUEUEHANDLE hQueue)
676{
677 return PDMQueueFlushIfNecessary(pdmR0DevHlp_QueueToPtr(pDevIns, hQueue));
678}
679
680
681/** @interface_method_impl{PDMDEVHLPR0,pfnTaskTrigger} */
682static DECLCALLBACK(int) pdmR0DevHlp_TaskTrigger(PPDMDEVINS pDevIns, PDMTASKHANDLE hTask)
683{
684 PDMDEV_ASSERT_DEVINS(pDevIns);
685 LogFlow(("pdmR0DevHlp_TaskTrigger: caller='%s'/%d: hTask=%RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, hTask));
686
687 int rc = PDMTaskTrigger(pDevIns->Internal.s.pGVM, PDMTASKTYPE_DEV, pDevIns->pDevInsForR3, hTask);
688
689 LogFlow(("pdmR0DevHlp_TaskTrigger: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
690 return rc;
691}
692
693
694/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventSignal} */
695static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventSignal(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent)
696{
697 PDMDEV_ASSERT_DEVINS(pDevIns);
698 LogFlow(("pdmR0DevHlp_SUPSemEventSignal: caller='%s'/%d: hEvent=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEvent));
699
700 int rc = SUPSemEventSignal(pDevIns->Internal.s.pGVM->pSession, hEvent);
701
702 LogFlow(("pdmR0DevHlp_SUPSemEventSignal: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
703 return rc;
704}
705
706
707/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNoResume} */
708static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNoResume(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint32_t cMillies)
709{
710 PDMDEV_ASSERT_DEVINS(pDevIns);
711 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNoResume: caller='%s'/%d: hEvent=%p cNsTimeout=%RU32\n",
712 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, cMillies));
713
714 int rc = SUPSemEventWaitNoResume(pDevIns->Internal.s.pGVM->pSession, hEvent, cMillies);
715
716 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNoResume: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
717 return rc;
718}
719
720
721/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNsAbsIntr} */
722static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNsAbsIntr(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint64_t uNsTimeout)
723{
724 PDMDEV_ASSERT_DEVINS(pDevIns);
725 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsAbsIntr: caller='%s'/%d: hEvent=%p uNsTimeout=%RU64\n",
726 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, uNsTimeout));
727
728 int rc = SUPSemEventWaitNsAbsIntr(pDevIns->Internal.s.pGVM->pSession, hEvent, uNsTimeout);
729
730 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsAbsIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
731 return rc;
732}
733
734
735/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventWaitNsRelIntr} */
736static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventWaitNsRelIntr(PPDMDEVINS pDevIns, SUPSEMEVENT hEvent, uint64_t cNsTimeout)
737{
738 PDMDEV_ASSERT_DEVINS(pDevIns);
739 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsRelIntr: caller='%s'/%d: hEvent=%p cNsTimeout=%RU64\n",
740 pDevIns->pReg->szName, pDevIns->iInstance, hEvent, cNsTimeout));
741
742 int rc = SUPSemEventWaitNsRelIntr(pDevIns->Internal.s.pGVM->pSession, hEvent, cNsTimeout);
743
744 LogFlow(("pdmR0DevHlp_SUPSemEventWaitNsRelIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
745 return rc;
746}
747
748
749/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventGetResolution} */
750static DECLCALLBACK(uint32_t) pdmR0DevHlp_SUPSemEventGetResolution(PPDMDEVINS pDevIns)
751{
752 PDMDEV_ASSERT_DEVINS(pDevIns);
753 LogFlow(("pdmR0DevHlp_SUPSemEventGetResolution: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
754
755 uint32_t cNsResolution = SUPSemEventGetResolution(pDevIns->Internal.s.pGVM->pSession);
756
757 LogFlow(("pdmR0DevHlp_SUPSemEventGetResolution: caller='%s'/%d: returns %u\n", pDevIns->pReg->szName, pDevIns->iInstance, cNsResolution));
758 return cNsResolution;
759}
760
761
762/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiSignal} */
763static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiSignal(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti)
764{
765 PDMDEV_ASSERT_DEVINS(pDevIns);
766 LogFlow(("pdmR0DevHlp_SUPSemEventMultiSignal: caller='%s'/%d: hEventMulti=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti));
767
768 int rc = SUPSemEventMultiSignal(pDevIns->Internal.s.pGVM->pSession, hEventMulti);
769
770 LogFlow(("pdmR0DevHlp_SUPSemEventMultiSignal: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
771 return rc;
772}
773
774
775/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiReset} */
776static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiReset(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti)
777{
778 PDMDEV_ASSERT_DEVINS(pDevIns);
779 LogFlow(("pdmR0DevHlp_SUPSemEventMultiReset: caller='%s'/%d: hEventMulti=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti));
780
781 int rc = SUPSemEventMultiReset(pDevIns->Internal.s.pGVM->pSession, hEventMulti);
782
783 LogFlow(("pdmR0DevHlp_SUPSemEventMultiReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
784 return rc;
785}
786
787
788/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNoResume} */
789static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNoResume(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
790 uint32_t cMillies)
791{
792 PDMDEV_ASSERT_DEVINS(pDevIns);
793 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNoResume: caller='%s'/%d: hEventMulti=%p cMillies=%RU32\n",
794 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, cMillies));
795
796 int rc = SUPSemEventMultiWaitNoResume(pDevIns->Internal.s.pGVM->pSession, hEventMulti, cMillies);
797
798 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNoResume: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
799 return rc;
800}
801
802
803/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNsAbsIntr} */
804static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
805 uint64_t uNsTimeout)
806{
807 PDMDEV_ASSERT_DEVINS(pDevIns);
808 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr: caller='%s'/%d: hEventMulti=%p uNsTimeout=%RU64\n",
809 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, uNsTimeout));
810
811 int rc = SUPSemEventMultiWaitNsAbsIntr(pDevIns->Internal.s.pGVM->pSession, hEventMulti, uNsTimeout);
812
813 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
814 return rc;
815}
816
817
818/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiWaitNsRelIntr} */
819static DECLCALLBACK(int) pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr(PPDMDEVINS pDevIns, SUPSEMEVENTMULTI hEventMulti,
820 uint64_t cNsTimeout)
821{
822 PDMDEV_ASSERT_DEVINS(pDevIns);
823 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr: caller='%s'/%d: hEventMulti=%p cNsTimeout=%RU64\n",
824 pDevIns->pReg->szName, pDevIns->iInstance, hEventMulti, cNsTimeout));
825
826 int rc = SUPSemEventMultiWaitNsRelIntr(pDevIns->Internal.s.pGVM->pSession, hEventMulti, cNsTimeout);
827
828 LogFlow(("pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
829 return rc;
830}
831
832
833/** @interface_method_impl{PDMDEVHLPR0,pfnSUPSemEventMultiGetResolution} */
834static DECLCALLBACK(uint32_t) pdmR0DevHlp_SUPSemEventMultiGetResolution(PPDMDEVINS pDevIns)
835{
836 PDMDEV_ASSERT_DEVINS(pDevIns);
837 LogFlow(("pdmR0DevHlp_SUPSemEventMultiGetResolution: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
838
839 uint32_t cNsResolution = SUPSemEventMultiGetResolution(pDevIns->Internal.s.pGVM->pSession);
840
841 LogFlow(("pdmR0DevHlp_SUPSemEventMultiGetResolution: caller='%s'/%d: returns %u\n", pDevIns->pReg->szName, pDevIns->iInstance, cNsResolution));
842 return cNsResolution;
843}
844
845
846/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectGetNop} */
847static DECLCALLBACK(PPDMCRITSECT) pdmR0DevHlp_CritSectGetNop(PPDMDEVINS pDevIns)
848{
849 PDMDEV_ASSERT_DEVINS(pDevIns);
850 PGVM pGVM = pDevIns->Internal.s.pGVM;
851
852 PPDMCRITSECT pCritSect = &pGVM->pdm.s.NopCritSect;
853 LogFlow(("pdmR0DevHlp_CritSectGetNop: caller='%s'/%d: return %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pCritSect));
854 return pCritSect;
855}
856
857
858/** @interface_method_impl{PDMDEVHLPR0,pfnSetDeviceCritSect} */
859static DECLCALLBACK(int) pdmR0DevHlp_SetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
860{
861 /*
862 * Validate input.
863 *
864 * Note! We only allow the automatically created default critical section
865 * to be replaced by this API.
866 */
867 PDMDEV_ASSERT_DEVINS(pDevIns);
868 AssertPtrReturn(pCritSect, VERR_INVALID_POINTER);
869 LogFlow(("pdmR0DevHlp_SetDeviceCritSect: caller='%s'/%d: pCritSect=%p (%s)\n",
870 pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pCritSect->s.pszName));
871 AssertReturn(PDMCritSectIsInitialized(pCritSect), VERR_INVALID_PARAMETER);
872 PGVM pGVM = pDevIns->Internal.s.pGVM;
873 AssertReturn(pCritSect->s.pVMR0 == pGVM, VERR_INVALID_PARAMETER);
874
875 VM_ASSERT_EMT(pGVM);
876 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
877
878 /*
879 * Check that ring-3 has already done this, then effect the change.
880 */
881 AssertReturn(pDevIns->pDevInsForR3R0->Internal.s.fIntFlags & PDMDEVINSINT_FLAGS_CHANGED_CRITSECT, VERR_WRONG_ORDER);
882 pDevIns->pCritSectRoR0 = pCritSect;
883
884 LogFlow(("pdmR0DevHlp_SetDeviceCritSect: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
885 return VINF_SUCCESS;
886}
887
888
889/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectEnter} */
890static DECLCALLBACK(int) pdmR0DevHlp_CritSectEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy)
891{
892 PDMDEV_ASSERT_DEVINS(pDevIns);
893 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
894 return PDMCritSectEnter(pCritSect, rcBusy);
895}
896
897
898/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectEnterDebug} */
899static DECLCALLBACK(int) pdmR0DevHlp_CritSectEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL)
900{
901 PDMDEV_ASSERT_DEVINS(pDevIns);
902 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
903 return PDMCritSectEnterDebug(pCritSect, rcBusy, uId, RT_SRC_POS_ARGS);
904}
905
906
907/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectTryEnter} */
908static DECLCALLBACK(int) pdmR0DevHlp_CritSectTryEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
909{
910 PDMDEV_ASSERT_DEVINS(pDevIns);
911 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
912 return PDMCritSectTryEnter(pCritSect);
913}
914
915
916/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectTryEnterDebug} */
917static DECLCALLBACK(int) pdmR0DevHlp_CritSectTryEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL)
918{
919 PDMDEV_ASSERT_DEVINS(pDevIns);
920 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
921 return PDMCritSectTryEnterDebug(pCritSect, uId, RT_SRC_POS_ARGS);
922}
923
924
925/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectLeave} */
926static DECLCALLBACK(int) pdmR0DevHlp_CritSectLeave(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
927{
928 PDMDEV_ASSERT_DEVINS(pDevIns);
929 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
930 return PDMCritSectLeave(pCritSect);
931}
932
933
934/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectIsOwner} */
935static DECLCALLBACK(bool) pdmR0DevHlp_CritSectIsOwner(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
936{
937 PDMDEV_ASSERT_DEVINS(pDevIns);
938 RT_NOREF(pDevIns); /** @todo pass pDevIns->Internal.s.pGVM to the crit sect code. */
939 return PDMCritSectIsOwner(pCritSect);
940}
941
942
943/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectIsInitialized} */
944static DECLCALLBACK(bool) pdmR0DevHlp_CritSectIsInitialized(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
945{
946 PDMDEV_ASSERT_DEVINS(pDevIns);
947 RT_NOREF(pDevIns);
948 return PDMCritSectIsInitialized(pCritSect);
949}
950
951
952/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectHasWaiters} */
953static DECLCALLBACK(bool) pdmR0DevHlp_CritSectHasWaiters(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
954{
955 PDMDEV_ASSERT_DEVINS(pDevIns);
956 RT_NOREF(pDevIns);
957 return PDMCritSectHasWaiters(pCritSect);
958}
959
960
961/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectGetRecursion} */
962static DECLCALLBACK(uint32_t) pdmR0DevHlp_CritSectGetRecursion(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect)
963{
964 PDMDEV_ASSERT_DEVINS(pDevIns);
965 RT_NOREF(pDevIns);
966 return PDMCritSectGetRecursion(pCritSect);
967}
968
969
970/** @interface_method_impl{PDMDEVHLPR0,pfnCritSectScheduleExitEvent} */
971static DECLCALLBACK(int) pdmR0DevHlp_CritSectScheduleExitEvent(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect,
972 SUPSEMEVENT hEventToSignal)
973{
974 PDMDEV_ASSERT_DEVINS(pDevIns);
975 RT_NOREF(pDevIns);
976 return PDMHCCritSectScheduleExitEvent(pCritSect, hEventToSignal);
977}
978
979
980/** @interface_method_impl{PDMDEVHLPR0,pfnDBGFTraceBuf} */
981static DECLCALLBACK(RTTRACEBUF) pdmR0DevHlp_DBGFTraceBuf(PPDMDEVINS pDevIns)
982{
983 PDMDEV_ASSERT_DEVINS(pDevIns);
984 RTTRACEBUF hTraceBuf = pDevIns->Internal.s.pGVM->hTraceBufR0;
985 LogFlow(("pdmR0DevHlp_DBGFTraceBuf: caller='%p'/%d: returns %p\n", pDevIns, pDevIns->iInstance, hTraceBuf));
986 return hTraceBuf;
987}
988
989
990/** @interface_method_impl{PDMDEVHLPR0,pfnPCIBusSetUpContext} */
991static DECLCALLBACK(int) pdmR0DevHlp_PCIBusSetUpContext(PPDMDEVINS pDevIns, PPDMPCIBUSREGR0 pPciBusReg, PCPDMPCIHLPR0 *ppPciHlp)
992{
993 PDMDEV_ASSERT_DEVINS(pDevIns);
994 LogFlow(("pdmR0DevHlp_PCIBusSetUpContext: caller='%p'/%d: pPciBusReg=%p{.u32Version=%#x, .iBus=%#u, .pfnSetIrq=%p, u32EnvVersion=%#x} ppPciHlp=%p\n",
995 pDevIns, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->iBus, pPciBusReg->pfnSetIrq,
996 pPciBusReg->u32EndVersion, ppPciHlp));
997 PGVM pGVM = pDevIns->Internal.s.pGVM;
998
999 /*
1000 * Validate input.
1001 */
1002 AssertPtrReturn(pPciBusReg, VERR_INVALID_POINTER);
1003 AssertLogRelMsgReturn(pPciBusReg->u32Version == PDM_PCIBUSREGCC_VERSION,
1004 ("%#x vs %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREGCC_VERSION), VERR_VERSION_MISMATCH);
1005 AssertPtrReturn(pPciBusReg->pfnSetIrq, VERR_INVALID_POINTER);
1006 AssertLogRelMsgReturn(pPciBusReg->u32EndVersion == PDM_PCIBUSREGCC_VERSION,
1007 ("%#x vs %#x\n", pPciBusReg->u32EndVersion, PDM_PCIBUSREGCC_VERSION), VERR_VERSION_MISMATCH);
1008
1009 AssertPtrReturn(ppPciHlp, VERR_INVALID_POINTER);
1010
1011 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1012 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1013
1014 /* Check the shared bus data (registered earlier from ring-3): */
1015 uint32_t iBus = pPciBusReg->iBus;
1016 ASMCompilerBarrier();
1017 AssertLogRelMsgReturn(iBus < RT_ELEMENTS(pGVM->pdm.s.aPciBuses), ("iBus=%#x\n", iBus), VERR_OUT_OF_RANGE);
1018 PPDMPCIBUS pPciBusShared = &pGVM->pdm.s.aPciBuses[iBus];
1019 AssertLogRelMsgReturn(pPciBusShared->iBus == iBus, ("%u vs %u\n", pPciBusShared->iBus, iBus), VERR_INVALID_PARAMETER);
1020 AssertLogRelMsgReturn(pPciBusShared->pDevInsR3 == pDevIns->pDevInsForR3,
1021 ("%p vs %p (iBus=%u)\n", pPciBusShared->pDevInsR3, pDevIns->pDevInsForR3, iBus), VERR_NOT_OWNER);
1022
1023 /* Check that the bus isn't already registered in ring-0: */
1024 AssertCompile(RT_ELEMENTS(pGVM->pdm.s.aPciBuses) == RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses));
1025 PPDMPCIBUSR0 pPciBusR0 = &pGVM->pdmr0.s.aPciBuses[iBus];
1026 AssertLogRelMsgReturn(pPciBusR0->pDevInsR0 == NULL,
1027 ("%p (caller pDevIns=%p, iBus=%u)\n", pPciBusR0->pDevInsR0, pDevIns, iBus),
1028 VERR_ALREADY_EXISTS);
1029
1030 /*
1031 * Do the registering.
1032 */
1033 pPciBusR0->iBus = iBus;
1034 pPciBusR0->uPadding0 = 0xbeefbeef;
1035 pPciBusR0->pfnSetIrqR0 = pPciBusReg->pfnSetIrq;
1036 pPciBusR0->pDevInsR0 = pDevIns;
1037
1038 *ppPciHlp = &g_pdmR0PciHlp;
1039
1040 LogFlow(("pdmR0DevHlp_PCIBusSetUpContext: caller='%p'/%d: returns VINF_SUCCESS\n", pDevIns, pDevIns->iInstance));
1041 return VINF_SUCCESS;
1042}
1043
1044
1045/** @interface_method_impl{PDMDEVHLPR0,pfnIommuSetUpContext} */
1046static DECLCALLBACK(int) pdmR0DevHlp_IommuSetUpContext(PPDMDEVINS pDevIns, PPDMIOMMUREGR0 pIommuReg, PCPDMIOMMUHLPR0 *ppIommuHlp)
1047{
1048 PDMDEV_ASSERT_DEVINS(pDevIns);
1049 LogFlow(("pdmR0DevHlp_IommuSetUpContext: caller='%p'/%d: pIommuReg=%p{.u32Version=%#x, u32TheEnd=%#x} ppIommuHlp=%p\n",
1050 pDevIns, pDevIns->iInstance, pIommuReg, pIommuReg->u32Version, pIommuReg->u32TheEnd, ppIommuHlp));
1051 PGVM pGVM = pDevIns->Internal.s.pGVM;
1052
1053 /*
1054 * Validate input.
1055 */
1056 AssertPtrReturn(pIommuReg, VERR_INVALID_POINTER);
1057 AssertLogRelMsgReturn(pIommuReg->u32Version == PDM_IOMMUREGCC_VERSION,
1058 ("%#x vs %#x\n", pIommuReg->u32Version, PDM_IOMMUREGCC_VERSION), VERR_VERSION_MISMATCH);
1059 AssertLogRelMsgReturn(pIommuReg->u32TheEnd == PDM_IOMMUREGCC_VERSION,
1060 ("%#x vs %#x\n", pIommuReg->u32TheEnd, PDM_IOMMUREGCC_VERSION), VERR_VERSION_MISMATCH);
1061
1062 AssertPtrReturn(ppIommuHlp, VERR_INVALID_POINTER);
1063
1064 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1065 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1066
1067 /* Check the IOMMU shared data (registered earlier from ring-3). */
1068 uint32_t const idxIommu = pIommuReg->idxIommu;
1069 ASMCompilerBarrier();
1070 AssertLogRelMsgReturn(idxIommu < RT_ELEMENTS(pGVM->pdm.s.aIommus), ("idxIommu=%#x\n", idxIommu), VERR_OUT_OF_RANGE);
1071 PPDMIOMMU pIommuShared = &pGVM->pdm.s.aIommus[idxIommu];
1072 AssertLogRelMsgReturn(pIommuShared->idxIommu == idxIommu, ("%u vs %u\n", pIommuShared->idxIommu, idxIommu), VERR_INVALID_PARAMETER);
1073 AssertLogRelMsgReturn(pIommuShared->pDevInsR3 == pDevIns->pDevInsForR3,
1074 ("%p vs %p (idxIommu=%u)\n", pIommuShared->pDevInsR3, pDevIns->pDevInsForR3, idxIommu), VERR_NOT_OWNER);
1075
1076 /* Check that the IOMMU isn't already registered in ring-0. */
1077 AssertCompile(RT_ELEMENTS(pGVM->pdm.s.aIommus) == RT_ELEMENTS(pGVM->pdmr0.s.aIommus));
1078 PPDMIOMMUR0 pIommuR0 = &pGVM->pdmr0.s.aIommus[idxIommu];
1079 AssertLogRelMsgReturn(pIommuR0->pDevInsR0 == NULL,
1080 ("%p (caller pDevIns=%p, idxIommu=%u)\n", pIommuR0->pDevInsR0, pDevIns, idxIommu),
1081 VERR_ALREADY_EXISTS);
1082
1083 /*
1084 * Register.
1085 */
1086 pIommuR0->idxIommu = idxIommu;
1087 pIommuR0->uPadding0 = 0xdeaddead;
1088 pIommuR0->pDevInsR0 = pDevIns;
1089
1090 *ppIommuHlp = &g_pdmR0IommuHlp;
1091
1092 LogFlow(("pdmR0DevHlp_IommuSetUpContext: caller='%p'/%d: returns VINF_SUCCESS\n", pDevIns, pDevIns->iInstance));
1093 return VINF_SUCCESS;
1094}
1095
1096
1097/** @interface_method_impl{PDMDEVHLPR0,pfnPICSetUpContext} */
1098static DECLCALLBACK(int) pdmR0DevHlp_PICSetUpContext(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLP *ppPicHlp)
1099{
1100 PDMDEV_ASSERT_DEVINS(pDevIns);
1101 LogFlow(("pdmR0DevHlp_PICSetUpContext: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrq=%p, .pfnGetInterrupt=%p, .u32TheEnd=%#x } ppPicHlp=%p\n",
1102 pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrq, pPicReg->pfnGetInterrupt, pPicReg->u32TheEnd, ppPicHlp));
1103 PGVM pGVM = pDevIns->Internal.s.pGVM;
1104
1105 /*
1106 * Validate input.
1107 */
1108 AssertMsgReturn(pPicReg->u32Version == PDM_PICREG_VERSION,
1109 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pPicReg->u32Version, PDM_PICREG_VERSION),
1110 VERR_VERSION_MISMATCH);
1111 AssertPtrReturn(pPicReg->pfnSetIrq, VERR_INVALID_POINTER);
1112 AssertPtrReturn(pPicReg->pfnGetInterrupt, VERR_INVALID_POINTER);
1113 AssertMsgReturn(pPicReg->u32TheEnd == PDM_PICREG_VERSION,
1114 ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pPicReg->u32TheEnd, PDM_PICREG_VERSION),
1115 VERR_VERSION_MISMATCH);
1116 AssertPtrReturn(ppPicHlp, VERR_INVALID_POINTER);
1117
1118 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1119 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1120
1121 /* Check that it's the same device as made the ring-3 registrations: */
1122 AssertLogRelMsgReturn(pGVM->pdm.s.Pic.pDevInsR3 == pDevIns->pDevInsForR3,
1123 ("%p vs %p\n", pGVM->pdm.s.Pic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1124
1125 /* Check that it isn't already registered in ring-0: */
1126 AssertLogRelMsgReturn(pGVM->pdm.s.Pic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Pic.pDevInsR0, pDevIns),
1127 VERR_ALREADY_EXISTS);
1128
1129 /*
1130 * Take down the callbacks and instance.
1131 */
1132 pGVM->pdm.s.Pic.pDevInsR0 = pDevIns;
1133 pGVM->pdm.s.Pic.pfnSetIrqR0 = pPicReg->pfnSetIrq;
1134 pGVM->pdm.s.Pic.pfnGetInterruptR0 = pPicReg->pfnGetInterrupt;
1135 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1136
1137 /* set the helper pointer and return. */
1138 *ppPicHlp = &g_pdmR0PicHlp;
1139 LogFlow(("pdmR0DevHlp_PICSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1140 return VINF_SUCCESS;
1141}
1142
1143
1144/** @interface_method_impl{PDMDEVHLPR0,pfnApicSetUpContext} */
1145static DECLCALLBACK(int) pdmR0DevHlp_ApicSetUpContext(PPDMDEVINS pDevIns)
1146{
1147 PDMDEV_ASSERT_DEVINS(pDevIns);
1148 LogFlow(("pdmR0DevHlp_ApicSetUpContext: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1149 PGVM pGVM = pDevIns->Internal.s.pGVM;
1150
1151 /*
1152 * Validate input.
1153 */
1154 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1155 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1156
1157 /* Check that it's the same device as made the ring-3 registrations: */
1158 AssertLogRelMsgReturn(pGVM->pdm.s.Apic.pDevInsR3 == pDevIns->pDevInsForR3,
1159 ("%p vs %p\n", pGVM->pdm.s.Apic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1160
1161 /* Check that it isn't already registered in ring-0: */
1162 AssertLogRelMsgReturn(pGVM->pdm.s.Apic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Apic.pDevInsR0, pDevIns),
1163 VERR_ALREADY_EXISTS);
1164
1165 /*
1166 * Take down the instance.
1167 */
1168 pGVM->pdm.s.Apic.pDevInsR0 = pDevIns;
1169 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1170
1171 /* set the helper pointer and return. */
1172 LogFlow(("pdmR0DevHlp_ApicSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1173 return VINF_SUCCESS;
1174}
1175
1176
1177/** @interface_method_impl{PDMDEVHLPR0,pfnIoApicSetUpContext} */
1178static DECLCALLBACK(int) pdmR0DevHlp_IoApicSetUpContext(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLP *ppIoApicHlp)
1179{
1180 PDMDEV_ASSERT_DEVINS(pDevIns);
1181 LogFlow(("pdmR0DevHlp_IoApicSetUpContext: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrq=%p, .pfnSendMsi=%p, .pfnSetEoi=%p, .u32TheEnd=%#x } ppIoApicHlp=%p\n",
1182 pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrq, pIoApicReg->pfnSendMsi, pIoApicReg->pfnSetEoi, pIoApicReg->u32TheEnd, ppIoApicHlp));
1183 PGVM pGVM = pDevIns->Internal.s.pGVM;
1184
1185 /*
1186 * Validate input.
1187 */
1188 AssertMsgReturn(pIoApicReg->u32Version == PDM_IOAPICREG_VERSION,
1189 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg->u32Version, PDM_IOAPICREG_VERSION),
1190 VERR_VERSION_MISMATCH);
1191 AssertPtrReturn(pIoApicReg->pfnSetIrq, VERR_INVALID_POINTER);
1192 AssertPtrReturn(pIoApicReg->pfnSendMsi, VERR_INVALID_POINTER);
1193 AssertPtrReturn(pIoApicReg->pfnSetEoi, VERR_INVALID_POINTER);
1194 AssertMsgReturn(pIoApicReg->u32TheEnd == PDM_IOAPICREG_VERSION,
1195 ("%s/%d: u32TheEnd=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg->u32TheEnd, PDM_IOAPICREG_VERSION),
1196 VERR_VERSION_MISMATCH);
1197 AssertPtrReturn(ppIoApicHlp, VERR_INVALID_POINTER);
1198
1199 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1200 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1201
1202 /* Check that it's the same device as made the ring-3 registrations: */
1203 AssertLogRelMsgReturn(pGVM->pdm.s.IoApic.pDevInsR3 == pDevIns->pDevInsForR3,
1204 ("%p vs %p\n", pGVM->pdm.s.IoApic.pDevInsR3, pDevIns->pDevInsForR3), VERR_NOT_OWNER);
1205
1206 /* Check that it isn't already registered in ring-0: */
1207 AssertLogRelMsgReturn(pGVM->pdm.s.IoApic.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.IoApic.pDevInsR0, pDevIns),
1208 VERR_ALREADY_EXISTS);
1209
1210 /*
1211 * Take down the callbacks and instance.
1212 */
1213 pGVM->pdm.s.IoApic.pDevInsR0 = pDevIns;
1214 pGVM->pdm.s.IoApic.pfnSetIrqR0 = pIoApicReg->pfnSetIrq;
1215 pGVM->pdm.s.IoApic.pfnSendMsiR0 = pIoApicReg->pfnSendMsi;
1216 pGVM->pdm.s.IoApic.pfnSetEoiR0 = pIoApicReg->pfnSetEoi;
1217 Log(("PDM: Registered IOAPIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1218
1219 /* set the helper pointer and return. */
1220 *ppIoApicHlp = &g_pdmR0IoApicHlp;
1221 LogFlow(("pdmR0DevHlp_IoApicSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1222 return VINF_SUCCESS;
1223}
1224
1225
1226/** @interface_method_impl{PDMDEVHLPR0,pfnHpetSetUpContext} */
1227static DECLCALLBACK(int) pdmR0DevHlp_HpetSetUpContext(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR0 *ppHpetHlp)
1228{
1229 PDMDEV_ASSERT_DEVINS(pDevIns);
1230 LogFlow(("pdmR0DevHlp_HpetSetUpContext: caller='%s'/%d: pHpetReg=%p:{.u32Version=%#x, } ppHpetHlp=%p\n",
1231 pDevIns->pReg->szName, pDevIns->iInstance, pHpetReg, pHpetReg->u32Version, ppHpetHlp));
1232 PGVM pGVM = pDevIns->Internal.s.pGVM;
1233
1234 /*
1235 * Validate input.
1236 */
1237 AssertMsgReturn(pHpetReg->u32Version == PDM_HPETREG_VERSION,
1238 ("%s/%d: u32Version=%#x expected %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, pHpetReg->u32Version, PDM_HPETREG_VERSION),
1239 VERR_VERSION_MISMATCH);
1240 AssertPtrReturn(ppHpetHlp, VERR_INVALID_POINTER);
1241
1242 VM_ASSERT_STATE_RETURN(pGVM, VMSTATE_CREATING, VERR_WRONG_ORDER);
1243 VM_ASSERT_EMT0_RETURN(pGVM, VERR_VM_THREAD_NOT_EMT);
1244
1245 /* Check that it's the same device as made the ring-3 registrations: */
1246 AssertLogRelMsgReturn(pGVM->pdm.s.pHpet == pDevIns->pDevInsForR3, ("%p vs %p\n", pGVM->pdm.s.pHpet, pDevIns->pDevInsForR3),
1247 VERR_NOT_OWNER);
1248
1249 ///* Check that it isn't already registered in ring-0: */
1250 //AssertLogRelMsgReturn(pGVM->pdm.s.Hpet.pDevInsR0 == NULL, ("%p (caller pDevIns=%p)\n", pGVM->pdm.s.Hpet.pDevInsR0, pDevIns),
1251 // VERR_ALREADY_EXISTS);
1252
1253 /*
1254 * Nothing to take down here at present.
1255 */
1256 Log(("PDM: Registered HPET device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1257
1258 /* set the helper pointer and return. */
1259 *ppHpetHlp = &g_pdmR0HpetHlp;
1260 LogFlow(("pdmR0DevHlp_HpetSetUpContext: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
1261 return VINF_SUCCESS;
1262}
1263
1264
1265/**
1266 * The Ring-0 Device Helper Callbacks.
1267 */
1268extern DECLEXPORT(const PDMDEVHLPR0) g_pdmR0DevHlp =
1269{
1270 PDM_DEVHLPR0_VERSION,
1271 pdmR0DevHlp_IoPortSetUpContextEx,
1272 pdmR0DevHlp_MmioSetUpContextEx,
1273 pdmR0DevHlp_Mmio2SetUpContext,
1274 pdmR0DevHlp_PCIPhysRead,
1275 pdmR0DevHlp_PCIPhysWrite,
1276 pdmR0DevHlp_PCISetIrq,
1277 pdmR0DevHlp_ISASetIrq,
1278 pdmR0DevHlp_IoApicSendMsi,
1279 pdmR0DevHlp_PhysRead,
1280 pdmR0DevHlp_PhysWrite,
1281 pdmR0DevHlp_A20IsEnabled,
1282 pdmR0DevHlp_VMState,
1283 pdmR0DevHlp_VMSetError,
1284 pdmR0DevHlp_VMSetErrorV,
1285 pdmR0DevHlp_VMSetRuntimeError,
1286 pdmR0DevHlp_VMSetRuntimeErrorV,
1287 pdmR0DevHlp_GetVM,
1288 pdmR0DevHlp_GetVMCPU,
1289 pdmR0DevHlp_GetCurrentCpuId,
1290 pdmR0DevHlp_TimerToPtr,
1291 pdmR0DevHlp_TimerFromMicro,
1292 pdmR0DevHlp_TimerFromMilli,
1293 pdmR0DevHlp_TimerFromNano,
1294 pdmR0DevHlp_TimerGet,
1295 pdmR0DevHlp_TimerGetFreq,
1296 pdmR0DevHlp_TimerGetNano,
1297 pdmR0DevHlp_TimerIsActive,
1298 pdmR0DevHlp_TimerIsLockOwner,
1299 pdmR0DevHlp_TimerLockClock,
1300 pdmR0DevHlp_TimerLockClock2,
1301 pdmR0DevHlp_TimerSet,
1302 pdmR0DevHlp_TimerSetFrequencyHint,
1303 pdmR0DevHlp_TimerSetMicro,
1304 pdmR0DevHlp_TimerSetMillies,
1305 pdmR0DevHlp_TimerSetNano,
1306 pdmR0DevHlp_TimerSetRelative,
1307 pdmR0DevHlp_TimerStop,
1308 pdmR0DevHlp_TimerUnlockClock,
1309 pdmR0DevHlp_TimerUnlockClock2,
1310 pdmR0DevHlp_TMTimeVirtGet,
1311 pdmR0DevHlp_TMTimeVirtGetFreq,
1312 pdmR0DevHlp_TMTimeVirtGetNano,
1313 pdmR0DevHlp_QueueToPtr,
1314 pdmR0DevHlp_QueueAlloc,
1315 pdmR0DevHlp_QueueInsert,
1316 pdmR0DevHlp_QueueInsertEx,
1317 pdmR0DevHlp_QueueFlushIfNecessary,
1318 pdmR0DevHlp_TaskTrigger,
1319 pdmR0DevHlp_SUPSemEventSignal,
1320 pdmR0DevHlp_SUPSemEventWaitNoResume,
1321 pdmR0DevHlp_SUPSemEventWaitNsAbsIntr,
1322 pdmR0DevHlp_SUPSemEventWaitNsRelIntr,
1323 pdmR0DevHlp_SUPSemEventGetResolution,
1324 pdmR0DevHlp_SUPSemEventMultiSignal,
1325 pdmR0DevHlp_SUPSemEventMultiReset,
1326 pdmR0DevHlp_SUPSemEventMultiWaitNoResume,
1327 pdmR0DevHlp_SUPSemEventMultiWaitNsAbsIntr,
1328 pdmR0DevHlp_SUPSemEventMultiWaitNsRelIntr,
1329 pdmR0DevHlp_SUPSemEventMultiGetResolution,
1330 pdmR0DevHlp_CritSectGetNop,
1331 pdmR0DevHlp_SetDeviceCritSect,
1332 pdmR0DevHlp_CritSectEnter,
1333 pdmR0DevHlp_CritSectEnterDebug,
1334 pdmR0DevHlp_CritSectTryEnter,
1335 pdmR0DevHlp_CritSectTryEnterDebug,
1336 pdmR0DevHlp_CritSectLeave,
1337 pdmR0DevHlp_CritSectIsOwner,
1338 pdmR0DevHlp_CritSectIsInitialized,
1339 pdmR0DevHlp_CritSectHasWaiters,
1340 pdmR0DevHlp_CritSectGetRecursion,
1341 pdmR0DevHlp_CritSectScheduleExitEvent,
1342 pdmR0DevHlp_DBGFTraceBuf,
1343 pdmR0DevHlp_PCIBusSetUpContext,
1344 pdmR0DevHlp_IommuSetUpContext,
1345 pdmR0DevHlp_PICSetUpContext,
1346 pdmR0DevHlp_ApicSetUpContext,
1347 pdmR0DevHlp_IoApicSetUpContext,
1348 pdmR0DevHlp_HpetSetUpContext,
1349 NULL /*pfnReserved1*/,
1350 NULL /*pfnReserved2*/,
1351 NULL /*pfnReserved3*/,
1352 NULL /*pfnReserved4*/,
1353 NULL /*pfnReserved5*/,
1354 NULL /*pfnReserved6*/,
1355 NULL /*pfnReserved7*/,
1356 NULL /*pfnReserved8*/,
1357 NULL /*pfnReserved9*/,
1358 NULL /*pfnReserved10*/,
1359 PDM_DEVHLPR0_VERSION
1360};
1361
1362/** @} */
1363
1364
1365/** @name PIC Ring-0 Helpers
1366 * @{
1367 */
1368
1369/** @interface_method_impl{PDMPICHLP,pfnSetInterruptFF} */
1370static DECLCALLBACK(void) pdmR0PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
1371{
1372 PDMDEV_ASSERT_DEVINS(pDevIns);
1373 PGVM pGVM = (PGVM)pDevIns->Internal.s.pGVM;
1374 PVMCPUCC pVCpu = &pGVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
1375 /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
1376 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 1 /* u8Level */, VINF_SUCCESS /* rcRZ */);
1377}
1378
1379
1380/** @interface_method_impl{PDMPICHLP,pfnClearInterruptFF} */
1381static DECLCALLBACK(void) pdmR0PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
1382{
1383 PDMDEV_ASSERT_DEVINS(pDevIns);
1384 PGVM pGVM = (PGVM)pDevIns->Internal.s.pGVM;
1385 PVMCPUCC pVCpu = &pGVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
1386 /** @todo r=ramshankar: Propagating rcRZ and make all callers handle it? */
1387 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 0 /* u8Level */, VINF_SUCCESS /* rcRZ */);
1388}
1389
1390
1391/** @interface_method_impl{PDMPICHLP,pfnLock} */
1392static DECLCALLBACK(int) pdmR0PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
1393{
1394 PDMDEV_ASSERT_DEVINS(pDevIns);
1395 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1396}
1397
1398
1399/** @interface_method_impl{PDMPICHLP,pfnUnlock} */
1400static DECLCALLBACK(void) pdmR0PicHlp_Unlock(PPDMDEVINS pDevIns)
1401{
1402 PDMDEV_ASSERT_DEVINS(pDevIns);
1403 pdmUnlock(pDevIns->Internal.s.pGVM);
1404}
1405
1406
1407/**
1408 * The Ring-0 PIC Helper Callbacks.
1409 */
1410extern DECLEXPORT(const PDMPICHLP) g_pdmR0PicHlp =
1411{
1412 PDM_PICHLP_VERSION,
1413 pdmR0PicHlp_SetInterruptFF,
1414 pdmR0PicHlp_ClearInterruptFF,
1415 pdmR0PicHlp_Lock,
1416 pdmR0PicHlp_Unlock,
1417 PDM_PICHLP_VERSION
1418};
1419
1420/** @} */
1421
1422
1423/** @name I/O APIC Ring-0 Helpers
1424 * @{
1425 */
1426
1427/** @interface_method_impl{PDMIOAPICHLP,pfnApicBusDeliver} */
1428static DECLCALLBACK(int) pdmR0IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode,
1429 uint8_t u8DeliveryMode, uint8_t uVector, uint8_t u8Polarity,
1430 uint8_t u8TriggerMode, uint32_t uTagSrc)
1431{
1432 PDMDEV_ASSERT_DEVINS(pDevIns);
1433 PGVM pGVM = pDevIns->Internal.s.pGVM;
1434 LogFlow(("pdmR0IoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 uVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8 uTagSrc=%#x\n",
1435 pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc));
1436 return APICBusDeliver(pGVM, u8Dest, u8DestMode, u8DeliveryMode, uVector, u8Polarity, u8TriggerMode, uTagSrc);
1437}
1438
1439
1440/** @interface_method_impl{PDMIOAPICHLP,pfnLock} */
1441static DECLCALLBACK(int) pdmR0IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
1442{
1443 PDMDEV_ASSERT_DEVINS(pDevIns);
1444 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1445}
1446
1447
1448/** @interface_method_impl{PDMIOAPICHLP,pfnUnlock} */
1449static DECLCALLBACK(void) pdmR0IoApicHlp_Unlock(PPDMDEVINS pDevIns)
1450{
1451 PDMDEV_ASSERT_DEVINS(pDevIns);
1452 pdmUnlock(pDevIns->Internal.s.pGVM);
1453}
1454
1455
1456/**
1457 * The Ring-0 I/O APIC Helper Callbacks.
1458 */
1459extern DECLEXPORT(const PDMIOAPICHLP) g_pdmR0IoApicHlp =
1460{
1461 PDM_IOAPICHLP_VERSION,
1462 pdmR0IoApicHlp_ApicBusDeliver,
1463 pdmR0IoApicHlp_Lock,
1464 pdmR0IoApicHlp_Unlock,
1465 PDM_IOAPICHLP_VERSION
1466};
1467
1468/** @} */
1469
1470
1471
1472
1473/** @name PCI Bus Ring-0 Helpers
1474 * @{
1475 */
1476
1477/** @interface_method_impl{PDMPCIHLPR0,pfnIsaSetIrq} */
1478static DECLCALLBACK(void) pdmR0PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
1479{
1480 PDMDEV_ASSERT_DEVINS(pDevIns);
1481 Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
1482 PGVM pGVM = pDevIns->Internal.s.pGVM;
1483
1484 pdmLock(pGVM);
1485 pdmR0IsaSetIrq(pGVM, iIrq, iLevel, uTagSrc);
1486 pdmUnlock(pGVM);
1487}
1488
1489
1490/** @interface_method_impl{PDMPCIHLPR0,pfnIoApicSetIrq} */
1491static DECLCALLBACK(void) pdmR0PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
1492{
1493 PDMDEV_ASSERT_DEVINS(pDevIns);
1494 Log4(("pdmR0PciHlp_IoApicSetIrq: iIrq=%d iLevel=%d uTagSrc=%#x\n", iIrq, iLevel, uTagSrc));
1495 PGVM pGVM = pDevIns->Internal.s.pGVM;
1496
1497 if (pGVM->pdm.s.IoApic.pDevInsR0)
1498 pGVM->pdm.s.IoApic.pfnSetIrqR0(pGVM->pdm.s.IoApic.pDevInsR0, iIrq, iLevel, uTagSrc);
1499 else if (pGVM->pdm.s.IoApic.pDevInsR3)
1500 {
1501 /* queue for ring-3 execution. */
1502 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
1503 if (pTask)
1504 {
1505 pTask->enmOp = PDMDEVHLPTASKOP_IOAPIC_SET_IRQ;
1506 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
1507 pTask->u.IoApicSetIRQ.iIrq = iIrq;
1508 pTask->u.IoApicSetIRQ.iLevel = iLevel;
1509 pTask->u.IoApicSetIRQ.uTagSrc = uTagSrc;
1510
1511 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
1512 }
1513 else
1514 AssertMsgFailed(("We're out of devhlp queue items!!!\n"));
1515 }
1516}
1517
1518
1519/** @interface_method_impl{PDMPCIHLPR0,pfnIoApicSendMsi} */
1520static DECLCALLBACK(void) pdmR0PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
1521{
1522 PDMDEV_ASSERT_DEVINS(pDevIns);
1523 Log4(("pdmR0PciHlp_IoApicSendMsi: GCPhys=%p uValue=%d uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
1524 PGVM pGVM = pDevIns->Internal.s.pGVM;
1525 if (pGVM->pdm.s.IoApic.pDevInsR0)
1526 pGVM->pdm.s.IoApic.pfnSendMsiR0(pGVM->pdm.s.IoApic.pDevInsR0, GCPhys, uValue, uTagSrc);
1527 else
1528 AssertFatalMsgFailed(("Lazy bastards!"));
1529}
1530
1531
1532/** @interface_method_impl{PDMPCIHLPR0,pfnLock} */
1533static DECLCALLBACK(int) pdmR0PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
1534{
1535 PDMDEV_ASSERT_DEVINS(pDevIns);
1536 return pdmLockEx(pDevIns->Internal.s.pGVM, rc);
1537}
1538
1539
1540/** @interface_method_impl{PDMPCIHLPR0,pfnUnlock} */
1541static DECLCALLBACK(void) pdmR0PciHlp_Unlock(PPDMDEVINS pDevIns)
1542{
1543 PDMDEV_ASSERT_DEVINS(pDevIns);
1544 pdmUnlock(pDevIns->Internal.s.pGVM);
1545}
1546
1547
1548/** @interface_method_impl{PDMPCIHLPR0,pfnGetBusByNo} */
1549static DECLCALLBACK(PPDMDEVINS) pdmR0PciHlp_GetBusByNo(PPDMDEVINS pDevIns, uint32_t idxPdmBus)
1550{
1551 PDMDEV_ASSERT_DEVINS(pDevIns);
1552 PGVM pGVM = pDevIns->Internal.s.pGVM;
1553 AssertReturn(idxPdmBus < RT_ELEMENTS(pGVM->pdmr0.s.aPciBuses), NULL);
1554 PPDMDEVINS pRetDevIns = pGVM->pdmr0.s.aPciBuses[idxPdmBus].pDevInsR0;
1555 LogFlow(("pdmR3PciHlp_GetBusByNo: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pRetDevIns));
1556 return pRetDevIns;
1557}
1558
1559
1560/**
1561 * The Ring-0 PCI Bus Helper Callbacks.
1562 */
1563extern DECLEXPORT(const PDMPCIHLPR0) g_pdmR0PciHlp =
1564{
1565 PDM_PCIHLPR0_VERSION,
1566 pdmR0PciHlp_IsaSetIrq,
1567 pdmR0PciHlp_IoApicSetIrq,
1568 pdmR0PciHlp_IoApicSendMsi,
1569 pdmR0PciHlp_Lock,
1570 pdmR0PciHlp_Unlock,
1571 pdmR0PciHlp_GetBusByNo,
1572 PDM_PCIHLPR0_VERSION, /* the end */
1573};
1574
1575/** @} */
1576
1577
1578/** @name IOMMU Ring-0 Helpers
1579 * @{
1580 */
1581
1582/**
1583 * The Ring-0 IOMMU Helper Callbacks.
1584 */
1585extern DECLEXPORT(const PDMIOMMUHLPR0) g_pdmR0IommuHlp =
1586{
1587 PDM_IOMMUHLPR0_VERSION,
1588 PDM_IOMMUHLPR0_VERSION, /* the end */
1589};
1590
1591/** @} */
1592
1593
1594/** @name HPET Ring-0 Helpers
1595 * @{
1596 */
1597/* none */
1598
1599/**
1600 * The Ring-0 HPET Helper Callbacks.
1601 */
1602extern DECLEXPORT(const PDMHPETHLPR0) g_pdmR0HpetHlp =
1603{
1604 PDM_HPETHLPR0_VERSION,
1605 PDM_HPETHLPR0_VERSION, /* the end */
1606};
1607
1608/** @} */
1609
1610
1611/** @name Raw PCI Ring-0 Helpers
1612 * @{
1613 */
1614/* none */
1615
1616/**
1617 * The Ring-0 PCI raw Helper Callbacks.
1618 */
1619extern DECLEXPORT(const PDMPCIRAWHLPR0) g_pdmR0PciRawHlp =
1620{
1621 PDM_PCIRAWHLPR0_VERSION,
1622 PDM_PCIRAWHLPR0_VERSION, /* the end */
1623};
1624
1625/** @} */
1626
1627
1628
1629
1630/**
1631 * Sets an irq on the PIC and I/O APIC.
1632 *
1633 * @returns true if delivered, false if postponed.
1634 * @param pGVM The global (ring-0) VM structure.
1635 * @param iIrq The irq.
1636 * @param iLevel The new level.
1637 * @param uTagSrc The IRQ tag and source.
1638 *
1639 * @remarks The caller holds the PDM lock.
1640 */
1641static bool pdmR0IsaSetIrq(PGVM pGVM, int iIrq, int iLevel, uint32_t uTagSrc)
1642{
1643 if (RT_LIKELY( ( pGVM->pdm.s.IoApic.pDevInsR0
1644 || !pGVM->pdm.s.IoApic.pDevInsR3)
1645 && ( pGVM->pdm.s.Pic.pDevInsR0
1646 || !pGVM->pdm.s.Pic.pDevInsR3)))
1647 {
1648 if (pGVM->pdm.s.Pic.pDevInsR0)
1649 pGVM->pdm.s.Pic.pfnSetIrqR0(pGVM->pdm.s.Pic.pDevInsR0, iIrq, iLevel, uTagSrc);
1650 if (pGVM->pdm.s.IoApic.pDevInsR0)
1651 pGVM->pdm.s.IoApic.pfnSetIrqR0(pGVM->pdm.s.IoApic.pDevInsR0, iIrq, iLevel, uTagSrc);
1652 return true;
1653 }
1654
1655 /* queue for ring-3 execution. */
1656 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)PDMQueueAlloc(pGVM->pdm.s.pDevHlpQueueR0);
1657 AssertReturn(pTask, false);
1658
1659 pTask->enmOp = PDMDEVHLPTASKOP_ISA_SET_IRQ;
1660 pTask->pDevInsR3 = NIL_RTR3PTR; /* not required */
1661 pTask->u.IsaSetIRQ.iIrq = iIrq;
1662 pTask->u.IsaSetIRQ.iLevel = iLevel;
1663 pTask->u.IsaSetIRQ.uTagSrc = uTagSrc;
1664
1665 PDMQueueInsertEx(pGVM->pdm.s.pDevHlpQueueR0, &pTask->Core, 0);
1666 return false;
1667}
1668
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