VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PMUAll.cpp

Last change on this file was 108968, checked in by vboxsync, 3 weeks ago

VMM,Main,Devices: Respect VBOX_VMM_TARGET_ARMV8 correctly on amd64 hosts (for IEM debugging purposes). jiraref:VBP-1598
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 7.2 KB
Line 
1/* $Id: PMUAll.cpp 108968 2025-04-14 20:45:36Z vboxsync $ */
2/** @file
3 * PMU - Performance Monitoring Unit. - All Contexts.
4 */
5
6/*
7 * Copyright (C) 2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_PMU
33#include "PMUInternal.h"
34#include <VBox/vmm/pmu.h>
35#include <VBox/vmm/pdmdev.h>
36#include <VBox/vmm/vmcc.h>
37#include <VBox/vmm/vmm.h>
38#include <VBox/vmm/vmcpuset.h>
39#ifdef IN_RING0
40# include <VBox/vmm/gvmm.h>
41#endif
42
43#ifdef RT_ARCH_ARM64
44# include <iprt/asm-arm.h>
45#endif
46
47
48
49/**
50 * Reads a PMU system register.
51 *
52 * @returns Strict VBox status code.
53 * @param pVCpu The cross context virtual CPU structure.
54 * @param u32Reg The system register being read.
55 * @param pu64Value Where to store the read value.
56 */
57VMM_INT_DECL(VBOXSTRICTRC) PMUReadSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value)
58{
59 /*
60 * Validate.
61 */
62 VMCPU_ASSERT_EMT(pVCpu);
63 Assert(pu64Value);
64
65 *pu64Value = 0;
66
67#if 0
68 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED);
69 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock);
70#endif
71
72 RT_NOREF(pVCpu);
73 switch (u32Reg)
74 {
75 case ARMV8_AARCH64_SYSREG_PMCCNTR_EL0:
76 *pu64Value = ASMReadTSC() * 100;
77 break;
78 case ARMV8_AARCH64_SYSREG_PMCR_EL0:
79 case ARMV8_AARCH64_SYSREG_PMCNTENCLR_EL0:
80 case ARMV8_AARCH64_SYSREG_PMUSERENR_EL0:
81 break;
82 default:
83 AssertReleaseFailed();
84 break;
85 }
86
87 //PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3);
88
89 LogFlowFunc(("pVCpu=%p u32Reg=%#x pu64Value=%RX64\n", pVCpu, u32Reg, *pu64Value));
90 return VINF_SUCCESS;
91}
92
93
94/**
95 * Writes an PMU system register.
96 *
97 * @returns Strict VBox status code.
98 * @param pVCpu The cross context virtual CPU structure.
99 * @param u32Reg The system register being written (IPRT system register identifier).
100 * @param u64Value The value to write.
101 */
102VMM_INT_DECL(VBOXSTRICTRC) PMUWriteSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value)
103{
104 /*
105 * Validate.
106 */
107 VMCPU_ASSERT_EMT(pVCpu);
108 LogFlowFunc(("pVCpu=%p u32Reg=%#x u64Value=%RX64\n", pVCpu, u32Reg, u64Value));
109
110#if 0
111 int const rcLock = PDMDevHlpCritSectEnter(pDevIns, pDevIns->pCritSectRoR3, VERR_IGNORED);
112 PDM_CRITSECT_RELEASE_ASSERT_RC_DEV(pDevIns, pDevIns->pCritSectRoR3, rcLock);
113#endif
114
115 RT_NOREF(pVCpu, u64Value);
116 switch (u32Reg)
117 {
118 case ARMV8_AARCH64_SYSREG_PMCNTENCLR_EL0:
119 case ARMV8_AARCH64_SYSREG_PMOVSCLR_EL0:
120 case ARMV8_AARCH64_SYSREG_PMINTENCLR_EL1:
121 case ARMV8_AARCH64_SYSREG_PMCR_EL0:
122 case ARMV8_AARCH64_SYSREG_PMCCFILTR_EL0:
123 case ARMV8_AARCH64_SYSREG_PMCNTENSET_EL0:
124 case ARMV8_AARCH64_SYSREG_PMUSERENR_EL0:
125 case ARMV8_AARCH64_SYSREG_PMCCNTR_EL0:
126 break;
127 default:
128 AssertReleaseFailed();
129 break;
130 }
131
132 //PDMDevHlpCritSectLeave(pDevIns, pDevIns->pCritSectRoR3);
133 return VINF_SUCCESS;
134}
135
136
137#ifndef IN_RING3
138
139/**
140 * @callback_method_impl{PDMDEVREGR0,pfnConstruct}
141 */
142static DECLCALLBACK(int) pmuRZConstruct(PPDMDEVINS pDevIns)
143{
144 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
145 AssertReleaseFailed();
146 return VINF_SUCCESS;
147}
148#endif /* !IN_RING3 */
149
150/**
151 * PMU device registration structure.
152 */
153const PDMDEVREG g_DevicePMU =
154{
155 /* .u32Version = */ PDM_DEVREG_VERSION,
156 /* .uReserved0 = */ 0,
157 /* .szName = */ "pmu",
158 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ | PDM_DEVREG_FLAGS_NEW_STYLE,
159 /* .fClass = */ PDM_DEVREG_CLASS_ARCH,
160 /* .cMaxInstances = */ 1,
161 /* .uSharedVersion = */ 42,
162 /* .cbInstanceShared = */ sizeof(PMUDEV),
163 /* .cbInstanceCC = */ 0,
164 /* .cbInstanceRC = */ 0,
165 /* .cMaxPciDevices = */ 0,
166 /* .cMaxMsixVectors = */ 0,
167 /* .pszDescription = */ "Performance Monitoring Unit",
168#if defined(IN_RING3)
169 /* .szRCMod = */ "VMMRC.rc",
170 /* .szR0Mod = */ "VMMR0.r0",
171 /* .pfnConstruct = */ pmuR3Construct,
172 /* .pfnDestruct = */ pmuR3Destruct,
173 /* .pfnRelocate = */ pmuR3Relocate,
174 /* .pfnMemSetup = */ NULL,
175 /* .pfnPowerOn = */ NULL,
176 /* .pfnReset = */ pmuR3Reset,
177 /* .pfnSuspend = */ NULL,
178 /* .pfnResume = */ NULL,
179 /* .pfnAttach = */ NULL,
180 /* .pfnDetach = */ NULL,
181 /* .pfnQueryInterface = */ NULL,
182 /* .pfnInitComplete = */ NULL,
183 /* .pfnPowerOff = */ NULL,
184 /* .pfnSoftReset = */ NULL,
185 /* .pfnReserved0 = */ NULL,
186 /* .pfnReserved1 = */ NULL,
187 /* .pfnReserved2 = */ NULL,
188 /* .pfnReserved3 = */ NULL,
189 /* .pfnReserved4 = */ NULL,
190 /* .pfnReserved5 = */ NULL,
191 /* .pfnReserved6 = */ NULL,
192 /* .pfnReserved7 = */ NULL,
193#elif defined(IN_RING0)
194 /* .pfnEarlyConstruct = */ NULL,
195 /* .pfnConstruct = */ pmuRZConstruct,
196 /* .pfnDestruct = */ NULL,
197 /* .pfnFinalDestruct = */ NULL,
198 /* .pfnRequest = */ NULL,
199 /* .pfnReserved0 = */ NULL,
200 /* .pfnReserved1 = */ NULL,
201 /* .pfnReserved2 = */ NULL,
202 /* .pfnReserved3 = */ NULL,
203 /* .pfnReserved4 = */ NULL,
204 /* .pfnReserved5 = */ NULL,
205 /* .pfnReserved6 = */ NULL,
206 /* .pfnReserved7 = */ NULL,
207#elif defined(IN_RC)
208 /* .pfnConstruct = */ pmuRZConstruct,
209 /* .pfnReserved0 = */ NULL,
210 /* .pfnReserved1 = */ NULL,
211 /* .pfnReserved2 = */ NULL,
212 /* .pfnReserved3 = */ NULL,
213 /* .pfnReserved4 = */ NULL,
214 /* .pfnReserved5 = */ NULL,
215 /* .pfnReserved6 = */ NULL,
216 /* .pfnReserved7 = */ NULL,
217#else
218# error "Not in IN_RING3, IN_RING0 or IN_RC!"
219#endif
220 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
221};
Note: See TracBrowser for help on using the repository browser.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette