| 1 | /* $Id: IEMAllN8veHlpA-arm64.S 104367 2024-04-18 22:38:19Z vboxsync $ */
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| 2 | /** @file
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| 3 | * IEM - Native Recompiler Assembly Helpers, ARM64 variant.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2024 Oracle and/or its affiliates.
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| 8 | *
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| 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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| 26 | */
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| 27 |
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| 28 |
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| 29 | /*********************************************************************************************************************************
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| 30 | * Header Files *
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| 31 | *********************************************************************************************************************************/
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| 32 | #include <iprt/asmdefs-arm.h>
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| 33 | #include <iprt/armv8.h>
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| 34 |
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| 35 | #include "IEMInternal.h"
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| 36 | #include "IEMN8veRecompiler.h"
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| 37 | #include "IEMAssemblyOffsets.h"
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| 38 |
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| 39 |
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| 40 | /*********************************************************************************************************************************
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| 41 | * Defined Constants And Macros *
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| 42 | *********************************************************************************************************************************/
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| 43 | #define IEM_HLP_FUNCTION_ALIGNMENT 0x20
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| 44 |
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| 45 |
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| 46 | /*********************************************************************************************************************************
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| 47 | * External Functions *
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| 48 | *********************************************************************************************************************************/
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| 49 | .extern NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
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| 50 |
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| 51 |
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| 52 | BEGINCODE
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| 53 |
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| 54 | /**
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| 55 | * This is the common prologue of a TB, saving all volatile registers
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| 56 | * and creating the stack frame for saving temporary values.
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| 57 | *
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| 58 | * @param pVCpu (x0) The cross-context vCPU structure pointer.
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| 59 | * @param pCpumCtx (x1) The cross-context CPUM context structure pointer.
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| 60 | * @param pTbStart (x2) The TB instruction start pointer.
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| 61 | */
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| 62 | ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
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| 63 | BEGINPROC_HIDDEN iemNativeTbEntry
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| 64 | #ifdef RT_OS_DARWIN
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| 65 | pacibsp
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| 66 | #endif
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| 67 | /*
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| 68 | * We set up a stack frame exactly like on x86, only we have to push the
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| 69 | * return address our selves here. We save all non-volatile registers.
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| 70 | */
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| 71 | /* Allocate space for saving registers and place x19+x20 at the bottom. */
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| 72 | stp x19, x20, [sp, #-IEMNATIVE_FRAME_SAVE_REG_SIZE]!
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| 73 | /* Save x21 thru x28 (SP remains unchanged). */
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| 74 | stp x21, x22, [sp, #0x10]
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| 75 | stp x23, x24, [sp, #0x20]
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| 76 | stp x25, x26, [sp, #0x30]
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| 77 | stp x27, x28, [sp, #0x40]
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| 78 | /* Save the BP (x29) and LR (x30) (ret address) registers at the top of the frame. */
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| 79 | stp x29, x30, [sp, #0x50]
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| 80 | /* Set BP to point to the old BP stack address */
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| 81 | add x29, sp, #(IEMNATIVE_FRAME_SAVE_REG_SIZE - 16)
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| 82 | /* Allocate the variable area from SP. */
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| 83 | sub sp, sp, #IEMNATIVE_FRAME_VAR_SIZE
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| 84 | /* Load the fixed register values from parameters. */
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| 85 | mov IEMNATIVE_REG_FIXED_PVMCPU_ASM, x0
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| 86 | mov IEMNATIVE_REG_FIXED_PCPUMCTX_ASM, x1
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| 87 | #ifdef VBOX_WITH_IEM_NATIVE_RECOMPILER_LONGJMP
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| 88 | /* Save the frame pointer to pvTbFramePointerR3 */
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| 89 | str x29, [IEMNATIVE_REG_FIXED_PVMCPU_ASM, #(VMCPU_OFF_iem + IEMCPU_OFF_pvTbFramePointerR3)]
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| 90 | #endif
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| 91 |
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| 92 | /*
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| 93 | * Everything is done, jump to the start of the TB.
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| 94 | */
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| 95 | br x2
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| 96 |
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| 97 |
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| 98 | /**
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| 99 | * This does the epilogue of a TB, given the RBP for the frame and eax value to return.
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| 100 | *
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| 101 | * @param pFrame (x0) The frame pointer.
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| 102 | * @param rc (w1) The return value.
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| 103 | *
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| 104 | * @note This doesn't really work for MSC since xmm6 thru xmm15 are non-volatile
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| 105 | * and since we don't save them in the TB prolog we'll potentially return
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| 106 | * with different values if any functions on the calling stack uses them
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| 107 | * as they're unlikely to restore them till they return.
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| 108 | *
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| 109 | * For the GCC calling convention all xmm registers are volatile and the
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| 110 | * only worry would be someone fiddling the control bits of MXCSR or FCW
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| 111 | * without restoring them. This is highly unlikely, unless we're doing
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| 112 | * it ourselves, I think.
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| 113 | */
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| 114 | ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
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| 115 | BEGINPROC_HIDDEN iemNativeTbLongJmp
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| 116 | /*
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| 117 | * This must exactly match what iemNativeEmitEpilog does.
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| 118 | */
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| 119 | sub sp, x0, #0x50
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| 120 | ldp x19, x20, [sp, #0x00]
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| 121 | ldp x21, x22, [sp, #0x10]
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| 122 | ldp x23, x24, [sp, #0x20]
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| 123 | ldp x25, x26, [sp, #0x30]
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| 124 | ldp x27, x28, [sp, #0x40]
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| 125 | ldp x29, x30, [sp, #0x50] /* the pFrame address points to this entry */
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| 126 | add sp, sp, #0x60
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| 127 | mov w0, w1 /* The return value */
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| 128 | #ifdef RT_OS_DARWIN
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| 129 | retab
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| 130 | #else
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| 131 | ret
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| 132 | #endif
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| 133 | brk #1
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| 134 |
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| 135 |
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| 136 |
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| 137 | #define IEMNATIVE_HLP_FRAME_SIZE (11 * 16)
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| 138 |
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| 139 | /**
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| 140 | * This is wrapper function that saves and restores all volatile registers
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| 141 | * so the impact of inserting LogCpuState is minimal to the other TB code.
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| 142 | */
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| 143 | ALIGNCODE(IEM_HLP_FUNCTION_ALIGNMENT)
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| 144 | BEGINPROC_HIDDEN iemNativeHlpAsmSafeWrapLogCpuState
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| 145 | #ifdef RT_OS_DARWIN
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| 146 | pacibsp
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| 147 | #endif
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| 148 |
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| 149 | /*
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| 150 | * Save all volatile registers.
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| 151 | */
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| 152 | stp x29, x30, [sp, #-IEMNATIVE_HLP_FRAME_SIZE]!
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| 153 | stp x0, x1, [sp, #( 1 * 16)]
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| 154 | stp x2, x3, [sp, #( 2 * 16)]
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| 155 | stp x4, x5, [sp, #( 3 * 16)]
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| 156 | stp x5, x6, [sp, #( 4 * 16)]
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| 157 | stp x7, x8, [sp, #( 5 * 16)]
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| 158 | stp x9, x10, [sp, #( 6 * 16)]
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| 159 | stp x11, x12, [sp, #( 7 * 16)]
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| 160 | stp x13, x14, [sp, #( 8 * 16)]
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| 161 | stp x15, x16, [sp, #( 9 * 16)]
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| 162 | stp x17, x18, [sp, #(10 * 16)]
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| 163 |
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| 164 | /*
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| 165 | * Move the pVCpu pointer from the fixed register to the first argument.
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| 166 | * @todo This needs syncing with what we use in IEMN8veRecompiler.h
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| 167 | * but we can't include that header right now, would need some #ifndef IN_ASM_CODE...
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| 168 | * in the header or splitting up the header into a asm safe one and a one included from C/C++.
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| 169 | */
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| 170 | mov x0, x28
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| 171 |
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| 172 | /*
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| 173 | * Call C function to do the actual work.
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| 174 | */
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| 175 | bl NAME(iemThreadedFunc_BltIn_LogCpuStateWorker)
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| 176 |
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| 177 | /*
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| 178 | * Restore volatile registers and return to the TB code.
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| 179 | */
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| 180 | ldp x29, x30, [sp, #( 0 * 16)]
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| 181 | ldp x0, x1, [sp, #( 1 * 16)]
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| 182 | ldp x2, x3, [sp, #( 2 * 16)]
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| 183 | ldp x4, x5, [sp, #( 3 * 16)]
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| 184 | ldp x5, x6, [sp, #( 4 * 16)]
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| 185 | ldp x7, x8, [sp, #( 5 * 16)]
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| 186 | ldp x9, x10, [sp, #( 6 * 16)]
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| 187 | ldp x11, x12, [sp, #( 7 * 16)]
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| 188 | ldp x13, x14, [sp, #( 8 * 16)]
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| 189 | ldp x15, x16, [sp, #( 9 * 16)]
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| 190 | ldp x17, x18, [sp, #(10 * 16)]
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| 191 | add sp, sp, #IEMNATIVE_HLP_FRAME_SIZE
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| 192 |
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| 193 | #ifdef RT_OS_DARWIN
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| 194 | retab
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| 195 | #else
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| 196 | ret
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| 197 | #endif
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| 198 | brk #1
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