[49893] | 1 | /* $Id: CPUMAllCpuId.cpp 101428 2023-10-13 05:39:12Z vboxsync $ */
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| 2 | /** @file
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[94931] | 3 | * CPUM - CPU ID part, common bits.
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[49893] | 4 | */
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| 5 |
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| 6 | /*
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[98103] | 7 | * Copyright (C) 2013-2023 Oracle and/or its affiliates.
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[49893] | 8 | *
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[96407] | 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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[49893] | 26 | */
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| 27 |
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[57358] | 28 |
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| 29 | /*********************************************************************************************************************************
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| 30 | * Header Files *
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| 31 | *********************************************************************************************************************************/
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[49893] | 32 | #define LOG_GROUP LOG_GROUP_CPUM
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| 33 | #include <VBox/vmm/cpum.h>
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[54561] | 34 | #include <VBox/vmm/hm.h>
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| 35 | #include <VBox/vmm/ssm.h>
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[49893] | 36 | #include "CPUMInternal.h"
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[82578] | 37 | #include <VBox/vmm/vmcc.h>
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[67821] | 38 | #include <VBox/sup.h>
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[49893] | 39 |
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| 40 | #include <VBox/err.h>
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[93515] | 41 | #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
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| 42 | # include <iprt/asm-amd64-x86.h>
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| 43 | #endif
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[49893] | 44 | #include <iprt/ctype.h>
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| 45 | #include <iprt/mem.h>
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| 46 | #include <iprt/string.h>
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[93519] | 47 | #include <iprt/x86-helpers.h>
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[49893] | 48 |
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| 49 |
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[57358] | 50 | /*********************************************************************************************************************************
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| 51 | * Global Variables *
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| 52 | *********************************************************************************************************************************/
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[49893] | 53 | /**
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| 54 | * The intel pentium family.
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| 55 | */
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| 56 | static const CPUMMICROARCH g_aenmIntelFamily06[] =
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| 57 | {
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| 58 | /* [ 0(0x00)] = */ kCpumMicroarch_Intel_P6, /* Pentium Pro A-step (says sandpile.org). */
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| 59 | /* [ 1(0x01)] = */ kCpumMicroarch_Intel_P6, /* Pentium Pro */
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| 60 | /* [ 2(0x02)] = */ kCpumMicroarch_Intel_Unknown,
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| 61 | /* [ 3(0x03)] = */ kCpumMicroarch_Intel_P6_II, /* PII Klamath */
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| 62 | /* [ 4(0x04)] = */ kCpumMicroarch_Intel_Unknown,
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| 63 | /* [ 5(0x05)] = */ kCpumMicroarch_Intel_P6_II, /* PII Deschutes */
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| 64 | /* [ 6(0x06)] = */ kCpumMicroarch_Intel_P6_II, /* Celeron Mendocino. */
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| 65 | /* [ 7(0x07)] = */ kCpumMicroarch_Intel_P6_III, /* PIII Katmai. */
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| 66 | /* [ 8(0x08)] = */ kCpumMicroarch_Intel_P6_III, /* PIII Coppermine (includes Celeron). */
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| 67 | /* [ 9(0x09)] = */ kCpumMicroarch_Intel_P6_M_Banias, /* Pentium/Celeron M Banias. */
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| 68 | /* [10(0x0a)] = */ kCpumMicroarch_Intel_P6_III, /* PIII Xeon */
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| 69 | /* [11(0x0b)] = */ kCpumMicroarch_Intel_P6_III, /* PIII Tualatin (includes Celeron). */
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| 70 | /* [12(0x0c)] = */ kCpumMicroarch_Intel_Unknown,
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| 71 | /* [13(0x0d)] = */ kCpumMicroarch_Intel_P6_M_Dothan, /* Pentium/Celeron M Dothan. */
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| 72 | /* [14(0x0e)] = */ kCpumMicroarch_Intel_Core_Yonah, /* Core Yonah (Enhanced Pentium M). */
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| 73 | /* [15(0x0f)] = */ kCpumMicroarch_Intel_Core2_Merom, /* Merom */
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| 74 | /* [16(0x10)] = */ kCpumMicroarch_Intel_Unknown,
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| 75 | /* [17(0x11)] = */ kCpumMicroarch_Intel_Unknown,
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| 76 | /* [18(0x12)] = */ kCpumMicroarch_Intel_Unknown,
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| 77 | /* [19(0x13)] = */ kCpumMicroarch_Intel_Unknown,
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| 78 | /* [20(0x14)] = */ kCpumMicroarch_Intel_Unknown,
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| 79 | /* [21(0x15)] = */ kCpumMicroarch_Intel_P6_M_Dothan, /* Tolapai - System-on-a-chip. */
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| 80 | /* [22(0x16)] = */ kCpumMicroarch_Intel_Core2_Merom,
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| 81 | /* [23(0x17)] = */ kCpumMicroarch_Intel_Core2_Penryn,
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| 82 | /* [24(0x18)] = */ kCpumMicroarch_Intel_Unknown,
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| 83 | /* [25(0x19)] = */ kCpumMicroarch_Intel_Unknown,
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[78632] | 84 | /* [26(0x1a)] = */ kCpumMicroarch_Intel_Core7_Nehalem, /* Nehalem-EP */
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[49893] | 85 | /* [27(0x1b)] = */ kCpumMicroarch_Intel_Unknown,
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| 86 | /* [28(0x1c)] = */ kCpumMicroarch_Intel_Atom_Bonnell, /* Diamonville, Pineview, */
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| 87 | /* [29(0x1d)] = */ kCpumMicroarch_Intel_Core2_Penryn,
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| 88 | /* [30(0x1e)] = */ kCpumMicroarch_Intel_Core7_Nehalem, /* Clarksfield, Lynnfield, Jasper Forest. */
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| 89 | /* [31(0x1f)] = */ kCpumMicroarch_Intel_Core7_Nehalem, /* Only listed by sandpile.org. 2 cores ABD/HVD, whatever that means. */
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| 90 | /* [32(0x20)] = */ kCpumMicroarch_Intel_Unknown,
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| 91 | /* [33(0x21)] = */ kCpumMicroarch_Intel_Unknown,
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| 92 | /* [34(0x22)] = */ kCpumMicroarch_Intel_Unknown,
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| 93 | /* [35(0x23)] = */ kCpumMicroarch_Intel_Unknown,
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| 94 | /* [36(0x24)] = */ kCpumMicroarch_Intel_Unknown,
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| 95 | /* [37(0x25)] = */ kCpumMicroarch_Intel_Core7_Westmere, /* Arrandale, Clarksdale. */
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| 96 | /* [38(0x26)] = */ kCpumMicroarch_Intel_Atom_Lincroft,
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| 97 | /* [39(0x27)] = */ kCpumMicroarch_Intel_Atom_Saltwell,
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| 98 | /* [40(0x28)] = */ kCpumMicroarch_Intel_Unknown,
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| 99 | /* [41(0x29)] = */ kCpumMicroarch_Intel_Unknown,
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| 100 | /* [42(0x2a)] = */ kCpumMicroarch_Intel_Core7_SandyBridge,
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| 101 | /* [43(0x2b)] = */ kCpumMicroarch_Intel_Unknown,
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| 102 | /* [44(0x2c)] = */ kCpumMicroarch_Intel_Core7_Westmere, /* Gulftown, Westmere-EP. */
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| 103 | /* [45(0x2d)] = */ kCpumMicroarch_Intel_Core7_SandyBridge, /* SandyBridge-E, SandyBridge-EN, SandyBridge-EP. */
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| 104 | /* [46(0x2e)] = */ kCpumMicroarch_Intel_Core7_Nehalem, /* Beckton (Xeon). */
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| 105 | /* [47(0x2f)] = */ kCpumMicroarch_Intel_Core7_Westmere, /* Westmere-EX. */
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| 106 | /* [48(0x30)] = */ kCpumMicroarch_Intel_Unknown,
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| 107 | /* [49(0x31)] = */ kCpumMicroarch_Intel_Unknown,
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| 108 | /* [50(0x32)] = */ kCpumMicroarch_Intel_Unknown,
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| 109 | /* [51(0x33)] = */ kCpumMicroarch_Intel_Unknown,
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| 110 | /* [52(0x34)] = */ kCpumMicroarch_Intel_Unknown,
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| 111 | /* [53(0x35)] = */ kCpumMicroarch_Intel_Atom_Saltwell, /* ?? */
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| 112 | /* [54(0x36)] = */ kCpumMicroarch_Intel_Atom_Saltwell, /* Cedarview, ++ */
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| 113 | /* [55(0x37)] = */ kCpumMicroarch_Intel_Atom_Silvermont,
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| 114 | /* [56(0x38)] = */ kCpumMicroarch_Intel_Unknown,
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| 115 | /* [57(0x39)] = */ kCpumMicroarch_Intel_Unknown,
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| 116 | /* [58(0x3a)] = */ kCpumMicroarch_Intel_Core7_IvyBridge,
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| 117 | /* [59(0x3b)] = */ kCpumMicroarch_Intel_Unknown,
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| 118 | /* [60(0x3c)] = */ kCpumMicroarch_Intel_Core7_Haswell,
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| 119 | /* [61(0x3d)] = */ kCpumMicroarch_Intel_Core7_Broadwell,
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| 120 | /* [62(0x3e)] = */ kCpumMicroarch_Intel_Core7_IvyBridge,
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| 121 | /* [63(0x3f)] = */ kCpumMicroarch_Intel_Core7_Haswell,
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| 122 | /* [64(0x40)] = */ kCpumMicroarch_Intel_Unknown,
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| 123 | /* [65(0x41)] = */ kCpumMicroarch_Intel_Unknown,
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| 124 | /* [66(0x42)] = */ kCpumMicroarch_Intel_Unknown,
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| 125 | /* [67(0x43)] = */ kCpumMicroarch_Intel_Unknown,
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| 126 | /* [68(0x44)] = */ kCpumMicroarch_Intel_Unknown,
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| 127 | /* [69(0x45)] = */ kCpumMicroarch_Intel_Core7_Haswell,
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| 128 | /* [70(0x46)] = */ kCpumMicroarch_Intel_Core7_Haswell,
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[57373] | 129 | /* [71(0x47)] = */ kCpumMicroarch_Intel_Core7_Broadwell, /* i7-5775C */
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[49893] | 130 | /* [72(0x48)] = */ kCpumMicroarch_Intel_Unknown,
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| 131 | /* [73(0x49)] = */ kCpumMicroarch_Intel_Unknown,
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| 132 | /* [74(0x4a)] = */ kCpumMicroarch_Intel_Atom_Silvermont,
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| 133 | /* [75(0x4b)] = */ kCpumMicroarch_Intel_Unknown,
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[57373] | 134 | /* [76(0x4c)] = */ kCpumMicroarch_Intel_Atom_Airmount,
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[49893] | 135 | /* [77(0x4d)] = */ kCpumMicroarch_Intel_Atom_Silvermont,
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[78632] | 136 | /* [78(0x4e)] = */ kCpumMicroarch_Intel_Core7_Skylake,
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| 137 | /* [79(0x4f)] = */ kCpumMicroarch_Intel_Core7_Broadwell, /* Broadwell-E */
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[57329] | 138 | /* [80(0x50)] = */ kCpumMicroarch_Intel_Unknown,
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| 139 | /* [81(0x51)] = */ kCpumMicroarch_Intel_Unknown,
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| 140 | /* [82(0x52)] = */ kCpumMicroarch_Intel_Unknown,
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| 141 | /* [83(0x53)] = */ kCpumMicroarch_Intel_Unknown,
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| 142 | /* [84(0x54)] = */ kCpumMicroarch_Intel_Unknown,
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[78632] | 143 | /* [85(0x55)] = */ kCpumMicroarch_Intel_Core7_Skylake, /* server cpu; skylake <= 4, cascade lake > 5 */
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[57373] | 144 | /* [86(0x56)] = */ kCpumMicroarch_Intel_Core7_Broadwell, /* Xeon D-1540, Broadwell-DE */
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[70450] | 145 | /* [87(0x57)] = */ kCpumMicroarch_Intel_Phi_KnightsLanding,
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[57329] | 146 | /* [88(0x58)] = */ kCpumMicroarch_Intel_Unknown,
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| 147 | /* [89(0x59)] = */ kCpumMicroarch_Intel_Unknown,
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[57373] | 148 | /* [90(0x5a)] = */ kCpumMicroarch_Intel_Atom_Silvermont, /* Moorefield */
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[57329] | 149 | /* [91(0x5b)] = */ kCpumMicroarch_Intel_Unknown,
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[70450] | 150 | /* [92(0x5c)] = */ kCpumMicroarch_Intel_Atom_Goldmont, /* Apollo Lake */
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[57373] | 151 | /* [93(0x5d)] = */ kCpumMicroarch_Intel_Atom_Silvermont, /* x3-C3230 */
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| 152 | /* [94(0x5e)] = */ kCpumMicroarch_Intel_Core7_Skylake, /* i7-6700K */
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[70450] | 153 | /* [95(0x5f)] = */ kCpumMicroarch_Intel_Atom_Goldmont, /* Denverton */
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[57329] | 154 | /* [96(0x60)] = */ kCpumMicroarch_Intel_Unknown,
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| 155 | /* [97(0x61)] = */ kCpumMicroarch_Intel_Unknown,
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| 156 | /* [98(0x62)] = */ kCpumMicroarch_Intel_Unknown,
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| 157 | /* [99(0x63)] = */ kCpumMicroarch_Intel_Unknown,
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[70450] | 158 | /*[100(0x64)] = */ kCpumMicroarch_Intel_Unknown,
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[70555] | 159 | /*[101(0x65)] = */ kCpumMicroarch_Intel_Atom_Silvermont, /* SoFIA */
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| 160 | /*[102(0x66)] = */ kCpumMicroarch_Intel_Core7_CannonLake, /* unconfirmed */
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[70450] | 161 | /*[103(0x67)] = */ kCpumMicroarch_Intel_Unknown,
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| 162 | /*[104(0x68)] = */ kCpumMicroarch_Intel_Unknown,
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| 163 | /*[105(0x69)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 164 | /*[106(0x6a)] = */ kCpumMicroarch_Intel_Core7_IceLake, /* unconfirmed server */
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[70450] | 165 | /*[107(0x6b)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 166 | /*[108(0x6c)] = */ kCpumMicroarch_Intel_Core7_IceLake, /* unconfirmed server */
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[70450] | 167 | /*[109(0x6d)] = */ kCpumMicroarch_Intel_Unknown,
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[78632] | 168 | /*[110(0x6e)] = */ kCpumMicroarch_Intel_Atom_Airmount, /* or silvermount? */
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[70450] | 169 | /*[111(0x6f)] = */ kCpumMicroarch_Intel_Unknown,
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| 170 | /*[112(0x70)] = */ kCpumMicroarch_Intel_Unknown,
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| 171 | /*[113(0x71)] = */ kCpumMicroarch_Intel_Unknown,
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| 172 | /*[114(0x72)] = */ kCpumMicroarch_Intel_Unknown,
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| 173 | /*[115(0x73)] = */ kCpumMicroarch_Intel_Unknown,
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| 174 | /*[116(0x74)] = */ kCpumMicroarch_Intel_Unknown,
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[78632] | 175 | /*[117(0x75)] = */ kCpumMicroarch_Intel_Atom_Airmount, /* or silvermount? */
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[70450] | 176 | /*[118(0x76)] = */ kCpumMicroarch_Intel_Unknown,
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| 177 | /*[119(0x77)] = */ kCpumMicroarch_Intel_Unknown,
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| 178 | /*[120(0x78)] = */ kCpumMicroarch_Intel_Unknown,
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| 179 | /*[121(0x79)] = */ kCpumMicroarch_Intel_Unknown,
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[70551] | 180 | /*[122(0x7a)] = */ kCpumMicroarch_Intel_Atom_GoldmontPlus,
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[70450] | 181 | /*[123(0x7b)] = */ kCpumMicroarch_Intel_Unknown,
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| 182 | /*[124(0x7c)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 183 | /*[125(0x7d)] = */ kCpumMicroarch_Intel_Core7_IceLake, /* unconfirmed */
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| 184 | /*[126(0x7e)] = */ kCpumMicroarch_Intel_Core7_IceLake, /* unconfirmed */
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[70450] | 185 | /*[127(0x7f)] = */ kCpumMicroarch_Intel_Unknown,
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| 186 | /*[128(0x80)] = */ kCpumMicroarch_Intel_Unknown,
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| 187 | /*[129(0x81)] = */ kCpumMicroarch_Intel_Unknown,
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| 188 | /*[130(0x82)] = */ kCpumMicroarch_Intel_Unknown,
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| 189 | /*[131(0x83)] = */ kCpumMicroarch_Intel_Unknown,
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| 190 | /*[132(0x84)] = */ kCpumMicroarch_Intel_Unknown,
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| 191 | /*[133(0x85)] = */ kCpumMicroarch_Intel_Phi_KnightsMill,
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| 192 | /*[134(0x86)] = */ kCpumMicroarch_Intel_Unknown,
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| 193 | /*[135(0x87)] = */ kCpumMicroarch_Intel_Unknown,
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| 194 | /*[136(0x88)] = */ kCpumMicroarch_Intel_Unknown,
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| 195 | /*[137(0x89)] = */ kCpumMicroarch_Intel_Unknown,
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| 196 | /*[138(0x8a)] = */ kCpumMicroarch_Intel_Unknown,
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| 197 | /*[139(0x8b)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 198 | /*[140(0x8c)] = */ kCpumMicroarch_Intel_Core7_TigerLake, /* 11th Gen Intel(R) Core(TM) i7-1185G7 @ 3.00GHz (bird) */
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| 199 | /*[141(0x8d)] = */ kCpumMicroarch_Intel_Core7_TigerLake, /* unconfirmed */
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| 200 | /*[142(0x8e)] = */ kCpumMicroarch_Intel_Core7_KabyLake, /* Stepping >= 0xB is Whiskey Lake, 0xA is CoffeeLake. */
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| 201 | /*[143(0x8f)] = */ kCpumMicroarch_Intel_Core7_SapphireRapids,
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[70450] | 202 | /*[144(0x90)] = */ kCpumMicroarch_Intel_Unknown,
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| 203 | /*[145(0x91)] = */ kCpumMicroarch_Intel_Unknown,
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| 204 | /*[146(0x92)] = */ kCpumMicroarch_Intel_Unknown,
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| 205 | /*[147(0x93)] = */ kCpumMicroarch_Intel_Unknown,
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| 206 | /*[148(0x94)] = */ kCpumMicroarch_Intel_Unknown,
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| 207 | /*[149(0x95)] = */ kCpumMicroarch_Intel_Unknown,
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| 208 | /*[150(0x96)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 209 | /*[151(0x97)] = */ kCpumMicroarch_Intel_Core7_AlderLake, /* unconfirmed, unreleased */
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[70450] | 210 | /*[152(0x98)] = */ kCpumMicroarch_Intel_Unknown,
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| 211 | /*[153(0x99)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 212 | /*[154(0x9a)] = */ kCpumMicroarch_Intel_Core7_AlderLake, /* unconfirmed, unreleased */
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[70450] | 213 | /*[155(0x9b)] = */ kCpumMicroarch_Intel_Unknown,
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| 214 | /*[156(0x9c)] = */ kCpumMicroarch_Intel_Unknown,
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| 215 | /*[157(0x9d)] = */ kCpumMicroarch_Intel_Unknown,
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[78632] | 216 | /*[158(0x9e)] = */ kCpumMicroarch_Intel_Core7_KabyLake, /* Stepping >= 0xB is Whiskey Lake, 0xA is CoffeeLake. */
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[70450] | 217 | /*[159(0x9f)] = */ kCpumMicroarch_Intel_Unknown,
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[89934] | 218 | /*[160(0xa0)] = */ kCpumMicroarch_Intel_Unknown,
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| 219 | /*[161(0xa1)] = */ kCpumMicroarch_Intel_Unknown,
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| 220 | /*[162(0xa2)] = */ kCpumMicroarch_Intel_Unknown,
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| 221 | /*[163(0xa3)] = */ kCpumMicroarch_Intel_Unknown,
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| 222 | /*[164(0xa4)] = */ kCpumMicroarch_Intel_Unknown,
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| 223 | /*[165(0xa5)] = */ kCpumMicroarch_Intel_Core7_CometLake, /* unconfirmed */
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| 224 | /*[166(0xa6)] = */ kCpumMicroarch_Intel_Unknown,
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| 225 | /*[167(0xa7)] = */ kCpumMicroarch_Intel_Core7_CypressCove, /* 14nm backport, unconfirmed */
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[49893] | 226 | };
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[89934] | 227 | AssertCompile(RT_ELEMENTS(g_aenmIntelFamily06) == 0xa7+1);
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[49893] | 228 |
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| 229 |
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| 230 | /**
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| 231 | * Figures out the (sub-)micro architecture given a bit of CPUID info.
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| 232 | *
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| 233 | * @returns Micro architecture.
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[89934] | 234 | * @param enmVendor The CPU vendor.
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[49893] | 235 | * @param bFamily The CPU family.
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| 236 | * @param bModel The CPU model.
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| 237 | * @param bStepping The CPU stepping.
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| 238 | */
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[94931] | 239 | VMMDECL(CPUMMICROARCH) CPUMCpuIdDetermineX86MicroarchEx(CPUMCPUVENDOR enmVendor, uint8_t bFamily,
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| 240 | uint8_t bModel, uint8_t bStepping)
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[49893] | 241 | {
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| 242 | if (enmVendor == CPUMCPUVENDOR_AMD)
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| 243 | {
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| 244 | switch (bFamily)
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| 245 | {
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| 246 | case 0x02: return kCpumMicroarch_AMD_Am286; /* Not really kosher... */
|
---|
| 247 | case 0x03: return kCpumMicroarch_AMD_Am386;
|
---|
| 248 | case 0x23: return kCpumMicroarch_AMD_Am386; /* SX*/
|
---|
| 249 | case 0x04: return bModel < 14 ? kCpumMicroarch_AMD_Am486 : kCpumMicroarch_AMD_Am486Enh;
|
---|
| 250 | case 0x05: return bModel < 6 ? kCpumMicroarch_AMD_K5 : kCpumMicroarch_AMD_K6; /* Genode LX is 0x0a, lump it with K6. */
|
---|
| 251 | case 0x06:
|
---|
| 252 | switch (bModel)
|
---|
| 253 | {
|
---|
[54958] | 254 | case 0: return kCpumMicroarch_AMD_K7_Palomino;
|
---|
| 255 | case 1: return kCpumMicroarch_AMD_K7_Palomino;
|
---|
| 256 | case 2: return kCpumMicroarch_AMD_K7_Palomino;
|
---|
| 257 | case 3: return kCpumMicroarch_AMD_K7_Spitfire;
|
---|
| 258 | case 4: return kCpumMicroarch_AMD_K7_Thunderbird;
|
---|
| 259 | case 6: return kCpumMicroarch_AMD_K7_Palomino;
|
---|
| 260 | case 7: return kCpumMicroarch_AMD_K7_Morgan;
|
---|
| 261 | case 8: return kCpumMicroarch_AMD_K7_Thoroughbred;
|
---|
| 262 | case 10: return kCpumMicroarch_AMD_K7_Barton; /* Thorton too. */
|
---|
[49893] | 263 | }
|
---|
| 264 | return kCpumMicroarch_AMD_K7_Unknown;
|
---|
| 265 | case 0x0f:
|
---|
| 266 | /*
|
---|
| 267 | * This family is a friggin mess. Trying my best to make some
|
---|
| 268 | * sense out of it. Too much happened in the 0x0f family to
|
---|
| 269 | * lump it all together as K8 (130nm->90nm->65nm, AMD-V, ++).
|
---|
| 270 | *
|
---|
| 271 | * Emperical CPUID.01h.EAX evidence from revision guides, wikipedia,
|
---|
| 272 | * cpu-world.com, and other places:
|
---|
| 273 | * - 130nm:
|
---|
| 274 | * - ClawHammer: F7A/SH-CG, F5A/-CG, F4A/-CG, F50/-B0, F48/-C0, F58/-C0,
|
---|
| 275 | * - SledgeHammer: F50/SH-B0, F48/-C0, F58/-C0, F4A/-CG, F5A/-CG, F7A/-CG, F51/-B3
|
---|
[66879] | 276 | * - Newcastle: FC0/DH-CG (erratum #180: FE0/DH-CG), FF0/DH-CG
|
---|
[49893] | 277 | * - Dublin: FC0/-CG, FF0/-CG, F82/CH-CG, F4A/-CG, F48/SH-C0,
|
---|
[66879] | 278 | * - Odessa: FC0/DH-CG (erratum #180: FE0/DH-CG)
|
---|
| 279 | * - Paris: FF0/DH-CG, FC0/DH-CG (erratum #180: FE0/DH-CG),
|
---|
[49893] | 280 | * - 90nm:
|
---|
| 281 | * - Winchester: 10FF0/DH-D0, 20FF0/DH-E3.
|
---|
| 282 | * - Oakville: 10FC0/DH-D0.
|
---|
| 283 | * - Georgetown: 10FC0/DH-D0.
|
---|
| 284 | * - Sonora: 10FC0/DH-D0.
|
---|
| 285 | * - Venus: 20F71/SH-E4
|
---|
| 286 | * - Troy: 20F51/SH-E4
|
---|
| 287 | * - Athens: 20F51/SH-E4
|
---|
| 288 | * - San Diego: 20F71/SH-E4.
|
---|
| 289 | * - Lancaster: 20F42/SH-E5
|
---|
| 290 | * - Newark: 20F42/SH-E5.
|
---|
| 291 | * - Albany: 20FC2/DH-E6.
|
---|
| 292 | * - Roma: 20FC2/DH-E6.
|
---|
| 293 | * - Venice: 20FF0/DH-E3, 20FC2/DH-E6, 20FF2/DH-E6.
|
---|
| 294 | * - Palermo: 10FC0/DH-D0, 20FF0/DH-E3, 20FC0/DH-E3, 20FC2/DH-E6, 20FF2/DH-E6
|
---|
| 295 | * - 90nm introducing Dual core:
|
---|
| 296 | * - Denmark: 20F30/JH-E1, 20F32/JH-E6
|
---|
| 297 | * - Italy: 20F10/JH-E1, 20F12/JH-E6
|
---|
| 298 | * - Egypt: 20F10/JH-E1, 20F12/JH-E6
|
---|
| 299 | * - Toledo: 20F32/JH-E6, 30F72/DH-E6 (single code variant).
|
---|
| 300 | * - Manchester: 20FB1/BH-E4, 30FF2/BH-E4.
|
---|
[51281] | 301 | * - 90nm 2nd gen opteron ++, AMD-V introduced (might be missing in some cheaper models):
|
---|
[49893] | 302 | * - Santa Ana: 40F32/JH-F2, /-F3
|
---|
| 303 | * - Santa Rosa: 40F12/JH-F2, 40F13/JH-F3
|
---|
| 304 | * - Windsor: 40F32/JH-F2, 40F33/JH-F3, C0F13/JH-F3, 40FB2/BH-F2, ??20FB1/BH-E4??.
|
---|
| 305 | * - Manila: 50FF2/DH-F2, 40FF2/DH-F2
|
---|
| 306 | * - Orleans: 40FF2/DH-F2, 50FF2/DH-F2, 50FF3/DH-F3.
|
---|
| 307 | * - Keene: 40FC2/DH-F2.
|
---|
| 308 | * - Richmond: 40FC2/DH-F2
|
---|
| 309 | * - Taylor: 40F82/BH-F2
|
---|
| 310 | * - Trinidad: 40F82/BH-F2
|
---|
| 311 | *
|
---|
| 312 | * - 65nm:
|
---|
| 313 | * - Brisbane: 60FB1/BH-G1, 60FB2/BH-G2.
|
---|
| 314 | * - Tyler: 60F81/BH-G1, 60F82/BH-G2.
|
---|
| 315 | * - Sparta: 70FF1/DH-G1, 70FF2/DH-G2.
|
---|
| 316 | * - Lima: 70FF1/DH-G1, 70FF2/DH-G2.
|
---|
| 317 | * - Sherman: /-G1, 70FC2/DH-G2.
|
---|
| 318 | * - Huron: 70FF2/DH-G2.
|
---|
| 319 | */
|
---|
| 320 | if (bModel < 0x10)
|
---|
| 321 | return kCpumMicroarch_AMD_K8_130nm;
|
---|
| 322 | if (bModel >= 0x60 && bModel < 0x80)
|
---|
| 323 | return kCpumMicroarch_AMD_K8_65nm;
|
---|
| 324 | if (bModel >= 0x40)
|
---|
| 325 | return kCpumMicroarch_AMD_K8_90nm_AMDV;
|
---|
| 326 | switch (bModel)
|
---|
| 327 | {
|
---|
| 328 | case 0x21:
|
---|
| 329 | case 0x23:
|
---|
| 330 | case 0x2b:
|
---|
| 331 | case 0x2f:
|
---|
| 332 | case 0x37:
|
---|
| 333 | case 0x3f:
|
---|
| 334 | return kCpumMicroarch_AMD_K8_90nm_DualCore;
|
---|
| 335 | }
|
---|
| 336 | return kCpumMicroarch_AMD_K8_90nm;
|
---|
| 337 | case 0x10:
|
---|
| 338 | return kCpumMicroarch_AMD_K10;
|
---|
| 339 | case 0x11:
|
---|
| 340 | return kCpumMicroarch_AMD_K10_Lion;
|
---|
| 341 | case 0x12:
|
---|
| 342 | return kCpumMicroarch_AMD_K10_Llano;
|
---|
| 343 | case 0x14:
|
---|
| 344 | return kCpumMicroarch_AMD_Bobcat;
|
---|
| 345 | case 0x15:
|
---|
| 346 | switch (bModel)
|
---|
| 347 | {
|
---|
| 348 | case 0x00: return kCpumMicroarch_AMD_15h_Bulldozer; /* Any? prerelease? */
|
---|
| 349 | case 0x01: return kCpumMicroarch_AMD_15h_Bulldozer; /* Opteron 4200, FX-81xx. */
|
---|
| 350 | case 0x02: return kCpumMicroarch_AMD_15h_Piledriver; /* Opteron 4300, FX-83xx. */
|
---|
| 351 | case 0x10: return kCpumMicroarch_AMD_15h_Piledriver; /* A10-5800K for e.g. */
|
---|
| 352 | case 0x11: /* ?? */
|
---|
| 353 | case 0x12: /* ?? */
|
---|
| 354 | case 0x13: return kCpumMicroarch_AMD_15h_Piledriver; /* A10-6800K for e.g. */
|
---|
| 355 | }
|
---|
| 356 | return kCpumMicroarch_AMD_15h_Unknown;
|
---|
| 357 | case 0x16:
|
---|
| 358 | return kCpumMicroarch_AMD_Jaguar;
|
---|
[66095] | 359 | case 0x17:
|
---|
| 360 | return kCpumMicroarch_AMD_Zen_Ryzen;
|
---|
[49893] | 361 | }
|
---|
| 362 | return kCpumMicroarch_AMD_Unknown;
|
---|
| 363 | }
|
---|
| 364 |
|
---|
| 365 | if (enmVendor == CPUMCPUVENDOR_INTEL)
|
---|
| 366 | {
|
---|
| 367 | switch (bFamily)
|
---|
| 368 | {
|
---|
| 369 | case 3:
|
---|
| 370 | return kCpumMicroarch_Intel_80386;
|
---|
| 371 | case 4:
|
---|
| 372 | return kCpumMicroarch_Intel_80486;
|
---|
| 373 | case 5:
|
---|
| 374 | return kCpumMicroarch_Intel_P5;
|
---|
| 375 | case 6:
|
---|
| 376 | if (bModel < RT_ELEMENTS(g_aenmIntelFamily06))
|
---|
[70450] | 377 | {
|
---|
| 378 | CPUMMICROARCH enmMicroArch = g_aenmIntelFamily06[bModel];
|
---|
[78632] | 379 | if (enmMicroArch == kCpumMicroarch_Intel_Core7_KabyLake)
|
---|
| 380 | {
|
---|
| 381 | if (bStepping >= 0xa && bStepping <= 0xc)
|
---|
| 382 | enmMicroArch = kCpumMicroarch_Intel_Core7_CoffeeLake;
|
---|
| 383 | else if (bStepping >= 0xc)
|
---|
| 384 | enmMicroArch = kCpumMicroarch_Intel_Core7_WhiskeyLake;
|
---|
| 385 | }
|
---|
| 386 | else if ( enmMicroArch == kCpumMicroarch_Intel_Core7_Skylake
|
---|
| 387 | && bModel == 0x55
|
---|
| 388 | && bStepping >= 5)
|
---|
| 389 | enmMicroArch = kCpumMicroarch_Intel_Core7_CascadeLake;
|
---|
[70450] | 390 | return enmMicroArch;
|
---|
| 391 | }
|
---|
[49893] | 392 | return kCpumMicroarch_Intel_Atom_Unknown;
|
---|
| 393 | case 15:
|
---|
| 394 | switch (bModel)
|
---|
| 395 | {
|
---|
| 396 | case 0: return kCpumMicroarch_Intel_NB_Willamette;
|
---|
| 397 | case 1: return kCpumMicroarch_Intel_NB_Willamette;
|
---|
| 398 | case 2: return kCpumMicroarch_Intel_NB_Northwood;
|
---|
| 399 | case 3: return kCpumMicroarch_Intel_NB_Prescott;
|
---|
| 400 | case 4: return kCpumMicroarch_Intel_NB_Prescott2M; /* ?? */
|
---|
| 401 | case 5: return kCpumMicroarch_Intel_NB_Unknown; /*??*/
|
---|
| 402 | case 6: return kCpumMicroarch_Intel_NB_CedarMill;
|
---|
| 403 | case 7: return kCpumMicroarch_Intel_NB_Gallatin;
|
---|
| 404 | default: return kCpumMicroarch_Intel_NB_Unknown;
|
---|
| 405 | }
|
---|
| 406 | break;
|
---|
| 407 | /* The following are not kosher but kind of follow intuitively from 6, 5 & 4. */
|
---|
[60438] | 408 | case 0:
|
---|
| 409 | return kCpumMicroarch_Intel_8086;
|
---|
[49893] | 410 | case 1:
|
---|
[60438] | 411 | return kCpumMicroarch_Intel_80186;
|
---|
[49893] | 412 | case 2:
|
---|
| 413 | return kCpumMicroarch_Intel_80286;
|
---|
| 414 | }
|
---|
| 415 | return kCpumMicroarch_Intel_Unknown;
|
---|
| 416 | }
|
---|
| 417 |
|
---|
| 418 | if (enmVendor == CPUMCPUVENDOR_VIA)
|
---|
| 419 | {
|
---|
| 420 | switch (bFamily)
|
---|
| 421 | {
|
---|
| 422 | case 5:
|
---|
| 423 | switch (bModel)
|
---|
| 424 | {
|
---|
| 425 | case 1: return kCpumMicroarch_Centaur_C6;
|
---|
| 426 | case 4: return kCpumMicroarch_Centaur_C6;
|
---|
| 427 | case 8: return kCpumMicroarch_Centaur_C2;
|
---|
| 428 | case 9: return kCpumMicroarch_Centaur_C3;
|
---|
| 429 | }
|
---|
| 430 | break;
|
---|
| 431 |
|
---|
| 432 | case 6:
|
---|
| 433 | switch (bModel)
|
---|
| 434 | {
|
---|
| 435 | case 5: return kCpumMicroarch_VIA_C3_M2;
|
---|
| 436 | case 6: return kCpumMicroarch_VIA_C3_C5A;
|
---|
| 437 | case 7: return bStepping < 8 ? kCpumMicroarch_VIA_C3_C5B : kCpumMicroarch_VIA_C3_C5C;
|
---|
| 438 | case 8: return kCpumMicroarch_VIA_C3_C5N;
|
---|
| 439 | case 9: return bStepping < 8 ? kCpumMicroarch_VIA_C3_C5XL : kCpumMicroarch_VIA_C3_C5P;
|
---|
| 440 | case 10: return kCpumMicroarch_VIA_C7_C5J;
|
---|
| 441 | case 15: return kCpumMicroarch_VIA_Isaiah;
|
---|
| 442 | }
|
---|
| 443 | break;
|
---|
| 444 | }
|
---|
| 445 | return kCpumMicroarch_VIA_Unknown;
|
---|
| 446 | }
|
---|
| 447 |
|
---|
[76886] | 448 | if (enmVendor == CPUMCPUVENDOR_SHANGHAI)
|
---|
| 449 | {
|
---|
| 450 | switch (bFamily)
|
---|
| 451 | {
|
---|
| 452 | case 6:
|
---|
| 453 | case 7:
|
---|
| 454 | return kCpumMicroarch_Shanghai_Wudaokou;
|
---|
| 455 | default:
|
---|
| 456 | break;
|
---|
| 457 | }
|
---|
| 458 | return kCpumMicroarch_Shanghai_Unknown;
|
---|
| 459 | }
|
---|
| 460 |
|
---|
[49893] | 461 | if (enmVendor == CPUMCPUVENDOR_CYRIX)
|
---|
| 462 | {
|
---|
| 463 | switch (bFamily)
|
---|
| 464 | {
|
---|
| 465 | case 4:
|
---|
| 466 | switch (bModel)
|
---|
| 467 | {
|
---|
| 468 | case 9: return kCpumMicroarch_Cyrix_5x86;
|
---|
| 469 | }
|
---|
| 470 | break;
|
---|
| 471 |
|
---|
| 472 | case 5:
|
---|
| 473 | switch (bModel)
|
---|
| 474 | {
|
---|
| 475 | case 2: return kCpumMicroarch_Cyrix_M1;
|
---|
| 476 | case 4: return kCpumMicroarch_Cyrix_MediaGX;
|
---|
| 477 | case 5: return kCpumMicroarch_Cyrix_MediaGXm;
|
---|
| 478 | }
|
---|
| 479 | break;
|
---|
| 480 |
|
---|
| 481 | case 6:
|
---|
| 482 | switch (bModel)
|
---|
| 483 | {
|
---|
| 484 | case 0: return kCpumMicroarch_Cyrix_M2;
|
---|
| 485 | }
|
---|
| 486 | break;
|
---|
| 487 |
|
---|
| 488 | }
|
---|
| 489 | return kCpumMicroarch_Cyrix_Unknown;
|
---|
| 490 | }
|
---|
| 491 |
|
---|
[81605] | 492 | if (enmVendor == CPUMCPUVENDOR_HYGON)
|
---|
| 493 | {
|
---|
| 494 | switch (bFamily)
|
---|
| 495 | {
|
---|
| 496 | case 0x18:
|
---|
| 497 | return kCpumMicroarch_Hygon_Dhyana;
|
---|
| 498 | default:
|
---|
| 499 | break;
|
---|
| 500 | }
|
---|
| 501 | return kCpumMicroarch_Hygon_Unknown;
|
---|
| 502 | }
|
---|
| 503 |
|
---|
[49893] | 504 | return kCpumMicroarch_Unknown;
|
---|
| 505 | }
|
---|
| 506 |
|
---|
| 507 |
|
---|
| 508 | /**
|
---|
| 509 | * Translates a microarchitecture enum value to the corresponding string
|
---|
| 510 | * constant.
|
---|
| 511 | *
|
---|
| 512 | * @returns Read-only string constant (omits "kCpumMicroarch_" prefix). Returns
|
---|
| 513 | * NULL if the value is invalid.
|
---|
| 514 | *
|
---|
| 515 | * @param enmMicroarch The enum value to convert.
|
---|
| 516 | */
|
---|
[94931] | 517 | VMMDECL(const char *) CPUMMicroarchName(CPUMMICROARCH enmMicroarch)
|
---|
[49893] | 518 | {
|
---|
| 519 | switch (enmMicroarch)
|
---|
| 520 | {
|
---|
| 521 | #define CASE_RET_STR(enmValue) case enmValue: return #enmValue + (sizeof("kCpumMicroarch_") - 1)
|
---|
| 522 | CASE_RET_STR(kCpumMicroarch_Intel_8086);
|
---|
| 523 | CASE_RET_STR(kCpumMicroarch_Intel_80186);
|
---|
| 524 | CASE_RET_STR(kCpumMicroarch_Intel_80286);
|
---|
| 525 | CASE_RET_STR(kCpumMicroarch_Intel_80386);
|
---|
| 526 | CASE_RET_STR(kCpumMicroarch_Intel_80486);
|
---|
| 527 | CASE_RET_STR(kCpumMicroarch_Intel_P5);
|
---|
| 528 |
|
---|
| 529 | CASE_RET_STR(kCpumMicroarch_Intel_P6);
|
---|
| 530 | CASE_RET_STR(kCpumMicroarch_Intel_P6_II);
|
---|
| 531 | CASE_RET_STR(kCpumMicroarch_Intel_P6_III);
|
---|
| 532 |
|
---|
| 533 | CASE_RET_STR(kCpumMicroarch_Intel_P6_M_Banias);
|
---|
| 534 | CASE_RET_STR(kCpumMicroarch_Intel_P6_M_Dothan);
|
---|
| 535 | CASE_RET_STR(kCpumMicroarch_Intel_Core_Yonah);
|
---|
| 536 |
|
---|
| 537 | CASE_RET_STR(kCpumMicroarch_Intel_Core2_Merom);
|
---|
| 538 | CASE_RET_STR(kCpumMicroarch_Intel_Core2_Penryn);
|
---|
| 539 |
|
---|
| 540 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_Nehalem);
|
---|
| 541 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_Westmere);
|
---|
| 542 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_SandyBridge);
|
---|
| 543 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_IvyBridge);
|
---|
| 544 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_Haswell);
|
---|
| 545 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_Broadwell);
|
---|
| 546 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_Skylake);
|
---|
[70450] | 547 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_KabyLake);
|
---|
| 548 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_CoffeeLake);
|
---|
[78632] | 549 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_WhiskeyLake);
|
---|
| 550 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_CascadeLake);
|
---|
[70555] | 551 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_CannonLake);
|
---|
[89934] | 552 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_CometLake);
|
---|
[70555] | 553 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_IceLake);
|
---|
[89934] | 554 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_RocketLake);
|
---|
[70555] | 555 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_TigerLake);
|
---|
[89934] | 556 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_AlderLake);
|
---|
| 557 | CASE_RET_STR(kCpumMicroarch_Intel_Core7_SapphireRapids);
|
---|
[49893] | 558 |
|
---|
| 559 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Bonnell);
|
---|
| 560 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Lincroft);
|
---|
| 561 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Saltwell);
|
---|
| 562 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Silvermont);
|
---|
| 563 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Airmount);
|
---|
| 564 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Goldmont);
|
---|
[70551] | 565 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_GoldmontPlus);
|
---|
[49893] | 566 | CASE_RET_STR(kCpumMicroarch_Intel_Atom_Unknown);
|
---|
| 567 |
|
---|
[70450] | 568 | CASE_RET_STR(kCpumMicroarch_Intel_Phi_KnightsFerry);
|
---|
| 569 | CASE_RET_STR(kCpumMicroarch_Intel_Phi_KnightsCorner);
|
---|
| 570 | CASE_RET_STR(kCpumMicroarch_Intel_Phi_KnightsLanding);
|
---|
| 571 | CASE_RET_STR(kCpumMicroarch_Intel_Phi_KnightsHill);
|
---|
| 572 | CASE_RET_STR(kCpumMicroarch_Intel_Phi_KnightsMill);
|
---|
| 573 |
|
---|
[49893] | 574 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Willamette);
|
---|
| 575 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Northwood);
|
---|
| 576 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Prescott);
|
---|
| 577 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Prescott2M);
|
---|
| 578 | CASE_RET_STR(kCpumMicroarch_Intel_NB_CedarMill);
|
---|
| 579 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Gallatin);
|
---|
| 580 | CASE_RET_STR(kCpumMicroarch_Intel_NB_Unknown);
|
---|
| 581 |
|
---|
| 582 | CASE_RET_STR(kCpumMicroarch_Intel_Unknown);
|
---|
| 583 |
|
---|
| 584 | CASE_RET_STR(kCpumMicroarch_AMD_Am286);
|
---|
| 585 | CASE_RET_STR(kCpumMicroarch_AMD_Am386);
|
---|
| 586 | CASE_RET_STR(kCpumMicroarch_AMD_Am486);
|
---|
| 587 | CASE_RET_STR(kCpumMicroarch_AMD_Am486Enh);
|
---|
| 588 | CASE_RET_STR(kCpumMicroarch_AMD_K5);
|
---|
| 589 | CASE_RET_STR(kCpumMicroarch_AMD_K6);
|
---|
| 590 |
|
---|
| 591 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Palomino);
|
---|
| 592 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Spitfire);
|
---|
| 593 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Thunderbird);
|
---|
| 594 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Morgan);
|
---|
| 595 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Thoroughbred);
|
---|
| 596 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Barton);
|
---|
| 597 | CASE_RET_STR(kCpumMicroarch_AMD_K7_Unknown);
|
---|
| 598 |
|
---|
| 599 | CASE_RET_STR(kCpumMicroarch_AMD_K8_130nm);
|
---|
| 600 | CASE_RET_STR(kCpumMicroarch_AMD_K8_90nm);
|
---|
| 601 | CASE_RET_STR(kCpumMicroarch_AMD_K8_90nm_DualCore);
|
---|
| 602 | CASE_RET_STR(kCpumMicroarch_AMD_K8_90nm_AMDV);
|
---|
| 603 | CASE_RET_STR(kCpumMicroarch_AMD_K8_65nm);
|
---|
| 604 |
|
---|
| 605 | CASE_RET_STR(kCpumMicroarch_AMD_K10);
|
---|
| 606 | CASE_RET_STR(kCpumMicroarch_AMD_K10_Lion);
|
---|
| 607 | CASE_RET_STR(kCpumMicroarch_AMD_K10_Llano);
|
---|
| 608 | CASE_RET_STR(kCpumMicroarch_AMD_Bobcat);
|
---|
| 609 | CASE_RET_STR(kCpumMicroarch_AMD_Jaguar);
|
---|
| 610 |
|
---|
| 611 | CASE_RET_STR(kCpumMicroarch_AMD_15h_Bulldozer);
|
---|
| 612 | CASE_RET_STR(kCpumMicroarch_AMD_15h_Piledriver);
|
---|
| 613 | CASE_RET_STR(kCpumMicroarch_AMD_15h_Steamroller);
|
---|
| 614 | CASE_RET_STR(kCpumMicroarch_AMD_15h_Excavator);
|
---|
| 615 | CASE_RET_STR(kCpumMicroarch_AMD_15h_Unknown);
|
---|
| 616 |
|
---|
| 617 | CASE_RET_STR(kCpumMicroarch_AMD_16h_First);
|
---|
| 618 |
|
---|
[66095] | 619 | CASE_RET_STR(kCpumMicroarch_AMD_Zen_Ryzen);
|
---|
| 620 |
|
---|
[49893] | 621 | CASE_RET_STR(kCpumMicroarch_AMD_Unknown);
|
---|
| 622 |
|
---|
[81613] | 623 | CASE_RET_STR(kCpumMicroarch_Hygon_Dhyana);
|
---|
| 624 | CASE_RET_STR(kCpumMicroarch_Hygon_Unknown);
|
---|
| 625 |
|
---|
[49893] | 626 | CASE_RET_STR(kCpumMicroarch_Centaur_C6);
|
---|
| 627 | CASE_RET_STR(kCpumMicroarch_Centaur_C2);
|
---|
| 628 | CASE_RET_STR(kCpumMicroarch_Centaur_C3);
|
---|
| 629 | CASE_RET_STR(kCpumMicroarch_VIA_C3_M2);
|
---|
| 630 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5A);
|
---|
| 631 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5B);
|
---|
| 632 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5C);
|
---|
| 633 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5N);
|
---|
| 634 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5XL);
|
---|
| 635 | CASE_RET_STR(kCpumMicroarch_VIA_C3_C5P);
|
---|
| 636 | CASE_RET_STR(kCpumMicroarch_VIA_C7_C5J);
|
---|
| 637 | CASE_RET_STR(kCpumMicroarch_VIA_Isaiah);
|
---|
| 638 | CASE_RET_STR(kCpumMicroarch_VIA_Unknown);
|
---|
| 639 |
|
---|
[76886] | 640 | CASE_RET_STR(kCpumMicroarch_Shanghai_Wudaokou);
|
---|
| 641 | CASE_RET_STR(kCpumMicroarch_Shanghai_Unknown);
|
---|
| 642 |
|
---|
[49893] | 643 | CASE_RET_STR(kCpumMicroarch_Cyrix_5x86);
|
---|
| 644 | CASE_RET_STR(kCpumMicroarch_Cyrix_M1);
|
---|
| 645 | CASE_RET_STR(kCpumMicroarch_Cyrix_MediaGX);
|
---|
| 646 | CASE_RET_STR(kCpumMicroarch_Cyrix_MediaGXm);
|
---|
| 647 | CASE_RET_STR(kCpumMicroarch_Cyrix_M2);
|
---|
| 648 | CASE_RET_STR(kCpumMicroarch_Cyrix_Unknown);
|
---|
| 649 |
|
---|
[60414] | 650 | CASE_RET_STR(kCpumMicroarch_NEC_V20);
|
---|
| 651 | CASE_RET_STR(kCpumMicroarch_NEC_V30);
|
---|
| 652 |
|
---|
[99023] | 653 | CASE_RET_STR(kCpumMicroarch_Apple_M1);
|
---|
| 654 | CASE_RET_STR(kCpumMicroarch_Apple_M2);
|
---|
| 655 |
|
---|
[49893] | 656 | CASE_RET_STR(kCpumMicroarch_Unknown);
|
---|
| 657 |
|
---|
| 658 | #undef CASE_RET_STR
|
---|
| 659 | case kCpumMicroarch_Invalid:
|
---|
| 660 | case kCpumMicroarch_Intel_End:
|
---|
[68532] | 661 | case kCpumMicroarch_Intel_Core2_End:
|
---|
[49893] | 662 | case kCpumMicroarch_Intel_Core7_End:
|
---|
| 663 | case kCpumMicroarch_Intel_Atom_End:
|
---|
| 664 | case kCpumMicroarch_Intel_P6_Core_Atom_End:
|
---|
[70450] | 665 | case kCpumMicroarch_Intel_Phi_End:
|
---|
[49893] | 666 | case kCpumMicroarch_Intel_NB_End:
|
---|
| 667 | case kCpumMicroarch_AMD_K7_End:
|
---|
| 668 | case kCpumMicroarch_AMD_K8_End:
|
---|
| 669 | case kCpumMicroarch_AMD_15h_End:
|
---|
| 670 | case kCpumMicroarch_AMD_16h_End:
|
---|
[66095] | 671 | case kCpumMicroarch_AMD_Zen_End:
|
---|
[49893] | 672 | case kCpumMicroarch_AMD_End:
|
---|
[81613] | 673 | case kCpumMicroarch_Hygon_End:
|
---|
[49893] | 674 | case kCpumMicroarch_VIA_End:
|
---|
[81613] | 675 | case kCpumMicroarch_Shanghai_End:
|
---|
[49893] | 676 | case kCpumMicroarch_Cyrix_End:
|
---|
[60414] | 677 | case kCpumMicroarch_NEC_End:
|
---|
[99023] | 678 | case kCpumMicroarch_Apple_End:
|
---|
[49893] | 679 | case kCpumMicroarch_32BitHack:
|
---|
| 680 | break;
|
---|
| 681 | /* no default! */
|
---|
| 682 | }
|
---|
| 683 |
|
---|
| 684 | return NULL;
|
---|
| 685 | }
|
---|
| 686 |
|
---|
| 687 |
|
---|
[66403] | 688 | /**
|
---|
[49893] | 689 | * Gets a matching leaf in the CPUID leaf array.
|
---|
| 690 | *
|
---|
| 691 | * @returns Pointer to the matching leaf, or NULL if not found.
|
---|
| 692 | * @param paLeaves The CPUID leaves to search. This is sorted.
|
---|
| 693 | * @param cLeaves The number of leaves in the array.
|
---|
| 694 | * @param uLeaf The leaf to locate.
|
---|
[57056] | 695 | * @param uSubLeaf The subleaf to locate. Pass 0 if no sub-leaves.
|
---|
[49893] | 696 | */
|
---|
[94931] | 697 | PCPUMCPUIDLEAF cpumCpuIdGetLeafInt(PCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, uint32_t uLeaf, uint32_t uSubLeaf)
|
---|
[49893] | 698 | {
|
---|
| 699 | /* Lazy bird does linear lookup here since this is only used for the
|
---|
| 700 | occational CPUID overrides. */
|
---|
| 701 | for (uint32_t i = 0; i < cLeaves; i++)
|
---|
| 702 | if ( paLeaves[i].uLeaf == uLeaf
|
---|
| 703 | && paLeaves[i].uSubLeaf == (uSubLeaf & paLeaves[i].fSubLeafMask))
|
---|
| 704 | return &paLeaves[i];
|
---|
| 705 | return NULL;
|
---|
| 706 | }
|
---|
| 707 |
|
---|
| 708 |
|
---|
| 709 | /**
|
---|
| 710 | * Ensures that the CPUID leaf array can hold one more leaf.
|
---|
| 711 | *
|
---|
| 712 | * @returns Pointer to the CPUID leaf array (*ppaLeaves) on success. NULL on
|
---|
| 713 | * failure.
|
---|
[58122] | 714 | * @param pVM The cross context VM structure. If NULL, use
|
---|
| 715 | * the process heap, otherwise the VM's hyper heap.
|
---|
[51271] | 716 | * @param ppaLeaves Pointer to the variable holding the array pointer
|
---|
| 717 | * (input/output).
|
---|
| 718 | * @param cLeaves The current array size.
|
---|
| 719 | *
|
---|
| 720 | * @remarks This function will automatically update the R0 and RC pointers when
|
---|
| 721 | * using the hyper heap, which means @a ppaLeaves and @a cLeaves must
|
---|
| 722 | * be the corresponding VM's CPUID arrays (which is asserted).
|
---|
[49893] | 723 | */
|
---|
[94931] | 724 | PCPUMCPUIDLEAF cpumCpuIdEnsureSpace(PVM pVM, PCPUMCPUIDLEAF *ppaLeaves, uint32_t cLeaves)
|
---|
[49893] | 725 | {
|
---|
[54737] | 726 | /*
|
---|
| 727 | * If pVM is not specified, we're on the regular heap and can waste a
|
---|
| 728 | * little space to speed things up.
|
---|
| 729 | */
|
---|
[51344] | 730 | uint32_t cAllocated;
|
---|
| 731 | if (!pVM)
|
---|
[54737] | 732 | {
|
---|
[51344] | 733 | cAllocated = RT_ALIGN(cLeaves, 16);
|
---|
[54737] | 734 | if (cLeaves + 1 > cAllocated)
|
---|
[49893] | 735 | {
|
---|
[54737] | 736 | void *pvNew = RTMemRealloc(*ppaLeaves, (cAllocated + 16) * sizeof(**ppaLeaves));
|
---|
| 737 | if (pvNew)
|
---|
| 738 | *ppaLeaves = (PCPUMCPUIDLEAF)pvNew;
|
---|
| 739 | else
|
---|
[51271] | 740 | {
|
---|
| 741 | RTMemFree(*ppaLeaves);
|
---|
| 742 | *ppaLeaves = NULL;
|
---|
| 743 | }
|
---|
| 744 | }
|
---|
[49893] | 745 | }
|
---|
[54737] | 746 | /*
|
---|
| 747 | * Otherwise, we're on the hyper heap and are probably just inserting
|
---|
| 748 | * one or two leaves and should conserve space.
|
---|
| 749 | */
|
---|
| 750 | else
|
---|
[51344] | 751 | {
|
---|
[54737] | 752 | #ifdef IN_VBOX_CPU_REPORT
|
---|
| 753 | AssertReleaseFailed();
|
---|
| 754 | #else
|
---|
[94931] | 755 | # ifdef IN_RING3
|
---|
[51344] | 756 | Assert(ppaLeaves == &pVM->cpum.s.GuestInfo.paCpuIdLeavesR3);
|
---|
[91266] | 757 | Assert(*ppaLeaves == pVM->cpum.s.GuestInfo.aCpuIdLeaves);
|
---|
[54737] | 758 | Assert(cLeaves == pVM->cpum.s.GuestInfo.cCpuIdLeaves);
|
---|
| 759 |
|
---|
[91266] | 760 | if (cLeaves + 1 <= RT_ELEMENTS(pVM->cpum.s.GuestInfo.aCpuIdLeaves))
|
---|
| 761 | { }
|
---|
[54737] | 762 | else
|
---|
[94931] | 763 | # endif
|
---|
[54737] | 764 | {
|
---|
| 765 | *ppaLeaves = NULL;
|
---|
[91266] | 766 | LogRel(("CPUM: cpumR3CpuIdEnsureSpace: Out of CPUID space!\n"));
|
---|
[54737] | 767 | }
|
---|
| 768 | #endif
|
---|
[51344] | 769 | }
|
---|
[49893] | 770 | return *ppaLeaves;
|
---|
| 771 | }
|
---|
| 772 |
|
---|
| 773 |
|
---|
[94931] | 774 | #ifdef VBOX_STRICT
|
---|
| 775 | /**
|
---|
| 776 | * Checks that we've updated the CPUID leaves array correctly.
|
---|
| 777 | *
|
---|
| 778 | * This is a no-op in non-strict builds.
|
---|
| 779 | *
|
---|
| 780 | * @param paLeaves The leaves array.
|
---|
| 781 | * @param cLeaves The number of leaves.
|
---|
| 782 | */
|
---|
| 783 | void cpumCpuIdAssertOrder(PCPUMCPUIDLEAF paLeaves, uint32_t cLeaves)
|
---|
| 784 | {
|
---|
| 785 | for (uint32_t i = 1; i < cLeaves; i++)
|
---|
| 786 | if (paLeaves[i].uLeaf != paLeaves[i - 1].uLeaf)
|
---|
| 787 | AssertMsg(paLeaves[i].uLeaf > paLeaves[i - 1].uLeaf, ("%#x vs %#x\n", paLeaves[i].uLeaf, paLeaves[i - 1].uLeaf));
|
---|
| 788 | else
|
---|
| 789 | {
|
---|
| 790 | AssertMsg(paLeaves[i].uSubLeaf > paLeaves[i - 1].uSubLeaf,
|
---|
| 791 | ("%#x: %#x vs %#x\n", paLeaves[i].uLeaf, paLeaves[i].uSubLeaf, paLeaves[i - 1].uSubLeaf));
|
---|
| 792 | AssertMsg(paLeaves[i].fSubLeafMask == paLeaves[i - 1].fSubLeafMask,
|
---|
| 793 | ("%#x/%#x: %#x vs %#x\n", paLeaves[i].uLeaf, paLeaves[i].uSubLeaf, paLeaves[i].fSubLeafMask, paLeaves[i - 1].fSubLeafMask));
|
---|
| 794 | AssertMsg(paLeaves[i].fFlags == paLeaves[i - 1].fFlags,
|
---|
| 795 | ("%#x/%#x: %#x vs %#x\n", paLeaves[i].uLeaf, paLeaves[i].uSubLeaf, paLeaves[i].fFlags, paLeaves[i - 1].fFlags));
|
---|
| 796 | }
|
---|
| 797 | }
|
---|
| 798 | #endif
|
---|
| 799 |
|
---|
[93519] | 800 | #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
|
---|
[94931] | 801 |
|
---|
[49893] | 802 | /**
|
---|
| 803 | * Append a CPUID leaf or sub-leaf.
|
---|
| 804 | *
|
---|
| 805 | * ASSUMES linear insertion order, so we'll won't need to do any searching or
|
---|
[51271] | 806 | * replace anything. Use cpumR3CpuIdInsert() for those cases.
|
---|
[49893] | 807 | *
|
---|
| 808 | * @returns VINF_SUCCESS or VERR_NO_MEMORY. On error, *ppaLeaves is freed, so
|
---|
| 809 | * the caller need do no more work.
|
---|
[64530] | 810 | * @param ppaLeaves Pointer to the pointer to the array of sorted
|
---|
[49893] | 811 | * CPUID leaves and sub-leaves.
|
---|
| 812 | * @param pcLeaves Where we keep the leaf count for *ppaLeaves.
|
---|
| 813 | * @param uLeaf The leaf we're adding.
|
---|
| 814 | * @param uSubLeaf The sub-leaf number.
|
---|
| 815 | * @param fSubLeafMask The sub-leaf mask.
|
---|
| 816 | * @param uEax The EAX value.
|
---|
| 817 | * @param uEbx The EBX value.
|
---|
| 818 | * @param uEcx The ECX value.
|
---|
| 819 | * @param uEdx The EDX value.
|
---|
| 820 | * @param fFlags The flags.
|
---|
| 821 | */
|
---|
[94931] | 822 | static int cpumCollectCpuIdInfoAddOne(PCPUMCPUIDLEAF *ppaLeaves, uint32_t *pcLeaves,
|
---|
| 823 | uint32_t uLeaf, uint32_t uSubLeaf, uint32_t fSubLeafMask,
|
---|
| 824 | uint32_t uEax, uint32_t uEbx, uint32_t uEcx, uint32_t uEdx, uint32_t fFlags)
|
---|
[49893] | 825 | {
|
---|
[94931] | 826 | if (!cpumCpuIdEnsureSpace(NULL /* pVM */, ppaLeaves, *pcLeaves))
|
---|
[49893] | 827 | return VERR_NO_MEMORY;
|
---|
| 828 |
|
---|
| 829 | PCPUMCPUIDLEAF pNew = &(*ppaLeaves)[*pcLeaves];
|
---|
| 830 | Assert( *pcLeaves == 0
|
---|
| 831 | || pNew[-1].uLeaf < uLeaf
|
---|
| 832 | || (pNew[-1].uLeaf == uLeaf && pNew[-1].uSubLeaf < uSubLeaf) );
|
---|
| 833 |
|
---|
| 834 | pNew->uLeaf = uLeaf;
|
---|
| 835 | pNew->uSubLeaf = uSubLeaf;
|
---|
| 836 | pNew->fSubLeafMask = fSubLeafMask;
|
---|
| 837 | pNew->uEax = uEax;
|
---|
| 838 | pNew->uEbx = uEbx;
|
---|
| 839 | pNew->uEcx = uEcx;
|
---|
| 840 | pNew->uEdx = uEdx;
|
---|
| 841 | pNew->fFlags = fFlags;
|
---|
| 842 |
|
---|
| 843 | *pcLeaves += 1;
|
---|
| 844 | return VINF_SUCCESS;
|
---|
| 845 | }
|
---|
| 846 |
|
---|
| 847 |
|
---|
| 848 | /**
|
---|
| 849 | * Checks if ECX make a difference when reading a given CPUID leaf.
|
---|
| 850 | *
|
---|
| 851 | * @returns @c true if it does, @c false if it doesn't.
|
---|
| 852 | * @param uLeaf The leaf we're reading.
|
---|
| 853 | * @param pcSubLeaves Number of sub-leaves accessible via ECX.
|
---|
| 854 | * @param pfFinalEcxUnchanged Whether ECX is passed thru when going beyond the
|
---|
[54737] | 855 | * final sub-leaf (for leaf 0xb only).
|
---|
[49893] | 856 | */
|
---|
[94931] | 857 | static bool cpumIsEcxRelevantForCpuIdLeaf(uint32_t uLeaf, uint32_t *pcSubLeaves, bool *pfFinalEcxUnchanged)
|
---|
[49893] | 858 | {
|
---|
| 859 | *pfFinalEcxUnchanged = false;
|
---|
| 860 |
|
---|
[50606] | 861 | uint32_t auCur[4];
|
---|
[49893] | 862 | uint32_t auPrev[4];
|
---|
| 863 | ASMCpuIdExSlow(uLeaf, 0, 0, 0, &auPrev[0], &auPrev[1], &auPrev[2], &auPrev[3]);
|
---|
| 864 |
|
---|
| 865 | /* Look for sub-leaves. */
|
---|
| 866 | uint32_t uSubLeaf = 1;
|
---|
| 867 | for (;;)
|
---|
| 868 | {
|
---|
| 869 | ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &auCur[0], &auCur[1], &auCur[2], &auCur[3]);
|
---|
| 870 | if (memcmp(auCur, auPrev, sizeof(auCur)))
|
---|
| 871 | break;
|
---|
| 872 |
|
---|
| 873 | /* Advance / give up. */
|
---|
| 874 | uSubLeaf++;
|
---|
| 875 | if (uSubLeaf >= 64)
|
---|
| 876 | {
|
---|
| 877 | *pcSubLeaves = 1;
|
---|
| 878 | return false;
|
---|
| 879 | }
|
---|
| 880 | }
|
---|
| 881 |
|
---|
| 882 | /* Count sub-leaves. */
|
---|
[55733] | 883 | uint32_t cMinLeaves = uLeaf == 0xd ? 64 : 0;
|
---|
[50606] | 884 | uint32_t cRepeats = 0;
|
---|
[49893] | 885 | uSubLeaf = 0;
|
---|
| 886 | for (;;)
|
---|
| 887 | {
|
---|
| 888 | ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &auCur[0], &auCur[1], &auCur[2], &auCur[3]);
|
---|
| 889 |
|
---|
[50606] | 890 | /* Figuring out when to stop isn't entirely straight forward as we need
|
---|
| 891 | to cover undocumented behavior up to a point and implementation shortcuts. */
|
---|
| 892 |
|
---|
[55733] | 893 | /* 1. Look for more than 4 repeating value sets. */
|
---|
[50606] | 894 | if ( auCur[0] == auPrev[0]
|
---|
| 895 | && auCur[1] == auPrev[1]
|
---|
[50607] | 896 | && ( auCur[2] == auPrev[2]
|
---|
| 897 | || ( auCur[2] == uSubLeaf
|
---|
| 898 | && auPrev[2] == uSubLeaf - 1) )
|
---|
[50606] | 899 | && auCur[3] == auPrev[3])
|
---|
[49893] | 900 | {
|
---|
[55733] | 901 | if ( uLeaf != 0xd
|
---|
| 902 | || uSubLeaf >= 64
|
---|
| 903 | || ( auCur[0] == 0
|
---|
| 904 | && auCur[1] == 0
|
---|
| 905 | && auCur[2] == 0
|
---|
| 906 | && auCur[3] == 0
|
---|
| 907 | && auPrev[2] == 0) )
|
---|
| 908 | cRepeats++;
|
---|
| 909 | if (cRepeats > 4 && uSubLeaf >= cMinLeaves)
|
---|
[50606] | 910 | break;
|
---|
[49893] | 911 | }
|
---|
[50606] | 912 | else
|
---|
| 913 | cRepeats = 0;
|
---|
[49893] | 914 |
|
---|
[55733] | 915 | /* 2. Look for zero values. */
|
---|
| 916 | if ( auCur[0] == 0
|
---|
| 917 | && auCur[1] == 0
|
---|
| 918 | && (auCur[2] == 0 || auCur[2] == uSubLeaf)
|
---|
| 919 | && (auCur[3] == 0 || uLeaf == 0xb /* edx is fixed */)
|
---|
| 920 | && uSubLeaf >= cMinLeaves)
|
---|
| 921 | {
|
---|
| 922 | cRepeats = 0;
|
---|
| 923 | break;
|
---|
| 924 | }
|
---|
| 925 |
|
---|
[50606] | 926 | /* 3. Leaf 0xb level type 0 check. */
|
---|
| 927 | if ( uLeaf == 0xb
|
---|
[54815] | 928 | && (auCur[2] & 0xff00) == 0
|
---|
| 929 | && (auPrev[2] & 0xff00) == 0)
|
---|
| 930 | {
|
---|
| 931 | cRepeats = 0;
|
---|
[50606] | 932 | break;
|
---|
[54815] | 933 | }
|
---|
[50606] | 934 |
|
---|
| 935 | /* 99. Give up. */
|
---|
[49893] | 936 | if (uSubLeaf >= 128)
|
---|
| 937 | {
|
---|
[93515] | 938 | # ifndef IN_VBOX_CPU_REPORT
|
---|
[50606] | 939 | /* Ok, limit it according to the documentation if possible just to
|
---|
| 940 | avoid annoying users with these detection issues. */
|
---|
| 941 | uint32_t cDocLimit = UINT32_MAX;
|
---|
| 942 | if (uLeaf == 0x4)
|
---|
| 943 | cDocLimit = 4;
|
---|
| 944 | else if (uLeaf == 0x7)
|
---|
| 945 | cDocLimit = 1;
|
---|
[55733] | 946 | else if (uLeaf == 0xd)
|
---|
| 947 | cDocLimit = 63;
|
---|
[50606] | 948 | else if (uLeaf == 0xf)
|
---|
| 949 | cDocLimit = 2;
|
---|
| 950 | if (cDocLimit != UINT32_MAX)
|
---|
| 951 | {
|
---|
[54737] | 952 | *pfFinalEcxUnchanged = auCur[2] == uSubLeaf && uLeaf == 0xb;
|
---|
[50606] | 953 | *pcSubLeaves = cDocLimit + 3;
|
---|
| 954 | return true;
|
---|
| 955 | }
|
---|
[93515] | 956 | # endif
|
---|
[49893] | 957 | *pcSubLeaves = UINT32_MAX;
|
---|
| 958 | return true;
|
---|
| 959 | }
|
---|
[50606] | 960 |
|
---|
| 961 | /* Advance. */
|
---|
| 962 | uSubLeaf++;
|
---|
| 963 | memcpy(auPrev, auCur, sizeof(auCur));
|
---|
[49893] | 964 | }
|
---|
[50606] | 965 |
|
---|
| 966 | /* Standard exit. */
|
---|
[54737] | 967 | *pfFinalEcxUnchanged = auCur[2] == uSubLeaf && uLeaf == 0xb;
|
---|
[50606] | 968 | *pcSubLeaves = uSubLeaf + 1 - cRepeats;
|
---|
[54815] | 969 | if (*pcSubLeaves == 0)
|
---|
| 970 | *pcSubLeaves = 1;
|
---|
[50606] | 971 | return true;
|
---|
[49893] | 972 | }
|
---|
| 973 |
|
---|
| 974 |
|
---|
| 975 | /**
|
---|
| 976 | * Collects CPUID leaves and sub-leaves, returning a sorted array of them.
|
---|
| 977 | *
|
---|
| 978 | * @returns VBox status code.
|
---|
| 979 | * @param ppaLeaves Where to return the array pointer on success.
|
---|
| 980 | * Use RTMemFree to release.
|
---|
| 981 | * @param pcLeaves Where to return the size of the array on
|
---|
| 982 | * success.
|
---|
| 983 | */
|
---|
[94931] | 984 | VMMDECL(int) CPUMCpuIdCollectLeavesX86(PCPUMCPUIDLEAF *ppaLeaves, uint32_t *pcLeaves)
|
---|
[49893] | 985 | {
|
---|
| 986 | *ppaLeaves = NULL;
|
---|
| 987 | *pcLeaves = 0;
|
---|
| 988 |
|
---|
| 989 | /*
|
---|
| 990 | * Try out various candidates. This must be sorted!
|
---|
| 991 | */
|
---|
| 992 | static struct { uint32_t uMsr; bool fSpecial; } const s_aCandidates[] =
|
---|
| 993 | {
|
---|
| 994 | { UINT32_C(0x00000000), false },
|
---|
| 995 | { UINT32_C(0x10000000), false },
|
---|
| 996 | { UINT32_C(0x20000000), false },
|
---|
| 997 | { UINT32_C(0x30000000), false },
|
---|
| 998 | { UINT32_C(0x40000000), false },
|
---|
| 999 | { UINT32_C(0x50000000), false },
|
---|
| 1000 | { UINT32_C(0x60000000), false },
|
---|
| 1001 | { UINT32_C(0x70000000), false },
|
---|
| 1002 | { UINT32_C(0x80000000), false },
|
---|
| 1003 | { UINT32_C(0x80860000), false },
|
---|
| 1004 | { UINT32_C(0x8ffffffe), true },
|
---|
| 1005 | { UINT32_C(0x8fffffff), true },
|
---|
| 1006 | { UINT32_C(0x90000000), false },
|
---|
| 1007 | { UINT32_C(0xa0000000), false },
|
---|
| 1008 | { UINT32_C(0xb0000000), false },
|
---|
| 1009 | { UINT32_C(0xc0000000), false },
|
---|
| 1010 | { UINT32_C(0xd0000000), false },
|
---|
| 1011 | { UINT32_C(0xe0000000), false },
|
---|
| 1012 | { UINT32_C(0xf0000000), false },
|
---|
| 1013 | };
|
---|
| 1014 |
|
---|
| 1015 | for (uint32_t iOuter = 0; iOuter < RT_ELEMENTS(s_aCandidates); iOuter++)
|
---|
| 1016 | {
|
---|
| 1017 | uint32_t uLeaf = s_aCandidates[iOuter].uMsr;
|
---|
| 1018 | uint32_t uEax, uEbx, uEcx, uEdx;
|
---|
| 1019 | ASMCpuIdExSlow(uLeaf, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
|
---|
| 1020 |
|
---|
| 1021 | /*
|
---|
| 1022 | * Does EAX look like a typical leaf count value?
|
---|
| 1023 | */
|
---|
| 1024 | if ( uEax > uLeaf
|
---|
| 1025 | && uEax - uLeaf < UINT32_C(0xff)) /* Adjust 0xff limit when exceeded by real HW. */
|
---|
| 1026 | {
|
---|
| 1027 | /* Yes, dump them. */
|
---|
| 1028 | uint32_t cLeaves = uEax - uLeaf + 1;
|
---|
| 1029 | while (cLeaves-- > 0)
|
---|
| 1030 | {
|
---|
[54737] | 1031 | ASMCpuIdExSlow(uLeaf, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
|
---|
| 1032 |
|
---|
| 1033 | uint32_t fFlags = 0;
|
---|
| 1034 |
|
---|
| 1035 | /* There are currently three known leaves containing an APIC ID
|
---|
| 1036 | that needs EMT specific attention */
|
---|
| 1037 | if (uLeaf == 1)
|
---|
| 1038 | fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC_ID;
|
---|
| 1039 | else if (uLeaf == 0xb && uEcx != 0)
|
---|
| 1040 | fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC_ID;
|
---|
| 1041 | else if ( uLeaf == UINT32_C(0x8000001e)
|
---|
| 1042 | && ( uEax
|
---|
| 1043 | || uEbx
|
---|
| 1044 | || uEdx
|
---|
[93515] | 1045 | || RTX86IsAmdCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
|
---|
| 1046 | || RTX86IsHygonCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
|
---|
[54737] | 1047 | fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC_ID;
|
---|
| 1048 |
|
---|
[61776] | 1049 | /* The APIC bit is per-VCpu and needs flagging. */
|
---|
| 1050 | if (uLeaf == 1)
|
---|
| 1051 | fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC;
|
---|
| 1052 | else if ( uLeaf == UINT32_C(0x80000001)
|
---|
| 1053 | && ( (uEdx & X86_CPUID_AMD_FEATURE_EDX_APIC)
|
---|
[93515] | 1054 | || RTX86IsAmdCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
|
---|
| 1055 | || RTX86IsHygonCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
|
---|
[61776] | 1056 | fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC;
|
---|
[54737] | 1057 |
|
---|
[49893] | 1058 | /* Check three times here to reduce the chance of CPU migration
|
---|
| 1059 | resulting in false positives with things like the APIC ID. */
|
---|
| 1060 | uint32_t cSubLeaves;
|
---|
| 1061 | bool fFinalEcxUnchanged;
|
---|
[94931] | 1062 | if ( cpumIsEcxRelevantForCpuIdLeaf(uLeaf, &cSubLeaves, &fFinalEcxUnchanged)
|
---|
| 1063 | && cpumIsEcxRelevantForCpuIdLeaf(uLeaf, &cSubLeaves, &fFinalEcxUnchanged)
|
---|
| 1064 | && cpumIsEcxRelevantForCpuIdLeaf(uLeaf, &cSubLeaves, &fFinalEcxUnchanged))
|
---|
[49893] | 1065 | {
|
---|
[55733] | 1066 | if (cSubLeaves > (uLeaf == 0xd ? 68U : 16U))
|
---|
[50087] | 1067 | {
|
---|
| 1068 | /* This shouldn't happen. But in case it does, file all
|
---|
| 1069 | relevant details in the release log. */
|
---|
| 1070 | LogRel(("CPUM: VERR_CPUM_TOO_MANY_CPUID_SUBLEAVES! uLeaf=%#x cSubLeaves=%#x\n", uLeaf, cSubLeaves));
|
---|
[57056] | 1071 | LogRel(("------------------ dump of problematic sub-leaves -----------------\n"));
|
---|
[50087] | 1072 | for (uint32_t uSubLeaf = 0; uSubLeaf < 128; uSubLeaf++)
|
---|
| 1073 | {
|
---|
| 1074 | uint32_t auTmp[4];
|
---|
| 1075 | ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &auTmp[0], &auTmp[1], &auTmp[2], &auTmp[3]);
|
---|
| 1076 | LogRel(("CPUM: %#010x, %#010x => %#010x %#010x %#010x %#010x\n",
|
---|
| 1077 | uLeaf, uSubLeaf, auTmp[0], auTmp[1], auTmp[2], auTmp[3]));
|
---|
| 1078 | }
|
---|
| 1079 | LogRel(("----------------- dump of what we've found so far -----------------\n"));
|
---|
| 1080 | for (uint32_t i = 0 ; i < *pcLeaves; i++)
|
---|
| 1081 | LogRel(("CPUM: %#010x, %#010x/%#010x => %#010x %#010x %#010x %#010x\n",
|
---|
| 1082 | (*ppaLeaves)[i].uLeaf, (*ppaLeaves)[i].uSubLeaf, (*ppaLeaves)[i].fSubLeafMask,
|
---|
| 1083 | (*ppaLeaves)[i].uEax, (*ppaLeaves)[i].uEbx, (*ppaLeaves)[i].uEcx, (*ppaLeaves)[i].uEdx));
|
---|
| 1084 | LogRel(("\nPlease create a defect on virtualbox.org and attach this log file!\n\n"));
|
---|
[49893] | 1085 | return VERR_CPUM_TOO_MANY_CPUID_SUBLEAVES;
|
---|
[50087] | 1086 | }
|
---|
| 1087 |
|
---|
[54737] | 1088 | if (fFinalEcxUnchanged)
|
---|
| 1089 | fFlags |= CPUMCPUIDLEAF_F_INTEL_TOPOLOGY_SUBLEAVES;
|
---|
| 1090 |
|
---|
[49893] | 1091 | for (uint32_t uSubLeaf = 0; uSubLeaf < cSubLeaves; uSubLeaf++)
|
---|
| 1092 | {
|
---|
| 1093 | ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &uEax, &uEbx, &uEcx, &uEdx);
|
---|
[94931] | 1094 | int rc = cpumCollectCpuIdInfoAddOne(ppaLeaves, pcLeaves,
|
---|
| 1095 | uLeaf, uSubLeaf, UINT32_MAX, uEax, uEbx, uEcx, uEdx, fFlags);
|
---|
[49893] | 1096 | if (RT_FAILURE(rc))
|
---|
| 1097 | return rc;
|
---|
| 1098 | }
|
---|
| 1099 | }
|
---|
| 1100 | else
|
---|
| 1101 | {
|
---|
[94931] | 1102 | int rc = cpumCollectCpuIdInfoAddOne(ppaLeaves, pcLeaves, uLeaf, 0, 0, uEax, uEbx, uEcx, uEdx, fFlags);
|
---|
[49893] | 1103 | if (RT_FAILURE(rc))
|
---|
| 1104 | return rc;
|
---|
| 1105 | }
|
---|
| 1106 |
|
---|
| 1107 | /* next */
|
---|
| 1108 | uLeaf++;
|
---|
| 1109 | }
|
---|
| 1110 | }
|
---|
| 1111 | /*
|
---|
| 1112 | * Special CPUIDs needs special handling as they don't follow the
|
---|
| 1113 | * leaf count principle used above.
|
---|
| 1114 | */
|
---|
| 1115 | else if (s_aCandidates[iOuter].fSpecial)
|
---|
| 1116 | {
|
---|
| 1117 | bool fKeep = false;
|
---|
| 1118 | if (uLeaf == 0x8ffffffe && uEax == UINT32_C(0x00494544))
|
---|
| 1119 | fKeep = true;
|
---|
| 1120 | else if ( uLeaf == 0x8fffffff
|
---|
| 1121 | && RT_C_IS_PRINT(RT_BYTE1(uEax))
|
---|
| 1122 | && RT_C_IS_PRINT(RT_BYTE2(uEax))
|
---|
| 1123 | && RT_C_IS_PRINT(RT_BYTE3(uEax))
|
---|
| 1124 | && RT_C_IS_PRINT(RT_BYTE4(uEax))
|
---|
| 1125 | && RT_C_IS_PRINT(RT_BYTE1(uEbx))
|
---|
| 1126 | && RT_C_IS_PRINT(RT_BYTE2(uEbx))
|
---|
| 1127 | && RT_C_IS_PRINT(RT_BYTE3(uEbx))
|
---|
| 1128 | && RT_C_IS_PRINT(RT_BYTE4(uEbx))
|
---|
| 1129 | && RT_C_IS_PRINT(RT_BYTE1(uEcx))
|
---|
| 1130 | && RT_C_IS_PRINT(RT_BYTE2(uEcx))
|
---|
| 1131 | && RT_C_IS_PRINT(RT_BYTE3(uEcx))
|
---|
| 1132 | && RT_C_IS_PRINT(RT_BYTE4(uEcx))
|
---|
| 1133 | && RT_C_IS_PRINT(RT_BYTE1(uEdx))
|
---|
| 1134 | && RT_C_IS_PRINT(RT_BYTE2(uEdx))
|
---|
| 1135 | && RT_C_IS_PRINT(RT_BYTE3(uEdx))
|
---|
| 1136 | && RT_C_IS_PRINT(RT_BYTE4(uEdx)) )
|
---|
| 1137 | fKeep = true;
|
---|
| 1138 | if (fKeep)
|
---|
| 1139 | {
|
---|
[94931] | 1140 | int rc = cpumCollectCpuIdInfoAddOne(ppaLeaves, pcLeaves, uLeaf, 0, 0, uEax, uEbx, uEcx, uEdx, 0);
|
---|
[49893] | 1141 | if (RT_FAILURE(rc))
|
---|
| 1142 | return rc;
|
---|
| 1143 | }
|
---|
| 1144 | }
|
---|
| 1145 | }
|
---|
| 1146 |
|
---|
[94931] | 1147 | # ifdef VBOX_STRICT
|
---|
| 1148 | cpumCpuIdAssertOrder(*ppaLeaves, *pcLeaves);
|
---|
| 1149 | # endif
|
---|
[49893] | 1150 | return VINF_SUCCESS;
|
---|
| 1151 | }
|
---|
[93515] | 1152 | #endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */
|
---|
[49893] | 1153 |
|
---|
| 1154 |
|
---|
| 1155 | /**
|
---|
| 1156 | * Detect the CPU vendor give n the
|
---|
| 1157 | *
|
---|
| 1158 | * @returns The vendor.
|
---|
| 1159 | * @param uEAX EAX from CPUID(0).
|
---|
| 1160 | * @param uEBX EBX from CPUID(0).
|
---|
| 1161 | * @param uECX ECX from CPUID(0).
|
---|
| 1162 | * @param uEDX EDX from CPUID(0).
|
---|
| 1163 | */
|
---|
[94931] | 1164 | VMMDECL(CPUMCPUVENDOR) CPUMCpuIdDetectX86VendorEx(uint32_t uEAX, uint32_t uEBX, uint32_t uECX, uint32_t uEDX)
|
---|
[49893] | 1165 | {
|
---|
[93515] | 1166 | if (RTX86IsValidStdRange(uEAX))
|
---|
[49893] | 1167 | {
|
---|
[93515] | 1168 | if (RTX86IsAmdCpu(uEBX, uECX, uEDX))
|
---|
[49893] | 1169 | return CPUMCPUVENDOR_AMD;
|
---|
| 1170 |
|
---|
[93515] | 1171 | if (RTX86IsIntelCpu(uEBX, uECX, uEDX))
|
---|
[49893] | 1172 | return CPUMCPUVENDOR_INTEL;
|
---|
| 1173 |
|
---|
[93515] | 1174 | if (RTX86IsViaCentaurCpu(uEBX, uECX, uEDX))
|
---|
[49893] | 1175 | return CPUMCPUVENDOR_VIA;
|
---|
| 1176 |
|
---|
[93515] | 1177 | if (RTX86IsShanghaiCpu(uEBX, uECX, uEDX))
|
---|
[76886] | 1178 | return CPUMCPUVENDOR_SHANGHAI;
|
---|
| 1179 |
|
---|
[49893] | 1180 | if ( uEBX == UINT32_C(0x69727943) /* CyrixInstead */
|
---|
| 1181 | && uECX == UINT32_C(0x64616574)
|
---|
| 1182 | && uEDX == UINT32_C(0x736E4978))
|
---|
| 1183 | return CPUMCPUVENDOR_CYRIX;
|
---|
| 1184 |
|
---|
[93515] | 1185 | if (RTX86IsHygonCpu(uEBX, uECX, uEDX))
|
---|
[81605] | 1186 | return CPUMCPUVENDOR_HYGON;
|
---|
| 1187 |
|
---|
[49893] | 1188 | /* "Geode by NSC", example: family 5, model 9. */
|
---|
| 1189 |
|
---|
| 1190 | /** @todo detect the other buggers... */
|
---|
| 1191 | }
|
---|
| 1192 |
|
---|
| 1193 | return CPUMCPUVENDOR_UNKNOWN;
|
---|
| 1194 | }
|
---|
| 1195 |
|
---|
| 1196 |
|
---|
| 1197 | /**
|
---|
| 1198 | * Translates a CPU vendor enum value into the corresponding string constant.
|
---|
| 1199 | *
|
---|
| 1200 | * The named can be prefixed with 'CPUMCPUVENDOR_' to construct a valid enum
|
---|
| 1201 | * value name. This can be useful when generating code.
|
---|
| 1202 | *
|
---|
| 1203 | * @returns Read only name string.
|
---|
| 1204 | * @param enmVendor The CPU vendor value.
|
---|
| 1205 | */
|
---|
[94931] | 1206 | VMMDECL(const char *) CPUMCpuVendorName(CPUMCPUVENDOR enmVendor)
|
---|
[49893] | 1207 | {
|
---|
| 1208 | switch (enmVendor)
|
---|
| 1209 | {
|
---|
| 1210 | case CPUMCPUVENDOR_INTEL: return "INTEL";
|
---|
| 1211 | case CPUMCPUVENDOR_AMD: return "AMD";
|
---|
| 1212 | case CPUMCPUVENDOR_VIA: return "VIA";
|
---|
| 1213 | case CPUMCPUVENDOR_CYRIX: return "CYRIX";
|
---|
[76886] | 1214 | case CPUMCPUVENDOR_SHANGHAI: return "SHANGHAI";
|
---|
[81605] | 1215 | case CPUMCPUVENDOR_HYGON: return "HYGON";
|
---|
[99023] | 1216 | case CPUMCPUVENDOR_APPLE: return "APPLE";
|
---|
[49893] | 1217 | case CPUMCPUVENDOR_UNKNOWN: return "UNKNOWN";
|
---|
| 1218 |
|
---|
| 1219 | case CPUMCPUVENDOR_INVALID:
|
---|
| 1220 | case CPUMCPUVENDOR_32BIT_HACK:
|
---|
| 1221 | break;
|
---|
| 1222 | }
|
---|
| 1223 | return "Invalid-cpu-vendor";
|
---|
| 1224 | }
|
---|
| 1225 |
|
---|
| 1226 |
|
---|
[94931] | 1227 | static PCCPUMCPUIDLEAF cpumCpuIdFindLeaf(PCCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, uint32_t uLeaf)
|
---|
[49893] | 1228 | {
|
---|
| 1229 | /* Could do binary search, doing linear now because I'm lazy. */
|
---|
| 1230 | PCCPUMCPUIDLEAF pLeaf = paLeaves;
|
---|
| 1231 | while (cLeaves-- > 0)
|
---|
| 1232 | {
|
---|
| 1233 | if (pLeaf->uLeaf == uLeaf)
|
---|
| 1234 | return pLeaf;
|
---|
| 1235 | pLeaf++;
|
---|
| 1236 | }
|
---|
| 1237 | return NULL;
|
---|
| 1238 | }
|
---|
| 1239 |
|
---|
| 1240 |
|
---|
[94931] | 1241 | static PCCPUMCPUIDLEAF cpumCpuIdFindLeafEx(PCCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, uint32_t uLeaf, uint32_t uSubLeaf)
|
---|
[55062] | 1242 | {
|
---|
[94931] | 1243 | PCCPUMCPUIDLEAF pLeaf = cpumCpuIdFindLeaf(paLeaves, cLeaves, uLeaf);
|
---|
[55062] | 1244 | if ( !pLeaf
|
---|
| 1245 | || pLeaf->uSubLeaf != (uSubLeaf & pLeaf->fSubLeafMask))
|
---|
| 1246 | return pLeaf;
|
---|
| 1247 |
|
---|
| 1248 | /* Linear sub-leaf search. Lazy as usual. */
|
---|
[55114] | 1249 | cLeaves -= pLeaf - paLeaves;
|
---|
[55062] | 1250 | while ( cLeaves-- > 0
|
---|
| 1251 | && pLeaf->uLeaf == uLeaf)
|
---|
| 1252 | {
|
---|
| 1253 | if (pLeaf->uSubLeaf == (uSubLeaf & pLeaf->fSubLeafMask))
|
---|
| 1254 | return pLeaf;
|
---|
| 1255 | pLeaf++;
|
---|
| 1256 | }
|
---|
| 1257 |
|
---|
| 1258 | return NULL;
|
---|
| 1259 | }
|
---|
| 1260 |
|
---|
| 1261 |
|
---|
[94931] | 1262 | static void cpumExplodeVmxFeatures(PCVMXMSRS pVmxMsrs, PCPUMFEATURES pFeatures)
|
---|
[49893] | 1263 | {
|
---|
[76464] | 1264 | Assert(pVmxMsrs);
|
---|
| 1265 | Assert(pFeatures);
|
---|
| 1266 | Assert(pFeatures->fVmx);
|
---|
| 1267 |
|
---|
| 1268 | /* Basic information. */
|
---|
[93268] | 1269 | bool const fVmxTrueMsrs = RT_BOOL(pVmxMsrs->u64Basic & VMX_BF_BASIC_TRUE_CTLS_MASK);
|
---|
[76464] | 1270 | {
|
---|
| 1271 | uint64_t const u64Basic = pVmxMsrs->u64Basic;
|
---|
| 1272 | pFeatures->fVmxInsOutInfo = RT_BF_GET(u64Basic, VMX_BF_BASIC_VMCS_INS_OUTS);
|
---|
| 1273 | }
|
---|
| 1274 |
|
---|
| 1275 | /* Pin-based VM-execution controls. */
|
---|
| 1276 | {
|
---|
[93268] | 1277 | uint32_t const fPinCtls = fVmxTrueMsrs ? pVmxMsrs->TruePinCtls.n.allowed1 : pVmxMsrs->PinCtls.n.allowed1;
|
---|
[76464] | 1278 | pFeatures->fVmxExtIntExit = RT_BOOL(fPinCtls & VMX_PIN_CTLS_EXT_INT_EXIT);
|
---|
| 1279 | pFeatures->fVmxNmiExit = RT_BOOL(fPinCtls & VMX_PIN_CTLS_NMI_EXIT);
|
---|
| 1280 | pFeatures->fVmxVirtNmi = RT_BOOL(fPinCtls & VMX_PIN_CTLS_VIRT_NMI);
|
---|
| 1281 | pFeatures->fVmxPreemptTimer = RT_BOOL(fPinCtls & VMX_PIN_CTLS_PREEMPT_TIMER);
|
---|
| 1282 | pFeatures->fVmxPostedInt = RT_BOOL(fPinCtls & VMX_PIN_CTLS_POSTED_INT);
|
---|
| 1283 | }
|
---|
| 1284 |
|
---|
| 1285 | /* Processor-based VM-execution controls. */
|
---|
| 1286 | {
|
---|
[93268] | 1287 | uint32_t const fProcCtls = fVmxTrueMsrs ? pVmxMsrs->TrueProcCtls.n.allowed1 : pVmxMsrs->ProcCtls.n.allowed1;
|
---|
[76464] | 1288 | pFeatures->fVmxIntWindowExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_INT_WINDOW_EXIT);
|
---|
| 1289 | pFeatures->fVmxTscOffsetting = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_TSC_OFFSETTING);
|
---|
| 1290 | pFeatures->fVmxHltExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_HLT_EXIT);
|
---|
| 1291 | pFeatures->fVmxInvlpgExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_INVLPG_EXIT);
|
---|
| 1292 | pFeatures->fVmxMwaitExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_MWAIT_EXIT);
|
---|
| 1293 | pFeatures->fVmxRdpmcExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_RDPMC_EXIT);
|
---|
| 1294 | pFeatures->fVmxRdtscExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_RDTSC_EXIT);
|
---|
| 1295 | pFeatures->fVmxCr3LoadExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR3_LOAD_EXIT);
|
---|
| 1296 | pFeatures->fVmxCr3StoreExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR3_STORE_EXIT);
|
---|
[91037] | 1297 | pFeatures->fVmxTertiaryExecCtls = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_TERTIARY_CTLS);
|
---|
[76464] | 1298 | pFeatures->fVmxCr8LoadExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR8_LOAD_EXIT);
|
---|
| 1299 | pFeatures->fVmxCr8StoreExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR8_STORE_EXIT);
|
---|
| 1300 | pFeatures->fVmxUseTprShadow = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_TPR_SHADOW);
|
---|
| 1301 | pFeatures->fVmxNmiWindowExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_NMI_WINDOW_EXIT);
|
---|
| 1302 | pFeatures->fVmxMovDRxExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_MOV_DR_EXIT);
|
---|
| 1303 | pFeatures->fVmxUncondIoExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_UNCOND_IO_EXIT);
|
---|
| 1304 | pFeatures->fVmxUseIoBitmaps = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_IO_BITMAPS);
|
---|
| 1305 | pFeatures->fVmxMonitorTrapFlag = RT_BOOL(fProcCtls & VMX_PROC_CTLS_MONITOR_TRAP_FLAG);
|
---|
| 1306 | pFeatures->fVmxUseMsrBitmaps = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_MSR_BITMAPS);
|
---|
| 1307 | pFeatures->fVmxMonitorExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_MONITOR_EXIT);
|
---|
| 1308 | pFeatures->fVmxPauseExit = RT_BOOL(fProcCtls & VMX_PROC_CTLS_PAUSE_EXIT);
|
---|
| 1309 | pFeatures->fVmxSecondaryExecCtls = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_SECONDARY_CTLS);
|
---|
| 1310 | }
|
---|
| 1311 |
|
---|
| 1312 | /* Secondary processor-based VM-execution controls. */
|
---|
| 1313 | {
|
---|
| 1314 | uint32_t const fProcCtls2 = pFeatures->fVmxSecondaryExecCtls ? pVmxMsrs->ProcCtls2.n.allowed1 : 0;
|
---|
| 1315 | pFeatures->fVmxVirtApicAccess = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VIRT_APIC_ACCESS);
|
---|
| 1316 | pFeatures->fVmxEpt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_EPT);
|
---|
| 1317 | pFeatures->fVmxDescTableExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_DESC_TABLE_EXIT);
|
---|
| 1318 | pFeatures->fVmxRdtscp = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_RDTSCP);
|
---|
| 1319 | pFeatures->fVmxVirtX2ApicMode = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VIRT_X2APIC_MODE);
|
---|
| 1320 | pFeatures->fVmxVpid = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VPID);
|
---|
| 1321 | pFeatures->fVmxWbinvdExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_WBINVD_EXIT);
|
---|
| 1322 | pFeatures->fVmxUnrestrictedGuest = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_UNRESTRICTED_GUEST);
|
---|
| 1323 | pFeatures->fVmxApicRegVirt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_APIC_REG_VIRT);
|
---|
| 1324 | pFeatures->fVmxVirtIntDelivery = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VIRT_INT_DELIVERY);
|
---|
| 1325 | pFeatures->fVmxPauseLoopExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_PAUSE_LOOP_EXIT);
|
---|
| 1326 | pFeatures->fVmxRdrandExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_RDRAND_EXIT);
|
---|
| 1327 | pFeatures->fVmxInvpcid = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_INVPCID);
|
---|
| 1328 | pFeatures->fVmxVmFunc = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VMFUNC);
|
---|
| 1329 | pFeatures->fVmxVmcsShadowing = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_VMCS_SHADOWING);
|
---|
| 1330 | pFeatures->fVmxRdseedExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_RDSEED_EXIT);
|
---|
| 1331 | pFeatures->fVmxPml = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_PML);
|
---|
[91043] | 1332 | pFeatures->fVmxEptXcptVe = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_EPT_XCPT_VE);
|
---|
[91710] | 1333 | pFeatures->fVmxConcealVmxFromPt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_CONCEAL_VMX_FROM_PT);
|
---|
[76464] | 1334 | pFeatures->fVmxXsavesXrstors = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_XSAVES_XRSTORS);
|
---|
[101309] | 1335 | pFeatures->fVmxPasidTranslate = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_PASID_TRANSLATE);
|
---|
[91710] | 1336 | pFeatures->fVmxModeBasedExecuteEpt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_MODE_BASED_EPT_PERM);
|
---|
| 1337 | pFeatures->fVmxSppEpt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_SPP_EPT);
|
---|
| 1338 | pFeatures->fVmxPtEpt = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_PT_EPT);
|
---|
[76464] | 1339 | pFeatures->fVmxUseTscScaling = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_TSC_SCALING);
|
---|
[91710] | 1340 | pFeatures->fVmxUserWaitPause = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_USER_WAIT_PAUSE);
|
---|
[101309] | 1341 | pFeatures->fVmxPconfig = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_PCONFIG);
|
---|
[91710] | 1342 | pFeatures->fVmxEnclvExit = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_ENCLV_EXIT);
|
---|
[101309] | 1343 | pFeatures->fVmxBusLockDetect = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_BUS_LOCK_DETECT);
|
---|
| 1344 | pFeatures->fVmxInstrTimeout = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_INSTR_TIMEOUT);
|
---|
[76464] | 1345 | }
|
---|
| 1346 |
|
---|
[91037] | 1347 | /* Tertiary processor-based VM-execution controls. */
|
---|
| 1348 | {
|
---|
| 1349 | uint64_t const fProcCtls3 = pFeatures->fVmxTertiaryExecCtls ? pVmxMsrs->u64ProcCtls3 : 0;
|
---|
[91038] | 1350 | pFeatures->fVmxLoadIwKeyExit = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_LOADIWKEY_EXIT);
|
---|
[101309] | 1351 | pFeatures->fVmxHlat = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_HLAT);
|
---|
| 1352 | pFeatures->fVmxEptPagingWrite = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_EPT_PAGING_WRITE);
|
---|
| 1353 | pFeatures->fVmxGstPagingVerify = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_GST_PAGING_VERIFY);
|
---|
| 1354 | pFeatures->fVmxIpiVirt = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_IPI_VIRT);
|
---|
| 1355 | pFeatures->fVmxVirtSpecCtrl = RT_BOOL(fProcCtls3 & VMX_PROC_CTLS3_VIRT_SPEC_CTRL);
|
---|
[91037] | 1356 | }
|
---|
| 1357 |
|
---|
[76464] | 1358 | /* VM-exit controls. */
|
---|
| 1359 | {
|
---|
[93268] | 1360 | uint32_t const fExitCtls = fVmxTrueMsrs ? pVmxMsrs->TrueExitCtls.n.allowed1 : pVmxMsrs->ExitCtls.n.allowed1;
|
---|
[76464] | 1361 | pFeatures->fVmxExitSaveDebugCtls = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_SAVE_DEBUG);
|
---|
| 1362 | pFeatures->fVmxHostAddrSpaceSize = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_HOST_ADDR_SPACE_SIZE);
|
---|
| 1363 | pFeatures->fVmxExitAckExtInt = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_ACK_EXT_INT);
|
---|
| 1364 | pFeatures->fVmxExitSavePatMsr = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_SAVE_PAT_MSR);
|
---|
| 1365 | pFeatures->fVmxExitLoadPatMsr = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_LOAD_PAT_MSR);
|
---|
| 1366 | pFeatures->fVmxExitSaveEferMsr = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_SAVE_EFER_MSR);
|
---|
| 1367 | pFeatures->fVmxExitLoadEferMsr = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_LOAD_EFER_MSR);
|
---|
| 1368 | pFeatures->fVmxSavePreemptTimer = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_SAVE_PREEMPT_TIMER);
|
---|
[97317] | 1369 | pFeatures->fVmxSecondaryExitCtls = RT_BOOL(fExitCtls & VMX_EXIT_CTLS_USE_SECONDARY_CTLS);
|
---|
[76464] | 1370 | }
|
---|
| 1371 |
|
---|
| 1372 | /* VM-entry controls. */
|
---|
| 1373 | {
|
---|
[93268] | 1374 | uint32_t const fEntryCtls = fVmxTrueMsrs ? pVmxMsrs->TrueEntryCtls.n.allowed1 : pVmxMsrs->EntryCtls.n.allowed1;
|
---|
[76464] | 1375 | pFeatures->fVmxEntryLoadDebugCtls = RT_BOOL(fEntryCtls & VMX_ENTRY_CTLS_LOAD_DEBUG);
|
---|
| 1376 | pFeatures->fVmxIa32eModeGuest = RT_BOOL(fEntryCtls & VMX_ENTRY_CTLS_IA32E_MODE_GUEST);
|
---|
| 1377 | pFeatures->fVmxEntryLoadEferMsr = RT_BOOL(fEntryCtls & VMX_ENTRY_CTLS_LOAD_EFER_MSR);
|
---|
| 1378 | pFeatures->fVmxEntryLoadPatMsr = RT_BOOL(fEntryCtls & VMX_ENTRY_CTLS_LOAD_PAT_MSR);
|
---|
| 1379 | }
|
---|
| 1380 |
|
---|
| 1381 | /* Miscellaneous data. */
|
---|
| 1382 | {
|
---|
| 1383 | uint32_t const fMiscData = pVmxMsrs->u64Misc;
|
---|
| 1384 | pFeatures->fVmxExitSaveEferLma = RT_BOOL(fMiscData & VMX_MISC_EXIT_SAVE_EFER_LMA);
|
---|
[91710] | 1385 | pFeatures->fVmxPt = RT_BOOL(fMiscData & VMX_MISC_INTEL_PT);
|
---|
[76464] | 1386 | pFeatures->fVmxVmwriteAll = RT_BOOL(fMiscData & VMX_MISC_VMWRITE_ALL);
|
---|
| 1387 | pFeatures->fVmxEntryInjectSoftInt = RT_BOOL(fMiscData & VMX_MISC_ENTRY_INJECT_SOFT_INT);
|
---|
| 1388 | }
|
---|
| 1389 | }
|
---|
| 1390 |
|
---|
| 1391 |
|
---|
[94931] | 1392 | int cpumCpuIdExplodeFeaturesX86(PCCPUMCPUIDLEAF paLeaves, uint32_t cLeaves, PCCPUMMSRS pMsrs, PCPUMFEATURES pFeatures)
|
---|
[76464] | 1393 | {
|
---|
| 1394 | Assert(pMsrs);
|
---|
[49893] | 1395 | RT_ZERO(*pFeatures);
|
---|
| 1396 | if (cLeaves >= 2)
|
---|
| 1397 | {
|
---|
| 1398 | AssertLogRelReturn(paLeaves[0].uLeaf == 0, VERR_CPUM_IPE_1);
|
---|
| 1399 | AssertLogRelReturn(paLeaves[1].uLeaf == 1, VERR_CPUM_IPE_1);
|
---|
[94931] | 1400 | PCCPUMCPUIDLEAF const pStd0Leaf = cpumCpuIdFindLeafEx(paLeaves, cLeaves, 0, 0);
|
---|
[55114] | 1401 | AssertLogRelReturn(pStd0Leaf, VERR_CPUM_IPE_1);
|
---|
[94931] | 1402 | PCCPUMCPUIDLEAF const pStd1Leaf = cpumCpuIdFindLeafEx(paLeaves, cLeaves, 1, 0);
|
---|
[55114] | 1403 | AssertLogRelReturn(pStd1Leaf, VERR_CPUM_IPE_1);
|
---|
[49893] | 1404 |
|
---|
[94931] | 1405 | pFeatures->enmCpuVendor = CPUMCpuIdDetectX86VendorEx(pStd0Leaf->uEax,
|
---|
| 1406 | pStd0Leaf->uEbx,
|
---|
| 1407 | pStd0Leaf->uEcx,
|
---|
| 1408 | pStd0Leaf->uEdx);
|
---|
[93515] | 1409 | pFeatures->uFamily = RTX86GetCpuFamily(pStd1Leaf->uEax);
|
---|
| 1410 | pFeatures->uModel = RTX86GetCpuModel(pStd1Leaf->uEax, pFeatures->enmCpuVendor == CPUMCPUVENDOR_INTEL);
|
---|
| 1411 | pFeatures->uStepping = RTX86GetCpuStepping(pStd1Leaf->uEax);
|
---|
[94931] | 1412 | pFeatures->enmMicroarch = CPUMCpuIdDetermineX86MicroarchEx((CPUMCPUVENDOR)pFeatures->enmCpuVendor,
|
---|
| 1413 | pFeatures->uFamily,
|
---|
| 1414 | pFeatures->uModel,
|
---|
| 1415 | pFeatures->uStepping);
|
---|
[49893] | 1416 |
|
---|
[94931] | 1417 | PCCPUMCPUIDLEAF const pExtLeaf8 = cpumCpuIdFindLeaf(paLeaves, cLeaves, 0x80000008);
|
---|
[70606] | 1418 | if (pExtLeaf8)
|
---|
[74163] | 1419 | {
|
---|
| 1420 | pFeatures->cMaxPhysAddrWidth = pExtLeaf8->uEax & 0xff;
|
---|
| 1421 | pFeatures->cMaxLinearAddrWidth = (pExtLeaf8->uEax >> 8) & 0xff;
|
---|
| 1422 | }
|
---|
[55114] | 1423 | else if (pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PSE36)
|
---|
[74163] | 1424 | {
|
---|
| 1425 | pFeatures->cMaxPhysAddrWidth = 36;
|
---|
| 1426 | pFeatures->cMaxLinearAddrWidth = 36;
|
---|
| 1427 | }
|
---|
[49893] | 1428 | else
|
---|
[74163] | 1429 | {
|
---|
| 1430 | pFeatures->cMaxPhysAddrWidth = 32;
|
---|
| 1431 | pFeatures->cMaxLinearAddrWidth = 32;
|
---|
| 1432 | }
|
---|
[49893] | 1433 |
|
---|
| 1434 | /* Standard features. */
|
---|
[55114] | 1435 | pFeatures->fMsr = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_MSR);
|
---|
| 1436 | pFeatures->fApic = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_APIC);
|
---|
| 1437 | pFeatures->fX2Apic = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_X2APIC);
|
---|
| 1438 | pFeatures->fPse = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PSE);
|
---|
| 1439 | pFeatures->fPse36 = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PSE36);
|
---|
| 1440 | pFeatures->fPae = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PAE);
|
---|
[91276] | 1441 | pFeatures->fPge = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PGE);
|
---|
[55114] | 1442 | pFeatures->fPat = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_PAT);
|
---|
| 1443 | pFeatures->fFxSaveRstor = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_FXSR);
|
---|
| 1444 | pFeatures->fXSaveRstor = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_XSAVE);
|
---|
| 1445 | pFeatures->fOpSysXSaveRstor = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_OSXSAVE);
|
---|
| 1446 | pFeatures->fMmx = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_MMX);
|
---|
| 1447 | pFeatures->fSse = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_SSE);
|
---|
| 1448 | pFeatures->fSse2 = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_SSE2);
|
---|
| 1449 | pFeatures->fSse3 = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_SSE3);
|
---|
| 1450 | pFeatures->fSsse3 = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_SSSE3);
|
---|
| 1451 | pFeatures->fSse41 = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_SSE4_1);
|
---|
| 1452 | pFeatures->fSse42 = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_SSE4_2);
|
---|
[97070] | 1453 | pFeatures->fAesNi = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_AES);
|
---|
[55114] | 1454 | pFeatures->fAvx = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_AVX);
|
---|
| 1455 | pFeatures->fTsc = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_TSC);
|
---|
| 1456 | pFeatures->fSysEnter = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_SEP);
|
---|
[100935] | 1457 | pFeatures->fMtrr = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_MTRR);
|
---|
[55114] | 1458 | pFeatures->fHypervisorPresent = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_HVP);
|
---|
| 1459 | pFeatures->fMonitorMWait = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_MONITOR);
|
---|
[100854] | 1460 | pFeatures->fCmpXchg8b = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_CX8);
|
---|
| 1461 | pFeatures->fCmpXchg16b = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_CX16);
|
---|
[66327] | 1462 | pFeatures->fClFlush = RT_BOOL(pStd1Leaf->uEdx & X86_CPUID_FEATURE_EDX_CLFSH);
|
---|
[70612] | 1463 | pFeatures->fPcid = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_PCID);
|
---|
[95359] | 1464 | pFeatures->fPopCnt = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_POPCNT);
|
---|
[94909] | 1465 | pFeatures->fRdRand = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_RDRAND);
|
---|
[73228] | 1466 | pFeatures->fVmx = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_VMX);
|
---|
[96652] | 1467 | pFeatures->fPclMul = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_PCLMUL);
|
---|
[97529] | 1468 | pFeatures->fMovBe = RT_BOOL(pStd1Leaf->uEcx & X86_CPUID_FEATURE_ECX_MOVBE);
|
---|
[76464] | 1469 | if (pFeatures->fVmx)
|
---|
[94931] | 1470 | cpumExplodeVmxFeatures(&pMsrs->hwvirt.vmx, pFeatures);
|
---|
[49893] | 1471 |
|
---|
[55062] | 1472 | /* Structured extended features. */
|
---|
[94931] | 1473 | PCCPUMCPUIDLEAF const pSxfLeaf0 = cpumCpuIdFindLeafEx(paLeaves, cLeaves, 7, 0);
|
---|
[55062] | 1474 | if (pSxfLeaf0)
|
---|
| 1475 | {
|
---|
[70612] | 1476 | pFeatures->fFsGsBase = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_FSGSBASE);
|
---|
[67071] | 1477 | pFeatures->fAvx2 = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_AVX2);
|
---|
| 1478 | pFeatures->fAvx512Foundation = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_AVX512F);
|
---|
[66331] | 1479 | pFeatures->fClFlushOpt = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_CLFLUSHOPT);
|
---|
[70612] | 1480 | pFeatures->fInvpcid = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_INVPCID);
|
---|
[94909] | 1481 | pFeatures->fBmi1 = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_BMI1);
|
---|
| 1482 | pFeatures->fBmi2 = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_BMI2);
|
---|
| 1483 | pFeatures->fRdSeed = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_RDSEED);
|
---|
[97560] | 1484 | pFeatures->fHle = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_HLE);
|
---|
| 1485 | pFeatures->fRtm = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_RTM);
|
---|
[98703] | 1486 | pFeatures->fSha = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_SHA);
|
---|
[98827] | 1487 | pFeatures->fAdx = RT_BOOL(pSxfLeaf0->uEbx & X86_CPUID_STEXT_FEATURE_EBX_ADX);
|
---|
[70606] | 1488 |
|
---|
| 1489 | pFeatures->fIbpb = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_IBRS_IBPB);
|
---|
| 1490 | pFeatures->fIbrs = pFeatures->fIbpb;
|
---|
| 1491 | pFeatures->fStibp = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_STIBP);
|
---|
[76678] | 1492 | pFeatures->fFlushCmd = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_FLUSH_CMD);
|
---|
[70606] | 1493 | pFeatures->fArchCap = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_ARCHCAP);
|
---|
[78632] | 1494 | pFeatures->fMdsClear = RT_BOOL(pSxfLeaf0->uEdx & X86_CPUID_STEXT_FEATURE_EDX_MD_CLEAR);
|
---|
[55062] | 1495 | }
|
---|
| 1496 |
|
---|
[51728] | 1497 | /* MWAIT/MONITOR leaf. */
|
---|
[94931] | 1498 | PCCPUMCPUIDLEAF const pMWaitLeaf = cpumCpuIdFindLeaf(paLeaves, cLeaves, 5);
|
---|
[51728] | 1499 | if (pMWaitLeaf)
|
---|
| 1500 | pFeatures->fMWaitExtensions = (pMWaitLeaf->uEcx & (X86_CPUID_MWAIT_ECX_EXT | X86_CPUID_MWAIT_ECX_BREAKIRQIF0))
|
---|
[76678] | 1501 | == (X86_CPUID_MWAIT_ECX_EXT | X86_CPUID_MWAIT_ECX_BREAKIRQIF0);
|
---|
[51728] | 1502 |
|
---|
[49893] | 1503 | /* Extended features. */
|
---|
[94931] | 1504 | PCCPUMCPUIDLEAF const pExtLeaf = cpumCpuIdFindLeaf(paLeaves, cLeaves, 0x80000001);
|
---|
[49893] | 1505 | if (pExtLeaf)
|
---|
| 1506 | {
|
---|
| 1507 | pFeatures->fLongMode = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE);
|
---|
| 1508 | pFeatures->fSysCall = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_EXT_FEATURE_EDX_SYSCALL);
|
---|
| 1509 | pFeatures->fNoExecute = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_EXT_FEATURE_EDX_NX);
|
---|
| 1510 | pFeatures->fLahfSahf = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF);
|
---|
| 1511 | pFeatures->fRdTscP = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_EXT_FEATURE_EDX_RDTSCP);
|
---|
[55229] | 1512 | pFeatures->fMovCr8In32Bit = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_CMPL);
|
---|
| 1513 | pFeatures->f3DNow = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_3DNOW);
|
---|
| 1514 | pFeatures->f3DNowPrefetch = (pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF)
|
---|
| 1515 | || (pExtLeaf->uEdx & ( X86_CPUID_EXT_FEATURE_EDX_LONG_MODE
|
---|
| 1516 | | X86_CPUID_AMD_FEATURE_EDX_3DNOW));
|
---|
[95359] | 1517 | pFeatures->fAbm = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_ABM);
|
---|
[49893] | 1518 | }
|
---|
| 1519 |
|
---|
[79806] | 1520 | /* VMX (VMXON, VMCS region and related data structures) physical address width (depends on long-mode). */
|
---|
[74113] | 1521 | pFeatures->cVmxMaxPhysAddrWidth = pFeatures->fLongMode ? pFeatures->cMaxPhysAddrWidth : 32;
|
---|
| 1522 |
|
---|
[49893] | 1523 | if ( pExtLeaf
|
---|
[81605] | 1524 | && ( pFeatures->enmCpuVendor == CPUMCPUVENDOR_AMD
|
---|
| 1525 | || pFeatures->enmCpuVendor == CPUMCPUVENDOR_HYGON))
|
---|
[49893] | 1526 | {
|
---|
| 1527 | /* AMD features. */
|
---|
| 1528 | pFeatures->fMsr |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_MSR);
|
---|
| 1529 | pFeatures->fApic |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_APIC);
|
---|
| 1530 | pFeatures->fPse |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PSE);
|
---|
| 1531 | pFeatures->fPse36 |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PSE36);
|
---|
| 1532 | pFeatures->fPae |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PAE);
|
---|
[91275] | 1533 | pFeatures->fPge |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PGE);
|
---|
[49893] | 1534 | pFeatures->fPat |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_PAT);
|
---|
| 1535 | pFeatures->fFxSaveRstor |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_FXSR);
|
---|
[55054] | 1536 | pFeatures->fMmx |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_MMX);
|
---|
| 1537 | pFeatures->fTsc |= RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_TSC);
|
---|
[70606] | 1538 | pFeatures->fIbpb |= pExtLeaf8 && (pExtLeaf8->uEbx & X86_CPUID_AMD_EFEID_EBX_IBPB);
|
---|
[55229] | 1539 | pFeatures->fAmdMmxExts = RT_BOOL(pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_AXMMX);
|
---|
[65801] | 1540 | pFeatures->fXop = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_XOP);
|
---|
[94909] | 1541 | pFeatures->fTbm = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_TBM);
|
---|
[65904] | 1542 | pFeatures->fSvm = RT_BOOL(pExtLeaf->uEcx & X86_CPUID_AMD_FEATURE_ECX_SVM);
|
---|
[66040] | 1543 | if (pFeatures->fSvm)
|
---|
| 1544 | {
|
---|
[94931] | 1545 | PCCPUMCPUIDLEAF pSvmLeaf = cpumCpuIdFindLeaf(paLeaves, cLeaves, 0x8000000a);
|
---|
[66040] | 1546 | AssertLogRelReturn(pSvmLeaf, VERR_CPUM_IPE_1);
|
---|
[66581] | 1547 | pFeatures->fSvmNestedPaging = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_NESTED_PAGING);
|
---|
| 1548 | pFeatures->fSvmLbrVirt = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_LBR_VIRT);
|
---|
| 1549 | pFeatures->fSvmSvmLock = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_SVM_LOCK);
|
---|
| 1550 | pFeatures->fSvmNextRipSave = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_NRIP_SAVE);
|
---|
| 1551 | pFeatures->fSvmTscRateMsr = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_TSC_RATE_MSR);
|
---|
| 1552 | pFeatures->fSvmVmcbClean = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_VMCB_CLEAN);
|
---|
| 1553 | pFeatures->fSvmFlusbByAsid = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_FLUSH_BY_ASID);
|
---|
[70254] | 1554 | pFeatures->fSvmDecodeAssists = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_DECODE_ASSISTS);
|
---|
[66581] | 1555 | pFeatures->fSvmPauseFilter = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER);
|
---|
| 1556 | pFeatures->fSvmPauseFilterThreshold = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_PAUSE_FILTER_THRESHOLD);
|
---|
| 1557 | pFeatures->fSvmAvic = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_AVIC);
|
---|
[70184] | 1558 | pFeatures->fSvmVirtVmsaveVmload = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_VIRT_VMSAVE_VMLOAD);
|
---|
| 1559 | pFeatures->fSvmVGif = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_VGIF);
|
---|
[81240] | 1560 | pFeatures->fSvmGmet = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_GMET);
|
---|
[101428] | 1561 | pFeatures->fSvmX2Avic = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_X2AVIC);
|
---|
[96103] | 1562 | pFeatures->fSvmSSSCheck = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_SSSCHECK);
|
---|
| 1563 | pFeatures->fSvmSpecCtrl = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_SPEC_CTRL);
|
---|
[101428] | 1564 | pFeatures->fSvmRoGpt = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_ROGPT);
|
---|
[96103] | 1565 | pFeatures->fSvmHostMceOverride = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_HOST_MCE_OVERRIDE);
|
---|
| 1566 | pFeatures->fSvmTlbiCtl = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_TLBICTL);
|
---|
[101428] | 1567 | pFeatures->fSvmVNmi = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_VNMI);
|
---|
| 1568 | pFeatures->fSvmIbsVirt = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_IBS_VIRT);
|
---|
| 1569 | pFeatures->fSvmExtLvtAvicAccessChg = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_EXT_LVT_AVIC_ACCESS_CHG);
|
---|
| 1570 | pFeatures->fSvmNstVirtVmcbAddrChk = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_NST_VIRT_VMCB_ADDR_CHK);
|
---|
| 1571 | pFeatures->fSvmBusLockThreshold = RT_BOOL(pSvmLeaf->uEdx & X86_CPUID_SVM_FEATURE_EDX_BUS_LOCK_THRESHOLD);
|
---|
[66581] | 1572 | pFeatures->uSvmMaxAsid = pSvmLeaf->uEbx;
|
---|
[66040] | 1573 | }
|
---|
[49893] | 1574 | }
|
---|
| 1575 |
|
---|
| 1576 | /*
|
---|
| 1577 | * Quirks.
|
---|
| 1578 | */
|
---|
| 1579 | pFeatures->fLeakyFxSR = pExtLeaf
|
---|
| 1580 | && (pExtLeaf->uEdx & X86_CPUID_AMD_FEATURE_EDX_FFXSR)
|
---|
[81613] | 1581 | && ( ( pFeatures->enmCpuVendor == CPUMCPUVENDOR_AMD
|
---|
| 1582 | && pFeatures->uFamily >= 6 /* K7 and up */)
|
---|
| 1583 | || pFeatures->enmCpuVendor == CPUMCPUVENDOR_HYGON);
|
---|
[55062] | 1584 |
|
---|
| 1585 | /*
|
---|
| 1586 | * Max extended (/FPU) state.
|
---|
| 1587 | */
|
---|
| 1588 | pFeatures->cbMaxExtendedState = pFeatures->fFxSaveRstor ? sizeof(X86FXSTATE) : sizeof(X86FPUSTATE);
|
---|
| 1589 | if (pFeatures->fXSaveRstor)
|
---|
| 1590 | {
|
---|
[94931] | 1591 | PCCPUMCPUIDLEAF const pXStateLeaf0 = cpumCpuIdFindLeafEx(paLeaves, cLeaves, 13, 0);
|
---|
[55062] | 1592 | if (pXStateLeaf0)
|
---|
| 1593 | {
|
---|
| 1594 | if ( pXStateLeaf0->uEcx >= sizeof(X86FXSTATE)
|
---|
[55740] | 1595 | && pXStateLeaf0->uEcx <= CPUM_MAX_XSAVE_AREA_SIZE
|
---|
[55062] | 1596 | && RT_ALIGN_32(pXStateLeaf0->uEcx, 8) == pXStateLeaf0->uEcx
|
---|
| 1597 | && pXStateLeaf0->uEbx >= sizeof(X86FXSTATE)
|
---|
| 1598 | && pXStateLeaf0->uEbx <= pXStateLeaf0->uEcx
|
---|
| 1599 | && RT_ALIGN_32(pXStateLeaf0->uEbx, 8) == pXStateLeaf0->uEbx)
|
---|
| 1600 | {
|
---|
| 1601 | pFeatures->cbMaxExtendedState = pXStateLeaf0->uEcx;
|
---|
[55740] | 1602 |
|
---|
[66215] | 1603 | /* (paranoia:) */
|
---|
[94931] | 1604 | PCCPUMCPUIDLEAF const pXStateLeaf1 = cpumCpuIdFindLeafEx(paLeaves, cLeaves, 13, 1);
|
---|
[55740] | 1605 | if ( pXStateLeaf1
|
---|
| 1606 | && pXStateLeaf1->uEbx > pFeatures->cbMaxExtendedState
|
---|
| 1607 | && pXStateLeaf1->uEbx <= CPUM_MAX_XSAVE_AREA_SIZE
|
---|
| 1608 | && (pXStateLeaf1->uEcx || pXStateLeaf1->uEdx) )
|
---|
[66215] | 1609 | pFeatures->cbMaxExtendedState = pXStateLeaf1->uEbx;
|
---|
[55062] | 1610 | }
|
---|
| 1611 | else
|
---|
| 1612 | AssertLogRelMsgFailedStmt(("Unexpected max/cur XSAVE area sizes: %#x/%#x\n", pXStateLeaf0->uEcx, pXStateLeaf0->uEbx),
|
---|
| 1613 | pFeatures->fXSaveRstor = 0);
|
---|
| 1614 | }
|
---|
| 1615 | else
|
---|
| 1616 | AssertLogRelMsgFailedStmt(("Expected leaf eax=0xd/ecx=0 with the XSAVE/XRSTOR feature!\n"),
|
---|
| 1617 | pFeatures->fXSaveRstor = 0);
|
---|
| 1618 | }
|
---|
[99814] | 1619 |
|
---|
| 1620 | /*
|
---|
| 1621 | * Enable or disable VEX support depending on whether it's needed. Note that AVX,
|
---|
| 1622 | * BMI1, and BMI2 all use VEX encoding but are theoretically independent of each other.
|
---|
| 1623 | */
|
---|
| 1624 | pFeatures->fVex = pFeatures->fAvx | pFeatures->fBmi1 | pFeatures->fBmi2;
|
---|
[49893] | 1625 | }
|
---|
| 1626 | else
|
---|
| 1627 | AssertLogRelReturn(cLeaves == 0, VERR_CPUM_IPE_1);
|
---|
| 1628 | return VINF_SUCCESS;
|
---|
| 1629 | }
|
---|
| 1630 |
|
---|