VirtualBox

source: vbox/trunk/src/VBox/VMM/REMInternal.h@ 24912

Last change on this file since 24912 was 22707, checked in by vboxsync, 15 years ago

REM: Double the size of aHandlerNotifications and make sure there are at least 48 free entries in REMNotifyHandlerPhysicalFlushIfAlmostFull. This should hopefully get rid of the rare cases where we need to flush the notifications during pgmMapActivateCR3 in RC.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 9.2 KB
Line 
1/* $Id: REMInternal.h 22707 2009-09-02 11:02:48Z vboxsync $ */
2/** @file
3 * REM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___REMInternal_h
23#define ___REMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/cpum.h>
28#include <VBox/stam.h>
29#include <VBox/pgm.h>
30#include <VBox/pdmcritsect.h>
31#ifdef REM_INCLUDE_CPU_H
32# include "target-i386/cpu.h"
33#endif
34
35
36
37/** @defgroup grp_rem_int Internals
38 * @ingroup grp_rem
39 * @internal
40 * @{
41 */
42
43/** The saved state version number. */
44#define REM_SAVED_STATE_VERSION_VER1_6 6
45#define REM_SAVED_STATE_VERSION 7
46
47
48/** @def REM_MONITOR_CODE_PAGES
49 * Enable to monitor code pages that have been translated by the recompiler. */
50/** Currently broken and interferes with CSAM monitoring (see #2784) */
51////#define REM_MONITOR_CODE_PAGES
52#ifdef DOXYGEN_RUNNING
53# define REM_MONITOR_CODE_PAGES
54#endif
55
56typedef enum REMHANDLERNOTIFICATIONKIND
57{
58 /** The usual invalid 0 entry. */
59 REMHANDLERNOTIFICATIONKIND_INVALID = 0,
60 /** REMR3NotifyHandlerPhysicalRegister. */
61 REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
62 /** REMR3NotifyHandlerPhysicalDeregister. */
63 REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
64 /** REMR3NotifyHandlerPhysicalModify. */
65 REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
66 /** The usual 32-bit hack. */
67 REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
68} REMHANDLERNOTIFICATIONKIND;
69
70
71/**
72 * A recorded handler notificiation.
73 */
74typedef struct REMHANDLERNOTIFICATION
75{
76 /** The notification kind. */
77 REMHANDLERNOTIFICATIONKIND enmKind;
78 uint32_t padding;
79 /** Type specific data. */
80 union
81 {
82 struct
83 {
84 RTGCPHYS GCPhys;
85 RTGCPHYS cb;
86 PGMPHYSHANDLERTYPE enmType;
87 bool fHasHCHandler;
88 } PhysicalRegister;
89
90 struct
91 {
92 RTGCPHYS GCPhys;
93 RTGCPHYS cb;
94 PGMPHYSHANDLERTYPE enmType;
95 bool fHasHCHandler;
96 bool fRestoreAsRAM;
97 } PhysicalDeregister;
98
99 struct
100 {
101 RTGCPHYS GCPhysOld;
102 RTGCPHYS GCPhysNew;
103 RTGCPHYS cb;
104 PGMPHYSHANDLERTYPE enmType;
105 bool fHasHCHandler;
106 bool fRestoreAsRAM;
107 } PhysicalModify;
108 uint64_t padding[5];
109 } u;
110 uint32_t idxSelf;
111 uint32_t volatile idxNext;
112} REMHANDLERNOTIFICATION;
113/** Pointer to a handler notification record. */
114typedef REMHANDLERNOTIFICATION *PREMHANDLERNOTIFICATION;
115
116/**
117 * Converts a REM pointer into a VM pointer.
118 * @returns Pointer to the VM structure the REM is part of.
119 * @param pREM Pointer to REM instance data.
120 */
121#define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
122
123
124/**
125 * REM Data (part of VM)
126 */
127typedef struct REM
128{
129 /** Offset to the VM structure. */
130 RTINT offVM;
131 /** Alignment padding. */
132 RTUINT uPadding0;
133
134 /** Cached pointer of the register context of the current VCPU. */
135 R3PTRTYPE(PCPUMCTX) pCtx;
136
137 /** In REM mode.
138 * I.e. the correct CPU state and some other bits are with REM. */
139 bool volatile fInREM;
140 /** In REMR3State. */
141 bool fInStateSync;
142
143 /** Set when the translation blocks cache need to be flushed. */
144 bool fFlushTBs;
145
146 /** Ignore CR3 load notifications from the REM. */
147 bool fIgnoreCR3Load;
148 /** Ignore invlpg notifications from the REM. */
149 bool fIgnoreInvlPg;
150 /** Ignore CR0, CR4 and EFER load. */
151 bool fIgnoreCpuMode;
152 /** Ignore set page. */
153 bool fIgnoreSetPage;
154 bool bPadding1;
155
156 /** Ignore all that can be ignored. */
157 uint32_t cIgnoreAll;
158
159 /** Number of times REMR3CanExecuteRaw has been called.
160 * It is used to prevent rescheduling on the first call. */
161 uint32_t cCanExecuteRaw;
162
163 /** Pending interrupt (~0 -> nothing). */
164 uint32_t u32PendingInterrupt;
165
166 /** Number of recorded invlpg instructions. */
167 uint32_t volatile cInvalidatedPages;
168#if HC_ARCH_BITS == 32
169 uint32_t uPadding2;
170#endif
171 /** Array of recorded invlpg instruction.
172 * These instructions are replayed when entering REM. */
173 RTGCPTR aGCPtrInvalidatedPages[48];
174
175 /** Array of recorded handler noticications.
176 * These are replayed when entering REM. */
177 REMHANDLERNOTIFICATION aHandlerNotifications[64];
178 volatile uint32_t idxPendingList;
179 volatile uint32_t idxFreeList;
180
181 /** MMIO memory type.
182 * This is used to register MMIO physical access handlers. */
183 int32_t iMMIOMemType;
184 /** Handler memory type.
185 * This is used to register non-MMIO physical access handlers which are executed in HC. */
186 int32_t iHandlerMemType;
187
188 /** Pending exception */
189 uint32_t uPendingException;
190 /** Nr of pending exceptions */
191 uint32_t cPendingExceptions;
192 /** Pending exception's EIP */
193 RTGCPTR uPendingExcptEIP;
194 /** Pending exception's CR2 */
195 RTGCPTR uPendingExcptCR2;
196
197 /** The highest known RAM address. */
198 RTGCPHYS GCPhysLastRam;
199 /** Whether GCPhysLastRam has been fixed (see REMR3Init()). */
200 bool fGCPhysLastRamFixed;
201
202 /** Pending rc. */
203 int32_t rc;
204
205 /** REM critical section.
206 * This protects cpu_register_physical_memory usage
207 */
208 PDMCRITSECT CritSectRegister;
209
210 /** Time spent in QEMU. */
211 STAMPROFILEADV StatsInQEMU;
212 /** Time spent in rawmode.c. */
213 STAMPROFILEADV StatsInRAWEx;
214 /** Time spent switching state. */
215 STAMPROFILE StatsState;
216 /** Time spent switching state back. */
217 STAMPROFILE StatsStateBack;
218
219 /** Padding the CPUX86State structure to 32 byte. */
220 uint32_t abPadding[HC_ARCH_BITS == 32 ? 2 : 6];
221
222# define REM_ENV_SIZE 0xff00
223
224 /** Recompiler CPU state. */
225#ifdef REM_INCLUDE_CPU_H
226 CPUX86State Env;
227#else
228 struct FakeEnv
229 {
230 char achPadding[REM_ENV_SIZE];
231 } Env;
232#endif /* !REM_INCLUDE_CPU_H */
233} REM;
234
235/** Pointer to the REM Data. */
236typedef REM *PREM;
237
238
239#ifdef REM_INCLUDE_CPU_H
240bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
241void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
242bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
243bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
244void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
245void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
246void remR3FlushTLB(CPUState *env, bool fGlobal);
247void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
248void remR3ChangeCpuMode(CPUState *env);
249void remR3DmaRun(CPUState *env);
250void remR3TimersRun(CPUState *env);
251int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, RTGCPTR pvNextEIP);
252void remR3TrapStat(CPUState *env, uint32_t uTrap);
253void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
254void remR3RecordCall(CPUState *env);
255#endif /* REM_INCLUDE_CPU_H */
256void remR3TrapClear(PVM pVM);
257void remR3RaiseRC(PVM pVM, int rc);
258void remR3DumpLnxSyscall(PVMCPU pVCpu);
259void remR3DumpOBsdSyscall(PVMCPU pVCpu);
260
261
262/** @todo r=bird: clean up the RAWEx stats. */
263/* temporary hacks */
264#define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
265#define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
266
267
268#ifdef VBOX_WITH_STATISTICS
269
270# define STATS_EMULATE_SINGLE_INSTR 1
271# define STATS_QEMU_COMPILATION 2
272# define STATS_QEMU_RUN_EMULATED_CODE 3
273# define STATS_QEMU_TOTAL 4
274# define STATS_QEMU_RUN_TIMERS 5
275# define STATS_TLB_LOOKUP 6
276# define STATS_IRQ_HANDLING 7
277# define STATS_RAW_CHECK 8
278
279void remR3ProfileStart(int statcode);
280void remR3ProfileStop(int statcode);
281
282#else /* !VBOX_WITH_STATISTICS */
283# define remR3ProfileStart(c) do { } while (0)
284# define remR3ProfileStop(c) do { } while (0)
285#endif /* !VBOX_WITH_STATISTICS */
286
287/** @} */
288
289#endif
290
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use