VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 24730

Last change on this file since 24730 was 24730, checked in by vboxsync, 16 years ago

PDM: Implemented making device/driver/usb-device suspend and poweroff notifications asynchronous when needed. Also prepped the way for failing poweron and resume.
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1/* $Id: PDMInternal.h 24730 2009-11-17 16:51:03Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/types.h>
26#include <VBox/param.h>
27#include <VBox/cfgm.h>
28#include <VBox/stam.h>
29#include <VBox/vusb.h>
30#include <VBox/pdmasynccompletion.h>
31#include <VBox/pdmcommon.h>
32#include <iprt/assert.h>
33#include <iprt/critsect.h>
34#ifdef IN_RING3
35# include <iprt/thread.h>
36#endif
37
38RT_C_DECLS_BEGIN
39
40
41/** @defgroup grp_pdm_int Internal
42 * @ingroup grp_pdm
43 * @internal
44 * @{
45 */
46
47/** @def PDM_WITH_R3R0_CRIT_SECT
48 * Enables or disabled ring-3/ring-0 critical sections. */
49#if defined(DOXYGEN_RUNNING) || 1
50# define PDM_WITH_R3R0_CRIT_SECT
51#endif
52
53
54/*******************************************************************************
55* Structures and Typedefs *
56*******************************************************************************/
57
58/** Pointer to a PDM Device. */
59typedef struct PDMDEV *PPDMDEV;
60/** Pointer to a pointer to a PDM Device. */
61typedef PPDMDEV *PPPDMDEV;
62
63/** Pointer to a PDM USB Device. */
64typedef struct PDMUSB *PPDMUSB;
65/** Pointer to a pointer to a PDM USB Device. */
66typedef PPDMUSB *PPPDMUSB;
67
68/** Pointer to a PDM Driver. */
69typedef struct PDMDRV *PPDMDRV;
70/** Pointer to a pointer to a PDM Driver. */
71typedef PPDMDRV *PPPDMDRV;
72
73/** Pointer to a PDM Logical Unit. */
74typedef struct PDMLUN *PPDMLUN;
75/** Pointer to a pointer to a PDM Logical Unit. */
76typedef PPDMLUN *PPPDMLUN;
77
78/** Pointer to a PDM PCI Bus instance. */
79typedef struct PDMPCIBUS *PPDMPCIBUS;
80/** Pointer to a DMAC instance. */
81typedef struct PDMDMAC *PPDMDMAC;
82/** Pointer to a RTC instance. */
83typedef struct PDMRTC *PPDMRTC;
84
85/** Pointer to an USB HUB registration record. */
86typedef struct PDMUSBHUB *PPDMUSBHUB;
87
88/**
89 * Private device instance data.
90 */
91typedef struct PDMDEVINSINT
92{
93 /** Pointer to the next instance (HC Ptr).
94 * (Head is pointed to by PDM::pDevInstances.) */
95 R3PTRTYPE(PPDMDEVINS) pNextR3;
96 /** Pointer to the next per device instance (HC Ptr).
97 * (Head is pointed to by PDMDEV::pInstances.) */
98 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
99 /** Pointer to device structure - HC Ptr. */
100 R3PTRTYPE(PPDMDEV) pDevR3;
101 /** Pointer to the list of logical units associated with the device. (FIFO) */
102 R3PTRTYPE(PPDMLUN) pLunsR3;
103 /** Pointer to the asynchronous notification callback set while in
104 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
105 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
106 /** Configuration handle to the instance node. */
107 R3PTRTYPE(PCFGMNODE) pCfgHandle;
108
109 /** R3 pointer to the VM this instance was created for. */
110 PVMR3 pVMR3;
111 /** R3 pointer to associated PCI device structure. */
112 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
113 /** R3 pointer to associated PCI bus structure. */
114 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
115
116 /** R0 pointer to the VM this instance was created for. */
117 PVMR0 pVMR0;
118 /** R0 pointer to associated PCI device structure. */
119 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
120 /** R0 pointer to associated PCI bus structure. */
121 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
122
123 /** RC pointer to the VM this instance was created for. */
124 PVMRC pVMRC;
125 /** RC pointer to associated PCI device structure. */
126 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
127 /** RC pointer to associated PCI bus structure. */
128 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
129
130 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
131 uint32_t fIntFlags;
132} PDMDEVINSINT;
133
134/** @name PDMDEVINSINT::fIntFlags
135 * @{ */
136/** Used by pdmR3Load to mark device instances it found in the saved state. */
137#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
138/** Indicates that the device hasn't been powered on or resumed.
139 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
140 * to make sure each device gets exactly one notification for each of those
141 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
142 * a failure (already resumed/powered-on devices are suspended). */
143#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
144/** @} */
145
146
147/**
148 * Private USB device instance data.
149 */
150typedef struct PDMUSBINSINT
151{
152 /** The UUID of this instance. */
153 RTUUID Uuid;
154 /** Pointer to the next instance.
155 * (Head is pointed to by PDM::pUsbInstances.) */
156 R3PTRTYPE(PPDMUSBINS) pNext;
157 /** Pointer to the next per USB device instance.
158 * (Head is pointed to by PDMUSB::pInstances.) */
159 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
160
161 /** Pointer to device structure. */
162 R3PTRTYPE(PPDMUSB) pUsbDev;
163
164 /** Pointer to the VM this instance was created for. */
165 PVMR3 pVM;
166 /** Pointer to the list of logical units associated with the device. (FIFO) */
167 R3PTRTYPE(PPDMLUN) pLuns;
168 /** The per instance device configuration. */
169 R3PTRTYPE(PCFGMNODE) pCfg;
170 /** Same as pCfg if the configuration should be deleted when detaching the device. */
171 R3PTRTYPE(PCFGMNODE) pCfgDelete;
172 /** The global device configuration. */
173 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
174
175 /** Pointer to the USB hub this device is attached to.
176 * This is NULL if the device isn't connected to any HUB. */
177 R3PTRTYPE(PPDMUSBHUB) pHub;
178 /** The port number that we're connected to. */
179 uint32_t iPort;
180 /** Indicates that the driver hasn't been powered on or resumed.
181 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
182 bool fVMSuspended;
183 /** Pointer to the asynchronous notification callback set while in
184 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
185 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
186} PDMUSBINSINT;
187
188
189/**
190 * Private driver instance data.
191 */
192typedef struct PDMDRVINSINT
193{
194 /** Pointer to the driver instance above.
195 * This is NULL for the topmost drive. */
196 PPDMDRVINS pUp;
197 /** Pointer to the driver instance below.
198 * This is NULL for the bottommost driver. */
199 PPDMDRVINS pDown;
200 /** Pointer to the logical unit this driver chained on. */
201 PPDMLUN pLun;
202 /** Pointer to driver structure from which this was instantiated. */
203 PPDMDRV pDrv;
204 /** Pointer to the VM this instance was created for. */
205 PVM pVM;
206 /** Flag indicating that the driver is being detached and destroyed.
207 * (Helps detect potential recursive detaching.) */
208 bool fDetaching;
209 /** Indicates that the driver hasn't been powered on or resumed.
210 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
211 bool fVMSuspended;
212 /** Pointer to the asynchronous notification callback set while in
213 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
214 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
215 /** Configuration handle to the instance node. */
216 PCFGMNODE pCfgHandle;
217
218} PDMDRVINSINT;
219
220
221/**
222 * Private critical section data.
223 */
224typedef struct PDMCRITSECTINT
225{
226 /** The critical section core which is shared with IPRT. */
227 RTCRITSECT Core;
228 /** Pointer to the next critical section.
229 * This chain is used for relocating pVMRC and device cleanup. */
230 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
231 /** Owner identifier.
232 * This is pDevIns if the owner is a device. Similarily for a driver or service.
233 * PDMR3CritSectInit() sets this to point to the critsect itself. */
234 RTR3PTR pvKey;
235 /** Pointer to the VM - R3Ptr. */
236 PVMR3 pVMR3;
237 /** Pointer to the VM - R0Ptr. */
238 PVMR0 pVMR0;
239 /** Pointer to the VM - GCPtr. */
240 PVMRC pVMRC;
241 /** Alignment padding. */
242 uint32_t padding;
243 /** Event semaphore that is scheduled to be signaled upon leaving the
244 * critical section. This is Ring-3 only of course. */
245 RTSEMEVENT EventToSignal;
246 /** The lock name. */
247 R3PTRTYPE(const char *) pszName;
248 /** R0/RC lock contention. */
249 STAMCOUNTER StatContentionRZLock;
250 /** R0/RC unlock contention. */
251 STAMCOUNTER StatContentionRZUnlock;
252 /** R3 lock contention. */
253 STAMCOUNTER StatContentionR3;
254 /** Profiling the time the section is locked. */
255 STAMPROFILEADV StatLocked;
256} PDMCRITSECTINT;
257AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
258/** Pointer to private critical section data. */
259typedef PDMCRITSECTINT *PPDMCRITSECTINT;
260
261/** Indicates that the critical section is queued for unlock.
262 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
263#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
264
265
266/**
267 * The usual device/driver/internal/external stuff.
268 */
269typedef enum
270{
271 /** The usual invalid entry. */
272 PDMTHREADTYPE_INVALID = 0,
273 /** Device type. */
274 PDMTHREADTYPE_DEVICE,
275 /** USB Device type. */
276 PDMTHREADTYPE_USB,
277 /** Driver type. */
278 PDMTHREADTYPE_DRIVER,
279 /** Internal type. */
280 PDMTHREADTYPE_INTERNAL,
281 /** External type. */
282 PDMTHREADTYPE_EXTERNAL,
283 /** The usual 32-bit hack. */
284 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
285} PDMTHREADTYPE;
286
287
288/**
289 * The internal structure for the thread.
290 */
291typedef struct PDMTHREADINT
292{
293 /** The VM pointer. */
294 PVMR3 pVM;
295 /** The event semaphore the thread blocks on when not running. */
296 RTSEMEVENTMULTI BlockEvent;
297 /** The event semaphore the thread sleeps on while running. */
298 RTSEMEVENTMULTI SleepEvent;
299 /** Pointer to the next thread. */
300 R3PTRTYPE(struct PDMTHREAD *) pNext;
301 /** The thread type. */
302 PDMTHREADTYPE enmType;
303} PDMTHREADINT;
304
305
306
307/* Must be included after PDMDEVINSINT is defined. */
308#define PDMDEVINSINT_DECLARED
309#define PDMUSBINSINT_DECLARED
310#define PDMDRVINSINT_DECLARED
311#define PDMCRITSECTINT_DECLARED
312#define PDMTHREADINT_DECLARED
313#ifdef ___VBox_pdm_h
314# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
315#endif
316RT_C_DECLS_END
317#include <VBox/pdm.h>
318RT_C_DECLS_BEGIN
319
320/**
321 * PDM Logical Unit.
322 *
323 * This typically the representation of a physical port on a
324 * device, like for instance the PS/2 keyboard port on the
325 * keyboard controller device. The LUNs are chained on the
326 * device the belong to (PDMDEVINSINT::pLunsR3).
327 */
328typedef struct PDMLUN
329{
330 /** The LUN - The Logical Unit Number. */
331 RTUINT iLun;
332 /** Pointer to the next LUN. */
333 PPDMLUN pNext;
334 /** Pointer to the top driver in the driver chain. */
335 PPDMDRVINS pTop;
336 /** Pointer to the bottom driver in the driver chain. */
337 PPDMDRVINS pBottom;
338 /** Pointer to the device instance which the LUN belongs to.
339 * Either this is set or pUsbIns is set. Both is never set at the same time. */
340 PPDMDEVINS pDevIns;
341 /** Pointer to the USB device instance which the LUN belongs to. */
342 PPDMUSBINS pUsbIns;
343 /** Pointer to the device base interface. */
344 PPDMIBASE pBase;
345 /** Description of this LUN. */
346 const char *pszDesc;
347} PDMLUN;
348
349
350/**
351 * PDM Device.
352 */
353typedef struct PDMDEV
354{
355 /** Pointer to the next device (R3 Ptr). */
356 R3PTRTYPE(PPDMDEV) pNext;
357 /** Device name length. (search optimization) */
358 RTUINT cchName;
359 /** Registration structure. */
360 R3PTRTYPE(const struct PDMDEVREG *) pDevReg;
361 /** Number of instances. */
362 RTUINT cInstances;
363 /** Pointer to chain of instances (R3 Ptr). */
364 PPDMDEVINSR3 pInstances;
365} PDMDEV;
366
367
368/**
369 * PDM USB Device.
370 */
371typedef struct PDMUSB
372{
373 /** Pointer to the next device (R3 Ptr). */
374 R3PTRTYPE(PPDMUSB) pNext;
375 /** Device name length. (search optimization) */
376 RTUINT cchName;
377 /** Registration structure. */
378 R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;
379 /** Next instance number. */
380 RTUINT iNextInstance;
381 /** Pointer to chain of instances (R3 Ptr). */
382 R3PTRTYPE(PPDMUSBINS) pInstances;
383} PDMUSB;
384
385
386/**
387 * PDM Driver.
388 */
389typedef struct PDMDRV
390{
391 /** Pointer to the next device. */
392 PPDMDRV pNext;
393 /** Registration structure. */
394 const struct PDMDRVREG * pDrvReg;
395 /** Number of instances. */
396 RTUINT cInstances;
397} PDMDRV;
398
399
400/**
401 * PDM registered PIC device.
402 */
403typedef struct PDMPIC
404{
405 /** Pointer to the PIC device instance - R3. */
406 PPDMDEVINSR3 pDevInsR3;
407 /** @copydoc PDMPICREG::pfnSetIrqR3 */
408 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
409 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
410 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
411
412 /** Pointer to the PIC device instance - R0. */
413 PPDMDEVINSR0 pDevInsR0;
414 /** @copydoc PDMPICREG::pfnSetIrqR3 */
415 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
416 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
417 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
418
419 /** Pointer to the PIC device instance - RC. */
420 PPDMDEVINSRC pDevInsRC;
421 /** @copydoc PDMPICREG::pfnSetIrqR3 */
422 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
423 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
424 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
425 /** Alignment padding. */
426 RTRCPTR RCPtrPadding;
427} PDMPIC;
428
429
430/**
431 * PDM registered APIC device.
432 */
433typedef struct PDMAPIC
434{
435 /** Pointer to the APIC device instance - R3 Ptr. */
436 PPDMDEVINSR3 pDevInsR3;
437 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
438 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
439 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
440 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
441 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
442 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
443 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
444 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
445 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
446 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
447 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
448 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
449 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
450 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
451 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
452 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
453 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
454 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
456 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
457 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
458
459 /** Pointer to the APIC device instance - R0 Ptr. */
460 PPDMDEVINSR0 pDevInsR0;
461 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
462 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
463 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
464 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
465 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
466 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
467 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
468 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
469 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
470 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
471 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
472 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
473 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
474 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
475 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
476 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
477 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
478 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
479 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
480 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
481 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
482
483 /** Pointer to the APIC device instance - RC Ptr. */
484 PPDMDEVINSRC pDevInsRC;
485 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
486 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
487 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
488 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
489 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
490 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
491 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
492 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
493 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
494 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
495 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
496 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
497 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
498 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
499 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
500 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
501 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
502 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
503 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
504 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
505 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
506 RTRCPTR RCPtrAlignment;
507
508} PDMAPIC;
509
510
511/**
512 * PDM registered I/O APIC device.
513 */
514typedef struct PDMIOAPIC
515{
516 /** Pointer to the APIC device instance - R3 Ptr. */
517 PPDMDEVINSR3 pDevInsR3;
518 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
519 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
520
521 /** Pointer to the PIC device instance - R0. */
522 PPDMDEVINSR0 pDevInsR0;
523 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
524 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
525
526 /** Pointer to the APIC device instance - RC Ptr. */
527 PPDMDEVINSRC pDevInsRC;
528 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
529 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
530} PDMIOAPIC;
531
532/** Maximum number of PCI busses for a VM. */
533#define PDM_PCI_BUSSES_MAX 8
534
535/**
536 * PDM PCI Bus instance.
537 */
538typedef struct PDMPCIBUS
539{
540 /** PCI bus number. */
541 RTUINT iBus;
542 RTUINT uPadding0; /**< Alignment padding.*/
543
544 /** Pointer to PCI Bus device instance. */
545 PPDMDEVINSR3 pDevInsR3;
546 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
547 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
548 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
549 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
550 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
551 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
552 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
553 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
554 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
555 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
556 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
557 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
558 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
559 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
560 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
561 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
562
563 /** Pointer to the PIC device instance - R0. */
564 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
565 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
566 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
567
568 /** Pointer to PCI Bus device instance. */
569 PPDMDEVINSRC pDevInsRC;
570 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
571 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
572} PDMPCIBUS;
573
574
575#ifdef IN_RING3
576/**
577 * PDM registered DMAC (DMA Controller) device.
578 */
579typedef struct PDMDMAC
580{
581 /** Pointer to the DMAC device instance. */
582 PPDMDEVINSR3 pDevIns;
583 /** Copy of the registration structure. */
584 PDMDMACREG Reg;
585} PDMDMAC;
586
587
588/**
589 * PDM registered RTC (Real Time Clock) device.
590 */
591typedef struct PDMRTC
592{
593 /** Pointer to the RTC device instance. */
594 PPDMDEVINSR3 pDevIns;
595 /** Copy of the registration structure. */
596 PDMRTCREG Reg;
597} PDMRTC;
598
599#endif /* IN_RING3 */
600
601/**
602 * Module type.
603 */
604typedef enum PDMMODTYPE
605{
606 /** Raw-mode (RC) context module. */
607 PDMMOD_TYPE_RC,
608 /** Ring-0 (host) context module. */
609 PDMMOD_TYPE_R0,
610 /** Ring-3 (host) context module. */
611 PDMMOD_TYPE_R3
612} PDMMODTYPE;
613
614
615/** The module name length including the terminator. */
616#define PDMMOD_NAME_LEN 32
617
618/**
619 * Loaded module instance.
620 */
621typedef struct PDMMOD
622{
623 /** Module name. This is used for refering to
624 * the module internally, sort of like a handle. */
625 char szName[PDMMOD_NAME_LEN];
626 /** Module type. */
627 PDMMODTYPE eType;
628 /** Loader module handle. Not used for R0 modules. */
629 RTLDRMOD hLdrMod;
630 /** Loaded address.
631 * This is the 'handle' for R0 modules. */
632 RTUINTPTR ImageBase;
633 /** Old loaded address.
634 * This is used during relocation of GC modules. Not used for R0 modules. */
635 RTUINTPTR OldImageBase;
636 /** Where the R3 HC bits are stored.
637 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
638 void *pvBits;
639
640 /** Pointer to next module. */
641 struct PDMMOD *pNext;
642 /** Module filename. */
643 char szFilename[1];
644} PDMMOD;
645/** Pointer to loaded module instance. */
646typedef PDMMOD *PPDMMOD;
647
648
649
650/** Extra space in the free array. */
651#define PDMQUEUE_FREE_SLACK 16
652
653/**
654 * Queue type.
655 */
656typedef enum PDMQUEUETYPE
657{
658 /** Device consumer. */
659 PDMQUEUETYPE_DEV = 1,
660 /** Driver consumer. */
661 PDMQUEUETYPE_DRV,
662 /** Internal consumer. */
663 PDMQUEUETYPE_INTERNAL,
664 /** External consumer. */
665 PDMQUEUETYPE_EXTERNAL
666} PDMQUEUETYPE;
667
668/** Pointer to a PDM Queue. */
669typedef struct PDMQUEUE *PPDMQUEUE;
670
671/**
672 * PDM Queue.
673 */
674typedef struct PDMQUEUE
675{
676 /** Pointer to the next queue in the list. */
677 R3PTRTYPE(PPDMQUEUE) pNext;
678 /** Type specific data. */
679 union
680 {
681 /** PDMQUEUETYPE_DEV */
682 struct
683 {
684 /** Pointer to consumer function. */
685 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
686 /** Pointer to the device instance owning the queue. */
687 R3PTRTYPE(PPDMDEVINS) pDevIns;
688 } Dev;
689 /** PDMQUEUETYPE_DRV */
690 struct
691 {
692 /** Pointer to consumer function. */
693 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
694 /** Pointer to the driver instance owning the queue. */
695 R3PTRTYPE(PPDMDRVINS) pDrvIns;
696 } Drv;
697 /** PDMQUEUETYPE_INTERNAL */
698 struct
699 {
700 /** Pointer to consumer function. */
701 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
702 } Int;
703 /** PDMQUEUETYPE_EXTERNAL */
704 struct
705 {
706 /** Pointer to consumer function. */
707 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
708 /** Pointer to user argument. */
709 R3PTRTYPE(void *) pvUser;
710 } Ext;
711 } u;
712 /** Queue type. */
713 PDMQUEUETYPE enmType;
714 /** The interval between checking the queue for events.
715 * The realtime timer below is used to do the waiting.
716 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
717 uint32_t cMilliesInterval;
718 /** Interval timer. Only used if cMilliesInterval is non-zero. */
719 PTMTIMERR3 pTimer;
720 /** Pointer to the VM - R3. */
721 PVMR3 pVMR3;
722 /** LIFO of pending items - R3. */
723 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
724 /** Pointer to the VM - R0. */
725 PVMR0 pVMR0;
726 /** LIFO of pending items - R0. */
727 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
728 /** Pointer to the GC VM and indicator for GC enabled queue.
729 * If this is NULL, the queue cannot be used in GC.
730 */
731 PVMRC pVMRC;
732 /** LIFO of pending items - GC. */
733 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
734
735 /** Item size (bytes). */
736 uint32_t cbItem;
737 /** Number of items in the queue. */
738 uint32_t cItems;
739 /** Index to the free head (where we insert). */
740 uint32_t volatile iFreeHead;
741 /** Index to the free tail (where we remove). */
742 uint32_t volatile iFreeTail;
743
744 /** Unqiue queue name. */
745 R3PTRTYPE(const char *) pszName;
746#if HC_ARCH_BITS == 32
747 RTR3PTR Alignment1;
748#endif
749 /** Stat: Times PDMQueueAlloc fails. */
750 STAMCOUNTER StatAllocFailures;
751 /** Stat: PDMQueueInsert calls. */
752 STAMCOUNTER StatInsert;
753 /** Stat: Queue flushes. */
754 STAMCOUNTER StatFlush;
755 /** Stat: Queue flushes with pending items left over. */
756 STAMCOUNTER StatFlushLeftovers;
757#ifdef VBOX_WITH_STATISTICS
758 /** State: Profiling the flushing. */
759 STAMPROFILE StatFlushPrf;
760 /** State: Pending items. */
761 uint32_t volatile cStatPending;
762 uint32_t volatile cAlignment;
763#endif
764
765 /** Array of pointers to free items. Variable size. */
766 struct PDMQUEUEFREEITEM
767 {
768 /** Pointer to the free item - HC Ptr. */
769 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
770 /** Pointer to the free item - HC Ptr. */
771 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
772 /** Pointer to the free item - GC Ptr. */
773 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
774#if HC_ARCH_BITS == 64
775 RTRCPTR Alignment0;
776#endif
777 } aFreeItems[1];
778} PDMQUEUE;
779
780/** @name PDM::fQueueFlushing
781 * @{ */
782/** Indicating that an queue insert has been performed. */
783#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
784/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
785#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
786/** Indicating there are pending items.
787 * This is make sure we don't miss inserts happening during flushing. The FF
788 * cannot be used for this since it has to be cleared immediately to prevent
789 * other EMTs from spinning. */
790#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
791/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
792#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
793/** }@ */
794
795
796/**
797 * Queue device helper task operation.
798 */
799typedef enum PDMDEVHLPTASKOP
800{
801 /** The usual invalid 0 entry. */
802 PDMDEVHLPTASKOP_INVALID = 0,
803 /** ISASetIrq */
804 PDMDEVHLPTASKOP_ISA_SET_IRQ,
805 /** PCISetIrq */
806 PDMDEVHLPTASKOP_PCI_SET_IRQ,
807 /** PCISetIrq */
808 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
809 /** The usual 32-bit hack. */
810 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
811} PDMDEVHLPTASKOP;
812
813/**
814 * Queued Device Helper Task.
815 */
816typedef struct PDMDEVHLPTASK
817{
818 /** The queue item core (don't touch). */
819 PDMQUEUEITEMCORE Core;
820 /** Pointer to the device instance (R3 Ptr). */
821 PPDMDEVINSR3 pDevInsR3;
822 /** This operation to perform. */
823 PDMDEVHLPTASKOP enmOp;
824#if HC_ARCH_BITS == 64
825 uint32_t Alignment0;
826#endif
827 /** Parameters to the operation. */
828 union PDMDEVHLPTASKPARAMS
829 {
830 /**
831 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
832 */
833 struct PDMDEVHLPTASKSETIRQ
834 {
835 /** The IRQ */
836 int iIrq;
837 /** The new level. */
838 int iLevel;
839 } SetIRQ;
840 } u;
841} PDMDEVHLPTASK;
842/** Pointer to a queued Device Helper Task. */
843typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
844/** Pointer to a const queued Device Helper Task. */
845typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
846
847
848
849/**
850 * An USB hub registration record.
851 */
852typedef struct PDMUSBHUB
853{
854 /** The USB versions this hub support.
855 * Note that 1.1 hubs can take on 2.0 devices. */
856 uint32_t fVersions;
857 /** The number of ports on the hub. */
858 uint32_t cPorts;
859 /** The number of available ports (0..cPorts). */
860 uint32_t cAvailablePorts;
861 /** The driver instance of the hub. */
862 PPDMDRVINS pDrvIns;
863 /** Copy of the to the registration structure. */
864 PDMUSBHUBREG Reg;
865
866 /** Pointer to the next hub in the list. */
867 struct PDMUSBHUB *pNext;
868} PDMUSBHUB;
869
870/** Pointer to a const USB HUB registration record. */
871typedef const PDMUSBHUB *PCPDMUSBHUB;
872
873/** Pointer to a PDM Async I/O template. */
874typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
875
876/** Pointer to the main PDM Async completion endpoint class. */
877typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
878
879
880/**
881 * PDM VMCPU Instance data.
882 * Changes to this must checked against the padding of the cfgm union in VMCPU!
883 */
884typedef struct PDMCPU
885{
886 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
887 uint32_t cQueuedCritSectLeaves;
888 uint32_t uPadding0; /**< Alignment padding.*/
889 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
890 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
891 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
892} PDMCPU;
893
894/**
895 * Converts a PDM pointer into a VM pointer.
896 * @returns Pointer to the VM structure the PDM is part of.
897 * @param pPDM Pointer to PDM instance data.
898 */
899#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
900
901
902/**
903 * PDM VM Instance data.
904 * Changes to this must checked against the padding of the cfgm union in VM!
905 */
906typedef struct PDM
907{
908 /** Offset to the VM structure.
909 * See PDM2VM(). */
910 RTUINT offVM;
911 RTUINT uPadding0; /**< Alignment padding.*/
912
913 /** List of registered devices. (FIFO) */
914 R3PTRTYPE(PPDMDEV) pDevs;
915 /** List of devices instances. (FIFO) */
916 R3PTRTYPE(PPDMDEVINS) pDevInstances;
917 /** List of registered USB devices. (FIFO) */
918 R3PTRTYPE(PPDMUSB) pUsbDevs;
919 /** List of USB devices instances. (FIFO) */
920 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
921 /** List of registered drivers. (FIFO) */
922 R3PTRTYPE(PPDMDRV) pDrvs;
923 /** List of initialized critical sections. (LIFO) */
924 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
925 /** PCI Buses. */
926 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
927 /** The register PIC device. */
928 PDMPIC Pic;
929 /** The registerd APIC device. */
930 PDMAPIC Apic;
931 /** The registerd I/O APIC device. */
932 PDMIOAPIC IoApic;
933 /** The registered DMAC device. */
934 R3PTRTYPE(PPDMDMAC) pDmac;
935 /** The registered RTC device. */
936 R3PTRTYPE(PPDMRTC) pRtc;
937 /** The registered USB HUBs. (FIFO) */
938 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
939
940 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
941 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
942 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
943 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
944 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
945 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
946 RTRCPTR uPadding1; /**< Alignment padding. */
947
948 /** Linked list of timer driven PDM queues. */
949 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
950 /** Linked list of force action driven PDM queues. */
951 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
952 /** Pointer to the queue which should be manually flushed - R0 Ptr.
953 * Only touched by EMT. */
954 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
955 /** Pointer to the queue which should be manually flushed - RC Ptr.
956 * Only touched by EMT. */
957 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
958 /** Bitmask controlling the queue flushing.
959 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
960 uint32_t volatile fQueueFlushing;
961
962 /** Head of the PDM Thread list. (singly linked) */
963 R3PTRTYPE(PPDMTHREAD) pThreads;
964 /** Tail of the PDM Thread list. (singly linked) */
965 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
966
967 /** @name PDM Async Completion
968 * @{ */
969 /** Pointer to the array of supported endpoint classes. */
970 R3PTRTYPE(PPDMASYNCCOMPLETIONEPCLASS *) papAsyncCompletionEndpointClass;
971 /** Head of the templates. (singly linked) */
972 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
973 /** @} */
974
975 /** @name VMM device heap
976 * @{ */
977 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
978 RTR3PTR pvVMMDevHeap;
979#if HC_ARCH_BITS == 32
980 /** Alignment padding. */
981 uint32_t u32Padding2;
982#endif
983 /** The heap size. */
984 RTUINT cbVMMDevHeap;
985 /** Free space. */
986 RTUINT cbVMMDevHeapLeft;
987 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
988 RTGCPHYS GCPhysVMMDevHeap;
989 /** @} */
990
991 /** The PDM lock.
992 * This is used to protect everything that deals with interrupts, i.e.
993 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
994 PDMCRITSECT CritSect;
995 /** The PDM miscellancous lock.
996 * This is used to protect things like critsect init/delete that formerly was
997 * serialized by there only being one EMT.
998 */
999 RTCRITSECT MiscCritSect;
1000
1001 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1002 STAMCOUNTER StatQueuedCritSectLeaves;
1003} PDM;
1004AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1005AssertCompileMemberAlignment(PDM, CritSect, 8);
1006AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1007/** Pointer to PDM VM instance data. */
1008typedef PDM *PPDM;
1009
1010
1011/**
1012 * PDM data kept in the UVM.
1013 */
1014typedef struct PDMUSERPERVM
1015{
1016 /** Pointer to list of loaded modules. */
1017 PPDMMOD pModules;
1018 /** @todo move more stuff over here. */
1019} PDMUSERPERVM;
1020/** Pointer to the PDM data kept in the UVM. */
1021typedef PDMUSERPERVM *PPDMUSERPERVM;
1022
1023
1024
1025/*******************************************************************************
1026* Global Variables *
1027*******************************************************************************/
1028#ifdef IN_RING3
1029extern const PDMDRVHLP g_pdmR3DrvHlp;
1030extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1031extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1032extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1033extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1034extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1035extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1036extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1037extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1038#endif
1039
1040
1041/*******************************************************************************
1042* Defined Constants And Macros *
1043*******************************************************************************/
1044/** @def PDMDEV_ASSERT_DEVINS
1045 * Asserts the validity of the device instance.
1046 */
1047#ifdef VBOX_STRICT
1048# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1049 do { \
1050 AssertPtr(pDevIns); \
1051 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1052 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1053 } while (0)
1054#else
1055# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1056#endif
1057
1058
1059/*******************************************************************************
1060* Internal Functions *
1061*******************************************************************************/
1062#ifdef IN_RING3
1063int pdmR3CritSectInit(PVM pVM);
1064int pdmR3CritSectTerm(PVM pVM);
1065void pdmR3CritSectRelocate(PVM pVM);
1066int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
1067int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1068
1069int pdmR3DevInit(PVM pVM);
1070PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1071int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1072DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1073
1074int pdmR3UsbLoadModules(PVM pVM);
1075int pdmR3UsbInstantiateDevices(PVM pVM);
1076PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1077int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1078int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1079int pdmR3UsbVMInitComplete(PVM pVM);
1080
1081int pdmR3DrvInit(PVM pVM);
1082int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1083void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1084PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1085
1086int pdmR3LdrInitU(PUVM pUVM);
1087void pdmR3LdrTermU(PUVM pUVM);
1088char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1089int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1090
1091void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1092
1093int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1094 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1095int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1096 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1097int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1098 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1099int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1100int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1101int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1102void pdmR3ThreadDestroyAll(PVM pVM);
1103int pdmR3ThreadResumeAll(PVM pVM);
1104int pdmR3ThreadSuspendAll(PVM pVM);
1105
1106#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1107int pdmR3AsyncCompletionInit(PVM pVM);
1108int pdmR3AsyncCompletionTerm(PVM pVM);
1109#endif
1110
1111#endif /* IN_RING3 */
1112
1113void pdmLock(PVM pVM);
1114int pdmLockEx(PVM pVM, int rc);
1115void pdmUnlock(PVM pVM);
1116
1117/** @} */
1118
1119RT_C_DECLS_END
1120
1121#endif
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