VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 24912

Last change on this file since 24912 was 24744, checked in by vboxsync, 15 years ago

PDM: Async reset notification handling as well.
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File size: 141.1 KB
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1/* $Id: PDMDevHlp.cpp 24744 2009-11-17 22:33:38Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50 * Define this to enable the deadlock detection when accessing physical memory.
51 */
52#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
53# define PDM_DEVHLP_DEADLOCK_DETECTION
54#endif
55
56
57/*******************************************************************************
58* Defined Constants And Macros *
59*******************************************************************************/
60/** @name R3 DevHlp
61 * @{
62 */
63
64
65/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74#if 0 /** @todo needs a real string cache for this */
75 if (pDevIns->iInstance > 0)
76 {
77 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78 if (pszDesc2)
79 pszDesc = pszDesc2;
80 }
81#endif
82
83 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86 return rc;
87}
88
89
90/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
91static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92 const char *pszOut, const char *pszIn,
93 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100 /*
101 * Resolve the functions (one of the can be NULL).
102 */
103 int rc = VINF_SUCCESS;
104 if ( pDevIns->pDevReg->szRCMod[0]
105 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106 {
107 RTRCPTR RCPtrIn = NIL_RTRCPTR;
108 if (pszIn)
109 {
110 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112 }
113 RTRCPTR RCPtrOut = NIL_RTRCPTR;
114 if (pszOut && RT_SUCCESS(rc))
115 {
116 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118 }
119 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120 if (pszInStr && RT_SUCCESS(rc))
121 {
122 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124 }
125 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126 if (pszOutStr && RT_SUCCESS(rc))
127 {
128 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130 }
131
132 if (RT_SUCCESS(rc))
133 {
134#if 0 /** @todo needs a real string cache for this */
135 if (pDevIns->iInstance > 0)
136 {
137 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138 if (pszDesc2)
139 pszDesc = pszDesc2;
140 }
141#endif
142
143 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144 }
145 }
146 else
147 {
148 AssertMsgFailed(("No GC module for this driver!\n"));
149 rc = VERR_INVALID_PARAMETER;
150 }
151
152 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153 return rc;
154}
155
156
157/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
158static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159 const char *pszOut, const char *pszIn,
160 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
161{
162 PDMDEV_ASSERT_DEVINS(pDevIns);
163 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167 /*
168 * Resolve the functions (one of the can be NULL).
169 */
170 int rc = VINF_SUCCESS;
171 if ( pDevIns->pDevReg->szR0Mod[0]
172 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173 {
174 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175 if (pszIn)
176 {
177 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179 }
180 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181 if (pszOut && RT_SUCCESS(rc))
182 {
183 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185 }
186 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187 if (pszInStr && RT_SUCCESS(rc))
188 {
189 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191 }
192 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193 if (pszOutStr && RT_SUCCESS(rc))
194 {
195 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197 }
198
199 if (RT_SUCCESS(rc))
200 {
201#if 0 /** @todo needs a real string cache for this */
202 if (pDevIns->iInstance > 0)
203 {
204 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205 if (pszDesc2)
206 pszDesc = pszDesc2;
207 }
208#endif
209
210 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211 }
212 }
213 else
214 {
215 AssertMsgFailed(("No R0 module for this driver!\n"));
216 rc = VERR_INVALID_PARAMETER;
217 }
218
219 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220 return rc;
221}
222
223
224/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
225static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230 Port, cPorts));
231
232 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235 return rc;
236}
237
238
239/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
240static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242 const char *pszDesc)
243{
244 PDMDEV_ASSERT_DEVINS(pDevIns);
245 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253 return rc;
254}
255
256
257/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
258static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259 const char *pszWrite, const char *pszRead, const char *pszFill,
260 const char *pszDesc)
261{
262 PDMDEV_ASSERT_DEVINS(pDevIns);
263 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267/** @todo pszDesc is unused here, drop it. */
268
269 /*
270 * Resolve the functions.
271 * Not all function have to present, leave it to IOM to enforce this.
272 */
273 int rc = VINF_SUCCESS;
274 if ( pDevIns->pDevReg->szRCMod[0]
275 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276 {
277 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278 if (pszWrite)
279 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281 RTRCPTR RCPtrRead = NIL_RTRCPTR;
282 int rc2 = VINF_SUCCESS;
283 if (pszRead)
284 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286 RTRCPTR RCPtrFill = NIL_RTRCPTR;
287 int rc3 = VINF_SUCCESS;
288 if (pszFill)
289 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293 else
294 {
295 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299 rc = rc2;
300 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301 rc = rc3;
302 }
303 }
304 else
305 {
306 AssertMsgFailed(("No GC module for this driver!\n"));
307 rc = VERR_INVALID_PARAMETER;
308 }
309
310 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311 return rc;
312}
313
314/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
315static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316 const char *pszWrite, const char *pszRead, const char *pszFill,
317 const char *pszDesc)
318{
319 PDMDEV_ASSERT_DEVINS(pDevIns);
320 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324/** @todo pszDesc is unused here, remove it. */
325
326 /*
327 * Resolve the functions.
328 * Not all function have to present, leave it to IOM to enforce this.
329 */
330 int rc = VINF_SUCCESS;
331 if ( pDevIns->pDevReg->szR0Mod[0]
332 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333 {
334 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335 if (pszWrite)
336 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338 int rc2 = VINF_SUCCESS;
339 if (pszRead)
340 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342 int rc3 = VINF_SUCCESS;
343 if (pszFill)
344 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347 else
348 {
349 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353 rc = rc2;
354 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355 rc = rc3;
356 }
357 }
358 else
359 {
360 AssertMsgFailed(("No R0 module for this driver!\n"));
361 rc = VERR_INVALID_PARAMETER;
362 }
363
364 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365 return rc;
366}
367
368
369/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
370static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371{
372 PDMDEV_ASSERT_DEVINS(pDevIns);
373 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380 return rc;
381}
382
383
384/** @copydoc PDMDEVHLPR3::pfnROMRegister */
385static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
386{
387 PDMDEV_ASSERT_DEVINS(pDevIns);
388 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
389 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
390 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
391
392/** @todo can we mangle pszDesc? */
393 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
394
395 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396 return rc;
397}
398
399
400/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
401static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
402 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
403 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
404 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
405{
406 PDMDEV_ASSERT_DEVINS(pDevIns);
407 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
408 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
409 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
410 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
411 pfnLivePrep, pfnLiveExec, pfnLiveVote,
412 pfnSavePrep, pfnSaveExec, pfnSaveDone,
413 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
414
415 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
416 uVersion, cbGuess, pszBefore,
417 pfnLivePrep, pfnLiveExec, pfnLiveVote,
418 pfnSavePrep, pfnSaveExec, pfnSaveDone,
419 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
420
421 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
422 return rc;
423}
424
425
426/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
427static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
428{
429 PDMDEV_ASSERT_DEVINS(pDevIns);
430 PVM pVM = pDevIns->Internal.s.pVMR3;
431 VM_ASSERT_EMT(pVM);
432 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
433 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
434
435 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
436 {
437 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
438 if (pszDesc2)
439 pszDesc = pszDesc2;
440 }
441
442 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
443
444 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
445 return rc;
446}
447
448
449/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
450static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
451{
452 PDMDEV_ASSERT_DEVINS(pDevIns);
453 PVM pVM = pDevIns->Internal.s.pVMR3;
454 VM_ASSERT_EMT(pVM);
455 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
456 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
457
458 /*
459 * Validate input.
460 */
461 if (!pPciDev)
462 {
463 Assert(pPciDev);
464 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
465 return VERR_INVALID_PARAMETER;
466 }
467 if (!pPciDev->config[0] && !pPciDev->config[1])
468 {
469 Assert(pPciDev->config[0] || pPciDev->config[1]);
470 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
471 return VERR_INVALID_PARAMETER;
472 }
473 if (pDevIns->Internal.s.pPciDeviceR3)
474 {
475 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
476 * support a PDM device with multiple PCI devices. This might become a problem
477 * when upgrading the chipset for instance because of multiple functions in some
478 * devices...
479 */
480 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
481 return VERR_INTERNAL_ERROR;
482 }
483
484 /*
485 * Choose the PCI bus for the device.
486 *
487 * This is simple. If the device was configured for a particular bus, the PCIBusNo
488 * configuration value will be set. If not the default bus is 0.
489 */
490 int rc;
491 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
492 if (!pBus)
493 {
494 uint8_t u8Bus;
495 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
496 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
497 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
498 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
499 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
500 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
501 VERR_PDM_NO_PCI_BUS);
502 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
503 }
504 if (pBus->pDevInsR3)
505 {
506 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
507 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
508 else
509 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
510
511 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
512 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
513 else
514 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
515
516 /*
517 * Check the configuration for PCI device and function assignment.
518 */
519 int iDev = -1;
520 uint8_t u8Device;
521 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
522 if (RT_SUCCESS(rc))
523 {
524 if (u8Device > 31)
525 {
526 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
527 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
528 return VERR_INTERNAL_ERROR;
529 }
530
531 uint8_t u8Function;
532 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
533 if (RT_FAILURE(rc))
534 {
535 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
536 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
537 return rc;
538 }
539 if (u8Function > 7)
540 {
541 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
542 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
543 return VERR_INTERNAL_ERROR;
544 }
545 iDev = (u8Device << 3) | u8Function;
546 }
547 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
548 {
549 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
550 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
551 return rc;
552 }
553
554 /*
555 * Call the pci bus device to do the actual registration.
556 */
557 pdmLock(pVM);
558 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
559 pdmUnlock(pVM);
560 if (RT_SUCCESS(rc))
561 {
562 pPciDev->pDevIns = pDevIns;
563
564 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
565 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
566 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
567 else
568 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
569
570 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
571 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
572 else
573 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
574
575 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
576 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
577 }
578 }
579 else
580 {
581 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
582 rc = VERR_PDM_NO_PCI_BUS;
583 }
584
585 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
586 return rc;
587}
588
589
590/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
591static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
592{
593 PDMDEV_ASSERT_DEVINS(pDevIns);
594 PVM pVM = pDevIns->Internal.s.pVMR3;
595 VM_ASSERT_EMT(pVM);
596 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
597 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
598
599 /*
600 * Validate input.
601 */
602 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
603 {
604 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
605 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
606 return VERR_INVALID_PARAMETER;
607 }
608 switch (enmType)
609 {
610 case PCI_ADDRESS_SPACE_IO:
611 /*
612 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
613 */
614 AssertMsgReturn(cbRegion <= _32K,
615 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
616 VERR_INVALID_PARAMETER);
617 break;
618
619 case PCI_ADDRESS_SPACE_MEM:
620 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
621 /*
622 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
623 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
624 */
625 AssertMsgReturn(cbRegion <= 512 * _1M,
626 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
627 VERR_INVALID_PARAMETER);
628 break;
629 default:
630 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
631 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
632 return VERR_INVALID_PARAMETER;
633 }
634 if (!pfnCallback)
635 {
636 Assert(pfnCallback);
637 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
638 return VERR_INVALID_PARAMETER;
639 }
640 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
641
642 /*
643 * Must have a PCI device registered!
644 */
645 int rc;
646 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
647 if (pPciDev)
648 {
649 /*
650 * We're currently restricted to page aligned MMIO regions.
651 */
652 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
653 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
654 {
655 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
656 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
657 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
658 }
659
660 /*
661 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
662 */
663 int iLastSet = ASMBitLastSetU32(cbRegion);
664 Assert(iLastSet > 0);
665 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
666 if (cbRegion > cbRegionAligned)
667 cbRegion = cbRegionAligned * 2; /* round up */
668
669 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670 Assert(pBus);
671 pdmLock(pVM);
672 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
673 pdmUnlock(pVM);
674 }
675 else
676 {
677 AssertMsgFailed(("No PCI device registered!\n"));
678 rc = VERR_PDM_NOT_PCI_DEVICE;
679 }
680
681 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
682 return rc;
683}
684
685
686/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
687static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
688 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
689{
690 PDMDEV_ASSERT_DEVINS(pDevIns);
691 PVM pVM = pDevIns->Internal.s.pVMR3;
692 VM_ASSERT_EMT(pVM);
693 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
694 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
695
696 /*
697 * Validate input and resolve defaults.
698 */
699 AssertPtr(pfnRead);
700 AssertPtr(pfnWrite);
701 AssertPtrNull(ppfnReadOld);
702 AssertPtrNull(ppfnWriteOld);
703 AssertPtrNull(pPciDev);
704
705 if (!pPciDev)
706 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
707 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
708 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
709 AssertRelease(pBus);
710 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
711
712 /*
713 * Do the job.
714 */
715 pdmLock(pVM);
716 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
717 pdmUnlock(pVM);
718
719 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
720}
721
722
723/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
724static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
725{
726 PDMDEV_ASSERT_DEVINS(pDevIns);
727 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
728
729 /*
730 * Validate input.
731 */
732 /** @todo iIrq and iLevel checks. */
733
734 /*
735 * Must have a PCI device registered!
736 */
737 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
738 if (pPciDev)
739 {
740 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
741 Assert(pBus);
742 PVM pVM = pDevIns->Internal.s.pVMR3;
743 pdmLock(pVM);
744 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
745 pdmUnlock(pVM);
746 }
747 else
748 AssertReleaseMsgFailed(("No PCI device registered!\n"));
749
750 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
751}
752
753
754/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
755static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
756{
757 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
758}
759
760
761/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
762static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
763{
764 PDMDEV_ASSERT_DEVINS(pDevIns);
765 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
766
767 /*
768 * Validate input.
769 */
770 /** @todo iIrq and iLevel checks. */
771
772 PVM pVM = pDevIns->Internal.s.pVMR3;
773 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
774
775 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
776}
777
778
779/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
780static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
781{
782 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
783}
784
785
786/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
787static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
788{
789 PDMDEV_ASSERT_DEVINS(pDevIns);
790 PVM pVM = pDevIns->Internal.s.pVMR3;
791 VM_ASSERT_EMT(pVM);
792 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
793 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
794
795 /*
796 * Lookup the LUN, it might already be registered.
797 */
798 PPDMLUN pLunPrev = NULL;
799 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
800 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
801 if (pLun->iLun == iLun)
802 break;
803
804 /*
805 * Create the LUN if if wasn't found, else check if driver is already attached to it.
806 */
807 if (!pLun)
808 {
809 if ( !pBaseInterface
810 || !pszDesc
811 || !*pszDesc)
812 {
813 Assert(pBaseInterface);
814 Assert(pszDesc || *pszDesc);
815 return VERR_INVALID_PARAMETER;
816 }
817
818 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
819 if (!pLun)
820 return VERR_NO_MEMORY;
821
822 pLun->iLun = iLun;
823 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
824 pLun->pTop = NULL;
825 pLun->pBottom = NULL;
826 pLun->pDevIns = pDevIns;
827 pLun->pszDesc = pszDesc;
828 pLun->pBase = pBaseInterface;
829 if (!pLunPrev)
830 pDevIns->Internal.s.pLunsR3 = pLun;
831 else
832 pLunPrev->pNext = pLun;
833 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
834 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
835 }
836 else if (pLun->pTop)
837 {
838 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
839 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
840 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
841 }
842 Assert(pLun->pBase == pBaseInterface);
843
844
845 /*
846 * Get the attached driver configuration.
847 */
848 int rc;
849 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
850 if (pNode)
851 {
852 char *pszName;
853 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
854 if (RT_SUCCESS(rc))
855 {
856 /*
857 * Find the driver.
858 */
859 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
860 if ( pDrv
861 && pDrv->cInstances < pDrv->pDrvReg->cMaxInstances)
862 {
863 /* config node */
864 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
865 if (!pConfigNode)
866 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
867 if (RT_SUCCESS(rc))
868 {
869 CFGMR3SetRestrictedRoot(pConfigNode);
870
871 /*
872 * Allocate the driver instance.
873 */
874 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
875 cb = RT_ALIGN_Z(cb, 16);
876 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
877 if (pNew)
878 {
879 /*
880 * Initialize the instance structure (declaration order).
881 */
882 pNew->u32Version = PDM_DRVINS_VERSION;
883 //pNew->Internal.s.pUp = NULL;
884 //pNew->Internal.s.pDown = NULL;
885 pNew->Internal.s.pLun = pLun;
886 pNew->Internal.s.pDrv = pDrv;
887 pNew->Internal.s.pVM = pVM;
888 //pNew->Internal.s.fDetaching = false;
889 pNew->Internal.s.fVMSuspended = true;
890 //pNew->Internal.s.pfnAsyncNotify = NULL;
891 pNew->Internal.s.pCfgHandle = pNode;
892 pNew->pDrvHlp = &g_pdmR3DrvHlp;
893 pNew->pDrvReg = pDrv->pDrvReg;
894 pNew->pCfgHandle = pConfigNode;
895 pNew->iInstance = pDrv->cInstances++;
896 pNew->pUpBase = pBaseInterface;
897 //pNew->pDownBase = NULL;
898 //pNew->IBase.pfnQueryInterface = NULL;
899 pNew->pvInstanceData = &pNew->achInstanceData[0];
900
901 /*
902 * Link with LUN and call the constructor.
903 */
904 pLun->pTop = pLun->pBottom = pNew;
905 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle, 0 /*fFlags*/);
906 if (RT_SUCCESS(rc))
907 {
908 MMR3HeapFree(pszName);
909 *ppBaseInterface = &pNew->IBase;
910 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
911 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
912 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
913
914 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
915 }
916
917 /*
918 * Free the driver.
919 */
920 pLun->pTop = pLun->pBottom = NULL;
921 ASMMemFill32(pNew, cb, 0xdeadd0d0);
922 MMR3HeapFree(pNew);
923 pDrv->cInstances--;
924 }
925 else
926 {
927 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
928 rc = VERR_NO_MEMORY;
929 }
930 }
931 else
932 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
933 }
934 else if (pDrv)
935 {
936 AssertMsgFailed(("Too many instances of driver '%s', max is %u\n", pszName, pDrv->pDrvReg->cMaxInstances));
937 rc = VERR_PDM_TOO_MANY_DRIVER_INSTANCES;
938 }
939 else
940 {
941 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
942 rc = VERR_PDM_DRIVER_NOT_FOUND;
943 }
944 MMR3HeapFree(pszName);
945 }
946 else
947 {
948 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
949 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
950 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
951 }
952 }
953 else
954 rc = VERR_PDM_NO_ATTACHED_DRIVER;
955
956
957 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
958 return rc;
959}
960
961
962/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
963static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
964{
965 PDMDEV_ASSERT_DEVINS(pDevIns);
966 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
967
968 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
969
970 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
971 return pv;
972}
973
974
975/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
976static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
977{
978 PDMDEV_ASSERT_DEVINS(pDevIns);
979 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
980
981 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
982
983 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
984 return pv;
985}
986
987
988/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
989static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
990{
991 PDMDEV_ASSERT_DEVINS(pDevIns);
992 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
993
994 MMR3HeapFree(pv);
995
996 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
997}
998
999
1000/** @copydoc PDMDEVHLPR3::pfnVMSetError */
1001static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1002{
1003 PDMDEV_ASSERT_DEVINS(pDevIns);
1004 va_list args;
1005 va_start(args, pszFormat);
1006 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1007 va_end(args);
1008 return rc;
1009}
1010
1011
1012/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
1013static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1014{
1015 PDMDEV_ASSERT_DEVINS(pDevIns);
1016 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1017 return rc;
1018}
1019
1020
1021/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
1022static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
1023{
1024 PDMDEV_ASSERT_DEVINS(pDevIns);
1025 va_list args;
1026 va_start(args, pszFormat);
1027 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1028 va_end(args);
1029 return rc;
1030}
1031
1032
1033/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
1034static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
1035{
1036 PDMDEV_ASSERT_DEVINS(pDevIns);
1037 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1038 return rc;
1039}
1040
1041
1042/** @copydoc PDMDEVHLPR3::pfnVMState */
1043static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1044{
1045 PDMDEV_ASSERT_DEVINS(pDevIns);
1046
1047 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1048
1049 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1050 enmVMState, VMR3GetStateName(enmVMState)));
1051 return enmVMState;
1052}
1053
1054
1055/** @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet */
1056static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1057{
1058 PDMDEV_ASSERT_DEVINS(pDevIns);
1059
1060 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1061
1062 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1063 fRc));
1064 return fRc;
1065}
1066
1067
1068/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
1069static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1070{
1071 PDMDEV_ASSERT_DEVINS(pDevIns);
1072 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1073 return true;
1074
1075 char szMsg[100];
1076 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1077 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1078 AssertBreakpoint();
1079 return false;
1080}
1081
1082
1083/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1084static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1085{
1086 PDMDEV_ASSERT_DEVINS(pDevIns);
1087 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1088 return true;
1089
1090 char szMsg[100];
1091 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1092 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1093 AssertBreakpoint();
1094 return false;
1095}
1096
1097
1098/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1099static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1100{
1101 PDMDEV_ASSERT_DEVINS(pDevIns);
1102#ifdef LOG_ENABLED
1103 va_list va2;
1104 va_copy(va2, args);
1105 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1106 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1107 va_end(va2);
1108#endif
1109
1110 PVM pVM = pDevIns->Internal.s.pVMR3;
1111 VM_ASSERT_EMT(pVM);
1112 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1113
1114 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1115 return rc;
1116}
1117
1118
1119/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1120static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1121{
1122 PDMDEV_ASSERT_DEVINS(pDevIns);
1123 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1125
1126 PVM pVM = pDevIns->Internal.s.pVMR3;
1127 VM_ASSERT_EMT(pVM);
1128 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1129
1130 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1131 return rc;
1132}
1133
1134
1135/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1136static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1137{
1138 PDMDEV_ASSERT_DEVINS(pDevIns);
1139 PVM pVM = pDevIns->Internal.s.pVMR3;
1140 VM_ASSERT_EMT(pVM);
1141
1142 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1143 NOREF(pVM);
1144}
1145
1146
1147
1148/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1149static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1150 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1151{
1152 PDMDEV_ASSERT_DEVINS(pDevIns);
1153 PVM pVM = pDevIns->Internal.s.pVMR3;
1154 VM_ASSERT_EMT(pVM);
1155
1156 va_list args;
1157 va_start(args, pszName);
1158 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1159 va_end(args);
1160 AssertRC(rc);
1161
1162 NOREF(pVM);
1163}
1164
1165
1166/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1167static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1168 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1169{
1170 PDMDEV_ASSERT_DEVINS(pDevIns);
1171 PVM pVM = pDevIns->Internal.s.pVMR3;
1172 VM_ASSERT_EMT(pVM);
1173
1174 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1175 AssertRC(rc);
1176
1177 NOREF(pVM);
1178}
1179
1180
1181/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1182static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1183{
1184 PDMDEV_ASSERT_DEVINS(pDevIns);
1185 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1186 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1187 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1188 pRtcReg->pfnWrite, ppRtcHlp));
1189
1190 /*
1191 * Validate input.
1192 */
1193 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1194 {
1195 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1196 PDM_RTCREG_VERSION));
1197 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1198 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1199 return VERR_INVALID_PARAMETER;
1200 }
1201 if ( !pRtcReg->pfnWrite
1202 || !pRtcReg->pfnRead)
1203 {
1204 Assert(pRtcReg->pfnWrite);
1205 Assert(pRtcReg->pfnRead);
1206 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1207 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1208 return VERR_INVALID_PARAMETER;
1209 }
1210
1211 if (!ppRtcHlp)
1212 {
1213 Assert(ppRtcHlp);
1214 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1215 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1216 return VERR_INVALID_PARAMETER;
1217 }
1218
1219 /*
1220 * Only one DMA device.
1221 */
1222 PVM pVM = pDevIns->Internal.s.pVMR3;
1223 if (pVM->pdm.s.pRtc)
1224 {
1225 AssertMsgFailed(("Only one RTC device is supported!\n"));
1226 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1227 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1228 return VERR_INVALID_PARAMETER;
1229 }
1230
1231 /*
1232 * Allocate and initialize pci bus structure.
1233 */
1234 int rc = VINF_SUCCESS;
1235 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1236 if (pRtc)
1237 {
1238 pRtc->pDevIns = pDevIns;
1239 pRtc->Reg = *pRtcReg;
1240 pVM->pdm.s.pRtc = pRtc;
1241
1242 /* set the helper pointer. */
1243 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1244 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1245 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1246 }
1247 else
1248 rc = VERR_NO_MEMORY;
1249
1250 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1251 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1252 return rc;
1253}
1254
1255
1256/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1257static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1258 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1259{
1260 PDMDEV_ASSERT_DEVINS(pDevIns);
1261 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1262 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1263
1264 PVM pVM = pDevIns->Internal.s.pVMR3;
1265 VM_ASSERT_EMT(pVM);
1266
1267 if (pDevIns->iInstance > 0)
1268 {
1269 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1270 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1271 }
1272
1273 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1274
1275 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1276 return rc;
1277}
1278
1279
1280/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1281static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1282{
1283 PDMDEV_ASSERT_DEVINS(pDevIns);
1284 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1285 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1286
1287 PVM pVM = pDevIns->Internal.s.pVMR3;
1288 VM_ASSERT_EMT(pVM);
1289 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1290
1291 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1292 return rc;
1293}
1294
1295
1296/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1297static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1298{
1299 PDMDEV_ASSERT_DEVINS(pDevIns);
1300 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1301 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1302
1303 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1304
1305 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1306 return pTime;
1307}
1308
1309
1310/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1311static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1312 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1313{
1314 PDMDEV_ASSERT_DEVINS(pDevIns);
1315 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1316 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1317 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1318
1319 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1320
1321 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1322 rc, *ppThread));
1323 return rc;
1324}
1325
1326
1327/** @copydoc PDMDEVHLPR3::pfnGetVM */
1328static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1329{
1330 PDMDEV_ASSERT_DEVINS(pDevIns);
1331 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1332 return pDevIns->Internal.s.pVMR3;
1333}
1334
1335
1336/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1337static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1338{
1339 PDMDEV_ASSERT_DEVINS(pDevIns);
1340 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1341 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1342 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1343}
1344
1345
1346/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1347static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1348{
1349 PDMDEV_ASSERT_DEVINS(pDevIns);
1350 PVM pVM = pDevIns->Internal.s.pVMR3;
1351 VM_ASSERT_EMT(pVM);
1352 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1353 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1354 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1355 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1356 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1357
1358 /*
1359 * Validate the structure.
1360 */
1361 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1362 {
1363 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1364 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1365 return VERR_INVALID_PARAMETER;
1366 }
1367 if ( !pPciBusReg->pfnRegisterR3
1368 || !pPciBusReg->pfnIORegionRegisterR3
1369 || !pPciBusReg->pfnSetIrqR3
1370 || !pPciBusReg->pfnSaveExecR3
1371 || !pPciBusReg->pfnLoadExecR3
1372 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1373 {
1374 Assert(pPciBusReg->pfnRegisterR3);
1375 Assert(pPciBusReg->pfnIORegionRegisterR3);
1376 Assert(pPciBusReg->pfnSetIrqR3);
1377 Assert(pPciBusReg->pfnSaveExecR3);
1378 Assert(pPciBusReg->pfnLoadExecR3);
1379 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1380 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1381 return VERR_INVALID_PARAMETER;
1382 }
1383 if ( pPciBusReg->pszSetIrqRC
1384 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1385 {
1386 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1387 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1388 return VERR_INVALID_PARAMETER;
1389 }
1390 if ( pPciBusReg->pszSetIrqR0
1391 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1392 {
1393 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1394 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1395 return VERR_INVALID_PARAMETER;
1396 }
1397 if (!ppPciHlpR3)
1398 {
1399 Assert(ppPciHlpR3);
1400 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1401 return VERR_INVALID_PARAMETER;
1402 }
1403
1404 /*
1405 * Find free PCI bus entry.
1406 */
1407 unsigned iBus = 0;
1408 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1409 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1410 break;
1411 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1412 {
1413 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1414 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1415 return VERR_INVALID_PARAMETER;
1416 }
1417 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1418
1419 /*
1420 * Resolve and init the RC bits.
1421 */
1422 if (pPciBusReg->pszSetIrqRC)
1423 {
1424 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1425 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1426 if (RT_FAILURE(rc))
1427 {
1428 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1429 return rc;
1430 }
1431 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1432 }
1433 else
1434 {
1435 pPciBus->pfnSetIrqRC = 0;
1436 pPciBus->pDevInsRC = 0;
1437 }
1438
1439 /*
1440 * Resolve and init the R0 bits.
1441 */
1442 if (pPciBusReg->pszSetIrqR0)
1443 {
1444 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1445 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1446 if (RT_FAILURE(rc))
1447 {
1448 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1449 return rc;
1450 }
1451 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1452 }
1453 else
1454 {
1455 pPciBus->pfnSetIrqR0 = 0;
1456 pPciBus->pDevInsR0 = 0;
1457 }
1458
1459 /*
1460 * Init the R3 bits.
1461 */
1462 pPciBus->iBus = iBus;
1463 pPciBus->pDevInsR3 = pDevIns;
1464 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1465 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1466 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1467 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1468 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1469 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1470 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1471
1472 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1473
1474 /* set the helper pointer and return. */
1475 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1476 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1477 return VINF_SUCCESS;
1478}
1479
1480
1481/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1482static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1483{
1484 PDMDEV_ASSERT_DEVINS(pDevIns);
1485 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1486 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1487 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1488 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1489 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1490 ppPicHlpR3));
1491
1492 /*
1493 * Validate input.
1494 */
1495 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1496 {
1497 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1498 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1499 return VERR_INVALID_PARAMETER;
1500 }
1501 if ( !pPicReg->pfnSetIrqR3
1502 || !pPicReg->pfnGetInterruptR3)
1503 {
1504 Assert(pPicReg->pfnSetIrqR3);
1505 Assert(pPicReg->pfnGetInterruptR3);
1506 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1507 return VERR_INVALID_PARAMETER;
1508 }
1509 if ( ( pPicReg->pszSetIrqRC
1510 || pPicReg->pszGetInterruptRC)
1511 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1512 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1513 )
1514 {
1515 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1516 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1517 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1518 return VERR_INVALID_PARAMETER;
1519 }
1520 if ( pPicReg->pszSetIrqRC
1521 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1522 {
1523 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1524 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1525 return VERR_INVALID_PARAMETER;
1526 }
1527 if ( pPicReg->pszSetIrqR0
1528 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1529 {
1530 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1531 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1532 return VERR_INVALID_PARAMETER;
1533 }
1534 if (!ppPicHlpR3)
1535 {
1536 Assert(ppPicHlpR3);
1537 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1538 return VERR_INVALID_PARAMETER;
1539 }
1540
1541 /*
1542 * Only one PIC device.
1543 */
1544 PVM pVM = pDevIns->Internal.s.pVMR3;
1545 if (pVM->pdm.s.Pic.pDevInsR3)
1546 {
1547 AssertMsgFailed(("Only one pic device is supported!\n"));
1548 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1549 return VERR_INVALID_PARAMETER;
1550 }
1551
1552 /*
1553 * RC stuff.
1554 */
1555 if (pPicReg->pszSetIrqRC)
1556 {
1557 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1558 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1559 if (RT_SUCCESS(rc))
1560 {
1561 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1562 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1563 }
1564 if (RT_FAILURE(rc))
1565 {
1566 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1567 return rc;
1568 }
1569 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1570 }
1571 else
1572 {
1573 pVM->pdm.s.Pic.pDevInsRC = 0;
1574 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1575 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1576 }
1577
1578 /*
1579 * R0 stuff.
1580 */
1581 if (pPicReg->pszSetIrqR0)
1582 {
1583 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1584 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1585 if (RT_SUCCESS(rc))
1586 {
1587 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1588 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1589 }
1590 if (RT_FAILURE(rc))
1591 {
1592 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1593 return rc;
1594 }
1595 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1596 Assert(pVM->pdm.s.Pic.pDevInsR0);
1597 }
1598 else
1599 {
1600 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1601 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1602 pVM->pdm.s.Pic.pDevInsR0 = 0;
1603 }
1604
1605 /*
1606 * R3 stuff.
1607 */
1608 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1609 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1610 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1611 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1612
1613 /* set the helper pointer and return. */
1614 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1615 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1616 return VINF_SUCCESS;
1617}
1618
1619
1620/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1621static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1622{
1623 PDMDEV_ASSERT_DEVINS(pDevIns);
1624 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1625 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1626 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1627 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
1628 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1629 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
1630 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1631 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1632 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
1633
1634 /*
1635 * Validate input.
1636 */
1637 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1638 {
1639 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1640 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1641 return VERR_INVALID_PARAMETER;
1642 }
1643 if ( !pApicReg->pfnGetInterruptR3
1644 || !pApicReg->pfnHasPendingIrqR3
1645 || !pApicReg->pfnSetBaseR3
1646 || !pApicReg->pfnGetBaseR3
1647 || !pApicReg->pfnSetTPRR3
1648 || !pApicReg->pfnGetTPRR3
1649 || !pApicReg->pfnWriteMSRR3
1650 || !pApicReg->pfnReadMSRR3
1651 || !pApicReg->pfnBusDeliverR3
1652 || !pApicReg->pfnLocalInterruptR3)
1653 {
1654 Assert(pApicReg->pfnGetInterruptR3);
1655 Assert(pApicReg->pfnHasPendingIrqR3);
1656 Assert(pApicReg->pfnSetBaseR3);
1657 Assert(pApicReg->pfnGetBaseR3);
1658 Assert(pApicReg->pfnSetTPRR3);
1659 Assert(pApicReg->pfnGetTPRR3);
1660 Assert(pApicReg->pfnWriteMSRR3);
1661 Assert(pApicReg->pfnReadMSRR3);
1662 Assert(pApicReg->pfnBusDeliverR3);
1663 Assert(pApicReg->pfnLocalInterruptR3);
1664 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1665 return VERR_INVALID_PARAMETER;
1666 }
1667 if ( ( pApicReg->pszGetInterruptRC
1668 || pApicReg->pszHasPendingIrqRC
1669 || pApicReg->pszSetBaseRC
1670 || pApicReg->pszGetBaseRC
1671 || pApicReg->pszSetTPRRC
1672 || pApicReg->pszGetTPRRC
1673 || pApicReg->pszWriteMSRRC
1674 || pApicReg->pszReadMSRRC
1675 || pApicReg->pszBusDeliverRC
1676 || pApicReg->pszLocalInterruptRC)
1677 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1678 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1679 || !VALID_PTR(pApicReg->pszSetBaseRC)
1680 || !VALID_PTR(pApicReg->pszGetBaseRC)
1681 || !VALID_PTR(pApicReg->pszSetTPRRC)
1682 || !VALID_PTR(pApicReg->pszGetTPRRC)
1683 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1684 || !VALID_PTR(pApicReg->pszReadMSRRC)
1685 || !VALID_PTR(pApicReg->pszBusDeliverRC)
1686 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
1687 )
1688 {
1689 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1690 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1691 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1692 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1693 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1694 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1695 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1696 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1697 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1698 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
1699 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1700 return VERR_INVALID_PARAMETER;
1701 }
1702 if ( ( pApicReg->pszGetInterruptR0
1703 || pApicReg->pszHasPendingIrqR0
1704 || pApicReg->pszSetBaseR0
1705 || pApicReg->pszGetBaseR0
1706 || pApicReg->pszSetTPRR0
1707 || pApicReg->pszGetTPRR0
1708 || pApicReg->pszWriteMSRR0
1709 || pApicReg->pszReadMSRR0
1710 || pApicReg->pszBusDeliverR0
1711 || pApicReg->pszLocalInterruptR0)
1712 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1713 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1714 || !VALID_PTR(pApicReg->pszSetBaseR0)
1715 || !VALID_PTR(pApicReg->pszGetBaseR0)
1716 || !VALID_PTR(pApicReg->pszSetTPRR0)
1717 || !VALID_PTR(pApicReg->pszGetTPRR0)
1718 || !VALID_PTR(pApicReg->pszReadMSRR0)
1719 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1720 || !VALID_PTR(pApicReg->pszBusDeliverR0)
1721 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
1722 )
1723 {
1724 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1725 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1726 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1727 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1728 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1729 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1730 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1731 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1732 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1733 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
1734 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1735 return VERR_INVALID_PARAMETER;
1736 }
1737 if (!ppApicHlpR3)
1738 {
1739 Assert(ppApicHlpR3);
1740 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1741 return VERR_INVALID_PARAMETER;
1742 }
1743
1744 /*
1745 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1746 * as they need to communicate and share state easily.
1747 */
1748 PVM pVM = pDevIns->Internal.s.pVMR3;
1749 if (pVM->pdm.s.Apic.pDevInsR3)
1750 {
1751 AssertMsgFailed(("Only one apic device is supported!\n"));
1752 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1753 return VERR_INVALID_PARAMETER;
1754 }
1755
1756 /*
1757 * Resolve & initialize the RC bits.
1758 */
1759 if (pApicReg->pszGetInterruptRC)
1760 {
1761 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1762 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1763 if (RT_SUCCESS(rc))
1764 {
1765 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1766 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1767 }
1768 if (RT_SUCCESS(rc))
1769 {
1770 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1771 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1772 }
1773 if (RT_SUCCESS(rc))
1774 {
1775 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1776 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1777 }
1778 if (RT_SUCCESS(rc))
1779 {
1780 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1781 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1782 }
1783 if (RT_SUCCESS(rc))
1784 {
1785 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1786 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1787 }
1788 if (RT_SUCCESS(rc))
1789 {
1790 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1791 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1792 }
1793 if (RT_SUCCESS(rc))
1794 {
1795 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1796 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1797 }
1798 if (RT_SUCCESS(rc))
1799 {
1800 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1801 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1802 }
1803 if (RT_SUCCESS(rc))
1804 {
1805 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
1806 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
1807 }
1808 if (RT_FAILURE(rc))
1809 {
1810 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1811 return rc;
1812 }
1813 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1814 }
1815 else
1816 {
1817 pVM->pdm.s.Apic.pDevInsRC = 0;
1818 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1819 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1820 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1821 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1822 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1823 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1824 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1825 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1826 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1827 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
1828 }
1829
1830 /*
1831 * Resolve & initialize the R0 bits.
1832 */
1833 if (pApicReg->pszGetInterruptR0)
1834 {
1835 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1836 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1837 if (RT_SUCCESS(rc))
1838 {
1839 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1840 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1841 }
1842 if (RT_SUCCESS(rc))
1843 {
1844 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1845 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1846 }
1847 if (RT_SUCCESS(rc))
1848 {
1849 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1850 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1851 }
1852 if (RT_SUCCESS(rc))
1853 {
1854 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1855 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1856 }
1857 if (RT_SUCCESS(rc))
1858 {
1859 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1860 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1861 }
1862 if (RT_SUCCESS(rc))
1863 {
1864 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1865 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1866 }
1867 if (RT_SUCCESS(rc))
1868 {
1869 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1870 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1871 }
1872 if (RT_SUCCESS(rc))
1873 {
1874 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1875 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1876 }
1877 if (RT_SUCCESS(rc))
1878 {
1879 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
1880 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
1881 }
1882 if (RT_FAILURE(rc))
1883 {
1884 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1885 return rc;
1886 }
1887 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1888 Assert(pVM->pdm.s.Apic.pDevInsR0);
1889 }
1890 else
1891 {
1892 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1893 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1894 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1895 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1896 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1897 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1898 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1899 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1900 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1901 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
1902 pVM->pdm.s.Apic.pDevInsR0 = 0;
1903 }
1904
1905 /*
1906 * Initialize the HC bits.
1907 */
1908 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1909 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1910 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1911 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1912 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1913 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1914 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1915 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1916 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1917 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1918 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
1919 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1920
1921 /* set the helper pointer and return. */
1922 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1923 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1924 return VINF_SUCCESS;
1925}
1926
1927
1928/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1929static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1930{
1931 PDMDEV_ASSERT_DEVINS(pDevIns);
1932 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1933 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1934 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1935 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1936
1937 /*
1938 * Validate input.
1939 */
1940 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1941 {
1942 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1943 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1944 return VERR_INVALID_PARAMETER;
1945 }
1946 if (!pIoApicReg->pfnSetIrqR3)
1947 {
1948 Assert(pIoApicReg->pfnSetIrqR3);
1949 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1950 return VERR_INVALID_PARAMETER;
1951 }
1952 if ( pIoApicReg->pszSetIrqRC
1953 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1954 {
1955 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1956 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1957 return VERR_INVALID_PARAMETER;
1958 }
1959 if ( pIoApicReg->pszSetIrqR0
1960 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1961 {
1962 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1963 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1964 return VERR_INVALID_PARAMETER;
1965 }
1966 if (!ppIoApicHlpR3)
1967 {
1968 Assert(ppIoApicHlpR3);
1969 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1970 return VERR_INVALID_PARAMETER;
1971 }
1972
1973 /*
1974 * The I/O APIC requires the APIC to be present (hacks++).
1975 * If the I/O APIC does GC stuff so must the APIC.
1976 */
1977 PVM pVM = pDevIns->Internal.s.pVMR3;
1978 if (!pVM->pdm.s.Apic.pDevInsR3)
1979 {
1980 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1981 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1982 return VERR_INVALID_PARAMETER;
1983 }
1984 if ( pIoApicReg->pszSetIrqRC
1985 && !pVM->pdm.s.Apic.pDevInsRC)
1986 {
1987 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1988 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1989 return VERR_INVALID_PARAMETER;
1990 }
1991
1992 /*
1993 * Only one I/O APIC device.
1994 */
1995 if (pVM->pdm.s.IoApic.pDevInsR3)
1996 {
1997 AssertMsgFailed(("Only one ioapic device is supported!\n"));
1998 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1999 return VERR_INVALID_PARAMETER;
2000 }
2001
2002 /*
2003 * Resolve & initialize the GC bits.
2004 */
2005 if (pIoApicReg->pszSetIrqRC)
2006 {
2007 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2008 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2009 if (RT_FAILURE(rc))
2010 {
2011 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2012 return rc;
2013 }
2014 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2015 }
2016 else
2017 {
2018 pVM->pdm.s.IoApic.pDevInsRC = 0;
2019 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2020 }
2021
2022 /*
2023 * Resolve & initialize the R0 bits.
2024 */
2025 if (pIoApicReg->pszSetIrqR0)
2026 {
2027 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2028 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2029 if (RT_FAILURE(rc))
2030 {
2031 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2032 return rc;
2033 }
2034 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2035 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2036 }
2037 else
2038 {
2039 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2040 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2041 }
2042
2043 /*
2044 * Initialize the R3 bits.
2045 */
2046 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2047 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2048 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2049
2050 /* set the helper pointer and return. */
2051 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2052 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2053 return VINF_SUCCESS;
2054}
2055
2056
2057/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2058static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2059{
2060 PDMDEV_ASSERT_DEVINS(pDevIns);
2061 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2062 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2063 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2064 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2065
2066 /*
2067 * Validate input.
2068 */
2069 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2070 {
2071 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2072 PDM_DMACREG_VERSION));
2073 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2074 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2075 return VERR_INVALID_PARAMETER;
2076 }
2077 if ( !pDmacReg->pfnRun
2078 || !pDmacReg->pfnRegister
2079 || !pDmacReg->pfnReadMemory
2080 || !pDmacReg->pfnWriteMemory
2081 || !pDmacReg->pfnSetDREQ
2082 || !pDmacReg->pfnGetChannelMode)
2083 {
2084 Assert(pDmacReg->pfnRun);
2085 Assert(pDmacReg->pfnRegister);
2086 Assert(pDmacReg->pfnReadMemory);
2087 Assert(pDmacReg->pfnWriteMemory);
2088 Assert(pDmacReg->pfnSetDREQ);
2089 Assert(pDmacReg->pfnGetChannelMode);
2090 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2091 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2092 return VERR_INVALID_PARAMETER;
2093 }
2094
2095 if (!ppDmacHlp)
2096 {
2097 Assert(ppDmacHlp);
2098 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2099 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2100 return VERR_INVALID_PARAMETER;
2101 }
2102
2103 /*
2104 * Only one DMA device.
2105 */
2106 PVM pVM = pDevIns->Internal.s.pVMR3;
2107 if (pVM->pdm.s.pDmac)
2108 {
2109 AssertMsgFailed(("Only one DMA device is supported!\n"));
2110 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2111 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2112 return VERR_INVALID_PARAMETER;
2113 }
2114
2115 /*
2116 * Allocate and initialize pci bus structure.
2117 */
2118 int rc = VINF_SUCCESS;
2119 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2120 if (pDmac)
2121 {
2122 pDmac->pDevIns = pDevIns;
2123 pDmac->Reg = *pDmacReg;
2124 pVM->pdm.s.pDmac = pDmac;
2125
2126 /* set the helper pointer. */
2127 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2128 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2129 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2130 }
2131 else
2132 rc = VERR_NO_MEMORY;
2133
2134 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2135 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2136 return rc;
2137}
2138
2139
2140/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2141static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2142{
2143 PDMDEV_ASSERT_DEVINS(pDevIns);
2144 PVM pVM = pDevIns->Internal.s.pVMR3;
2145 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2146 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2147
2148#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2149 if (!VM_IS_EMT(pVM))
2150 {
2151 char szNames[128];
2152 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2153 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2154 }
2155#endif
2156
2157 int rc;
2158 if (VM_IS_EMT(pVM))
2159 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2160 else
2161 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2162
2163 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2164 return rc;
2165}
2166
2167
2168/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2169static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2170{
2171 PDMDEV_ASSERT_DEVINS(pDevIns);
2172 PVM pVM = pDevIns->Internal.s.pVMR3;
2173 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2175
2176#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2177 if (!VM_IS_EMT(pVM))
2178 {
2179 char szNames[128];
2180 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2181 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2182 }
2183#endif
2184
2185 int rc;
2186 if (VM_IS_EMT(pVM))
2187 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2188 else
2189 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pDevReg->szDeviceName);
2190
2191 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2192 return rc;
2193}
2194
2195
2196/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2197static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2198{
2199 PDMDEV_ASSERT_DEVINS(pDevIns);
2200 PVM pVM = pDevIns->Internal.s.pVMR3;
2201 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2202 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2203 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2204
2205#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2206 if (!VM_IS_EMT(pVM))
2207 {
2208 char szNames[128];
2209 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2210 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2211 }
2212#endif
2213
2214 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2215
2216 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2217 return rc;
2218}
2219
2220
2221/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2222static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2223{
2224 PDMDEV_ASSERT_DEVINS(pDevIns);
2225 PVM pVM = pDevIns->Internal.s.pVMR3;
2226 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2227 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2228 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2229
2230#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2231 if (!VM_IS_EMT(pVM))
2232 {
2233 char szNames[128];
2234 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2235 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2236 }
2237#endif
2238
2239 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2240
2241 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2242 return rc;
2243}
2244
2245
2246/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2247static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2248{
2249 PDMDEV_ASSERT_DEVINS(pDevIns);
2250 PVM pVM = pDevIns->Internal.s.pVMR3;
2251 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2252 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2253
2254 PGMPhysReleasePageMappingLock(pVM, pLock);
2255
2256 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2257}
2258
2259
2260/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2261static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2262{
2263 PDMDEV_ASSERT_DEVINS(pDevIns);
2264 PVM pVM = pDevIns->Internal.s.pVMR3;
2265 VM_ASSERT_EMT(pVM);
2266 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2267 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2268
2269 PVMCPU pVCpu = VMMGetCpu(pVM);
2270 if (!pVCpu)
2271 return VERR_ACCESS_DENIED;
2272#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2273 /** @todo SMP. */
2274#endif
2275
2276 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2277
2278 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2279
2280 return rc;
2281}
2282
2283
2284/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2285static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2286{
2287 PDMDEV_ASSERT_DEVINS(pDevIns);
2288 PVM pVM = pDevIns->Internal.s.pVMR3;
2289 VM_ASSERT_EMT(pVM);
2290 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2291 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2292
2293 PVMCPU pVCpu = VMMGetCpu(pVM);
2294 if (!pVCpu)
2295 return VERR_ACCESS_DENIED;
2296#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2297 /** @todo SMP. */
2298#endif
2299
2300 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2301
2302 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2303
2304 return rc;
2305}
2306
2307
2308/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2309static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2310{
2311 PDMDEV_ASSERT_DEVINS(pDevIns);
2312 PVM pVM = pDevIns->Internal.s.pVMR3;
2313 VM_ASSERT_EMT(pVM);
2314 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2315 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2316
2317 PVMCPU pVCpu = VMMGetCpu(pVM);
2318 if (!pVCpu)
2319 return VERR_ACCESS_DENIED;
2320#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2321 /** @todo SMP. */
2322#endif
2323
2324 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2325
2326 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2327
2328 return rc;
2329}
2330
2331
2332/** @copydoc PDMDEVHLPR3::pfnSetAsyncNotification */
2333static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2334{
2335 PDMDEV_ASSERT_DEVINS(pDevIns);
2336 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2337 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pfnAsyncNotify));
2338
2339 int rc = VINF_SUCCESS;
2340 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2341 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2342 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2343 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2344 AssertStmt( enmVMState == VMSTATE_SUSPENDING
2345 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2346 || enmVMState == VMSTATE_SUSPENDING_LS
2347 || enmVMState == VMSTATE_RESETTING
2348 || enmVMState == VMSTATE_RESETTING_LS
2349 || enmVMState == VMSTATE_POWERING_OFF
2350 || enmVMState == VMSTATE_POWERING_OFF_LS,
2351 rc = VERR_INVALID_STATE);
2352
2353 if (RT_SUCCESS(rc))
2354 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2355
2356 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2357 return rc;
2358}
2359
2360
2361/** @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted */
2362static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2363{
2364 PDMDEV_ASSERT_DEVINS(pDevIns);
2365 PVM pVM = pDevIns->Internal.s.pVMR3;
2366
2367 VMSTATE enmVMState = VMR3GetState(pVM);
2368 if ( enmVMState == VMSTATE_SUSPENDING
2369 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2370 || enmVMState == VMSTATE_SUSPENDING_LS
2371 || enmVMState == VMSTATE_RESETTING
2372 || enmVMState == VMSTATE_RESETTING_LS
2373 || enmVMState == VMSTATE_POWERING_OFF
2374 || enmVMState == VMSTATE_POWERING_OFF_LS)
2375 {
2376 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2377 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2378 }
2379 else
2380 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmVMState));
2381}
2382
2383
2384/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2385static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2386{
2387 PDMDEV_ASSERT_DEVINS(pDevIns);
2388 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2389
2390 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2391
2392 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2393 return fRc;
2394}
2395
2396
2397/** @copydoc PDMDEVHLPR3::pfnA20Set */
2398static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2399{
2400 PDMDEV_ASSERT_DEVINS(pDevIns);
2401 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2402 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2403 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2404}
2405
2406
2407/** @copydoc PDMDEVHLPR3::pfnVMReset */
2408static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2409{
2410 PDMDEV_ASSERT_DEVINS(pDevIns);
2411 PVM pVM = pDevIns->Internal.s.pVMR3;
2412 VM_ASSERT_EMT(pVM);
2413 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2414 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2415
2416 /*
2417 * We postpone this operation because we're likely to be inside a I/O instruction
2418 * and the EIP will be updated when we return.
2419 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2420 */
2421 bool fHaltOnReset;
2422 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2423 if (RT_SUCCESS(rc) && fHaltOnReset)
2424 {
2425 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2426 rc = VINF_EM_HALT;
2427 }
2428 else
2429 {
2430 VM_FF_SET(pVM, VM_FF_RESET);
2431 rc = VINF_EM_RESET;
2432 }
2433
2434 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2435 return rc;
2436}
2437
2438
2439/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2440static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2441{
2442 int rc;
2443 PDMDEV_ASSERT_DEVINS(pDevIns);
2444 PVM pVM = pDevIns->Internal.s.pVMR3;
2445 VM_ASSERT_EMT(pVM);
2446 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2447 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2448
2449 if (pVM->cCpus > 1)
2450 {
2451 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2452 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2453 AssertRC(rc);
2454 rc = VINF_EM_SUSPEND;
2455 }
2456 else
2457 rc = VMR3Suspend(pVM);
2458
2459 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2460 return rc;
2461}
2462
2463
2464/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2465static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2466{
2467 int rc;
2468 PDMDEV_ASSERT_DEVINS(pDevIns);
2469 PVM pVM = pDevIns->Internal.s.pVMR3;
2470 VM_ASSERT_EMT(pVM);
2471 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2472 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2473
2474 if (pVM->cCpus > 1)
2475 {
2476 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2477 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2478 AssertRC(rc);
2479 /* Set the VCPU state to stopped here as well to make sure no
2480 * inconsistency with the EM state occurs.
2481 */
2482 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2483 rc = VINF_EM_OFF;
2484 }
2485 else
2486 rc = VMR3PowerOff(pVM);
2487
2488 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2489 return rc;
2490}
2491
2492/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2493static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2494{
2495 PDMDEV_ASSERT_DEVINS(pDevIns);
2496 PVM pVM = pDevIns->Internal.s.pVMR3;
2497 VM_ASSERT_EMT(pVM);
2498 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2499 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2500 int rc = VINF_SUCCESS;
2501 if (pVM->pdm.s.pDmac)
2502 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2503 else
2504 {
2505 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2506 rc = VERR_PDM_NO_DMAC_INSTANCE;
2507 }
2508 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2509 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2510 return rc;
2511}
2512
2513/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2514static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2515{
2516 PDMDEV_ASSERT_DEVINS(pDevIns);
2517 PVM pVM = pDevIns->Internal.s.pVMR3;
2518 VM_ASSERT_EMT(pVM);
2519 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2520 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2521 int rc = VINF_SUCCESS;
2522 if (pVM->pdm.s.pDmac)
2523 {
2524 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2525 if (pcbRead)
2526 *pcbRead = cb;
2527 }
2528 else
2529 {
2530 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2531 rc = VERR_PDM_NO_DMAC_INSTANCE;
2532 }
2533 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2534 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2535 return rc;
2536}
2537
2538/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2539static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2540{
2541 PDMDEV_ASSERT_DEVINS(pDevIns);
2542 PVM pVM = pDevIns->Internal.s.pVMR3;
2543 VM_ASSERT_EMT(pVM);
2544 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2545 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2546 int rc = VINF_SUCCESS;
2547 if (pVM->pdm.s.pDmac)
2548 {
2549 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2550 if (pcbWritten)
2551 *pcbWritten = cb;
2552 }
2553 else
2554 {
2555 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2556 rc = VERR_PDM_NO_DMAC_INSTANCE;
2557 }
2558 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2559 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2560 return rc;
2561}
2562
2563/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2564static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2565{
2566 PDMDEV_ASSERT_DEVINS(pDevIns);
2567 PVM pVM = pDevIns->Internal.s.pVMR3;
2568 VM_ASSERT_EMT(pVM);
2569 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2570 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2571 int rc = VINF_SUCCESS;
2572 if (pVM->pdm.s.pDmac)
2573 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2574 else
2575 {
2576 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2577 rc = VERR_PDM_NO_DMAC_INSTANCE;
2578 }
2579 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2580 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2581 return rc;
2582}
2583
2584/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2585static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2586{
2587 PDMDEV_ASSERT_DEVINS(pDevIns);
2588 PVM pVM = pDevIns->Internal.s.pVMR3;
2589 VM_ASSERT_EMT(pVM);
2590 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2591 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2592 uint8_t u8Mode;
2593 if (pVM->pdm.s.pDmac)
2594 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2595 else
2596 {
2597 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2598 u8Mode = 3 << 2 /* illegal mode type */;
2599 }
2600 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2601 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2602 return u8Mode;
2603}
2604
2605/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2606static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2607{
2608 PDMDEV_ASSERT_DEVINS(pDevIns);
2609 PVM pVM = pDevIns->Internal.s.pVMR3;
2610 VM_ASSERT_EMT(pVM);
2611 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2612 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2613
2614 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2615 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2616 REMR3NotifyDmaPending(pVM);
2617 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2618}
2619
2620
2621/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2622static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2623{
2624 PDMDEV_ASSERT_DEVINS(pDevIns);
2625 PVM pVM = pDevIns->Internal.s.pVMR3;
2626 VM_ASSERT_EMT(pVM);
2627
2628 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2629 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2630 int rc;
2631 if (pVM->pdm.s.pRtc)
2632 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2633 else
2634 rc = VERR_PDM_NO_RTC_INSTANCE;
2635
2636 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2637 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2638 return rc;
2639}
2640
2641
2642/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2643static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2644{
2645 PDMDEV_ASSERT_DEVINS(pDevIns);
2646 PVM pVM = pDevIns->Internal.s.pVMR3;
2647 VM_ASSERT_EMT(pVM);
2648
2649 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2650 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2651 int rc;
2652 if (pVM->pdm.s.pRtc)
2653 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2654 else
2655 rc = VERR_PDM_NO_RTC_INSTANCE;
2656
2657 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2658 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2659 return rc;
2660}
2661
2662
2663/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2664static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2665 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2666{
2667 PDMDEV_ASSERT_DEVINS(pDevIns);
2668 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2669
2670 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2671 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2672 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2673
2674 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2675
2676 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2677 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2678}
2679
2680
2681/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2682static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2683{
2684 PDMDEV_ASSERT_DEVINS(pDevIns);
2685 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2686 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2687
2688 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2689
2690 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2691 return rc;
2692}
2693
2694
2695/**
2696 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2697 */
2698static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2699{
2700 PDMDEV_ASSERT_DEVINS(pDevIns);
2701 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2702 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2703 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2704
2705/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
2706 * use a real string cache. */
2707 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2708
2709 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2710 return rc;
2711}
2712
2713
2714/**
2715 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2716 */
2717static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2718{
2719 PDMDEV_ASSERT_DEVINS(pDevIns);
2720 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2721 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
2722 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2723
2724 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2725
2726 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2727
2728 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2729 return rc;
2730}
2731
2732
2733/**
2734 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2735 */
2736static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2737{
2738 PDMDEV_ASSERT_DEVINS(pDevIns);
2739 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2740 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2741 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2742
2743 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2744
2745 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2746 return rc;
2747}
2748
2749
2750/**
2751 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2752 */
2753static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2754{
2755 PDMDEV_ASSERT_DEVINS(pDevIns);
2756 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2757 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2758 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2759
2760 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2761
2762 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2763 return rc;
2764}
2765
2766
2767/**
2768 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2769 */
2770static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2771 const char *pszDesc, PRTRCPTR pRCPtr)
2772{
2773 PDMDEV_ASSERT_DEVINS(pDevIns);
2774 PVM pVM = pDevIns->Internal.s.pVMR3;
2775 VM_ASSERT_EMT(pVM);
2776 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2777 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2778
2779 if (pDevIns->iInstance > 0)
2780 {
2781 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2782 if (pszDesc2)
2783 pszDesc = pszDesc2;
2784 }
2785
2786 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2787
2788 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2789 return rc;
2790}
2791
2792
2793/**
2794 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2795 */
2796static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2797 const char *pszDesc, PRTR0PTR pR0Ptr)
2798{
2799 PDMDEV_ASSERT_DEVINS(pDevIns);
2800 PVM pVM = pDevIns->Internal.s.pVMR3;
2801 VM_ASSERT_EMT(pVM);
2802 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2803 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2804
2805 if (pDevIns->iInstance > 0)
2806 {
2807 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2808 if (pszDesc2)
2809 pszDesc = pszDesc2;
2810 }
2811
2812 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2813
2814 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
2815 return rc;
2816}
2817
2818
2819/**
2820 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2821 */
2822static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2823{
2824 PDMDEV_ASSERT_DEVINS(pDevIns);
2825 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2826
2827 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2828 return rc;
2829}
2830
2831
2832/**
2833 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2834 */
2835static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2836{
2837 PDMDEV_ASSERT_DEVINS(pDevIns);
2838 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2839
2840 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2841 return rc;
2842}
2843
2844
2845/**
2846 * The device helper structure for trusted devices.
2847 */
2848const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2849{
2850 PDM_DEVHLP_VERSION,
2851 pdmR3DevHlp_IOPortRegister,
2852 pdmR3DevHlp_IOPortRegisterGC,
2853 pdmR3DevHlp_IOPortRegisterR0,
2854 pdmR3DevHlp_IOPortDeregister,
2855 pdmR3DevHlp_MMIORegister,
2856 pdmR3DevHlp_MMIORegisterGC,
2857 pdmR3DevHlp_MMIORegisterR0,
2858 pdmR3DevHlp_MMIODeregister,
2859 pdmR3DevHlp_ROMRegister,
2860 pdmR3DevHlp_SSMRegister,
2861 pdmR3DevHlp_TMTimerCreate,
2862 pdmR3DevHlp_PCIRegister,
2863 pdmR3DevHlp_PCIIORegionRegister,
2864 pdmR3DevHlp_PCISetConfigCallbacks,
2865 pdmR3DevHlp_PCISetIrq,
2866 pdmR3DevHlp_PCISetIrqNoWait,
2867 pdmR3DevHlp_ISASetIrq,
2868 pdmR3DevHlp_ISASetIrqNoWait,
2869 pdmR3DevHlp_DriverAttach,
2870 pdmR3DevHlp_MMHeapAlloc,
2871 pdmR3DevHlp_MMHeapAllocZ,
2872 pdmR3DevHlp_MMHeapFree,
2873 pdmR3DevHlp_VMSetError,
2874 pdmR3DevHlp_VMSetErrorV,
2875 pdmR3DevHlp_VMSetRuntimeError,
2876 pdmR3DevHlp_VMSetRuntimeErrorV,
2877 pdmR3DevHlp_VMState,
2878 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2879 pdmR3DevHlp_AssertEMT,
2880 pdmR3DevHlp_AssertOther,
2881 pdmR3DevHlp_DBGFStopV,
2882 pdmR3DevHlp_DBGFInfoRegister,
2883 pdmR3DevHlp_STAMRegister,
2884 pdmR3DevHlp_STAMRegisterF,
2885 pdmR3DevHlp_STAMRegisterV,
2886 pdmR3DevHlp_RTCRegister,
2887 pdmR3DevHlp_PDMQueueCreate,
2888 pdmR3DevHlp_CritSectInit,
2889 pdmR3DevHlp_UTCNow,
2890 pdmR3DevHlp_PDMThreadCreate,
2891 pdmR3DevHlp_PhysGCPtr2GCPhys,
2892 pdmR3DevHlp_SetAsyncNotification,
2893 pdmR3DevHlp_AsyncNotificationCompleted,
2894 0,
2895 0,
2896 0,
2897 0,
2898 0,
2899 0,
2900 0,
2901 0,
2902 0,
2903 0,
2904 pdmR3DevHlp_GetVM,
2905 pdmR3DevHlp_PCIBusRegister,
2906 pdmR3DevHlp_PICRegister,
2907 pdmR3DevHlp_APICRegister,
2908 pdmR3DevHlp_IOAPICRegister,
2909 pdmR3DevHlp_DMACRegister,
2910 pdmR3DevHlp_PhysRead,
2911 pdmR3DevHlp_PhysWrite,
2912 pdmR3DevHlp_PhysGCPhys2CCPtr,
2913 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2914 pdmR3DevHlp_PhysReleasePageMappingLock,
2915 pdmR3DevHlp_PhysReadGCVirt,
2916 pdmR3DevHlp_PhysWriteGCVirt,
2917 pdmR3DevHlp_A20IsEnabled,
2918 pdmR3DevHlp_A20Set,
2919 pdmR3DevHlp_VMReset,
2920 pdmR3DevHlp_VMSuspend,
2921 pdmR3DevHlp_VMPowerOff,
2922 pdmR3DevHlp_DMARegister,
2923 pdmR3DevHlp_DMAReadMemory,
2924 pdmR3DevHlp_DMAWriteMemory,
2925 pdmR3DevHlp_DMASetDREQ,
2926 pdmR3DevHlp_DMAGetChannelMode,
2927 pdmR3DevHlp_DMASchedule,
2928 pdmR3DevHlp_CMOSWrite,
2929 pdmR3DevHlp_CMOSRead,
2930 pdmR3DevHlp_GetCpuId,
2931 pdmR3DevHlp_ROMProtectShadow,
2932 pdmR3DevHlp_MMIO2Register,
2933 pdmR3DevHlp_MMIO2Deregister,
2934 pdmR3DevHlp_MMIO2Map,
2935 pdmR3DevHlp_MMIO2Unmap,
2936 pdmR3DevHlp_MMHyperMapMMIO2,
2937 pdmR3DevHlp_MMIO2MapKernel,
2938 pdmR3DevHlp_RegisterVMMDevHeap,
2939 pdmR3DevHlp_UnregisterVMMDevHeap,
2940 pdmR3DevHlp_GetVMCPU,
2941 PDM_DEVHLP_VERSION /* the end */
2942};
2943
2944
2945
2946
2947/** @copydoc PDMDEVHLPR3::pfnGetVM */
2948static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2949{
2950 PDMDEV_ASSERT_DEVINS(pDevIns);
2951 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2952 return NULL;
2953}
2954
2955
2956/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2957static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2958{
2959 PDMDEV_ASSERT_DEVINS(pDevIns);
2960 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2961 NOREF(pPciBusReg);
2962 NOREF(ppPciHlpR3);
2963 return VERR_ACCESS_DENIED;
2964}
2965
2966
2967/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2968static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2969{
2970 PDMDEV_ASSERT_DEVINS(pDevIns);
2971 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2972 NOREF(pPicReg);
2973 NOREF(ppPicHlpR3);
2974 return VERR_ACCESS_DENIED;
2975}
2976
2977
2978/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2979static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2980{
2981 PDMDEV_ASSERT_DEVINS(pDevIns);
2982 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2983 NOREF(pApicReg);
2984 NOREF(ppApicHlpR3);
2985 return VERR_ACCESS_DENIED;
2986}
2987
2988
2989/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2990static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2991{
2992 PDMDEV_ASSERT_DEVINS(pDevIns);
2993 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2994 NOREF(pIoApicReg);
2995 NOREF(ppIoApicHlpR3);
2996 return VERR_ACCESS_DENIED;
2997}
2998
2999
3000/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
3001static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3002{
3003 PDMDEV_ASSERT_DEVINS(pDevIns);
3004 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3005 NOREF(pDmacReg);
3006 NOREF(ppDmacHlp);
3007 return VERR_ACCESS_DENIED;
3008}
3009
3010
3011/** @copydoc PDMDEVHLPR3::pfnPhysRead */
3012static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3013{
3014 PDMDEV_ASSERT_DEVINS(pDevIns);
3015 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3016 NOREF(GCPhys);
3017 NOREF(pvBuf);
3018 NOREF(cbRead);
3019 return VERR_ACCESS_DENIED;
3020}
3021
3022
3023/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
3024static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3025{
3026 PDMDEV_ASSERT_DEVINS(pDevIns);
3027 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3028 NOREF(GCPhys);
3029 NOREF(pvBuf);
3030 NOREF(cbWrite);
3031 return VERR_ACCESS_DENIED;
3032}
3033
3034
3035/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
3036static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3037{
3038 PDMDEV_ASSERT_DEVINS(pDevIns);
3039 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3040 NOREF(GCPhys);
3041 NOREF(fFlags);
3042 NOREF(ppv);
3043 NOREF(pLock);
3044 return VERR_ACCESS_DENIED;
3045}
3046
3047
3048/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
3049static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
3050{
3051 PDMDEV_ASSERT_DEVINS(pDevIns);
3052 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3053 NOREF(GCPhys);
3054 NOREF(fFlags);
3055 NOREF(ppv);
3056 NOREF(pLock);
3057 return VERR_ACCESS_DENIED;
3058}
3059
3060
3061/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
3062static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3063{
3064 PDMDEV_ASSERT_DEVINS(pDevIns);
3065 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3066 NOREF(pLock);
3067}
3068
3069
3070/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
3071static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3072{
3073 PDMDEV_ASSERT_DEVINS(pDevIns);
3074 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3075 NOREF(pvDst);
3076 NOREF(GCVirtSrc);
3077 NOREF(cb);
3078 return VERR_ACCESS_DENIED;
3079}
3080
3081
3082/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
3083static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3084{
3085 PDMDEV_ASSERT_DEVINS(pDevIns);
3086 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3087 NOREF(GCVirtDst);
3088 NOREF(pvSrc);
3089 NOREF(cb);
3090 return VERR_ACCESS_DENIED;
3091}
3092
3093
3094/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
3095static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3096{
3097 PDMDEV_ASSERT_DEVINS(pDevIns);
3098 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3099 return false;
3100}
3101
3102
3103/** @copydoc PDMDEVHLPR3::pfnA20Set */
3104static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3105{
3106 PDMDEV_ASSERT_DEVINS(pDevIns);
3107 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3108 NOREF(fEnable);
3109}
3110
3111
3112/** @copydoc PDMDEVHLPR3::pfnVMReset */
3113static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3114{
3115 PDMDEV_ASSERT_DEVINS(pDevIns);
3116 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3117 return VERR_ACCESS_DENIED;
3118}
3119
3120
3121/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
3122static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3123{
3124 PDMDEV_ASSERT_DEVINS(pDevIns);
3125 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3126 return VERR_ACCESS_DENIED;
3127}
3128
3129
3130/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
3131static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3132{
3133 PDMDEV_ASSERT_DEVINS(pDevIns);
3134 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3135 return VERR_ACCESS_DENIED;
3136}
3137
3138/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3139static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3140{
3141 PDMDEV_ASSERT_DEVINS(pDevIns);
3142 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3143 return VERR_ACCESS_DENIED;
3144}
3145
3146
3147/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3148static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3149{
3150 PDMDEV_ASSERT_DEVINS(pDevIns);
3151 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3152 if (pcbRead)
3153 *pcbRead = 0;
3154 return VERR_ACCESS_DENIED;
3155}
3156
3157
3158/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3159static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3160{
3161 PDMDEV_ASSERT_DEVINS(pDevIns);
3162 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3163 if (pcbWritten)
3164 *pcbWritten = 0;
3165 return VERR_ACCESS_DENIED;
3166}
3167
3168
3169/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3170static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3171{
3172 PDMDEV_ASSERT_DEVINS(pDevIns);
3173 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3174 return VERR_ACCESS_DENIED;
3175}
3176
3177
3178/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3179static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3180{
3181 PDMDEV_ASSERT_DEVINS(pDevIns);
3182 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3183 return 3 << 2 /* illegal mode type */;
3184}
3185
3186
3187/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3188static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3189{
3190 PDMDEV_ASSERT_DEVINS(pDevIns);
3191 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3192}
3193
3194
3195/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3196static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3197{
3198 PDMDEV_ASSERT_DEVINS(pDevIns);
3199 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3200 return VERR_ACCESS_DENIED;
3201}
3202
3203
3204/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3205static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3206{
3207 PDMDEV_ASSERT_DEVINS(pDevIns);
3208 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3209 return VERR_ACCESS_DENIED;
3210}
3211
3212
3213/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3214static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3215 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3216{
3217 PDMDEV_ASSERT_DEVINS(pDevIns);
3218 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3219}
3220
3221
3222/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3223static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3224{
3225 PDMDEV_ASSERT_DEVINS(pDevIns);
3226 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3227 return VERR_ACCESS_DENIED;
3228}
3229
3230
3231/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3232static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3233{
3234 PDMDEV_ASSERT_DEVINS(pDevIns);
3235 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3236 return VERR_ACCESS_DENIED;
3237}
3238
3239
3240/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3241static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3242{
3243 PDMDEV_ASSERT_DEVINS(pDevIns);
3244 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3245 return VERR_ACCESS_DENIED;
3246}
3247
3248
3249/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3250static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3251{
3252 PDMDEV_ASSERT_DEVINS(pDevIns);
3253 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3254 return VERR_ACCESS_DENIED;
3255}
3256
3257
3258/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3259static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3260{
3261 PDMDEV_ASSERT_DEVINS(pDevIns);
3262 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3263 return VERR_ACCESS_DENIED;
3264}
3265
3266
3267/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3268static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3269{
3270 PDMDEV_ASSERT_DEVINS(pDevIns);
3271 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3272 return VERR_ACCESS_DENIED;
3273}
3274
3275
3276/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3277static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3278{
3279 PDMDEV_ASSERT_DEVINS(pDevIns);
3280 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3281 return VERR_ACCESS_DENIED;
3282}
3283
3284
3285/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3286static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3287{
3288 PDMDEV_ASSERT_DEVINS(pDevIns);
3289 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3290 return VERR_ACCESS_DENIED;
3291}
3292
3293
3294/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3295static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3296{
3297 PDMDEV_ASSERT_DEVINS(pDevIns);
3298 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3299 return VERR_ACCESS_DENIED;
3300}
3301
3302
3303/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3304static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3305{
3306 PDMDEV_ASSERT_DEVINS(pDevIns);
3307 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3308 return NULL;
3309}
3310
3311
3312/**
3313 * The device helper structure for non-trusted devices.
3314 */
3315const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3316{
3317 PDM_DEVHLP_VERSION,
3318 pdmR3DevHlp_IOPortRegister,
3319 pdmR3DevHlp_IOPortRegisterGC,
3320 pdmR3DevHlp_IOPortRegisterR0,
3321 pdmR3DevHlp_IOPortDeregister,
3322 pdmR3DevHlp_MMIORegister,
3323 pdmR3DevHlp_MMIORegisterGC,
3324 pdmR3DevHlp_MMIORegisterR0,
3325 pdmR3DevHlp_MMIODeregister,
3326 pdmR3DevHlp_ROMRegister,
3327 pdmR3DevHlp_SSMRegister,
3328 pdmR3DevHlp_TMTimerCreate,
3329 pdmR3DevHlp_PCIRegister,
3330 pdmR3DevHlp_PCIIORegionRegister,
3331 pdmR3DevHlp_PCISetConfigCallbacks,
3332 pdmR3DevHlp_PCISetIrq,
3333 pdmR3DevHlp_PCISetIrqNoWait,
3334 pdmR3DevHlp_ISASetIrq,
3335 pdmR3DevHlp_ISASetIrqNoWait,
3336 pdmR3DevHlp_DriverAttach,
3337 pdmR3DevHlp_MMHeapAlloc,
3338 pdmR3DevHlp_MMHeapAllocZ,
3339 pdmR3DevHlp_MMHeapFree,
3340 pdmR3DevHlp_VMSetError,
3341 pdmR3DevHlp_VMSetErrorV,
3342 pdmR3DevHlp_VMSetRuntimeError,
3343 pdmR3DevHlp_VMSetRuntimeErrorV,
3344 pdmR3DevHlp_VMState,
3345 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3346 pdmR3DevHlp_AssertEMT,
3347 pdmR3DevHlp_AssertOther,
3348 pdmR3DevHlp_DBGFStopV,
3349 pdmR3DevHlp_DBGFInfoRegister,
3350 pdmR3DevHlp_STAMRegister,
3351 pdmR3DevHlp_STAMRegisterF,
3352 pdmR3DevHlp_STAMRegisterV,
3353 pdmR3DevHlp_RTCRegister,
3354 pdmR3DevHlp_PDMQueueCreate,
3355 pdmR3DevHlp_CritSectInit,
3356 pdmR3DevHlp_UTCNow,
3357 pdmR3DevHlp_PDMThreadCreate,
3358 pdmR3DevHlp_PhysGCPtr2GCPhys,
3359 pdmR3DevHlp_SetAsyncNotification,
3360 pdmR3DevHlp_AsyncNotificationCompleted,
3361 0,
3362 0,
3363 0,
3364 0,
3365 0,
3366 0,
3367 0,
3368 0,
3369 0,
3370 0,
3371 pdmR3DevHlp_Untrusted_GetVM,
3372 pdmR3DevHlp_Untrusted_PCIBusRegister,
3373 pdmR3DevHlp_Untrusted_PICRegister,
3374 pdmR3DevHlp_Untrusted_APICRegister,
3375 pdmR3DevHlp_Untrusted_IOAPICRegister,
3376 pdmR3DevHlp_Untrusted_DMACRegister,
3377 pdmR3DevHlp_Untrusted_PhysRead,
3378 pdmR3DevHlp_Untrusted_PhysWrite,
3379 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3380 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3381 pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3382 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3383 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3384 pdmR3DevHlp_Untrusted_A20IsEnabled,
3385 pdmR3DevHlp_Untrusted_A20Set,
3386 pdmR3DevHlp_Untrusted_VMReset,
3387 pdmR3DevHlp_Untrusted_VMSuspend,
3388 pdmR3DevHlp_Untrusted_VMPowerOff,
3389 pdmR3DevHlp_Untrusted_DMARegister,
3390 pdmR3DevHlp_Untrusted_DMAReadMemory,
3391 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3392 pdmR3DevHlp_Untrusted_DMASetDREQ,
3393 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3394 pdmR3DevHlp_Untrusted_DMASchedule,
3395 pdmR3DevHlp_Untrusted_CMOSWrite,
3396 pdmR3DevHlp_Untrusted_CMOSRead,
3397 pdmR3DevHlp_Untrusted_GetCpuId,
3398 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3399 pdmR3DevHlp_Untrusted_MMIO2Register,
3400 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3401 pdmR3DevHlp_Untrusted_MMIO2Map,
3402 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3403 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3404 pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3405 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3406 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3407 pdmR3DevHlp_Untrusted_GetVMCPU,
3408 PDM_DEVHLP_VERSION /* the end */
3409};
3410
3411
3412
3413/**
3414 * Queue consumer callback for internal component.
3415 *
3416 * @returns Success indicator.
3417 * If false the item will not be removed and the flushing will stop.
3418 * @param pVM The VM handle.
3419 * @param pItem The item to consume. Upon return this item will be freed.
3420 */
3421DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3422{
3423 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3424 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3425 switch (pTask->enmOp)
3426 {
3427 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3428 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3429 break;
3430
3431 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3432 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3433 break;
3434
3435 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3436 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3437 break;
3438
3439 default:
3440 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3441 break;
3442 }
3443 return true;
3444}
3445
3446/** @} */
3447
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