VirtualBox

source: vbox/trunk/src/VBox/VMM/IOM.cpp@ 25414

Last change on this file since 25414 was 25006, checked in by vboxsync, 15 years ago

IOMR3IOPortDeregister: Fixed rc handling.
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1/* $Id: IOM.cpp 25006 2009-11-26 14:46:03Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/** @page pg_iom IOM - The Input / Output Monitor
24 *
25 * The input/output monitor will handle I/O exceptions routing them to the
26 * appropriate device. It implements an API to register and deregister virtual
27 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
28 * and a set of callback functions.
29 *
30 * @see grp_iom
31 *
32 *
33 * @section sec_iom_rawmode Raw-Mode
34 *
35 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
36 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
37 * dissassembler (DIS) to figure which instruction caused it (there are a number
38 * of instructions in addition to the I/O ones) and if it's an I/O port access
39 * it will hand it to IOMGCIOPortHandler (via EMInterpretPortIO).
40 * IOMGCIOPortHandler will lookup the port in the AVL tree of registered
41 * handlers. If found, the handler will be called otherwise default action is
42 * taken. (Default action is to write into the void and read all set bits.)
43 *
44 * Memory Mapped I/O (MMIO) is implemented as a sligtly special case of PGM
45 * access handlers. An MMIO range is registered with IOM which then registers it
46 * with the PGM access handler sub-system. The access handler catches all
47 * access and will be called in the context of a \#PF handler. In RC and R0 this
48 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (althought in
49 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
50 * the instruction that is doing the access and pass the corresponding reads /
51 * writes to the device.
52 *
53 * Emulating I/O port access is less complex and should be sligtly faster than
54 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
55 * Devices which are freqently accessed should register GC handlers to speed up
56 * execution.
57 *
58 *
59 * @section sec_iom_hwaccm Hardware Assisted Virtualization Mode
60 *
61 * When running in hardware assisted virtualization mode we'll be doing much the
62 * same things as in raw-mode. The main difference is that we're running in the
63 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
64 * exits.
65 *
66 *
67 * @section sec_iom_rem Recompiled Execution Mode
68 *
69 * When running in the recompiler things are different. I/O port access is
70 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
71 * be handled in one of two ways. The normal way is that we have a registered a
72 * special RAM range with the recompiler and in the three callbacks (for byte,
73 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
74 * alternative ways that the physical memory access which goes via PGM will take
75 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
76 * - this shouldn't happen but it is an alternative...
77 *
78 *
79 * @section sec_iom_other Other Accesses
80 *
81 * I/O ports aren't really exposed in any other way, unless you count the
82 * instruction interpreter in EM, but that's just what we're doing in the
83 * raw-mode \#GP(0) case really. Now it's possible to call IOMIOPortRead and
84 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
85 * and should only be done as temporary hacks (the PC BIOS device used to
86 * setup the CMOS this way back in the dark ages).
87 *
88 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
89 * for the same reasons and with the same restrictions. OTOH since MMIO is
90 * mapped into the physical memory address space, it can be accessed in a number
91 * of ways thru PGM.
92 *
93 */
94
95
96/*******************************************************************************
97* Header Files *
98*******************************************************************************/
99#define LOG_GROUP LOG_GROUP_IOM
100#include <VBox/iom.h>
101#include <VBox/cpum.h>
102#include <VBox/pgm.h>
103#include <VBox/sup.h>
104#include <VBox/mm.h>
105#include <VBox/stam.h>
106#include <VBox/dbgf.h>
107#include <VBox/pdm.h>
108#include "IOMInternal.h"
109#include <VBox/vm.h>
110
111#include <VBox/param.h>
112#include <iprt/assert.h>
113#include <iprt/alloc.h>
114#include <iprt/string.h>
115#include <VBox/log.h>
116#include <VBox/err.h>
117
118
119/*******************************************************************************
120* Internal Functions *
121*******************************************************************************/
122static void iomR3FlushCache(PVM pVM);
123static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
124static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
125static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
126static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
127static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
128static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
129static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
130static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
131
132#ifdef VBOX_WITH_STATISTICS
133static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
134#endif
135
136
137/**
138 * Initializes the IOM.
139 *
140 * @returns VBox status code.
141 * @param pVM The VM to operate on.
142 */
143VMMR3DECL(int) IOMR3Init(PVM pVM)
144{
145 LogFlow(("IOMR3Init:\n"));
146
147 /*
148 * Assert alignment and sizes.
149 */
150 AssertCompileMemberAlignment(VM, iom.s, 32);
151 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
152 AssertCompileMemberAlignment(IOM, EmtLock, sizeof(uintptr_t));
153
154 /*
155 * Setup any fixed pointers and offsets.
156 */
157 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
158
159 /*
160 * Initialize the REM critical section.
161 */
162 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.EmtLock, "IOM EMT Lock");
163 AssertRCReturn(rc, rc);
164
165 /*
166 * Allocate the trees structure.
167 */
168 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
169 if (RT_SUCCESS(rc))
170 {
171 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
172 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
173 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
174 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
175
176 /*
177 * Info.
178 */
179 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
180 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
181
182 /*
183 * Statistics.
184 */
185 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
186 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
187 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
188 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
189 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
190 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
191 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
192 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
193 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
201#ifdef IOM_WITH_MOVS_SUPPORT
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
206#endif
207 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
208 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
209 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
210 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
211 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
212 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
213 }
214
215 /* Redundant, but just in case we change something in the future */
216 iomR3FlushCache(pVM);
217
218 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
219 return rc;
220}
221
222
223/**
224 * Flushes the IOM port & statistics lookup cache
225 *
226 * @param pVM The VM.
227 */
228static void iomR3FlushCache(PVM pVM)
229{
230 iomLock(pVM);
231 /*
232 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
233 */
234 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
235 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
236 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
237 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
238 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
239 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
240
241 pVM->iom.s.pRangeLastReadR3 = NULL;
242 pVM->iom.s.pRangeLastWriteR3 = NULL;
243 pVM->iom.s.pStatsLastReadR3 = NULL;
244 pVM->iom.s.pStatsLastWriteR3 = NULL;
245 pVM->iom.s.pMMIORangeLastR3 = NULL;
246 pVM->iom.s.pMMIOStatsLastR3 = NULL;
247
248 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
249 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
250 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
251 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
252 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
253 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
254
255 iomUnlock(pVM);
256}
257
258
259/**
260 * The VM is being reset.
261 *
262 * @param pVM VM handle.
263 */
264VMMR3DECL(void) IOMR3Reset(PVM pVM)
265{
266 iomR3FlushCache(pVM);
267}
268
269
270/**
271 * Applies relocations to data and code managed by this
272 * component. This function will be called at init and
273 * whenever the VMM need to relocate it self inside the GC.
274 *
275 * The IOM will update the addresses used by the switcher.
276 *
277 * @param pVM The VM.
278 * @param offDelta Relocation delta relative to old location.
279 */
280VMMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
281{
282 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
283
284 /*
285 * Apply relocations to the GC callbacks.
286 */
287 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
288 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
289 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
290
291 if (pVM->iom.s.pfnMMIOHandlerRC)
292 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
293
294 /*
295 * Apply relocations to the cached GC handlers
296 */
297 if (pVM->iom.s.pRangeLastReadRC)
298 pVM->iom.s.pRangeLastReadRC += offDelta;
299 if (pVM->iom.s.pRangeLastWriteRC)
300 pVM->iom.s.pRangeLastWriteRC += offDelta;
301 if (pVM->iom.s.pStatsLastReadRC)
302 pVM->iom.s.pStatsLastReadRC += offDelta;
303 if (pVM->iom.s.pStatsLastWriteRC)
304 pVM->iom.s.pStatsLastWriteRC += offDelta;
305 if (pVM->iom.s.pMMIORangeLastRC)
306 pVM->iom.s.pMMIORangeLastRC += offDelta;
307 if (pVM->iom.s.pMMIOStatsLastRC)
308 pVM->iom.s.pMMIOStatsLastRC += offDelta;
309}
310
311
312/**
313 * Callback function for relocating a I/O port range.
314 *
315 * @returns 0 (continue enum)
316 * @param pNode Pointer to a IOMIOPORTRANGERC node.
317 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
318 * not certain the delta will fit in a void pointer for all possible configs.
319 */
320static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
321{
322 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
323 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
324
325 Assert(pRange->pDevIns);
326 pRange->pDevIns += offDelta;
327 if (pRange->pfnOutCallback)
328 pRange->pfnOutCallback += offDelta;
329 if (pRange->pfnInCallback)
330 pRange->pfnInCallback += offDelta;
331 if (pRange->pfnOutStrCallback)
332 pRange->pfnOutStrCallback += offDelta;
333 if (pRange->pfnInStrCallback)
334 pRange->pfnInStrCallback += offDelta;
335 if (pRange->pvUser > _64K)
336 pRange->pvUser += offDelta;
337 return 0;
338}
339
340
341/**
342 * Callback function for relocating a MMIO range.
343 *
344 * @returns 0 (continue enum)
345 * @param pNode Pointer to a IOMMMIORANGE node.
346 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
347 * not certain the delta will fit in a void pointer for all possible configs.
348 */
349static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
350{
351 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
352 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
353
354 if (pRange->pDevInsRC)
355 pRange->pDevInsRC += offDelta;
356 if (pRange->pfnWriteCallbackRC)
357 pRange->pfnWriteCallbackRC += offDelta;
358 if (pRange->pfnReadCallbackRC)
359 pRange->pfnReadCallbackRC += offDelta;
360 if (pRange->pfnFillCallbackRC)
361 pRange->pfnFillCallbackRC += offDelta;
362 if (pRange->pvUserRC > _64K)
363 pRange->pvUserRC += offDelta;
364
365 return 0;
366}
367
368
369/**
370 * Terminates the IOM.
371 *
372 * Termination means cleaning up and freeing all resources,
373 * the VM it self is at this point powered off or suspended.
374 *
375 * @returns VBox status code.
376 * @param pVM The VM to operate on.
377 */
378VMMR3DECL(int) IOMR3Term(PVM pVM)
379{
380 /*
381 * IOM is not owning anything but automatically freed resources,
382 * so there's nothing to do here.
383 */
384 return VINF_SUCCESS;
385}
386
387#ifdef VBOX_WITH_STATISTICS
388
389/**
390 * Create the statistics node for an I/O port.
391 *
392 * @returns Pointer to new stats node.
393 *
394 * @param pVM VM handle.
395 * @param Port Port.
396 * @param pszDesc Description.
397 */
398PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
399{
400 Assert(IOMIsLockOwner(pVM));
401 /* check if it already exists. */
402 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
403 if (pPort)
404 return pPort;
405
406 /* allocate stats node. */
407 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
408 AssertRC(rc);
409 if (RT_SUCCESS(rc))
410 {
411 /* insert into the tree. */
412 pPort->Core.Key = Port;
413 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
414 {
415 /* put a name on common ports. */
416 if (!pszDesc)
417 pszDesc = iomR3IOPortGetStandardName(Port);
418
419 /* register the statistics counters. */
420 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
421 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
422 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
423 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
424 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
425 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
426
427 /* Profiling */
428 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
429 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
430 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
431 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
432
433 return pPort;
434 }
435 AssertMsgFailed(("what! Port=%d\n", Port));
436 MMHyperFree(pVM, pPort);
437 }
438 return NULL;
439}
440
441
442/**
443 * Create the statistics node for an MMIO address.
444 *
445 * @returns Pointer to new stats node.
446 *
447 * @param pVM VM handle.
448 * @param GCPhys The address.
449 * @param pszDesc Description.
450 */
451PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
452{
453 Assert(IOMIsLockOwner(pVM));
454#ifdef DEBUG_sandervl
455 AssertGCPhys32(GCPhys);
456#endif
457 /* check if it already exists. */
458 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MMIOStatTree, GCPhys);
459 if (pStats)
460 return pStats;
461
462 /* allocate stats node. */
463 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
464 AssertRC(rc);
465 if (RT_SUCCESS(rc))
466 {
467 /* insert into the tree. */
468 pStats->Core.Key = GCPhys;
469 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOStatTree, &pStats->Core))
470 {
471 /* register the statistics counters. */
472 rc = STAMR3RegisterF(pVM, &pStats->ReadR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-R3", GCPhys); AssertRC(rc);
473 rc = STAMR3RegisterF(pVM, &pStats->WriteR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-R3", GCPhys); AssertRC(rc);
474 rc = STAMR3RegisterF(pVM, &pStats->ReadRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZ", GCPhys); AssertRC(rc);
475 rc = STAMR3RegisterF(pVM, &pStats->WriteRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZ", GCPhys); AssertRC(rc);
476 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZtoR3", GCPhys); AssertRC(rc);
477 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZtoR3", GCPhys); AssertRC(rc);
478
479 /* Profiling */
480 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-R3/Prof", GCPhys); AssertRC(rc);
481 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-R3/Prof", GCPhys); AssertRC(rc);
482 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-RZ/Prof", GCPhys); AssertRC(rc);
483 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-RZ/Prof", GCPhys); AssertRC(rc);
484
485 return pStats;
486 }
487 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
488 MMHyperFree(pVM, pStats);
489 }
490 return NULL;
491}
492
493#endif /* VBOX_WITH_STATISTICS */
494
495/**
496 * Registers a I/O port ring-3 handler.
497 *
498 * This API is called by PDM on behalf of a device. Devices must first register
499 * ring-3 ranges before any GC and R0 ranges can be registerd using IOMR3IOPortRegisterRC()
500 * and IOMR3IOPortRegisterR0().
501 *
502 *
503 * @returns VBox status code.
504 *
505 * @param pVM VM handle.
506 * @param pDevIns PDM device instance owning the port range.
507 * @param PortStart First port number in the range.
508 * @param cPorts Number of ports to register.
509 * @param pvUser User argument for the callbacks.
510 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
511 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
512 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
513 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
514 * @param pszDesc Pointer to description string. This must not be freed.
515 */
516VMMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
517 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
518 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
519{
520 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
521 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
522
523 /*
524 * Validate input.
525 */
526 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
527 || (RTUINT)PortStart + cPorts > 0x10000)
528 {
529 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
530 return VERR_IOM_INVALID_IOPORT_RANGE;
531 }
532 if (!pfnOutCallback && !pfnInCallback)
533 {
534 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
535 return VERR_INVALID_PARAMETER;
536 }
537 if (!pfnOutCallback)
538 pfnOutCallback = iomR3IOPortDummyOut;
539 if (!pfnInCallback)
540 pfnInCallback = iomR3IOPortDummyIn;
541 if (!pfnOutStrCallback)
542 pfnOutStrCallback = iomR3IOPortDummyOutStr;
543 if (!pfnInStrCallback)
544 pfnInStrCallback = iomR3IOPortDummyInStr;
545
546 /* Flush the IO port lookup cache */
547 iomR3FlushCache(pVM);
548
549 /*
550 * Allocate new range record and initialize it.
551 */
552 PIOMIOPORTRANGER3 pRange;
553 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
554 if (RT_SUCCESS(rc))
555 {
556 pRange->Core.Key = PortStart;
557 pRange->Core.KeyLast = PortStart + (cPorts - 1);
558 pRange->Port = PortStart;
559 pRange->cPorts = cPorts;
560 pRange->pvUser = pvUser;
561 pRange->pDevIns = pDevIns;
562 pRange->pfnOutCallback = pfnOutCallback;
563 pRange->pfnInCallback = pfnInCallback;
564 pRange->pfnOutStrCallback = pfnOutStrCallback;
565 pRange->pfnInStrCallback = pfnInStrCallback;
566 pRange->pszDesc = pszDesc;
567
568 /*
569 * Try Insert it.
570 */
571 iomLock(pVM);
572 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
573 {
574 #ifdef VBOX_WITH_STATISTICS
575 for (unsigned iPort = 0; iPort < cPorts; iPort++)
576 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
577 #endif
578 iomUnlock(pVM);
579 return VINF_SUCCESS;
580 }
581 iomUnlock(pVM);
582
583 /* conflict. */
584 DBGFR3Info(pVM, "ioport", NULL, NULL);
585 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
586 MMHyperFree(pVM, pRange);
587 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
588 }
589
590 return rc;
591}
592
593
594/**
595 * Registers a I/O port RC handler.
596 *
597 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
598 * using IOMIOPortRegisterR3() before calling this function.
599 *
600 *
601 * @returns VBox status code.
602 *
603 * @param pVM VM handle.
604 * @param pDevIns PDM device instance owning the port range.
605 * @param PortStart First port number in the range.
606 * @param cPorts Number of ports to register.
607 * @param pvUser User argument for the callbacks.
608 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
609 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
610 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
611 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
612 * @param pszDesc Pointer to description string. This must not be freed.
613 */
614VMMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
615 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
616 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
617{
618 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
619 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
620
621 /*
622 * Validate input.
623 */
624 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
625 || (RTUINT)PortStart + cPorts > 0x10000)
626 {
627 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
628 return VERR_IOM_INVALID_IOPORT_RANGE;
629 }
630 RTIOPORT PortLast = PortStart + (cPorts - 1);
631 if (!pfnOutCallback && !pfnInCallback)
632 {
633 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
634 return VERR_INVALID_PARAMETER;
635 }
636
637 iomLock(pVM);
638
639 /*
640 * Validate that there are ring-3 ranges for the ports.
641 */
642 RTIOPORT Port = PortStart;
643 while (Port <= PortLast && Port >= PortStart)
644 {
645 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
646 if (!pRange)
647 {
648 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
649 iomUnlock(pVM);
650 return VERR_IOM_NO_HC_IOPORT_RANGE;
651 }
652#ifndef IOM_NO_PDMINS_CHECKS
653# ifndef IN_RC
654 if (pRange->pDevIns != pDevIns)
655# else
656 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
657# endif
658 {
659 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
660 iomUnlock(pVM);
661 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
662 }
663#endif
664 Port = pRange->Core.KeyLast + 1;
665 }
666
667 /* Flush the IO port lookup cache */
668 iomR3FlushCache(pVM);
669
670 /*
671 * Allocate new range record and initialize it.
672 */
673 PIOMIOPORTRANGERC pRange;
674 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
675 if (RT_SUCCESS(rc))
676 {
677 pRange->Core.Key = PortStart;
678 pRange->Core.KeyLast = PortLast;
679 pRange->Port = PortStart;
680 pRange->cPorts = cPorts;
681 pRange->pvUser = pvUser;
682 pRange->pfnOutCallback = pfnOutCallback;
683 pRange->pfnInCallback = pfnInCallback;
684 pRange->pfnOutStrCallback = pfnOutStrCallback;
685 pRange->pfnInStrCallback = pfnInStrCallback;
686 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
687 pRange->pszDesc = pszDesc;
688
689 /*
690 * Insert it.
691 */
692 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
693 {
694 iomUnlock(pVM);
695 return VINF_SUCCESS;
696 }
697
698 /* conflict. */
699 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
700 MMHyperFree(pVM, pRange);
701 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
702 }
703 iomUnlock(pVM);
704 return rc;
705}
706
707
708/**
709 * Registers a Port IO R0 handler.
710 *
711 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
712 * using IOMR3IOPortRegisterR3() before calling this function.
713 *
714 *
715 * @returns VBox status code.
716 *
717 * @param pVM VM handle.
718 * @param pDevIns PDM device instance owning the port range.
719 * @param PortStart First port number in the range.
720 * @param cPorts Number of ports to register.
721 * @param pvUser User argument for the callbacks.
722 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
723 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
724 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
725 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
726 * @param pszDesc Pointer to description string. This must not be freed.
727 */
728VMMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
729 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
730 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
731 const char *pszDesc)
732{
733 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
734 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
735
736 /*
737 * Validate input.
738 */
739 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
740 || (RTUINT)PortStart + cPorts > 0x10000)
741 {
742 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
743 return VERR_IOM_INVALID_IOPORT_RANGE;
744 }
745 RTIOPORT PortLast = PortStart + (cPorts - 1);
746 if (!pfnOutCallback && !pfnInCallback)
747 {
748 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
749 return VERR_INVALID_PARAMETER;
750 }
751
752 iomLock(pVM);
753 /*
754 * Validate that there are ring-3 ranges for the ports.
755 */
756 RTIOPORT Port = PortStart;
757 while (Port <= PortLast && Port >= PortStart)
758 {
759 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
760 if (!pRange)
761 {
762 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
763 iomUnlock(pVM);
764 return VERR_IOM_NO_HC_IOPORT_RANGE;
765 }
766#ifndef IOM_NO_PDMINS_CHECKS
767# ifndef IN_RC
768 if (pRange->pDevIns != pDevIns)
769# else
770 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
771# endif
772 {
773 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
774 iomUnlock(pVM);
775 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
776 }
777#endif
778 Port = pRange->Core.KeyLast + 1;
779 }
780
781 /* Flush the IO port lookup cache */
782 iomR3FlushCache(pVM);
783
784 /*
785 * Allocate new range record and initialize it.
786 */
787 PIOMIOPORTRANGER0 pRange;
788 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
789 if (RT_SUCCESS(rc))
790 {
791 pRange->Core.Key = PortStart;
792 pRange->Core.KeyLast = PortLast;
793 pRange->Port = PortStart;
794 pRange->cPorts = cPorts;
795 pRange->pvUser = pvUser;
796 pRange->pfnOutCallback = pfnOutCallback;
797 pRange->pfnInCallback = pfnInCallback;
798 pRange->pfnOutStrCallback = pfnOutStrCallback;
799 pRange->pfnInStrCallback = pfnInStrCallback;
800 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
801 pRange->pszDesc = pszDesc;
802
803 /*
804 * Insert it.
805 */
806 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
807 {
808 iomUnlock(pVM);
809 return VINF_SUCCESS;
810 }
811
812 /* conflict. */
813 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
814 MMHyperFree(pVM, pRange);
815 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
816 }
817 iomUnlock(pVM);
818 return rc;
819}
820
821
822/**
823 * Deregisters a I/O Port range.
824 *
825 * The specified range must be registered using IOMR3IOPortRegister previous to
826 * this call. The range does can be a smaller part of the range specified to
827 * IOMR3IOPortRegister, but it can never be larger.
828 *
829 * This function will remove GC, R0 and R3 context port handlers for this range.
830 *
831 * @returns VBox status code.
832 *
833 * @param pVM The virtual machine.
834 * @param pDevIns The device instance associated with the range.
835 * @param PortStart First port number in the range.
836 * @param cPorts Number of ports to remove starting at PortStart.
837 *
838 * @remark This function mainly for PCI PnP Config and will not do
839 * all the checks you might expect it to do.
840 */
841VMMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
842{
843 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
844
845 /*
846 * Validate input.
847 */
848 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
849 || (RTUINT)PortStart + cPorts > 0x10000)
850 {
851 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
852 return VERR_IOM_INVALID_IOPORT_RANGE;
853 }
854
855 iomLock(pVM);
856
857 /* Flush the IO port lookup cache */
858 iomR3FlushCache(pVM);
859
860 /*
861 * Check ownership.
862 */
863 RTIOPORT PortLast = PortStart + (cPorts - 1);
864 RTIOPORT Port = PortStart;
865 while (Port <= PortLast && Port >= PortStart)
866 {
867 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
868 if (pRange)
869 {
870 Assert(Port <= pRange->Core.KeyLast);
871#ifndef IOM_NO_PDMINS_CHECKS
872 if (pRange->pDevIns != pDevIns)
873 {
874 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
875 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
876 iomUnlock(pVM);
877 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
878 }
879#endif /* !IOM_NO_PDMINS_CHECKS */
880 Port = pRange->Core.KeyLast;
881 }
882 Port++;
883 }
884
885 /*
886 * Remove any RC ranges first.
887 */
888 int rc = VINF_SUCCESS;
889 Port = PortStart;
890 while (Port <= PortLast && Port >= PortStart)
891 {
892 /*
893 * Try find range.
894 */
895 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
896 if (pRange)
897 {
898 if ( pRange->Core.Key == Port
899 && pRange->Core.KeyLast <= PortLast)
900 {
901 /*
902 * Kick out the entire range.
903 */
904 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
905 Assert(pv == (void *)pRange); NOREF(pv);
906 Port += pRange->cPorts;
907 MMHyperFree(pVM, pRange);
908 }
909 else if (pRange->Core.Key == Port)
910 {
911 /*
912 * Cut of the head of the range, done.
913 */
914 pRange->cPorts -= Port - pRange->Port;
915 pRange->Core.Key = Port;
916 pRange->Port = Port;
917 break;
918 }
919 else if (pRange->Core.KeyLast <= PortLast)
920 {
921 /*
922 * Just cut of the tail.
923 */
924 unsigned c = pRange->Core.KeyLast - Port + 1;
925 pRange->Core.KeyLast -= c;
926 pRange->cPorts -= c;
927 Port += c;
928 }
929 else
930 {
931 /*
932 * Split the range, done.
933 */
934 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
935 /* create tail. */
936 PIOMIOPORTRANGERC pRangeNew;
937 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
938 if (RT_FAILURE(rc2))
939 {
940 iomUnlock(pVM);
941 return rc2;
942 }
943 *pRangeNew = *pRange;
944 pRangeNew->Core.Key = PortLast;
945 pRangeNew->Port = PortLast;
946 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
947
948 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
949
950 /* adjust head */
951 pRange->Core.KeyLast = Port - 1;
952 pRange->cPorts = Port - pRange->Port;
953
954 /* insert */
955 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
956 {
957 AssertMsgFailed(("This cannot happen!\n"));
958 MMHyperFree(pVM, pRangeNew);
959 rc = VERR_INTERNAL_ERROR;
960 }
961 break;
962 }
963 }
964 else /* next port */
965 Port++;
966 } /* for all ports - RC. */
967
968
969 /*
970 * Remove any R0 ranges.
971 */
972 Port = PortStart;
973 while (Port <= PortLast && Port >= PortStart)
974 {
975 /*
976 * Try find range.
977 */
978 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
979 if (pRange)
980 {
981 if ( pRange->Core.Key == Port
982 && pRange->Core.KeyLast <= PortLast)
983 {
984 /*
985 * Kick out the entire range.
986 */
987 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
988 Assert(pv == (void *)pRange); NOREF(pv);
989 Port += pRange->cPorts;
990 MMHyperFree(pVM, pRange);
991 }
992 else if (pRange->Core.Key == Port)
993 {
994 /*
995 * Cut of the head of the range, done.
996 */
997 pRange->cPorts -= Port - pRange->Port;
998 pRange->Core.Key = Port;
999 pRange->Port = Port;
1000 break;
1001 }
1002 else if (pRange->Core.KeyLast <= PortLast)
1003 {
1004 /*
1005 * Just cut of the tail.
1006 */
1007 unsigned c = pRange->Core.KeyLast - Port + 1;
1008 pRange->Core.KeyLast -= c;
1009 pRange->cPorts -= c;
1010 Port += c;
1011 }
1012 else
1013 {
1014 /*
1015 * Split the range, done.
1016 */
1017 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1018 /* create tail. */
1019 PIOMIOPORTRANGER0 pRangeNew;
1020 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1021 if (RT_FAILURE(rc2))
1022 {
1023 iomUnlock(pVM);
1024 return rc2;
1025 }
1026 *pRangeNew = *pRange;
1027 pRangeNew->Core.Key = PortLast;
1028 pRangeNew->Port = PortLast;
1029 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1030
1031 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1032
1033 /* adjust head */
1034 pRange->Core.KeyLast = Port - 1;
1035 pRange->cPorts = Port - pRange->Port;
1036
1037 /* insert */
1038 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1039 {
1040 AssertMsgFailed(("This cannot happen!\n"));
1041 MMHyperFree(pVM, pRangeNew);
1042 rc = VERR_INTERNAL_ERROR;
1043 }
1044 break;
1045 }
1046 }
1047 else /* next port */
1048 Port++;
1049 } /* for all ports - R0. */
1050
1051 /*
1052 * And the same procedure for ring-3 ranges.
1053 */
1054 Port = PortStart;
1055 while (Port <= PortLast && Port >= PortStart)
1056 {
1057 /*
1058 * Try find range.
1059 */
1060 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1061 if (pRange)
1062 {
1063 if ( pRange->Core.Key == Port
1064 && pRange->Core.KeyLast <= PortLast)
1065 {
1066 /*
1067 * Kick out the entire range.
1068 */
1069 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1070 Assert(pv == (void *)pRange); NOREF(pv);
1071 Port += pRange->cPorts;
1072 MMHyperFree(pVM, pRange);
1073 }
1074 else if (pRange->Core.Key == Port)
1075 {
1076 /*
1077 * Cut of the head of the range, done.
1078 */
1079 pRange->cPorts -= Port - pRange->Port;
1080 pRange->Core.Key = Port;
1081 pRange->Port = Port;
1082 break;
1083 }
1084 else if (pRange->Core.KeyLast <= PortLast)
1085 {
1086 /*
1087 * Just cut of the tail.
1088 */
1089 unsigned c = pRange->Core.KeyLast - Port + 1;
1090 pRange->Core.KeyLast -= c;
1091 pRange->cPorts -= c;
1092 Port += c;
1093 }
1094 else
1095 {
1096 /*
1097 * Split the range, done.
1098 */
1099 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1100 /* create tail. */
1101 PIOMIOPORTRANGER3 pRangeNew;
1102 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1103 if (RT_FAILURE(rc2))
1104 {
1105 iomUnlock(pVM);
1106 return rc2;
1107 }
1108 *pRangeNew = *pRange;
1109 pRangeNew->Core.Key = PortLast;
1110 pRangeNew->Port = PortLast;
1111 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1112
1113 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1114
1115 /* adjust head */
1116 pRange->Core.KeyLast = Port - 1;
1117 pRange->cPorts = Port - pRange->Port;
1118
1119 /* insert */
1120 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1121 {
1122 AssertMsgFailed(("This cannot happen!\n"));
1123 MMHyperFree(pVM, pRangeNew);
1124 rc = VERR_INTERNAL_ERROR;
1125 }
1126 break;
1127 }
1128 }
1129 else /* next port */
1130 Port++;
1131 } /* for all ports - ring-3. */
1132
1133 /* done */
1134 iomUnlock(pVM);
1135 return rc;
1136}
1137
1138
1139/**
1140 * Dummy Port I/O Handler for IN operations.
1141 *
1142 * @returns VBox status code.
1143 *
1144 * @param pDevIns The device instance.
1145 * @param pvUser User argument.
1146 * @param Port Port number used for the IN operation.
1147 * @param pu32 Where to store the result.
1148 * @param cb Number of bytes read.
1149 */
1150static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1151{
1152 switch (cb)
1153 {
1154 case 1: *pu32 = 0xff; break;
1155 case 2: *pu32 = 0xffff; break;
1156 case 4: *pu32 = UINT32_C(0xffffffff); break;
1157 default:
1158 AssertReleaseMsgFailed(("cb=%d\n", cb));
1159 return VERR_INTERNAL_ERROR;
1160 }
1161 return VINF_SUCCESS;
1162}
1163
1164
1165/**
1166 * Dummy Port I/O Handler for string IN operations.
1167 *
1168 * @returns VBox status code.
1169 *
1170 * @param pDevIns The device instance.
1171 * @param pvUser User argument.
1172 * @param Port Port number used for the string IN operation.
1173 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1174 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1175 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1176 */
1177static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
1178{
1179 return VINF_SUCCESS;
1180}
1181
1182
1183/**
1184 * Dummy Port I/O Handler for OUT operations.
1185 *
1186 * @returns VBox status code.
1187 *
1188 * @param pDevIns The device instance.
1189 * @param pvUser User argument.
1190 * @param Port Port number used for the OUT operation.
1191 * @param u32 The value to output.
1192 * @param cb The value size in bytes.
1193 */
1194static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1195{
1196 return VINF_SUCCESS;
1197}
1198
1199
1200/**
1201 * Dummy Port I/O Handler for string OUT operations.
1202 *
1203 * @returns VBox status code.
1204 *
1205 * @param pDevIns The device instance.
1206 * @param pvUser User argument.
1207 * @param Port Port number used for the string OUT operation.
1208 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1209 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1210 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1211 */
1212static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
1213{
1214 return VINF_SUCCESS;
1215}
1216
1217
1218/**
1219 * Display a single I/O port ring-3 range.
1220 *
1221 * @returns 0
1222 * @param pNode Pointer to I/O port HC range.
1223 * @param pvUser Pointer to info output callback structure.
1224 */
1225static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1226{
1227 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1228 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1229 pHlp->pfnPrintf(pHlp,
1230 "%04x-%04x %p %p %p %p %s\n",
1231 pRange->Core.Key,
1232 pRange->Core.KeyLast,
1233 pRange->pDevIns,
1234 pRange->pfnInCallback,
1235 pRange->pfnOutCallback,
1236 pRange->pvUser,
1237 pRange->pszDesc);
1238 return 0;
1239}
1240
1241
1242/**
1243 * Display a single I/O port GC range.
1244 *
1245 * @returns 0
1246 * @param pNode Pointer to IOPORT GC range.
1247 * @param pvUser Pointer to info output callback structure.
1248 */
1249static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1250{
1251 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1252 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1253 pHlp->pfnPrintf(pHlp,
1254 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1255 pRange->Core.Key,
1256 pRange->Core.KeyLast,
1257 pRange->pDevIns,
1258 pRange->pfnInCallback,
1259 pRange->pfnOutCallback,
1260 pRange->pvUser,
1261 pRange->pszDesc);
1262 return 0;
1263}
1264
1265
1266/**
1267 * Display all registered I/O port ranges.
1268 *
1269 * @param pVM VM Handle.
1270 * @param pHlp The info helpers.
1271 * @param pszArgs Arguments, ignored.
1272 */
1273static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1274{
1275 NOREF(pszArgs);
1276 pHlp->pfnPrintf(pHlp,
1277 "I/O Port R3 ranges (pVM=%p)\n"
1278 "Range %.*s %.*s %.*s %.*s Description\n",
1279 pVM,
1280 sizeof(RTHCPTR) * 2, "pDevIns ",
1281 sizeof(RTHCPTR) * 2, "In ",
1282 sizeof(RTHCPTR) * 2, "Out ",
1283 sizeof(RTHCPTR) * 2, "pvUser ");
1284 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1285
1286 pHlp->pfnPrintf(pHlp,
1287 "I/O Port R0 ranges (pVM=%p)\n"
1288 "Range %.*s %.*s %.*s %.*s Description\n",
1289 pVM,
1290 sizeof(RTHCPTR) * 2, "pDevIns ",
1291 sizeof(RTHCPTR) * 2, "In ",
1292 sizeof(RTHCPTR) * 2, "Out ",
1293 sizeof(RTHCPTR) * 2, "pvUser ");
1294 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1295
1296 pHlp->pfnPrintf(pHlp,
1297 "I/O Port GC ranges (pVM=%p)\n"
1298 "Range %.*s %.*s %.*s %.*s Description\n",
1299 pVM,
1300 sizeof(RTRCPTR) * 2, "pDevIns ",
1301 sizeof(RTRCPTR) * 2, "In ",
1302 sizeof(RTRCPTR) * 2, "Out ",
1303 sizeof(RTRCPTR) * 2, "pvUser ");
1304 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1305
1306 if (pVM->iom.s.pRangeLastReadRC)
1307 {
1308 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1309 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1310 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1311 }
1312 if (pVM->iom.s.pStatsLastReadRC)
1313 {
1314 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1315 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1316 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1317 }
1318
1319 if (pVM->iom.s.pRangeLastWriteRC)
1320 {
1321 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1322 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1323 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1324 }
1325 if (pVM->iom.s.pStatsLastWriteRC)
1326 {
1327 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1328 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1329 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1330 }
1331
1332 if (pVM->iom.s.pRangeLastReadR3)
1333 {
1334 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1335 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1336 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1337 }
1338 if (pVM->iom.s.pStatsLastReadR3)
1339 {
1340 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1341 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1342 pRange->Core.Key, pRange);
1343 }
1344
1345 if (pVM->iom.s.pRangeLastWriteR3)
1346 {
1347 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1348 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1349 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1350 }
1351 if (pVM->iom.s.pStatsLastWriteR3)
1352 {
1353 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1354 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1355 pRange->Core.Key, pRange);
1356 }
1357
1358 if (pVM->iom.s.pRangeLastReadR0)
1359 {
1360 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1361 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1362 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1363 }
1364 if (pVM->iom.s.pStatsLastReadR0)
1365 {
1366 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1367 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1368 pRange->Core.Key, pRange);
1369 }
1370
1371 if (pVM->iom.s.pRangeLastWriteR0)
1372 {
1373 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1374 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1375 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1376 }
1377 if (pVM->iom.s.pStatsLastWriteR0)
1378 {
1379 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1380 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1381 pRange->Core.Key, pRange);
1382 }
1383}
1384
1385
1386/**
1387 * Registers a Memory Mapped I/O R3 handler.
1388 *
1389 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1390 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1391 *
1392 * @returns VBox status code.
1393 *
1394 * @param pVM VM handle.
1395 * @param pDevIns PDM device instance owning the MMIO range.
1396 * @param GCPhysStart First physical address in the range.
1397 * @param cbRange The size of the range (in bytes).
1398 * @param pvUser User argument for the callbacks.
1399 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1400 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1401 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1402 * @param pszDesc Pointer to description string. This must not be freed.
1403 */
1404VMMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1405 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1406 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1407{
1408 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1409 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1410 int rc;
1411
1412 /*
1413 * Validate input.
1414 */
1415 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1416 {
1417 AssertMsgFailed(("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange));
1418 return VERR_IOM_INVALID_MMIO_RANGE;
1419 }
1420
1421 /*
1422 * Resolve the GC/R0 handler addresses lazily because of init order.
1423 */
1424 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1425 {
1426 rc = PDMR3LdrGetSymbolRCLazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1427 AssertLogRelRCReturn(rc, rc);
1428 rc = PDMR3LdrGetSymbolR0Lazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1429 AssertLogRelRCReturn(rc, rc);
1430 }
1431
1432 /*
1433 * For the 2nd+ instance, mangle the description string so it's unique.
1434 * (PGM requires this.)
1435 */
1436 if (pDevIns->iInstance > 0) /** @todo Move to PDMDevHlp.cpp and use a string cache. */
1437 {
1438 pszDesc = MMR3HeapAPrintf(pVM, MM_TAG_IOM, "%s [%u]", pszDesc, pDevIns->iInstance);
1439 if (!pszDesc)
1440 return VERR_NO_MEMORY;
1441 }
1442
1443
1444 /*
1445 * Allocate new range record and initialize it.
1446 */
1447 PIOMMMIORANGE pRange;
1448 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1449 if (RT_SUCCESS(rc))
1450 {
1451 pRange->Core.Key = GCPhysStart;
1452 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1453 pRange->GCPhys = GCPhysStart;
1454 pRange->cb = cbRange;
1455 pRange->pszDesc = pszDesc;
1456
1457 pRange->pvUserR3 = pvUser;
1458 pRange->pDevInsR3 = pDevIns;
1459 pRange->pfnReadCallbackR3 = pfnReadCallback;
1460 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1461 pRange->pfnFillCallbackR3 = pfnFillCallback;
1462
1463 //pRange->pvUserR0 = NIL_RTR0PTR;
1464 //pRange->pDevInsR0 = NIL_RTR0PTR;
1465 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1466 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1467 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1468
1469 //pRange->pvUserRC = NIL_RTRCPTR;
1470 //pRange->pDevInsRC = NIL_RTRCPTR;
1471 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1472 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1473 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1474
1475 /*
1476 * Try register it with PGM and then insert it into the tree.
1477 */
1478 iomLock(pVM);
1479 iomR3FlushCache(pVM);
1480 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1481 IOMR3MMIOHandler, pRange,
1482 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1483 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1484 if (RT_SUCCESS(rc))
1485 {
1486 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1487 {
1488 iomUnlock(pVM);
1489 return VINF_SUCCESS;
1490 }
1491
1492 /* bail out */
1493 iomUnlock(pVM);
1494 DBGFR3Info(pVM, "mmio", NULL, NULL);
1495 AssertMsgFailed(("This cannot happen!\n"));
1496 rc = VERR_INTERNAL_ERROR;
1497 }
1498 else
1499 iomUnlock(pVM);
1500
1501 MMHyperFree(pVM, pRange);
1502 }
1503 if (pDevIns->iInstance > 0)
1504 MMR3HeapFree((void *)pszDesc);
1505 return rc;
1506}
1507
1508
1509/**
1510 * Registers a Memory Mapped I/O RC handler range.
1511 *
1512 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1513 * using IOMMMIORegisterR3() before calling this function.
1514 *
1515 *
1516 * @returns VBox status code.
1517 *
1518 * @param pVM VM handle.
1519 * @param pDevIns PDM device instance owning the MMIO range.
1520 * @param GCPhysStart First physical address in the range.
1521 * @param cbRange The size of the range (in bytes).
1522 * @param pvUser User argument for the callbacks.
1523 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1524 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1525 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1526 */
1527VMMR3DECL(int) IOMR3MMIORegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1528 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1529 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1530{
1531 LogFlow(("IOMR3MMIORegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1532 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1533
1534 /*
1535 * Validate input.
1536 */
1537 if (!pfnWriteCallback && !pfnReadCallback)
1538 {
1539 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1540 return VERR_INVALID_PARAMETER;
1541 }
1542
1543 /*
1544 * Find the MMIO range and check that the input matches.
1545 */
1546 iomLock(pVM);
1547 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1548 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1549 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1550 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1551 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1552
1553 pRange->pvUserRC = pvUser;
1554 pRange->pfnReadCallbackRC = pfnReadCallback;
1555 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1556 pRange->pfnFillCallbackRC = pfnFillCallback;
1557 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1558 iomUnlock(pVM);
1559
1560 return VINF_SUCCESS;
1561}
1562
1563
1564/**
1565 * Registers a Memory Mapped I/O R0 handler range.
1566 *
1567 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1568 * using IOMMR3MIORegisterHC() before calling this function.
1569 *
1570 *
1571 * @returns VBox status code.
1572 *
1573 * @param pVM VM handle.
1574 * @param pDevIns PDM device instance owning the MMIO range.
1575 * @param GCPhysStart First physical address in the range.
1576 * @param cbRange The size of the range (in bytes).
1577 * @param pvUser User argument for the callbacks.
1578 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1579 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1580 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1581 */
1582VMMR3DECL(int) IOMR3MMIORegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1583 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1584 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1585 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1586{
1587 LogFlow(("IOMR3MMIORegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1588 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1589
1590 /*
1591 * Validate input.
1592 */
1593 if (!pfnWriteCallback && !pfnReadCallback)
1594 {
1595 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1596 return VERR_INVALID_PARAMETER;
1597 }
1598
1599 /*
1600 * Find the MMIO range and check that the input matches.
1601 */
1602 iomLock(pVM);
1603 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1604 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1605 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1606 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1607 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1608
1609 pRange->pvUserR0 = pvUser;
1610 pRange->pfnReadCallbackR0 = pfnReadCallback;
1611 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1612 pRange->pfnFillCallbackR0 = pfnFillCallback;
1613 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1614 iomUnlock(pVM);
1615
1616 return VINF_SUCCESS;
1617}
1618
1619
1620/**
1621 * Deregisters a Memory Mapped I/O handler range.
1622 *
1623 * Registered GC, R0, and R3 ranges are affected.
1624 *
1625 * @returns VBox status code.
1626 *
1627 * @param pVM The virtual machine.
1628 * @param pDevIns Device instance which the MMIO region is registered.
1629 * @param GCPhysStart First physical address (GC) in the range.
1630 * @param cbRange Number of bytes to deregister.
1631 *
1632 * @remark This function mainly for PCI PnP Config and will not do
1633 * all the checks you might expect it to do.
1634 */
1635VMMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1636{
1637 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1638
1639 /*
1640 * Validate input.
1641 */
1642 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1643 if (GCPhysLast < GCPhysStart)
1644 {
1645 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1646 return VERR_IOM_INVALID_MMIO_RANGE;
1647 }
1648
1649 iomLock(pVM);
1650
1651 /*
1652 * Check ownership and such for the entire area.
1653 */
1654 RTGCPHYS GCPhys = GCPhysStart;
1655 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1656 {
1657 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
1658 if (!pRange)
1659 {
1660 iomUnlock(pVM);
1661 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1662 }
1663 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1664 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1665 iomUnlock(pVM),
1666 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1667 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1668 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1669 iomUnlock(pVM),
1670 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1671
1672 /* next */
1673 Assert(GCPhys <= pRange->Core.KeyLast);
1674 GCPhys = pRange->Core.KeyLast + 1;
1675 }
1676
1677 /*
1678 * Do the actual removing of the MMIO ranges.
1679 */
1680 GCPhys = GCPhysStart;
1681 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1682 {
1683 iomR3FlushCache(pVM);
1684
1685 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1686 Assert(pRange);
1687 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1688 iomUnlock(pVM);
1689
1690 /* remove it from PGM */
1691 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1692 AssertRC(rc);
1693
1694 iomLock(pVM);
1695
1696 /* advance and free. */
1697 GCPhys = pRange->Core.KeyLast + 1;
1698 if (pDevIns->iInstance > 0)
1699 MMR3HeapFree((void *)pRange->pszDesc);
1700 MMHyperFree(pVM, pRange);
1701 }
1702
1703 iomUnlock(pVM);
1704 return VINF_SUCCESS;
1705}
1706
1707
1708/**
1709 * Release the IOM lock if owned by the current VCPU
1710 *
1711 * @param pVM The VM to operate on.
1712 */
1713VMMR3DECL(void) IOMR3ReleaseOwnedLocks(PVM pVM)
1714{
1715 while (PDMCritSectIsOwner(&pVM->iom.s.EmtLock))
1716 PDMCritSectLeave(&pVM->iom.s.EmtLock);
1717}
1718
1719
1720/**
1721 * For TM only!
1722 *
1723 * @returns Pointer to the critical section.
1724 * @param pVM The VM handle.
1725 */
1726VMMR3DECL(PPDMCRITSECT) IOMR3GetCritSect(PVM pVM)
1727{
1728 return &pVM->iom.s.EmtLock;
1729}
1730
1731
1732/**
1733 * Display a single MMIO range.
1734 *
1735 * @returns 0
1736 * @param pNode Pointer to MMIO R3 range.
1737 * @param pvUser Pointer to info output callback structure.
1738 */
1739static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1740{
1741 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1742 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1743 pHlp->pfnPrintf(pHlp,
1744 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1745 pRange->Core.Key,
1746 pRange->Core.KeyLast,
1747 pRange->pDevInsR3,
1748 pRange->pfnReadCallbackR3,
1749 pRange->pfnWriteCallbackR3,
1750 pRange->pfnFillCallbackR3,
1751 pRange->pvUserR3,
1752 pRange->pszDesc);
1753 pHlp->pfnPrintf(pHlp,
1754 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1755 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1756 pRange->pDevInsR0,
1757 pRange->pfnReadCallbackR0,
1758 pRange->pfnWriteCallbackR0,
1759 pRange->pfnFillCallbackR0,
1760 pRange->pvUserR0);
1761 pHlp->pfnPrintf(pHlp,
1762 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1763 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1764 pRange->pDevInsRC,
1765 pRange->pfnReadCallbackRC,
1766 pRange->pfnWriteCallbackRC,
1767 pRange->pfnFillCallbackRC,
1768 pRange->pvUserRC);
1769 return 0;
1770}
1771
1772
1773/**
1774 * Display registered MMIO ranges to the log.
1775 *
1776 * @param pVM VM Handle.
1777 * @param pHlp The info helpers.
1778 * @param pszArgs Arguments, ignored.
1779 */
1780static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1781{
1782 NOREF(pszArgs);
1783 pHlp->pfnPrintf(pHlp,
1784 "MMIO ranges (pVM=%p)\n"
1785 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1786 pVM,
1787 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1788 sizeof(RTHCPTR) * 2, "pDevIns ",
1789 sizeof(RTHCPTR) * 2, "Read ",
1790 sizeof(RTHCPTR) * 2, "Write ",
1791 sizeof(RTHCPTR) * 2, "Fill ",
1792 sizeof(RTHCPTR) * 2, "pvUser ",
1793 "Description");
1794 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1795}
1796
1797
1798#ifdef VBOX_WITH_STATISTICS
1799/**
1800 * Tries to come up with the standard name for a port.
1801 *
1802 * @returns Pointer to readonly string if known.
1803 * @returns NULL if unknown port number.
1804 *
1805 * @param Port The port to name.
1806 */
1807static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1808{
1809 switch (Port)
1810 {
1811 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1812 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1813 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1814 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1815 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1816 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1817 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1818 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1819 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1820 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1821 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1822 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1823 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1824 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1825 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1826 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1827
1828 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1829 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1830 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1831 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1832 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1833 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1834 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1835 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1836 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1837 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1838 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1839 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1840 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1841 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1842 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1843 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1844 return "System Reserved";
1845
1846 case 0x60:
1847 case 0x64:
1848 return "Keyboard & Mouse";
1849
1850 case 0x378:
1851 case 0x379:
1852 case 0x37a:
1853 case 0x37b:
1854 case 0x37c:
1855 case 0x37d:
1856 case 0x37e:
1857 case 0x37f:
1858 case 0x3bc:
1859 case 0x3bd:
1860 case 0x3be:
1861 case 0x3bf:
1862 case 0x278:
1863 case 0x279:
1864 case 0x27a:
1865 case 0x27b:
1866 case 0x27c:
1867 case 0x27d:
1868 case 0x27e:
1869 case 0x27f:
1870 return "LPT1/2/3";
1871
1872 case 0x3f8:
1873 case 0x3f9:
1874 case 0x3fa:
1875 case 0x3fb:
1876 case 0x3fc:
1877 case 0x3fd:
1878 case 0x3fe:
1879 case 0x3ff:
1880 return "COM1";
1881
1882 case 0x2f8:
1883 case 0x2f9:
1884 case 0x2fa:
1885 case 0x2fb:
1886 case 0x2fc:
1887 case 0x2fd:
1888 case 0x2fe:
1889 case 0x2ff:
1890 return "COM2";
1891
1892 case 0x3e8:
1893 case 0x3e9:
1894 case 0x3ea:
1895 case 0x3eb:
1896 case 0x3ec:
1897 case 0x3ed:
1898 case 0x3ee:
1899 case 0x3ef:
1900 return "COM3";
1901
1902 case 0x2e8:
1903 case 0x2e9:
1904 case 0x2ea:
1905 case 0x2eb:
1906 case 0x2ec:
1907 case 0x2ed:
1908 case 0x2ee:
1909 case 0x2ef:
1910 return "COM4";
1911
1912 case 0x200:
1913 case 0x201:
1914 case 0x202:
1915 case 0x203:
1916 case 0x204:
1917 case 0x205:
1918 case 0x206:
1919 case 0x207:
1920 return "Joystick";
1921
1922 case 0x3f0:
1923 case 0x3f1:
1924 case 0x3f2:
1925 case 0x3f3:
1926 case 0x3f4:
1927 case 0x3f5:
1928 case 0x3f6:
1929 case 0x3f7:
1930 return "Floppy";
1931
1932 case 0x1f0:
1933 case 0x1f1:
1934 case 0x1f2:
1935 case 0x1f3:
1936 case 0x1f4:
1937 case 0x1f5:
1938 case 0x1f6:
1939 case 0x1f7:
1940 //case 0x3f6:
1941 //case 0x3f7:
1942 return "IDE 1st";
1943
1944 case 0x170:
1945 case 0x171:
1946 case 0x172:
1947 case 0x173:
1948 case 0x174:
1949 case 0x175:
1950 case 0x176:
1951 case 0x177:
1952 case 0x376:
1953 case 0x377:
1954 return "IDE 2nd";
1955
1956 case 0x1e0:
1957 case 0x1e1:
1958 case 0x1e2:
1959 case 0x1e3:
1960 case 0x1e4:
1961 case 0x1e5:
1962 case 0x1e6:
1963 case 0x1e7:
1964 case 0x3e6:
1965 case 0x3e7:
1966 return "IDE 3rd";
1967
1968 case 0x160:
1969 case 0x161:
1970 case 0x162:
1971 case 0x163:
1972 case 0x164:
1973 case 0x165:
1974 case 0x166:
1975 case 0x167:
1976 case 0x366:
1977 case 0x367:
1978 return "IDE 4th";
1979
1980 case 0x130: case 0x140: case 0x150:
1981 case 0x131: case 0x141: case 0x151:
1982 case 0x132: case 0x142: case 0x152:
1983 case 0x133: case 0x143: case 0x153:
1984 case 0x134: case 0x144: case 0x154:
1985 case 0x135: case 0x145: case 0x155:
1986 case 0x136: case 0x146: case 0x156:
1987 case 0x137: case 0x147: case 0x157:
1988 case 0x138: case 0x148: case 0x158:
1989 case 0x139: case 0x149: case 0x159:
1990 case 0x13a: case 0x14a: case 0x15a:
1991 case 0x13b: case 0x14b: case 0x15b:
1992 case 0x13c: case 0x14c: case 0x15c:
1993 case 0x13d: case 0x14d: case 0x15d:
1994 case 0x13e: case 0x14e: case 0x15e:
1995 case 0x13f: case 0x14f: case 0x15f:
1996 case 0x220: case 0x230:
1997 case 0x221: case 0x231:
1998 case 0x222: case 0x232:
1999 case 0x223: case 0x233:
2000 case 0x224: case 0x234:
2001 case 0x225: case 0x235:
2002 case 0x226: case 0x236:
2003 case 0x227: case 0x237:
2004 case 0x228: case 0x238:
2005 case 0x229: case 0x239:
2006 case 0x22a: case 0x23a:
2007 case 0x22b: case 0x23b:
2008 case 0x22c: case 0x23c:
2009 case 0x22d: case 0x23d:
2010 case 0x22e: case 0x23e:
2011 case 0x22f: case 0x23f:
2012 case 0x330: case 0x340: case 0x350:
2013 case 0x331: case 0x341: case 0x351:
2014 case 0x332: case 0x342: case 0x352:
2015 case 0x333: case 0x343: case 0x353:
2016 case 0x334: case 0x344: case 0x354:
2017 case 0x335: case 0x345: case 0x355:
2018 case 0x336: case 0x346: case 0x356:
2019 case 0x337: case 0x347: case 0x357:
2020 case 0x338: case 0x348: case 0x358:
2021 case 0x339: case 0x349: case 0x359:
2022 case 0x33a: case 0x34a: case 0x35a:
2023 case 0x33b: case 0x34b: case 0x35b:
2024 case 0x33c: case 0x34c: case 0x35c:
2025 case 0x33d: case 0x34d: case 0x35d:
2026 case 0x33e: case 0x34e: case 0x35e:
2027 case 0x33f: case 0x34f: case 0x35f:
2028 return "SCSI (typically)";
2029
2030 case 0x320:
2031 case 0x321:
2032 case 0x322:
2033 case 0x323:
2034 case 0x324:
2035 case 0x325:
2036 case 0x326:
2037 case 0x327:
2038 return "XT HD";
2039
2040 case 0x3b0:
2041 case 0x3b1:
2042 case 0x3b2:
2043 case 0x3b3:
2044 case 0x3b4:
2045 case 0x3b5:
2046 case 0x3b6:
2047 case 0x3b7:
2048 case 0x3b8:
2049 case 0x3b9:
2050 case 0x3ba:
2051 case 0x3bb:
2052 return "VGA";
2053
2054 case 0x3c0: case 0x3d0:
2055 case 0x3c1: case 0x3d1:
2056 case 0x3c2: case 0x3d2:
2057 case 0x3c3: case 0x3d3:
2058 case 0x3c4: case 0x3d4:
2059 case 0x3c5: case 0x3d5:
2060 case 0x3c6: case 0x3d6:
2061 case 0x3c7: case 0x3d7:
2062 case 0x3c8: case 0x3d8:
2063 case 0x3c9: case 0x3d9:
2064 case 0x3ca: case 0x3da:
2065 case 0x3cb: case 0x3db:
2066 case 0x3cc: case 0x3dc:
2067 case 0x3cd: case 0x3dd:
2068 case 0x3ce: case 0x3de:
2069 case 0x3cf: case 0x3df:
2070 return "VGA/EGA";
2071
2072 case 0x240: case 0x260: case 0x280:
2073 case 0x241: case 0x261: case 0x281:
2074 case 0x242: case 0x262: case 0x282:
2075 case 0x243: case 0x263: case 0x283:
2076 case 0x244: case 0x264: case 0x284:
2077 case 0x245: case 0x265: case 0x285:
2078 case 0x246: case 0x266: case 0x286:
2079 case 0x247: case 0x267: case 0x287:
2080 case 0x248: case 0x268: case 0x288:
2081 case 0x249: case 0x269: case 0x289:
2082 case 0x24a: case 0x26a: case 0x28a:
2083 case 0x24b: case 0x26b: case 0x28b:
2084 case 0x24c: case 0x26c: case 0x28c:
2085 case 0x24d: case 0x26d: case 0x28d:
2086 case 0x24e: case 0x26e: case 0x28e:
2087 case 0x24f: case 0x26f: case 0x28f:
2088 case 0x300:
2089 case 0x301:
2090 case 0x388:
2091 case 0x389:
2092 case 0x38a:
2093 case 0x38b:
2094 return "Sound Card (typically)";
2095
2096 default:
2097 return NULL;
2098 }
2099}
2100#endif /* VBOX_WITH_STATISTICS */
2101
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