VirtualBox

source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 13538

Last change on this file since 13538 was 12989, checked in by vboxsync, 16 years ago

VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into VMM*DECL. Removed dead DECL and IN_XYZ* macros.
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File size: 20.8 KB
Line 
1/* $Id: DBGFDisas.cpp 12989 2008-10-06 02:15:39Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Disassembler.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Header Files *
24*******************************************************************************/
25#define LOG_GROUP LOG_GROUP_DBGF
26#include <VBox/dbgf.h>
27#include <VBox/selm.h>
28#include <VBox/mm.h>
29#include <VBox/pgm.h>
30#include <VBox/cpum.h>
31#include "DBGFInternal.h"
32#include <VBox/dis.h>
33#include <VBox/err.h>
34#include <VBox/param.h>
35
36#include <VBox/log.h>
37#include <iprt/assert.h>
38#include <iprt/string.h>
39#include <iprt/alloca.h>
40#include <iprt/ctype.h>
41
42
43/*******************************************************************************
44* Structures and Typedefs *
45*******************************************************************************/
46/**
47 * Structure used when disassembling and instructions in DBGF.
48 * This is used so the reader function can get the stuff it needs.
49 */
50typedef struct
51{
52 /** The core structure. */
53 DISCPUSTATE Cpu;
54 /** The VM handle. */
55 PVM pVM;
56 /** Pointer to the first byte in the segemnt. */
57 RTGCUINTPTR GCPtrSegBase;
58 /** Pointer to the byte after the end of the segment. (might have wrapped!) */
59 RTGCUINTPTR GCPtrSegEnd;
60 /** The size of the segment minus 1. */
61 RTGCUINTPTR cbSegLimit;
62 /** The guest paging mode. */
63 PGMMODE enmMode;
64 /** Pointer to the current page - HC Ptr. */
65 void const *pvPageHC;
66 /** Pointer to the current page - GC Ptr. */
67 RTGCPTR pvPageGC;
68 /** Pointer to the next instruction (relative to GCPtrSegBase). */
69 RTGCUINTPTR GCPtrNext;
70 /** The lock information that PGMPhysReleasePageMappingLock needs. */
71 PGMPAGEMAPLOCK PageMapLock;
72 /** Whether the PageMapLock is valid or not. */
73 bool fLocked;
74 /** 64 bits mode or not. */
75 bool f64Bits;
76} DBGFDISASSTATE, *PDBGFDISASSTATE;
77
78
79/*******************************************************************************
80* Internal Functions *
81*******************************************************************************/
82static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
83
84
85
86/**
87 * Calls the dissassembler with the proper reader functions and such for disa
88 *
89 * @returns VBox status code.
90 * @param pVM VM handle
91 * @param pSelInfo The selector info.
92 * @param enmMode The guest paging mode.
93 * @param GCPtr The GC pointer (selector offset).
94 * @param pState The disas CPU state.
95 */
96static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
97{
98 pState->GCPtrSegBase = pSelInfo->GCPtrBase;
99 pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
100 pState->cbSegLimit = pSelInfo->cbLimit;
101 pState->enmMode = enmMode;
102 pState->pvPageGC = 0;
103 pState->pvPageHC = NULL;
104 pState->pVM = pVM;
105 pState->fLocked = false;
106 pState->f64Bits = enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1Long;
107 Assert((uintptr_t)GCPtr == GCPtr);
108 uint32_t cbInstr;
109 int rc = DISCoreOneEx(GCPtr,
110 pState->f64Bits
111 ? CPUMODE_64BIT
112 : pSelInfo->Raw.Gen.u1DefBig
113 ? CPUMODE_32BIT
114 : CPUMODE_16BIT,
115 dbgfR3DisasInstrRead,
116 &pState->Cpu,
117 &pState->Cpu,
118 &cbInstr);
119 if (VBOX_SUCCESS(rc))
120 {
121 pState->GCPtrNext = GCPtr + cbInstr;
122 return VINF_SUCCESS;
123 }
124
125 /* cleanup */
126 if (pState->fLocked)
127 {
128 PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
129 pState->fLocked = false;
130 }
131 return rc;
132}
133
134
135#if 0
136/**
137 * Calls the dissassembler for disassembling the next instruction.
138 *
139 * @returns VBox status code.
140 * @param pState The disas CPU state.
141 */
142static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
143{
144 uint32_t cbInstr;
145 int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
146 if (VBOX_SUCCESS(rc))
147 {
148 pState->GCPtrNext = GCPtr + cbInstr;
149 return VINF_SUCCESS;
150 }
151 return rc;
152}
153#endif
154
155
156/**
157 * Done with the dissassembler state, free associated resources.
158 *
159 * @param pState The disas CPU state ++.
160 */
161static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
162{
163 if (pState->fLocked)
164 {
165 PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
166 pState->fLocked = false;
167 }
168}
169
170
171/**
172 * Instruction reader.
173 *
174 * @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
175 * @param PtrSrc Address to read from.
176 * In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
177 * @param pu8Dst Where to store the bytes.
178 * @param cbRead Number of bytes to read.
179 * @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
180 * In this context it's always pointer to the Core of a DBGFDISASSTATE.
181 */
182static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR PtrSrc, uint8_t *pu8Dst, uint32_t cbRead, void *pvDisCpu)
183{
184 PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
185 Assert(cbRead > 0);
186 for (;;)
187 {
188 RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
189
190 /* Need to update the page translation? */
191 if ( !pState->pvPageHC
192 || (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
193 {
194 int rc = VINF_SUCCESS;
195
196 /* translate the address */
197 pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
198 if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
199 {
200 pState->pvPageHC = MMHyperGC2HC(pState->pVM, pState->pvPageGC);
201 if (!pState->pvPageHC)
202 rc = VERR_INVALID_POINTER;
203 }
204 else
205 {
206 if (pState->fLocked)
207 PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
208
209 if (pState->enmMode <= PGMMODE_PROTECTED)
210 rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
211 else
212 rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
213 pState->fLocked = RT_SUCCESS_NP(rc);
214 }
215 if (VBOX_FAILURE(rc))
216 {
217 pState->pvPageHC = NULL;
218 return rc;
219 }
220 }
221
222 /* check the segemnt limit */
223 if (!pState->f64Bits && PtrSrc > pState->cbSegLimit)
224 return VERR_OUT_OF_SELECTOR_BOUNDS;
225
226 /* calc how much we can read */
227 uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
228 if (!pState->f64Bits)
229 {
230 RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
231 if (cb > cbSeg && cbSeg)
232 cb = cbSeg;
233 }
234 if (cb > cbRead)
235 cb = cbRead;
236
237 /* read and advance */
238 memcpy(pu8Dst, (char *)pState->pvPageHC + (GCPtr & PAGE_OFFSET_MASK), cb);
239 cbRead -= cb;
240 if (!cbRead)
241 return VINF_SUCCESS;
242 pu8Dst += cb;
243 PtrSrc += cb;
244 }
245}
246
247
248/**
249 * @copydoc FNDISGETSYMBOL
250 */
251static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char *pszBuf, size_t cchBuf, RTINTPTR *poff, void *pvUser)
252{
253 PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pCpu;
254 PCSELMSELINFO pSelInfo = (PCSELMSELINFO)pvUser;
255 DBGFSYMBOL Sym;
256 RTGCINTPTR off;
257 int rc;
258
259 if (DIS_FMT_SEL_IS_REG(u32Sel))
260 {
261 if (DIS_FMT_SEL_GET_REG(u32Sel) == DIS_SELREG_CS)
262 rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
263 else
264 rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
265 }
266 else
267 {
268 if (pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
269 rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
270 else
271 rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
272 }
273
274 if (RT_SUCCESS(rc))
275 {
276 size_t cchName = strlen(Sym.szName);
277 if (cchName >= cchBuf)
278 cchName = cchBuf - 1;
279 memcpy(pszBuf, Sym.szName, cchName);
280 pszBuf[cchName] = '\0';
281
282 *poff = off;
283 }
284
285 return rc;
286}
287
288
289/**
290 * Disassembles the one instruction according to the specified flags and address.
291 *
292 * @returns VBox status code.
293 * @param pVM VM handle.
294 * @param Sel The code selector. This used to determin the 32/16 bit ness and
295 * calculation of the actual instruction address.
296 * @param GCPtr The code address relative to the base of Sel.
297 * @param fFlags Flags controlling where to start and how to format.
298 * A combination of the DBGF_DISAS_FLAGS_* \#defines.
299 * @param pszOutput Output buffer.
300 * @param cchOutput Size of the output buffer.
301 * @param pcbInstr Where to return the size of the instruction.
302 */
303VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr)
304{
305 /*
306 * Get the Sel and GCPtr if fFlags requests that.
307 */
308 PCCPUMCTXCORE pCtxCore = NULL;
309 CPUMSELREGHID *pHiddenSel = NULL;
310 int rc;
311 if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_CURRENT_HYPER))
312 {
313 if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
314 pCtxCore = CPUMGetGuestCtxCore(pVM);
315 else
316 pCtxCore = CPUMGetHyperCtxCore(pVM);
317 Sel = pCtxCore->cs;
318 pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
319 GCPtr = pCtxCore->rip;
320 }
321
322 /*
323 * Read the selector info - assume no stale selectors and nasty stuff like that.
324 * Since the selector flags in the CPUMCTX structures aren't up to date unless
325 * we recently visited REM, we'll not search for the selector there.
326 */
327 SELMSELINFO SelInfo;
328 const PGMMODE enmMode = PGMGetGuestMode(pVM);
329 bool fRealModeAddress = false;
330
331 if ( pHiddenSel
332 && CPUMAreHiddenSelRegsValid(pVM))
333 {
334 SelInfo.GCPtrBase = pHiddenSel->u64Base;
335 SelInfo.cbLimit = pHiddenSel->u32Limit;
336 SelInfo.fHyper = false;
337 SelInfo.fRealMode = !!((pCtxCore && pCtxCore->eflags.Bits.u1VM) || enmMode == PGMMODE_REAL);
338 SelInfo.Raw.au32[0] = 0;
339 SelInfo.Raw.au32[1] = 0;
340 SelInfo.Raw.Gen.u16LimitLow = ~0;
341 SelInfo.Raw.Gen.u4LimitHigh = ~0;
342 SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
343 SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
344 SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
345 SelInfo.Raw.Gen.u1Long = pHiddenSel->Attr.n.u1Long;
346 SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
347 SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
348 fRealModeAddress = SelInfo.fRealMode;
349 }
350 else if (Sel == DBGF_SEL_FLAT)
351 {
352 SelInfo.GCPtrBase = 0;
353 SelInfo.cbLimit = ~0;
354 SelInfo.fHyper = false;
355 SelInfo.fRealMode = false;
356 SelInfo.Raw.au32[0] = 0;
357 SelInfo.Raw.au32[1] = 0;
358 SelInfo.Raw.Gen.u16LimitLow = ~0;
359 SelInfo.Raw.Gen.u4LimitHigh = ~0;
360
361 if (CPUMAreHiddenSelRegsValid(pVM))
362 { /* Assume the current CS defines the execution mode. */
363 pCtxCore = CPUMGetGuestCtxCore(pVM);
364 pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
365
366 SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
367 SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
368 SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
369 SelInfo.Raw.Gen.u1Long = pHiddenSel->Attr.n.u1Long;
370 SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
371 SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
372 }
373 else
374 {
375 SelInfo.Raw.Gen.u1Present = 1;
376 SelInfo.Raw.Gen.u1Granularity = 1;
377 SelInfo.Raw.Gen.u1DefBig = 1;
378 SelInfo.Raw.Gen.u1DescType = 1;
379 SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
380 }
381 }
382 else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
383 && ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
384 || enmMode == PGMMODE_REAL) )
385 { /* V86 mode or real mode - real mode addressing */
386 SelInfo.GCPtrBase = Sel * 16;
387 SelInfo.cbLimit = ~0;
388 SelInfo.fHyper = false;
389 SelInfo.fRealMode = true;
390 SelInfo.Raw.au32[0] = 0;
391 SelInfo.Raw.au32[1] = 0;
392 SelInfo.Raw.Gen.u16LimitLow = ~0;
393 SelInfo.Raw.Gen.u4LimitHigh = ~0;
394 SelInfo.Raw.Gen.u1Present = 1;
395 SelInfo.Raw.Gen.u1Granularity = 1;
396 SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
397 SelInfo.Raw.Gen.u1DescType = 1;
398 SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
399 fRealModeAddress = true;
400 }
401 else
402 {
403 rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
404 if (VBOX_FAILURE(rc))
405 {
406 RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Vrc\n", Sel, rc);
407 return rc;
408 }
409 }
410
411 /*
412 * Disassemble it.
413 */
414 DBGFDISASSTATE State;
415 rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
416 if (VBOX_FAILURE(rc))
417 {
418 RTStrPrintf(pszOutput, cchOutput, "Disas -> %Vrc\n", rc);
419 return rc;
420 }
421
422 /*
423 * Format it.
424 */
425 char szBuf[512];
426 DISFormatYasmEx(&State.Cpu, szBuf, sizeof(szBuf),
427 DIS_FMT_FLAGS_RELATIVE_BRANCH,
428 fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
429 &SelInfo);
430
431 /*
432 * Print it to the user specified buffer.
433 */
434 if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
435 {
436 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
437 RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
438 else if (fRealModeAddress)
439 RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
440 else if (Sel == DBGF_SEL_FLAT)
441 {
442 if (enmMode >= PGMMODE_AMD64)
443 RTStrPrintf(pszOutput, cchOutput, "%VGv %s", GCPtr, szBuf);
444 else
445 RTStrPrintf(pszOutput, cchOutput, "%VRv %s", (RTRCPTR)GCPtr, szBuf);
446 }
447 else
448 {
449 if (enmMode >= PGMMODE_AMD64)
450 RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %s", Sel, GCPtr, szBuf);
451 else
452 RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv %s", Sel, (RTRCPTR)GCPtr, szBuf);
453 }
454 }
455 else
456 {
457 uint32_t cbBits = State.Cpu.opsize;
458 uint8_t *pau8Bits = (uint8_t *)alloca(cbBits);
459 rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
460 AssertRC(rc);
461 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
462 RTStrPrintf(pszOutput, cchOutput, "%.*Vhxs%*s %s",
463 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
464 szBuf);
465 else if (fRealModeAddress)
466 RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.*Vhxs%*s %s",
467 Sel, (unsigned)GCPtr,
468 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
469 szBuf);
470 else if (Sel == DBGF_SEL_FLAT)
471 {
472 if (enmMode >= PGMMODE_AMD64)
473 RTStrPrintf(pszOutput, cchOutput, "%VGv %.*Vhxs%*s %s",
474 GCPtr,
475 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
476 szBuf);
477 else
478 RTStrPrintf(pszOutput, cchOutput, "%VRv %.*Vhxs%*s %s",
479 (RTRCPTR)GCPtr,
480 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
481 szBuf);
482 }
483 else
484 {
485 if (enmMode >= PGMMODE_AMD64)
486 RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %.*Vhxs%*s %s",
487 Sel, GCPtr,
488 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
489 szBuf);
490 else
491 RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv %.*Vhxs%*s %s",
492 Sel, (RTRCPTR)GCPtr,
493 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
494 szBuf);
495 }
496 }
497
498 if (pcbInstr)
499 *pcbInstr = State.Cpu.opsize;
500
501 dbgfR3DisasInstrDone(&State);
502 return VINF_SUCCESS;
503}
504
505
506/**
507 * Disassembles an instruction.
508 * Addresses will be tried resolved to symbols
509 *
510 * @returns VBox status code.
511 * @param pVM VM handle.
512 * @param Sel The code selector. This used to determin the 32/16 bit ness and
513 * calculation of the actual instruction address.
514 * @param GCPtr The code address relative to the base of Sel.
515 * @param pszOutput Output buffer.
516 * @param cchOutput Size of the output buffer.
517 */
518VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
519{
520 return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
521}
522
523
524/**
525 * Disassembles the current guest context instruction.
526 * All registers and data will be displayed. Addresses will be attempted resolved to symbols.
527 *
528 * @returns VBox status code.
529 * @param pVM VM handle.
530 * @param pszOutput Output buffer.
531 * @param cchOutput Size of the output buffer.
532 */
533VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
534{
535 return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
536}
537
538
539/**
540 * Disassembles the current guest context instruction and writes it to the log.
541 * All registers and data will be displayed. Addresses will be attempted resolved to symbols.
542 *
543 * @returns VBox status code.
544 * @param pVM VM handle.
545 * @param pszPrefix Short prefix string to the dissassembly string. (optional)
546 */
547VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
548{
549 char szBuf[256];
550 szBuf[0] = '\0';
551 int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
552 if (VBOX_FAILURE(rc))
553 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Vrc\n", rc);
554 if (pszPrefix && *pszPrefix)
555 RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
556 else
557 RTLogPrintf("%s\n", szBuf);
558 return rc;
559}
560
561
562
563/**
564 * Disassembles the specified guest context instruction and writes it to the log.
565 * Addresses will be attempted resolved to symbols.
566 *
567 * @returns VBox status code.
568 * @param pVM VM handle.
569 * @param Sel The code selector. This used to determin the 32/16 bit-ness and
570 * calculation of the actual instruction address.
571 * @param GCPtr The code address relative to the base of Sel.
572 */
573VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
574{
575 char szBuf[256];
576 szBuf[0] = '\0';
577 int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
578 if (VBOX_FAILURE(rc))
579 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Vrc\n", Sel, GCPtr, rc);
580 RTLogPrintf("%s\n", szBuf);
581 return rc;
582}
583
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