1 | ; $Id: ASMGetXcr0.asm 98103 2023-01-17 14:15:46Z vboxsync $
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2 | ;; @file
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3 | ; IPRT - ASMGetXcr0().
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2006-2023 Oracle and/or its affiliates.
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8 | ;
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9 | ; This file is part of VirtualBox base platform packages, as
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10 | ; available from https://www.virtualbox.org.
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11 | ;
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12 | ; This program is free software; you can redistribute it and/or
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13 | ; modify it under the terms of the GNU General Public License
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14 | ; as published by the Free Software Foundation, in version 3 of the
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15 | ; License.
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16 | ;
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17 | ; This program is distributed in the hope that it will be useful, but
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18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | ; General Public License for more details.
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21 | ;
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22 | ; You should have received a copy of the GNU General Public License
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23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | ;
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25 | ; The contents of this file may alternatively be used under the terms
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26 | ; of the Common Development and Distribution License Version 1.0
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27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | ; in the VirtualBox distribution, in which case the provisions of the
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29 | ; CDDL are applicable instead of those of the GPL.
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30 | ;
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31 | ; You may elect to license modified versions of this file under the
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32 | ; terms and conditions of either the GPL or the CDDL or both.
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33 | ;
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34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | ;
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36 |
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37 | ;*******************************************************************************
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38 | ;* Header Files *
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39 | ;*******************************************************************************
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40 | %define RT_ASM_WITH_SEH64
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41 | %include "iprt/asmdefs.mac"
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42 |
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43 | BEGINCODE
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44 |
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45 | ;;
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46 | ; Gets the content of the XCR0 CPU register.
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47 | ; @returns XCR0 value in rax (amd64) / edx:eax (x86).
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48 | ;
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49 | RT_BEGINPROC ASMGetXcr0
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50 | SEH64_END_PROLOGUE
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51 | xor ecx, ecx ; XCR0
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52 | xgetbv
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53 | %ifdef RT_ARCH_AMD64
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54 | shl rdx, 32
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55 | or rax, rdx
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56 | %endif
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57 | %if ARCH_BITS == 16 ; DX:CX:BX:AX - DX=15:0, CX=31:16, BX=47:32, AX=63:48
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58 | mov ebx, edx
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59 | mov ecx, eax
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60 | shr ecx, 16
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61 | xchg eax, edx
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62 | shr eax, 16
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63 | %endif
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64 | ret
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65 | ENDPROC ASMGetXcr0
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66 |
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