1 | ; $Id: RTLogWriteVmm-amd64-x86.asm 98103 2023-01-17 14:15:46Z vboxsync $
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2 | ;; @file
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3 | ; IPRT - RTLogWriteVmm - AMD64 & X86 for VBox.
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2012-2023 Oracle and/or its affiliates.
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8 | ;
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9 | ; This file is part of VirtualBox base platform packages, as
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10 | ; available from https://www.virtualbox.org.
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11 | ;
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12 | ; This program is free software; you can redistribute it and/or
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13 | ; modify it under the terms of the GNU General Public License
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14 | ; as published by the Free Software Foundation, in version 3 of the
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15 | ; License.
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16 | ;
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17 | ; This program is distributed in the hope that it will be useful, but
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18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | ; General Public License for more details.
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21 | ;
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22 | ; You should have received a copy of the GNU General Public License
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23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | ;
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25 | ; The contents of this file may alternatively be used under the terms
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26 | ; of the Common Development and Distribution License Version 1.0
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27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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28 | ; in the VirtualBox distribution, in which case the provisions of the
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29 | ; CDDL are applicable instead of those of the GPL.
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30 | ;
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31 | ; You may elect to license modified versions of this file under the
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32 | ; terms and conditions of either the GPL or the CDDL or both.
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33 | ;
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34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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35 | ;
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36 |
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37 | ;*******************************************************************************
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38 | ;* Header Files *
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39 | ;*******************************************************************************
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40 | %define RT_ASM_WITH_SEH64
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41 | %include "iprt/asmdefs.mac"
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42 | %include "VBox/vmm/cpuidcall.mac"
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43 |
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44 | BEGINCODE
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45 |
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46 | ;;
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47 | ; CPUID with EAX and ECX inputs, returning ALL output registers.
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48 | ;
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49 | ; @param pch x86:ebp+8 gcc:rdi msc:rcx
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50 | ; @param cch x86:ebp+c gcc:esi msc:edx
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51 | ; @param fRelease x86:ebp+10 gcc:edx msc:r8d
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52 | ;
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53 | ; @returns EAX
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54 | ;
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55 | RT_BEGINPROC RTLogWriteVmm
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56 | push xBP
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57 | SEH64_PUSH_xBP
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58 | mov xBP, xSP
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59 | SEH64_SET_FRAME_xBP 0
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60 | push xBX
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61 | SEH64_PUSH_GREG xBX
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62 | %ifndef ASM_CALL64_GCC
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63 | push xSI
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64 | SEH64_PUSH_GREG xSI
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65 | %endif
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66 | SEH64_END_PROLOGUE
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67 |
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68 | %ifdef ASM_CALL64_MSC
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69 | %if ARCH_BITS != 64
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70 | %error ARCH_BITS mismatch?
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71 | %endif
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72 | mov rsi, rcx ; pch
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73 | mov ebx, r8d ; fRelease; cch is the right register already.
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74 | %elifdef ASM_CALL64_GCC
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75 | mov ebx, edx ; fRelease
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76 | mov edx, esi ; cch
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77 | mov rsi, rdi ; pch
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78 | %elif ARCH_BITS == 32
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79 | mov esi, [xBP + 08h] ; pch
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80 | mov edx, [xBP + 0ch] ; cch
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81 | movzx ebx, byte [xBP + 10h] ; fRelease
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82 | %else
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83 | %error unsupported arch
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84 | %endif
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85 | mov eax, VBOX_CPUID_REQ_EAX_FIXED
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86 | mov ecx, VBOX_CPUID_REQ_ECX_FIXED | VBOX_CPUID_FN_LOG
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87 |
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88 | cpuid
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89 |
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90 | %ifndef ASM_CALL64_GCC
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91 | pop xSI
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92 | %endif
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93 | pop xBX
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94 | leave
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95 | ret
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96 | ENDPROC RTLogWriteVmm
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97 |
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