1 | /* $Id: ResourceAssignmentManager.cpp 102517 2023-12-07 10:28:20Z vboxsync $ */
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2 | /** @file
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3 | * VirtualBox bus slots assignment manager
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2010-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 |
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29 | /*********************************************************************************************************************************
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30 | * Header Files *
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31 | *********************************************************************************************************************************/
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32 | #define LOG_GROUP LOG_GROUP_MAIN
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33 | #include "LoggingNew.h"
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34 |
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35 | #include "ResourceAssignmentManager.h"
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36 |
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37 | #include <iprt/asm.h>
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38 | #include <iprt/string.h>
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39 |
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40 | #include <VBox/vmm/cfgm.h>
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41 | #include <VBox/vmm/vmmr3vtable.h>
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42 | #include <VBox/com/array.h>
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43 |
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44 | #include <map>
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45 | #include <vector>
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46 | #include <algorithm>
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47 |
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48 |
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49 | /*********************************************************************************************************************************
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50 | * Structures and Typedefs *
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51 | *********************************************************************************************************************************/
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52 |
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53 |
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54 | /*********************************************************************************************************************************
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55 | * Global Variables *
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56 | *********************************************************************************************************************************/
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57 |
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58 |
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59 | /**
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60 | * Resource assignment manage state data.
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61 | * @internal
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62 | */
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63 | struct ResourceAssignmentManager::State
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64 | {
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65 | struct MemoryRange
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66 | {
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67 | char szDevName[32];
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68 | RTGCPHYS GCPhysStart;
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69 | RTGCPHYS GCPhysEnd;
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70 |
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71 | MemoryRange(const char *pszName, RTGCPHYS GCPhysStart, RTGCPHYS GCPhysEnd)
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72 | {
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73 | RTStrCopy(this->szDevName, sizeof(szDevName), pszName);
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74 | this->GCPhysStart = GCPhysStart;
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75 | this->GCPhysEnd = GCPhysEnd;
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76 | }
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77 |
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78 | bool operator==(const MemoryRange &a) const
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79 | {
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80 | return RTStrNCmp(szDevName, a.szDevName, sizeof(szDevName)) == 0;
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81 | }
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82 | };
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83 |
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84 | typedef std::vector<MemoryRange> AddrRangeList;
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85 |
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86 | ChipsetType_T mChipsetType;
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87 | IommuType_T mIommuType;
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88 | PCVMMR3VTABLE mpVMM;
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89 | AddrRangeList mAddrRanges;
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90 |
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91 | RTGCPHYS mGCPhysMmioStartOrig;
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92 | RTGCPHYS mGCPhysMmioStart;
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93 | RTGCPHYS mGCPhysMmio32StartOrig;
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94 | RTGCPHYS mGCPhysMmio32Start;
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95 | RTGCPHYS mcbMmio32;
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96 | RTGCPHYS mGCPhysRamStart;
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97 | uint32_t mcInterrupts;
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98 | uint32_t miInterrupt;
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99 |
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100 | State()
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101 | : mChipsetType(ChipsetType_Null), mpVMM(NULL)
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102 | {}
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103 | ~State()
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104 | {}
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105 |
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106 | HRESULT init(PCVMMR3VTABLE pVMM, ChipsetType_T chipsetType, IommuType_T iommuType,
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107 | RTGCPHYS GCPhysMmioTop, RTGCPHYS GCPhysRamStart,
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108 | RTGCPHYS GCPhysMmio32Start, RTGCPHYS cbMmio32, uint32_t cInterrupts);
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109 |
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110 | HRESULT addAddrRange(const char *pszName, RTGCPHYS GCPhysStart, RTGCPHYS GCPhysEnd);
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111 | };
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112 |
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113 |
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114 | HRESULT ResourceAssignmentManager::State::init(PCVMMR3VTABLE pVMM, ChipsetType_T chipsetType, IommuType_T iommuType,
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115 | RTGCPHYS GCPhysMmioTop, RTGCPHYS GCPhysRamStart,
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116 | RTGCPHYS GCPhysMmio32Start, RTGCPHYS cbMmio32, uint32_t cInterrupts)
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117 | {
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118 | mpVMM = pVMM;
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119 |
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120 | Assert(chipsetType == ChipsetType_ARMv8Virtual);
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121 | Assert(iommuType == IommuType_None); /* For now no IOMMU support on ARMv8. */
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122 |
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123 | mChipsetType = chipsetType;
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124 | mIommuType = iommuType;
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125 | mGCPhysMmioStart = GCPhysMmioTop;
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126 | mGCPhysMmioStartOrig = GCPhysMmioTop;
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127 | mGCPhysRamStart = GCPhysRamStart;
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128 | mGCPhysMmio32Start = GCPhysMmio32Start;
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129 | mGCPhysMmio32StartOrig = GCPhysMmio32Start;
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130 | mcbMmio32 = cbMmio32;
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131 | mcInterrupts = cInterrupts;
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132 | miInterrupt = 0;
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133 | return S_OK;
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134 | }
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135 |
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136 | HRESULT ResourceAssignmentManager::State::addAddrRange(const char *pszName, RTGCPHYS GCPhysStart, RTGCPHYS cbRegion)
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137 | {
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138 | MemoryRange memRange(pszName, GCPhysStart, GCPhysStart + cbRegion - 1);
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139 | mAddrRanges.push_back(memRange);
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140 | return S_OK;
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141 | }
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142 |
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143 | ResourceAssignmentManager::ResourceAssignmentManager()
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144 | : pState(NULL)
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145 | {
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146 | pState = new State();
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147 | Assert(pState);
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148 | }
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149 |
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150 | ResourceAssignmentManager::~ResourceAssignmentManager()
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151 | {
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152 | if (pState)
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153 | {
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154 | delete pState;
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155 | pState = NULL;
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156 | }
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157 | }
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158 |
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159 | ResourceAssignmentManager *ResourceAssignmentManager::createInstance(PCVMMR3VTABLE pVMM, ChipsetType_T chipsetType, IommuType_T iommuType,
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160 | RTGCPHYS GCPhysMmioTop, RTGCPHYS GCPhysRamStart,
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161 | RTGCPHYS GCPhysMmio32Start, RTGCPHYS cbMmio32,
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162 | uint32_t cInterrupts)
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163 | {
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164 | ResourceAssignmentManager *pInstance = new ResourceAssignmentManager();
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165 | pInstance->pState->init(pVMM, chipsetType, iommuType, GCPhysMmioTop, GCPhysRamStart, GCPhysMmio32Start, cbMmio32, cInterrupts);
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166 | Assert(pInstance);
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167 | return pInstance;
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168 | }
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169 |
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170 | HRESULT ResourceAssignmentManager::assignMmioRegion(const char *pszName, RTGCPHYS cbRegion, PRTGCPHYS pGCPhysStart, PRTGCPHYS pcbRegion)
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171 | {
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172 | RTGCPHYS cbRegionAligned = RT_ALIGN_T(cbRegion, _4K, RTGCPHYS);
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173 | RTGCPHYS GCPhysMmioStart = pState->mGCPhysMmioStart - cbRegionAligned;
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174 |
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175 | if (GCPhysMmioStart < pState->mGCPhysRamStart)
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176 | {
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177 | AssertLogRelMsgFailed(("ResourceAssignmentManager: MMIO range for %s would overlap RAM region\n", pszName));
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178 | return E_INVALIDARG;
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179 | }
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180 |
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181 | *pGCPhysStart = GCPhysMmioStart;
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182 | *pcbRegion = cbRegionAligned;
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183 | pState->mGCPhysMmioStart -= cbRegionAligned;
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184 | pState->addAddrRange(pszName, GCPhysMmioStart, cbRegionAligned);
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185 | return S_OK;
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186 | }
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187 |
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188 | HRESULT ResourceAssignmentManager::assignMmio32Region(const char *pszName, RTGCPHYS cbRegion, PRTGCPHYS pGCPhysStart, PRTGCPHYS pcbRegion)
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189 | {
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190 | RTGCPHYS cbRegionAligned = RT_ALIGN_T(cbRegion, _4K, RTGCPHYS);
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191 | RTGCPHYS GCPhysMmioStart = pState->mGCPhysMmio32Start;
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192 |
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193 | if (GCPhysMmioStart > pState->mGCPhysRamStart)
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194 | {
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195 | AssertLogRelMsgFailed(("ResourceAssignmentManager: MMIO32 range for %s would overlap RAM region\n", pszName));
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196 | return E_INVALIDARG;
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197 | }
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198 |
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199 | *pGCPhysStart = GCPhysMmioStart;
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200 | *pcbRegion = cbRegionAligned;
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201 | pState->mGCPhysMmio32Start += cbRegionAligned;
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202 | pState->addAddrRange(pszName, GCPhysMmioStart, cbRegionAligned);
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203 | return S_OK;
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204 | }
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205 |
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206 | HRESULT ResourceAssignmentManager::assignMmioRegionAligned(const char *pszName, RTGCPHYS cbRegion, RTGCPHYS cbAlignment, PRTGCPHYS pGCPhysStart, PRTGCPHYS pcbRegion)
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207 | {
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208 | RTGCPHYS cbRegionAligned = RT_ALIGN_T(cbRegion, cbAlignment, RTGCPHYS);
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209 | RTGCPHYS GCPhysMmioStart = pState->mGCPhysMmioStart - cbRegionAligned;
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210 |
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211 | GCPhysMmioStart = GCPhysMmioStart & ~(cbAlignment - 1);
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212 | if (GCPhysMmioStart < pState->mGCPhysRamStart)
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213 | {
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214 | AssertLogRelMsgFailed(("ResourceAssignmentManager: MMIO range for %s would overlap RAM region\n", pszName));
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215 | return E_INVALIDARG;
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216 | }
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217 |
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218 | *pGCPhysStart = GCPhysMmioStart;
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219 | *pcbRegion = cbRegionAligned;
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220 | pState->mGCPhysMmioStart = GCPhysMmioStart;
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221 | pState->addAddrRange(pszName, GCPhysMmioStart, cbRegionAligned);
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222 | return S_OK;
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223 | }
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224 |
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225 | HRESULT ResourceAssignmentManager::assignFixedAddress(const char *pszName, RTGCPHYS GCPhysStart, RTGCPHYS cbRegion)
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226 | {
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227 | RT_NOREF(pszName, GCPhysStart, cbRegion);
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228 | AssertReleaseFailed();
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229 | return S_OK;
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230 | }
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231 |
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232 | HRESULT ResourceAssignmentManager::assignRamRegion(const char *pszName, RTGCPHYS cbRam, PRTGCPHYS pGCPhysStart)
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233 | {
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234 | if (pState->mGCPhysRamStart + cbRam > pState->mGCPhysMmioStart)
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235 | {
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236 | AssertLogRelMsgFailed(("ResourceAssignmentManager: RAM range for %s would overlap MMIO range\n", pszName));
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237 | return E_INVALIDARG;
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238 | }
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239 |
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240 | *pGCPhysStart = pState->mGCPhysRamStart;
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241 | pState->mGCPhysRamStart += cbRam;
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242 | pState->addAddrRange(pszName, *pGCPhysStart, cbRam);
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243 | return S_OK;
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244 | }
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245 |
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246 | HRESULT ResourceAssignmentManager::assignInterrupts(const char *pszName, uint32_t cInterrupts, uint32_t *piInterruptFirst)
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247 | {
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248 | if (pState->miInterrupt + cInterrupts > pState->mcInterrupts)
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249 | {
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250 | AssertLogRelMsgFailed(("ResourceAssignmentManager: Interrupt count for %s exceeds number of available interrupts\n", pszName));
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251 | return E_INVALIDARG;
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252 | }
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253 |
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254 | *piInterruptFirst = pState->miInterrupt;
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255 | pState->miInterrupt += cInterrupts;
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256 | return S_OK;
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257 | }
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258 |
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259 | HRESULT ResourceAssignmentManager::assignSingleInterrupt(const char *pszName, uint32_t *piInterrupt)
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260 | {
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261 | return assignInterrupts(pszName, 1, piInterrupt);
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262 | }
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263 |
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264 | HRESULT ResourceAssignmentManager::queryMmioRegion(PRTGCPHYS pGCPhysMmioStart, PRTGCPHYS pcbMmio)
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265 | {
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266 | *pGCPhysMmioStart = pState->mGCPhysMmioStart;
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267 | *pcbMmio = pState->mGCPhysMmioStartOrig - pState->mGCPhysMmioStart;
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268 | return S_OK;
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269 | }
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270 |
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271 | HRESULT ResourceAssignmentManager::queryMmio32Region(PRTGCPHYS pGCPhysMmioStart, PRTGCPHYS pcbMmio)
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272 | {
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273 | *pGCPhysMmioStart = pState->mGCPhysMmio32StartOrig;
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274 | *pcbMmio = pState->mcbMmio32;
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275 | return S_OK;
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276 | }
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