VirtualBox

source: vbox/trunk/src/VBox/HostDrivers/Support/SUPLibAll.cpp@ 67954

Last change on this file since 67954 was 62490, checked in by vboxsync, 8 years ago

(C) 2016
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1/* $Id: SUPLibAll.cpp 62490 2016-07-22 18:41:49Z vboxsync $ */
2/** @file
3 * VirtualBox Support Library - All Contexts Code.
4 */
5
6/*
7 * Copyright (C) 2006-2016 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27
28/*********************************************************************************************************************************
29* Header Files *
30*********************************************************************************************************************************/
31#include <VBox/sup.h>
32#ifdef IN_RC
33# include <VBox/vmm/vm.h>
34# include <VBox/vmm/vmm.h>
35#endif
36#ifdef IN_RING0
37# include <iprt/mp.h>
38#endif
39#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
40# include <iprt/asm-amd64-x86.h>
41#endif
42
43
44#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
45
46/**
47 * The slow case for SUPReadTsc where we need to apply deltas.
48 *
49 * Must only be called when deltas are applicable, so please do not call it
50 * directly.
51 *
52 * @returns TSC with delta applied.
53 * @param pGip Pointer to the GIP.
54 *
55 * @remarks May be called with interrupts disabled in ring-0! This is why the
56 * ring-0 code doesn't attempt to figure the delta.
57 *
58 * @internal
59 */
60SUPDECL(uint64_t) SUPReadTscWithDelta(PSUPGLOBALINFOPAGE pGip)
61{
62 uint64_t uTsc;
63 uint16_t iGipCpu;
64 AssertCompile(RT_IS_POWER_OF_TWO(RTCPUSET_MAX_CPUS));
65 AssertCompile(RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx) >= RTCPUSET_MAX_CPUS);
66 Assert(pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_PRACTICALLY_ZERO);
67
68 /*
69 * Read the TSC and get the corresponding aCPUs index.
70 */
71#ifdef IN_RING3
72 if (pGip->fGetGipCpu & SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS)
73 {
74 /* RDTSCP gives us all we need, no loops/cli. */
75 uint32_t iCpuSet;
76 uTsc = ASMReadTscWithAux(&iCpuSet);
77 iCpuSet &= RTCPUSET_MAX_CPUS - 1;
78 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
79 }
80 else if (pGip->fGetGipCpu & SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS)
81 {
82 /* Storing the IDTR is normally very quick, but we need to loop. */
83 uint32_t cTries = 0;
84 for (;;)
85 {
86 uint16_t cbLim = ASMGetIdtrLimit();
87 uTsc = ASMReadTSC();
88 if (RT_LIKELY(ASMGetIdtrLimit() == cbLim))
89 {
90 uint16_t iCpuSet = cbLim - 256 * (ARCH_BITS == 64 ? 16 : 8);
91 iCpuSet &= RTCPUSET_MAX_CPUS - 1;
92 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
93 break;
94 }
95 if (cTries >= 16)
96 {
97 iGipCpu = UINT16_MAX;
98 break;
99 }
100 cTries++;
101 }
102 }
103 else
104 {
105 /* Get APIC ID via the slow CPUID instruction, requires looping. */
106 uint32_t cTries = 0;
107 for (;;)
108 {
109 uint8_t idApic = ASMGetApicId();
110 uTsc = ASMReadTSC();
111 if (RT_LIKELY(ASMGetApicId() == idApic))
112 {
113 iGipCpu = pGip->aiCpuFromApicId[idApic];
114 break;
115 }
116 if (cTries >= 16)
117 {
118 iGipCpu = UINT16_MAX;
119 break;
120 }
121 cTries++;
122 }
123 }
124#elif defined(IN_RING0)
125 /* Ring-0: Use use RTMpCpuId(), no loops. */
126 RTCCUINTREG uFlags = ASMIntDisableFlags();
127 int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId());
128 if (RT_LIKELY((unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
129 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
130 else
131 iGipCpu = UINT16_MAX;
132 uTsc = ASMReadTSC();
133 ASMSetFlags(uFlags);
134
135# elif defined(IN_RC)
136 /* Raw-mode context: We can get the host CPU set index via VMCPU, no loops. */
137 RTCCUINTREG uFlags = ASMIntDisableFlags(); /* Are already disable, but play safe. */
138 uint32_t iCpuSet = VMMGetCpu(&g_VM)->iHostCpuSet;
139 if (RT_LIKELY(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
140 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
141 else
142 iGipCpu = UINT16_MAX;
143 uTsc = ASMReadTSC();
144 ASMSetFlags(uFlags);
145#else
146# error "IN_RING3, IN_RC or IN_RING0 must be defined!"
147#endif
148
149 /*
150 * If the delta is valid, apply it.
151 */
152 if (RT_LIKELY(iGipCpu < pGip->cCpus))
153 {
154 int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
155 if (RT_LIKELY(iTscDelta != INT64_MAX))
156 return uTsc - iTscDelta;
157
158# ifdef IN_RING3
159 /*
160 * The delta needs calculating, call supdrv to get the TSC.
161 */
162 int rc = SUPR3ReadTsc(&uTsc, NULL);
163 if (RT_SUCCESS(rc))
164 return uTsc;
165 AssertMsgFailed(("SUPR3ReadTsc -> %Rrc\n", rc));
166 uTsc = ASMReadTSC();
167# endif /* IN_RING3 */
168 }
169
170 /*
171 * This shouldn't happen, especially not in ring-3 and raw-mode context.
172 * But if it does, return something that's half useful.
173 */
174 AssertMsgFailed(("iGipCpu=%d (%#x) cCpus=%d fGetGipCpu=%#x\n", iGipCpu, iGipCpu, pGip->cCpus, pGip->fGetGipCpu));
175 return uTsc;
176}
177
178
179/**
180 * Internal worker for getting the GIP CPU array index for the calling CPU.
181 *
182 * @returns Index into SUPGLOBALINFOPAGE::aCPUs or UINT16_MAX.
183 * @param pGip The GIP.
184 */
185DECLINLINE(uint16_t) supGetGipCpuIndex(PSUPGLOBALINFOPAGE pGip)
186{
187 uint16_t iGipCpu;
188#ifdef IN_RING3
189 if (pGip->fGetGipCpu & SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS)
190 {
191 /* Storing the IDTR is normally very fast. */
192 uint16_t cbLim = ASMGetIdtrLimit();
193 uint16_t iCpuSet = cbLim - 256 * (ARCH_BITS == 64 ? 16 : 8);
194 iCpuSet &= RTCPUSET_MAX_CPUS - 1;
195 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
196 }
197 else if (pGip->fGetGipCpu & SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS)
198 {
199 /* RDTSCP gives us what need need and more. */
200 uint32_t iCpuSet;
201 ASMReadTscWithAux(&iCpuSet);
202 iCpuSet &= RTCPUSET_MAX_CPUS - 1;
203 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
204 }
205 else
206 {
207 /* Get APIC ID via the slow CPUID instruction. */
208 uint8_t idApic = ASMGetApicId();
209 iGipCpu = pGip->aiCpuFromApicId[idApic];
210 }
211#elif defined(IN_RING0)
212 /* Ring-0: Use use RTMpCpuId() (disables cli to avoid host OS assertions about unsafe CPU number usage). */
213 RTCCUINTREG uFlags = ASMIntDisableFlags();
214 int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId());
215 if (RT_LIKELY((unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
216 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
217 else
218 iGipCpu = UINT16_MAX;
219 ASMSetFlags(uFlags);
220
221# elif defined(IN_RC)
222 /* Raw-mode context: We can get the host CPU set index via VMCPU. */
223 uint32_t iCpuSet = VMMGetCpu(&g_VM)->iHostCpuSet;
224 if (RT_LIKELY(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
225 iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
226 else
227 iGipCpu = UINT16_MAX;
228#else
229# error "IN_RING3, IN_RC or IN_RING0 must be defined!"
230#endif
231 return iGipCpu;
232}
233
234
235/**
236 * Slow path in SUPGetTscDelta, don't call directly.
237 *
238 * @returns See SUPGetTscDelta.
239 * @param pGip The GIP.
240 * @internal
241 */
242SUPDECL(uint64_t) SUPGetTscDeltaSlow(PSUPGLOBALINFOPAGE pGip)
243{
244 uint16_t iGipCpu = supGetGipCpuIndex(pGip);
245 if (RT_LIKELY(iGipCpu < pGip->cCpus))
246 {
247 int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
248 if (iTscDelta != INT64_MAX)
249 return iTscDelta;
250 }
251 AssertFailed();
252 return 0;
253}
254
255
256/**
257 * Slow path in SUPGetCpuHzFromGip, don't call directly.
258 *
259 * @returns See SUPGetCpuHzFromGip.
260 * @param pGip The GIP.
261 * @internal
262 */
263SUPDECL(uint64_t) SUPGetCpuHzFromGipForAsyncMode(PSUPGLOBALINFOPAGE pGip)
264{
265 uint16_t iGipCpu = supGetGipCpuIndex(pGip);
266 if (RT_LIKELY(iGipCpu < pGip->cCpus))
267 return pGip->aCPUs[iGipCpu].u64CpuHz;
268 AssertFailed();
269 return pGip->u64CpuHz;
270}
271
272
273/**
274 * Worker for SUPIsTscFreqCompatible().
275 *
276 * @returns true if it's compatible, false otherwise.
277 * @param uBaseCpuHz The reference CPU frequency of the system.
278 * @param uCpuHz The CPU frequency to compare with the base.
279 * @param fRelax Whether to use a more relaxed threshold (like
280 * for when running in a virtualized environment).
281 *
282 * @remarks Don't use directly, use SUPIsTscFreqCompatible() instead. This is
283 * to be used by tstGIP-2 or the like.
284 */
285SUPDECL(bool) SUPIsTscFreqCompatibleEx(uint64_t uBaseCpuHz, uint64_t uCpuHz, bool fRelax)
286{
287 if (uBaseCpuHz != uCpuHz)
288 {
289 /* Arbitrary tolerance threshold, tweak later if required, perhaps
290 more tolerance on lower frequencies and less tolerance on higher. */
291 uint16_t uFact = !fRelax ? 666 /* 0.15% */ : 125 /* 0.8% */;
292 uint64_t uThr = uBaseCpuHz / uFact;
293 uint64_t uLo = uBaseCpuHz - uThr;
294 uint64_t uHi = uBaseCpuHz + uThr;
295 if ( uCpuHz < uLo
296 || uCpuHz > uHi)
297 return false;
298 }
299 return true;
300}
301
302
303/**
304 * Checks if the provided TSC frequency is close enough to the computed TSC
305 * frequency of the host.
306 *
307 * @returns true if it's compatible, false otherwise.
308 * @param uCpuHz The TSC frequency to check.
309 * @param puGipCpuHz Where to store the GIP TSC frequency used
310 * during the compatibility test - optional.
311 * @param fRelax Whether to use a more relaxed threshold (like
312 * for when running in a virtualized environment).
313 */
314SUPDECL(bool) SUPIsTscFreqCompatible(uint64_t uCpuHz, uint64_t *puGipCpuHz, bool fRelax)
315{
316 PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
317 bool fCompat = false;
318 uint64_t uGipCpuHz = 0;
319 if ( pGip
320 && pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
321 {
322 uGipCpuHz = pGip->u64CpuHz;
323 fCompat = SUPIsTscFreqCompatibleEx(uGipCpuHz, uCpuHz, fRelax);
324 }
325 if (puGipCpuHz)
326 *puGipCpuHz = uGipCpuHz;
327 return fCompat;
328}
329
330#endif /* RT_ARCH_AMD64 || RT_ARCH_X86 */
331
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