VirtualBox

source: vbox/trunk/src/VBox/Devices/VirtIO/Virtio_1_0.h@ 82781

Last change on this file since 82781 was 82151, checked in by vboxsync, 5 years ago

Storage/DevVirtioSCSI.cpp: Did some work on virtio async event subscription logic. Fixed medium eject detection. Added one more layer of mallocs to virtual address S/G buffer handling to prevent stack out of scope errors undetected by the Sanitizer.
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File size: 25.2 KB
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1/* $Id: Virtio_1_0.h 82151 2019-11-25 04:14:32Z vboxsync $ */
2/** @file
3 * Virtio_1_0.h - Virtio Declarations
4 */
5
6/*
7 * Copyright (C) 2009-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h
19#define VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/ctype.h>
25#include <iprt/sg.h>
26
27/** Pointer to the shared VirtIO state. */
28typedef struct VIRTIOCORE *PVIRTIOCORE;
29/** Pointer to the ring-3 VirtIO state. */
30typedef struct VIRTIOCORER3 *PVIRTIOCORER3;
31/** Pointer to the ring-0 VirtIO state. */
32typedef struct VIRTIOCORER0 *PVIRTIOCORER0;
33/** Pointer to the raw-mode VirtIO state. */
34typedef struct VIRTIOCORERC *PVIRTIOCORERC;
35/** Pointer to the instance data for the current context. */
36typedef CTX_SUFF(PVIRTIOCORE) PVIRTIOCORECC;
37
38typedef enum VIRTIOVMSTATECHANGED
39{
40 kvirtIoVmStateChangedInvalid = 0,
41 kvirtIoVmStateChangedReset,
42 kvirtIoVmStateChangedSuspend,
43 kvirtIoVmStateChangedPowerOff,
44 kvirtIoVmStateChangedResume,
45 kvirtIoVmStateChangedFor32BitHack = 0x7fffffff
46} VIRTIOVMSTATECHANGED;
47
48/**
49 * Important sizing and bounds params for this impl. of VirtIO 1.0 PCI device
50 */
51 /**
52 * TEMPORARY NOTE: Some of these values are experimental during development and will likely change.
53 */
54#define VIRTIO_MAX_QUEUE_NAME_SIZE 32 /**< Maximum length of a queue name */
55#define VIRTQ_MAX_SIZE 1024 /**< Max size (# desc elements) of a virtq */
56#define VIRTQ_MAX_CNT 24 /**< Max queues we allow guest to create */
57#define VIRTIO_NOTIFY_OFFSET_MULTIPLIER 2 /**< VirtIO Notify Cap. MMIO config param */
58#define VIRTIO_REGION_PCI_CAP 2 /**< BAR for VirtIO Cap. MMIO (impl specific) */
59#define VIRTIO_REGION_MSIX_CAP 0 /**< Bar for MSI-X handling */
60
61#ifdef LOG_ENABLED
62# define VIRTIO_HEX_DUMP(logLevel, pv, cb, base, title) \
63 do { \
64 if (LogIsItEnabled(logLevel, LOG_GROUP)) \
65 virtioCoreHexDump((pv), (cb), (base), (title)); \
66 } while (0)
67#else
68# define VIRTIO_HEX_DUMP(logLevel, pv, cb, base, title) do { } while (0)
69#endif
70
71typedef struct VIRTIOSGSEG /**< An S/G entry */
72{
73 RTGCPHYS pGcSeg; /**< Pointer to the segment buffer */
74 size_t cbSeg; /**< Size of the segment buffer */
75} VIRTIOSGSEG;
76
77typedef VIRTIOSGSEG *PVIRTIOSGSEG;
78typedef const VIRTIOSGSEG *PCVIRTIOSGSEG;
79typedef PVIRTIOSGSEG *PPVIRTIOSGSEG;
80
81typedef struct VIRTIOSGBUF
82{
83 PVIRTIOSGSEG paSegs; /**< Pointer to the scatter/gather array */
84 unsigned cSegs; /**< Number of segments */
85 unsigned idxSeg; /**< Current segment we are in */
86 RTGCPHYS pGcSegCur; /**< Ptr to byte within the current seg */
87 size_t cbSegLeft; /**< # of bytes left in the current segment */
88} VIRTIOSGBUF;
89
90typedef VIRTIOSGBUF *PVIRTIOSGBUF;
91typedef const VIRTIOSGBUF *PCVIRTIOSGBUF;
92typedef PVIRTIOSGBUF *PPVIRTIOSGBUF;
93
94typedef struct VIRTIO_DESC_CHAIN
95{
96 uint32_t uHeadIdx; /**< Head idx of associated desc chain */
97 uint32_t cbPhysSend; /**< Total size of src buffer */
98 PVIRTIOSGBUF pSgPhysSend; /**< Phys S/G/ buf for data from guest */
99 uint32_t cbPhysReturn; /**< Total size of dst buffer */
100 PVIRTIOSGBUF pSgPhysReturn; /**< Phys S/G buf to store result for guest */
101} VIRTIO_DESC_CHAIN_T, *PVIRTIO_DESC_CHAIN_T, **PPVIRTIO_DESC_CHAIN_T;
102
103typedef struct VIRTIOPCIPARAMS
104{
105 uint16_t uDeviceId; /**< PCI Cfg Device ID */
106 uint16_t uClassBase; /**< PCI Cfg Base Class */
107 uint16_t uClassSub; /**< PCI Cfg Subclass */
108 uint16_t uClassProg; /**< PCI Cfg Programming Interface Class */
109 uint16_t uSubsystemId; /**< PCI Cfg Card Manufacturer Vendor ID */
110 uint16_t uInterruptLine; /**< PCI Cfg Interrupt line */
111 uint16_t uInterruptPin; /**< PCI Cfg Interrupt pin */
112} VIRTIOPCIPARAMS, *PVIRTIOPCIPARAMS;
113
114#define VIRTIO_F_VERSION_1 RT_BIT_64(32) /**< Required feature bit for 1.0 devices */
115
116#define VIRTIO_F_INDIRECT_DESC RT_BIT_64(28) /**< Allow descs to point to list of descs */
117#define VIRTIO_F_EVENT_IDX RT_BIT_64(29) /**< Allow notification disable for n elems */
118#define VIRTIO_F_RING_INDIRECT_DESC RT_BIT_64(28) /**< Doc bug: Goes under two names in spec */
119#define VIRTIO_F_RING_EVENT_IDX RT_BIT_64(29) /**< Doc bug: Goes under two names in spec */
120
121#define VIRTIO_DEV_INDEPENDENT_FEATURES_OFFERED ( 0 ) /**< TBD: Add VIRTIO_F_INDIRECT_DESC */
122
123#define VIRTIO_ISR_VIRTQ_INTERRUPT RT_BIT_32(0) /**< Virtq interrupt bit of ISR register */
124#define VIRTIO_ISR_DEVICE_CONFIG RT_BIT_32(1) /**< Device configuration changed bit of ISR */
125#define DEVICE_PCI_VENDOR_ID_VIRTIO 0x1AF4 /**< Guest driver locates dev via (mandatory) */
126#define DEVICE_PCI_REVISION_ID_VIRTIO 1 /**< VirtIO 1.0 non-transitional drivers >= 1 */
127
128/** Reserved (*negotiated*) Feature Bits (e.g. device independent features, VirtIO 1.0 spec,section 6) */
129
130#define VIRTIO_MSI_NO_VECTOR 0xffff /**< Vector value to disable MSI for queue */
131
132/** Device Status field constants (from Virtio 1.0 spec) */
133#define VIRTIO_STATUS_ACKNOWLEDGE 0x01 /**< Guest driver: Located this VirtIO device */
134#define VIRTIO_STATUS_DRIVER 0x02 /**< Guest driver: Can drive this VirtIO dev. */
135#define VIRTIO_STATUS_DRIVER_OK 0x04 /**< Guest driver: Driver set-up and ready */
136#define VIRTIO_STATUS_FEATURES_OK 0x08 /**< Guest driver: Feature negotiation done */
137#define VIRTIO_STATUS_FAILED 0x80 /**< Guest driver: Fatal error, gave up */
138#define VIRTIO_STATUS_DEVICE_NEEDS_RESET 0x40 /**< Device experienced unrecoverable error */
139
140/** @def Virtio Device PCI Capabilities type codes */
141#define VIRTIO_PCI_CAP_COMMON_CFG 1 /**< Common configuration PCI capability ID */
142#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 /**< Notification area PCI capability ID */
143#define VIRTIO_PCI_CAP_ISR_CFG 3 /**< ISR PCI capability id */
144#define VIRTIO_PCI_CAP_DEVICE_CFG 4 /**< Device-specific PCI cfg capability ID */
145#define VIRTIO_PCI_CAP_PCI_CFG 5 /**< PCI CFG capability ID */
146
147#define VIRTIO_PCI_CAP_ID_VENDOR 0x09 /**< Vendor-specific PCI CFG Device Cap. ID */
148
149/**
150 * The following is the PCI capability struct common to all VirtIO capability types
151 */
152typedef struct virtio_pci_cap
153{
154 /* All little-endian */
155 uint8_t uCapVndr; /**< Generic PCI field: PCI_CAP_ID_VNDR */
156 uint8_t uCapNext; /**< Generic PCI field: next ptr. */
157 uint8_t uCapLen; /**< Generic PCI field: capability length */
158 uint8_t uCfgType; /**< Identifies the structure. */
159 uint8_t uBar; /**< Where to find it. */
160 uint8_t uPadding[3]; /**< Pad to full dword. */
161 uint32_t uOffset; /**< Offset within bar. (L.E.) */
162 uint32_t uLength; /**< Length of struct, in bytes. (L.E.) */
163} VIRTIO_PCI_CAP_T, *PVIRTIO_PCI_CAP_T;
164
165/**
166 * Local implementation's usage context of a queue (e.g. not part of VirtIO specification)
167 */
168typedef struct VIRTQSTATE
169{
170 char szVirtqName[32]; /**< Dev-specific name of queue */
171 uint16_t uAvailIdx; /**< Consumer's position in avail ring */
172 uint16_t uUsedIdx; /**< Consumer's position in used ring */
173 bool fEventThresholdReached; /**< Don't lose track while queueing ahead */
174} VIRTQSTATE, *PVIRTQSTATE;
175
176/**
177 * VirtIO 1.0 Capabilities' related MMIO-mapped structs:
178 *
179 * Note: virtio_pci_device_cap is dev-specific, implemented by client. Definition unknown here.
180 */
181typedef struct virtio_pci_common_cfg
182{
183 /* Per device fields */
184 uint32_t uDeviceFeaturesSelect; /**< RW (driver selects device features) */
185 uint32_t uDeviceFeatures; /**< RO (device reports features to driver) */
186 uint32_t uDriverFeaturesSelect; /**< RW (driver selects driver features) */
187 uint32_t uDriverFeatures; /**< RW (driver-accepted device features) */
188 uint16_t uMsixConfig; /**< RW (driver sets MSI-X config vector) */
189 uint16_t uNumQueues; /**< RO (device specifies max queues) */
190 uint8_t uDeviceStatus; /**< RW (driver writes device status, 0=reset) */
191 uint8_t uConfigGeneration; /**< RO (device changes when changing configs) */
192
193 /* Per virtqueue fields (as determined by uQueueSelect) */
194 uint16_t uQueueSelect; /**< RW (selects queue focus for these fields) */
195 uint16_t uQueueSize; /**< RW (queue size, 0 - 2^n) */
196 uint16_t uQueueMsixVector; /**< RW (driver selects MSI-X queue vector) */
197 uint16_t uQueueEnable; /**< RW (driver controls usability of queue) */
198 uint16_t uQueueNotifyOff; /**< RO (offset uto virtqueue; see spec) */
199 uint64_t aGCPhysQueueDesc; /**< RW (driver writes desc table phys addr) */
200 uint64_t aGCPhysQueueAvail; /**< RW (driver writes avail ring phys addr) */
201 uint64_t aGCPhysQueueUsed; /**< RW (driver writes used ring phys addr) */
202} VIRTIO_PCI_COMMON_CFG_T, *PVIRTIO_PCI_COMMON_CFG_T;
203
204typedef struct virtio_pci_notify_cap
205{
206 struct virtio_pci_cap pciCap; /**< Notification MMIO mapping capability */
207 uint32_t uNotifyOffMultiplier; /**< notify_off_multiplier */
208} VIRTIO_PCI_NOTIFY_CAP_T, *PVIRTIO_PCI_NOTIFY_CAP_T;
209
210typedef struct virtio_pci_cfg_cap
211{
212 struct virtio_pci_cap pciCap; /**< Cap. defines the BAR/off/len to access */
213 uint8_t uPciCfgData[4]; /**< I/O buf for above cap. */
214} VIRTIO_PCI_CFG_CAP_T, *PVIRTIO_PCI_CFG_CAP_T;
215
216/**
217 * PCI capability data locations (PCI CFG and MMIO).
218 */
219typedef struct VIRTIO_PCI_CAP_LOCATIONS_T
220{
221 uint16_t offMmio;
222 uint16_t cbMmio;
223 uint16_t offPci;
224 uint16_t cbPci;
225} VIRTIO_PCI_CAP_LOCATIONS_T;
226
227/**
228 * The core/common state of the VirtIO PCI devices, shared edition.
229 */
230typedef struct VIRTIOCORE
231{
232 char szInstance[16]; /**< Instance name, e.g. "VIRTIOSCSI0" */
233 PPDMDEVINS pDevIns; /**< Client device instance */
234 RTGCPHYS aGCPhysQueueDesc[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q desc structs GUEST */
235 RTGCPHYS aGCPhysQueueAvail[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q avail structs GUEST */
236 RTGCPHYS aGCPhysQueueUsed[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q used structs GUEST */
237 uint16_t uQueueNotifyOff[VIRTQ_MAX_CNT]; /**< (MMIO) per-Q notify offset HOST */
238 uint16_t uQueueMsixVector[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue vector for MSI-X GUEST */
239 uint16_t uQueueEnable[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue enable GUEST */
240 uint16_t uQueueSize[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue size HOST/GUEST */
241 uint16_t uQueueSelect; /**< (MMIO) queue selector GUEST */
242 uint16_t padding;
243 uint64_t uDeviceFeatures; /**< (MMIO) Host features offered HOST */
244 uint64_t uDriverFeatures; /**< (MMIO) Host features accepted GUEST */
245 uint32_t uDeviceFeaturesSelect; /**< (MMIO) hi/lo select uDeviceFeatures GUEST */
246 uint32_t uDriverFeaturesSelect; /**< (MMIO) hi/lo select uDriverFeatures GUEST */
247 uint32_t uMsixConfig; /**< (MMIO) MSI-X vector GUEST */
248 uint8_t uDeviceStatus; /**< (MMIO) Device Status GUEST */
249 uint8_t uPrevDeviceStatus; /**< (MMIO) Prev Device Status GUEST */
250 uint8_t uConfigGeneration; /**< (MMIO) Device config sequencer HOST */
251
252 VIRTQSTATE virtqState[VIRTQ_MAX_CNT]; /**< Local impl-specific queue context */
253
254 /** @name The locations of the capability structures in PCI config space and the BAR.
255 * @{ */
256 VIRTIO_PCI_CAP_LOCATIONS_T LocPciCfgCap; /**< VIRTIO_PCI_CFG_CAP_T */
257 VIRTIO_PCI_CAP_LOCATIONS_T LocNotifyCap; /**< VIRTIO_PCI_NOTIFY_CAP_T */
258 VIRTIO_PCI_CAP_LOCATIONS_T LocCommonCfgCap; /**< VIRTIO_PCI_CAP_T */
259 VIRTIO_PCI_CAP_LOCATIONS_T LocIsrCap; /**< VIRTIO_PCI_CAP_T */
260 VIRTIO_PCI_CAP_LOCATIONS_T LocDeviceCap; /**< VIRTIO_PCI_CAP_T + custom data. */
261 /** @} */
262
263 bool fGenUpdatePending; /**< If set, update cfg gen after driver reads */
264 uint8_t uPciCfgDataOff;
265 uint8_t uISR; /**< Interrupt Status Register. */
266 uint8_t fMsiSupport;
267
268 /** The MMIO handle for the PCI capability region (\#2). */
269 IOMMMIOHANDLE hMmioPciCap;
270} VIRTIOCORE;
271
272
273/**
274 * The core/common state of the VirtIO PCI devices, ring-3 edition.
275 */
276typedef struct VIRTIOCORER3
277{
278 /** @name Callbacks filled by the device before calling virtioCoreR3Init.
279 * @{ */
280 /**
281 * Implementation-specific client callback to notify client of significant device status
282 * changes.
283 *
284 * @param pVirtio Pointer to the shared virtio state.
285 * @param pVirtioCC Pointer to the ring-3 virtio state.
286 * @param fDriverOk True if guest driver is okay (thus queues, etc... are
287 * valid)
288 */
289 DECLCALLBACKMEMBER(void, pfnStatusChanged)(PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, uint32_t fDriverOk);
290
291 /**
292 * When guest-to-host queue notifications are enabled, the guest driver notifies the host
293 * that the avail queue has buffers, and this callback informs the client.
294 *
295 * @param pVirtio Pointer to the shared virtio state.
296 * @param pVirtioCC Pointer to the ring-3 virtio state.
297 * @param idxQueue Index of the notified queue
298 */
299 DECLCALLBACKMEMBER(void, pfnQueueNotified)(PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, uint16_t idxQueue);
300
301 /**
302 * Implementation-specific client callback to access VirtIO Device-specific capabilities
303 * (other VirtIO capabilities and features are handled in VirtIO implementation)
304 *
305 * @param pDevIns The device instance.
306 * @param offCap Offset within device specific capabilities struct.
307 * @param pvBuf Buffer in which to save read data.
308 * @param cbToRead Number of bytes to read.
309 */
310 DECLCALLBACKMEMBER(int, pfnDevCapRead)(PPDMDEVINS pDevIns, uint32_t offCap, void *pvBuf, uint32_t cbToRead);
311
312 /**
313 * Implementation-specific client ballback to access VirtIO Device-specific capabilities
314 * (other VirtIO capabilities and features are handled in VirtIO implementation)
315 *
316 * @param pDevIns The device instance.
317 * @param offCap Offset within device specific capabilities struct.
318 * @param pvBuf Buffer with the bytes to write.
319 * @param cbToWrite Number of bytes to write.
320 */
321 DECLCALLBACKMEMBER(int, pfnDevCapWrite)(PPDMDEVINS pDevIns, uint32_t offCap, const void *pvBuf, uint32_t cbWrite);
322 /** @} */
323
324 R3PTRTYPE(PVIRTIO_PCI_CFG_CAP_T) pPciCfgCap; /**< Pointer to struct in the PCI configuration area. */
325 R3PTRTYPE(PVIRTIO_PCI_NOTIFY_CAP_T) pNotifyCap; /**< Pointer to struct in the PCI configuration area. */
326 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pCommonCfgCap; /**< Pointer to struct in the PCI configuration area. */
327 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pIsrCap; /**< Pointer to struct in the PCI configuration area. */
328 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pDeviceCap; /**< Pointer to struct in the PCI configuration area. */
329
330 uint32_t cbDevSpecificCfg; /**< Size of client's dev-specific config data */
331 R3PTRTYPE(uint8_t *) pbDevSpecificCfg; /**< Pointer to client's struct */
332 R3PTRTYPE(uint8_t *) pbPrevDevSpecificCfg; /**< Previous read dev-specific cfg of client */
333 bool fGenUpdatePending; /**< If set, update cfg gen after driver reads */
334} VIRTIOCORER3;
335
336
337/**
338 * The core/common state of the VirtIO PCI devices, ring-0 edition.
339 */
340typedef struct VIRTIOCORER0
341{
342 uint64_t uUnusedAtTheMoment;
343} VIRTIOCORER0;
344
345
346/**
347 * The core/common state of the VirtIO PCI devices, raw-mode edition.
348 */
349typedef struct VIRTIOCORERC
350{
351 uint64_t uUnusedAtTheMoment;
352} VIRTIOCORERC;
353
354
355/** @typedef VIRTIOCORECC
356 * The instance data for the current context. */
357typedef CTX_SUFF(VIRTIOCORE) VIRTIOCORECC;
358
359
360/** @name virtq related flags
361 * @{ */
362#define VIRTQ_DESC_F_NEXT 1 /**< Indicates this descriptor chains to next */
363#define VIRTQ_DESC_F_WRITE 2 /**< Marks buffer as write-only (default ro) */
364#define VIRTQ_DESC_F_INDIRECT 4 /**< Buffer is list of buffer descriptors */
365
366#define VIRTQ_USED_F_NO_NOTIFY 1 /**< Dev to Drv: Don't notify when buf added */
367#define VIRTQ_AVAIL_F_NO_INTERRUPT 1 /**< Drv to Dev: Don't notify when buf eaten */
368/** @} */
369
370
371/** @name API for VirtIO parent device
372 * @{ */
373
374int virtioCoreR3QueueAttach(PVIRTIOCORE pVirtio, uint16_t idxQueue, const char *pcszName);
375
376int virtioCoreR3DescChainGet(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue,
377 uint16_t uHeadIdx, PPVIRTIO_DESC_CHAIN_T ppDescChain);
378
379int virtioCoreR3QueueGet(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue,
380 PPVIRTIO_DESC_CHAIN_T ppDescChain, bool fRemove);
381int virtioCoreR3QueuePut(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue, PRTSGBUF pSgVirtReturn,
382 PVIRTIO_DESC_CHAIN_T pDescChain, bool fFence);
383int virtioCoreQueueSync(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue);
384bool virtioCoreQueueIsEmpty(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue);
385void virtioCoreQueueEnable(PVIRTIOCORE pVirtio, uint16_t idxQueue, bool fEnabled);
386
387/**
388 * Skip the next entry in the specified queue
389 *
390 * @param pVirtio Pointer to the virtio state.
391 * @param idxQueue Index of queue
392 *
393 */
394int virtioQueueSkip(PVIRTIOCORE pVirtio, uint16_t idxQueue);
395
396/**
397 * Reset the device and driver (see VirtIO 1.0 section 2.1.1/2.1.2)
398 *
399 * @param pVirtio Pointer to the virtio state.
400 */
401void virtioCoreResetAll(PVIRTIOCORE pVirtio);
402
403/**
404 * Return queue enable state
405 *
406 * @param pVirtio Pointer to the virtio state.
407 * @param idxQueue Queue number.
408 * @param fEnabled Flag indicating whether to enable queue or not
409 */
410DECLINLINE(bool) virtioCoreIsQueueEnabled(PVIRTIOCORE pVirtio, uint16_t idxQueue)
411{
412 Assert(idxQueue < RT_ELEMENTS(pVirtio->virtqState));
413 return pVirtio->uQueueEnable[idxQueue] != 0;
414}
415
416/**
417 * Get name of queue, by idxQueue, assigned at virtioCoreR3QueueAttach()
418 *
419 * @param pVirtio Pointer to the virtio state.
420 * @param idxQueue Queue number.
421 *
422 * @returns Pointer to read-only queue name.
423 */
424DECLINLINE(const char *) virtioCoreQueueGetName(PVIRTIOCORE pVirtio, uint16_t idxQueue)
425{
426 Assert((size_t)idxQueue < RT_ELEMENTS(pVirtio->virtqState));
427 return pVirtio->virtqState[idxQueue].szVirtqName;
428}
429
430/**
431 * Get the features VirtIO is running withnow.
432 *
433 * @returns Features the guest driver has accepted, finalizing the operational features
434 */
435DECLINLINE(uint64_t) virtioCoreGetNegotiatedFeatures(PVIRTIOCORE pVirtio)
436{
437 return pVirtio->uDriverFeatures;
438}
439
440/**
441 * Get VirtIO accepted host-side features
442 *
443 * @returns feature bits selected or 0 if selector out of range.
444 *
445 * @param pState Virtio state
446 */
447DECLINLINE(uint64_t) virtioCoreGetAcceptedFeatures(PVIRTIOCORE pVirtio)
448{
449 return pVirtio->uDriverFeatures;
450}
451
452/**
453 * Calculate the length of a GCPhys s/g buffer by tallying the size of each segment.
454 *
455 * @param pGcSgBuf GC S/G buffer to calculate length of
456 */
457DECLINLINE(size_t) virtioCoreSgBufCalcTotalLength(PCVIRTIOSGBUF pGcSgBuf)
458{
459 size_t cb = 0;
460 unsigned i = pGcSgBuf->cSegs;
461 while (i-- > 0)
462 cb += pGcSgBuf->paSegs[i].cbSeg;
463 return cb;
464}
465
466void virtioCoreLogMappedIoValue(const char *pszFunc, const char *pszMember, uint32_t uMemberSize,
467 const void *pv, uint32_t cb, uint32_t uOffset,
468 int fWrite, int fHasIndex, uint32_t idx);
469
470void virtioCoreHexDump(uint8_t *pv, uint32_t cb, uint32_t uBase, const char *pszTitle);
471
472void virtioCoreSgBufInit(PVIRTIOSGBUF pGcSgBuf, PVIRTIOSGSEG paSegs, size_t cSegs);
473void virtioCoreSgBufReset(PVIRTIOSGBUF pGcSgBuf);
474RTGCPHYS virtioCoreSgBufGetNextSegment(PVIRTIOSGBUF pGcSgBuf, size_t *pcbSeg);
475RTGCPHYS virtioCoreSgBufAdvance(PVIRTIOSGBUF pGcSgBuf, size_t cbAdvance);
476void virtioCoreSgBufInit(PVIRTIOSGBUF pSgBuf, PVIRTIOSGSEG paSegs, size_t cSegs);
477size_t virtioCoreSgBufCalcTotalLength(PCVIRTIOSGBUF pGcSgBuf);
478void virtioCoreSgBufReset(PVIRTIOSGBUF pGcSgBuf);
479int virtioCoreR3SaveExec(PVIRTIOCORE pVirtio, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM);
480int virtioCoreR3LoadExec(PVIRTIOCORE pVirtio, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM);
481void virtioCoreR3VmStateChanged(PVIRTIOCORE pVirtio, VIRTIOVMSTATECHANGED enmState);
482void virtioCoreR3Term(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC);
483int virtioCoreR3Init(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, PVIRTIOPCIPARAMS pPciParams,
484 const char *pcszInstance, uint64_t fDevSpecificFeatures, void *pvDevSpecificCfg, uint16_t cbDevSpecificCfg);
485int virtioCoreRZInit(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC);
486const char *virtioCoreGetStateChangeText(VIRTIOVMSTATECHANGED enmState);
487
488/** @} */
489
490
491#endif /* !VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h */
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