VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 82781

Last change on this file since 82781 was 82188, checked in by vboxsync, 5 years ago

DevFdc: Saved state fix - forgot to increase FDC_SAVESTATE_CURRENT. duh!
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 106.1 KB
Line 
1/* $Id: DevFdc.cpp 82188 2019-11-25 17:26:34Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU Floppy disk emulator (Intel 82078)
21 *
22 * Copyright (c) 2003 Jocelyn Mayer
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 *
42 */
43
44
45/*********************************************************************************************************************************
46* Header Files *
47*********************************************************************************************************************************/
48#define LOG_GROUP LOG_GROUP_DEV_FDC
49#include <VBox/vmm/pdmdev.h>
50#include <VBox/vmm/pdmstorageifs.h>
51#include <VBox/AssertGuest.h>
52#include <iprt/assert.h>
53#include <iprt/string.h>
54#include <iprt/uuid.h>
55
56#include "VBoxDD.h"
57
58
59/*********************************************************************************************************************************
60* Defined Constants And Macros *
61*********************************************************************************************************************************/
62/** @name FDC saved state versions
63 * @{ */
64#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
65#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
66#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
67/** @}*/
68
69#define MAX_FD 2
70
71
72/********************************************************/
73/* debug Floppy devices */
74/* #define DEBUG_FLOPPY */
75
76#ifdef LOG_ENABLED
77# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
78#else
79# define FLOPPY_DPRINTF(...) do { } while (0)
80#endif
81
82#define FLOPPY_ERROR RTLogPrintf
83
84typedef struct fdctrl_t fdctrl_t;
85
86/********************************************************/
87/* Floppy drive emulation */
88
89#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
90#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
91
92/* Will always be a fixed parameter for us */
93#define FD_SECTOR_LEN 512
94#define FD_SECTOR_SC 2 /* Sector size code */
95#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
96
97/* Floppy disk drive emulation */
98typedef enum fdrive_type_t {
99 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
100 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
101 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
102 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
103 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
104 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
105} fdrive_type_t;
106
107typedef uint8_t fdrive_flags_t;
108#define FDISK_DBL_SIDES UINT8_C(0x01)
109
110typedef enum fdrive_rate_t {
111 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
112 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
113 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
114 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
115} fdrive_rate_t;
116
117/**
118 * The status for one drive.
119 *
120 * @implements PDMIBASE
121 * @implements PDMIMEDIAPORT
122 * @implements PDMIMOUNTNOTIFY
123 */
124typedef struct fdrive_t {
125 /** Pointer to the owning device instance. */
126 R3PTRTYPE(PPDMDEVINS) pDevIns;
127 /** Pointer to the attached driver's base interface. */
128 R3PTRTYPE(PPDMIBASE) pDrvBase;
129 /** Pointer to the attached driver's block interface. */
130 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
131 /** Pointer to the attached driver's mount interface.
132 * This is NULL if the driver isn't a removable unit. */
133 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
134 /** The base interface. */
135 PDMIBASE IBase;
136 /** The block port interface. */
137 PDMIMEDIAPORT IPort;
138 /** The mount notify interface. */
139 PDMIMOUNTNOTIFY IMountNotify;
140 /** The LUN #. */
141 RTUINT iLUN;
142 /** The LED for this LUN. */
143 PDMLED Led;
144 /* Drive status */
145 fdrive_type_t drive;
146 uint8_t perpendicular; /* 2.88 MB access mode */
147 uint8_t dsk_chg; /* Disk change line */
148 /* Position */
149 uint8_t head;
150 uint8_t track;
151 uint8_t sect;
152 uint8_t ltrk; /* Logical track */
153 /* Media */
154 fdrive_flags_t flags;
155 uint8_t last_sect; /* Nb sector per track */
156 uint8_t max_track; /* Nb of tracks */
157 uint16_t bps; /* Bytes per sector */
158 uint8_t ro; /* Is read-only */
159 uint8_t media_rate; /* Data rate of medium */
160} fdrive_t;
161
162#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
163
164static void fd_init(fdrive_t *drv, bool fInit)
165{
166 /* Drive */
167 if (fInit) {
168 /* Fixate the drive type at init time if possible. */
169 if (drv->pDrvMedia) {
170 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
171 switch (enmType) {
172 case PDMMEDIATYPE_FLOPPY_360:
173 case PDMMEDIATYPE_FLOPPY_1_20:
174 drv->drive = FDRIVE_DRV_120;
175 break;
176 case PDMMEDIATYPE_FLOPPY_720:
177 case PDMMEDIATYPE_FLOPPY_1_44:
178 drv->drive = FDRIVE_DRV_144;
179 break;
180 default:
181 AssertFailed();
182 RT_FALL_THRU();
183 case PDMMEDIATYPE_FLOPPY_2_88:
184 drv->drive = FDRIVE_DRV_288;
185 break;
186 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
187 drv->drive = FDRIVE_DRV_FAKE_15_6;
188 break;
189 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
190 drv->drive = FDRIVE_DRV_FAKE_63_5;
191 break;
192 }
193 } else {
194 drv->drive = FDRIVE_DRV_NONE;
195 }
196 } /* else: The BIOS (and others) get the drive type via the CMOS, so
197 don't change it after the VM has been constructed. */
198 drv->perpendicular = 0;
199 /* Disk */
200 drv->last_sect = 0;
201 drv->max_track = 0;
202}
203
204static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
205 uint8_t last_sect, uint8_t num_sides)
206{
207 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
208}
209
210/* Returns current position, in sectors, for given drive */
211static int fd_sector(fdrive_t *drv)
212{
213 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
214}
215
216/* Seek to a new position:
217 * returns 0 if already on right track
218 * returns 1 if track changed
219 * returns 2 if track is invalid
220 * returns 3 if sector is invalid
221 * returns 4 if seek is disabled
222 * returns 5 if no media in drive
223 */
224static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
225 int enable_seek)
226{
227 int sector;
228 int ret;
229
230 if (!drv->last_sect) {
231 FLOPPY_DPRINTF("no disk in drive (max=%d %d %02x %02x)\n",
232 1, (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
233 drv->max_track, drv->last_sect);
234 return 5;
235 }
236 if (track > drv->max_track ||
237 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
238 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
239 head, track, sect, 1,
240 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
241 drv->max_track, drv->last_sect);
242 return 2;
243 }
244 if (sect > drv->last_sect || sect < 1) {
245 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
246 head, track, sect, 1,
247 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
248 drv->max_track, drv->last_sect);
249 return 3;
250 }
251 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
252 ret = 0;
253 if (sector != fd_sector(drv)) {
254#if 0
255 if (!enable_seek) {
256 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
257 head, track, sect, 1, drv->max_track, drv->last_sect);
258 return 4;
259 }
260#else
261 RT_NOREF(enable_seek);
262#endif
263 drv->head = head;
264 if (drv->track != track)
265 ret = 1;
266 drv->track = track;
267 drv->sect = sect;
268 }
269 drv->ltrk = drv->track;
270
271 return ret;
272}
273
274/* Set drive back to track 0 */
275static void fd_recalibrate(fdrive_t *drv)
276{
277 FLOPPY_DPRINTF("recalibrate\n");
278 drv->head = 0;
279 drv->track = 0;
280 drv->ltrk = 0;
281 drv->sect = 1;
282}
283
284/* Recognize floppy formats */
285typedef struct fd_format_t {
286 fdrive_type_t drive;
287 uint8_t last_sect; /**< Number of sectors. */
288 uint8_t max_track; /**< Number of tracks. */
289 uint8_t max_head; /**< Max head number. */
290 fdrive_rate_t rate;
291 const char *str;
292} fd_format_t;
293
294/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
295 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
296 */
297static fd_format_t fd_formats[] = {
298 /* First entry is default format */
299 /* 1.44 MB 3"1/2 floppy disks */
300 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
301 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
302 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
303 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
304 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
305 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
306 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
307 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
308 /* 2.88 MB 3"1/2 floppy disks */
309 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
310 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
311 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
312 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
313 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
314 /* 720 kB 3"1/2 floppy disks */
315 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
316 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
317 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
318 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
319 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
320 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
321 /* 1.2 MB 5"1/4 floppy disks */
322 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
323 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
324 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
325 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
326 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
327 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
328 /* 720 kB 5"1/4 floppy disks */
329 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
330 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
331 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
332 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
333 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
334 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
335 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
336 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
337 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
338 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
339 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
340 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
341 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
342 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
343 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
344 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
345 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
346 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
347 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
348 /* For larger than real life floppy images (see DrvBlock.cpp). */
349 /* 15.6 MB fake floppy disk (just need something big). */
350 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
351 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
352 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
353 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
354 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
355 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
356 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
357 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
358 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
359 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
360 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
361 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
362 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
363 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
364 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
365 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
366 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
367 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
368 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
369 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
370 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
371 /* 63.5 MB fake floppy disk (just need something big). */
372 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
373 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
374 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
375 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
376 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
377 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
378 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
379 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
380 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
381 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
382 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
383 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
384 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
385 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
386 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
387 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
388 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
389 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
390 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
391 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
392 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
393 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
394 /* end */
395 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
396};
397
398/* Revalidate a disk drive after a disk change */
399static void fd_revalidate(fdrive_t *drv)
400{
401 const fd_format_t *parse;
402 uint64_t nb_sectors, size;
403 int i, first_match, match;
404 int nb_heads, max_track, last_sect, ro;
405
406 FLOPPY_DPRINTF("revalidate\n");
407 if ( drv->pDrvMedia
408 && drv->pDrvMount
409 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
410 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
411 nb_heads = max_track = last_sect = 0;
412 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
413 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
414 nb_heads - 1, max_track, last_sect);
415 } else {
416 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
417 nb_sectors = size2 / FD_SECTOR_LEN;
418 match = -1;
419 first_match = -1;
420 for (i = 0;; i++) {
421 parse = &fd_formats[i];
422 if (parse->drive == FDRIVE_DRV_NONE)
423 break;
424 if (drv->drive == parse->drive ||
425 drv->drive == FDRIVE_DRV_NONE) {
426 size = (parse->max_head + 1) * parse->max_track *
427 parse->last_sect;
428 if (nb_sectors == size) {
429 match = i;
430 break;
431 }
432 if (first_match == -1)
433 first_match = i;
434 }
435 }
436 if (match == -1) {
437 if (first_match == -1)
438 match = 1;
439 else
440 match = first_match;
441 parse = &fd_formats[match];
442 }
443 nb_heads = parse->max_head + 1;
444 max_track = parse->max_track;
445 last_sect = parse->last_sect;
446 drv->drive = parse->drive;
447 drv->media_rate = parse->rate;
448 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
449 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
450 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
451 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
452 }
453 if (nb_heads == 1) {
454 drv->flags &= ~FDISK_DBL_SIDES;
455 } else {
456 drv->flags |= FDISK_DBL_SIDES;
457 }
458 drv->max_track = max_track;
459 drv->last_sect = last_sect;
460 drv->ro = ro;
461 } else {
462 FLOPPY_DPRINTF("No disk in drive\n");
463 drv->last_sect = 0;
464 drv->max_track = 0;
465 drv->flags &= ~FDISK_DBL_SIDES;
466 drv->dsk_chg = true; /* Disk change line active. */
467 }
468}
469
470/********************************************************/
471/* Intel 82078 floppy disk controller emulation */
472
473static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
474static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
475static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
476
477static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
478static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
479static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
480static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
481static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
482static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
483static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
484static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
485static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
486static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
487static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
488static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
489
490enum {
491 FD_DIR_WRITE = 0,
492 FD_DIR_READ = 1,
493 FD_DIR_SCANE = 2,
494 FD_DIR_SCANL = 3,
495 FD_DIR_SCANH = 4,
496 FD_DIR_FORMAT = 5
497};
498
499enum {
500 FD_STATE_MULTI = 0x01, /* multi track flag */
501 FD_STATE_FORMAT = 0x02, /* format flag */
502 FD_STATE_SEEK = 0x04 /* seek flag */
503};
504
505enum {
506 FD_REG_SRA = 0x00,
507 FD_REG_SRB = 0x01,
508 FD_REG_DOR = 0x02,
509 FD_REG_TDR = 0x03,
510 FD_REG_MSR = 0x04,
511 FD_REG_DSR = 0x04,
512 FD_REG_FIFO = 0x05,
513 FD_REG_DIR = 0x07,
514 FD_REG_CCR = 0x07
515};
516
517enum {
518 FD_CMD_READ_TRACK = 0x02,
519 FD_CMD_SPECIFY = 0x03,
520 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
521 FD_CMD_WRITE = 0x05,
522 FD_CMD_READ = 0x06,
523 FD_CMD_RECALIBRATE = 0x07,
524 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
525 FD_CMD_WRITE_DELETED = 0x09,
526 FD_CMD_READ_ID = 0x0a,
527 FD_CMD_READ_DELETED = 0x0c,
528 FD_CMD_FORMAT_TRACK = 0x0d,
529 FD_CMD_DUMPREG = 0x0e,
530 FD_CMD_SEEK = 0x0f,
531 FD_CMD_VERSION = 0x10,
532 FD_CMD_SCAN_EQUAL = 0x11,
533 FD_CMD_PERPENDICULAR_MODE = 0x12,
534 FD_CMD_CONFIGURE = 0x13,
535 FD_CMD_LOCK = 0x14,
536 FD_CMD_VERIFY = 0x16,
537 FD_CMD_POWERDOWN_MODE = 0x17,
538 FD_CMD_PART_ID = 0x18,
539 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
540 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
541 FD_CMD_SAVE = 0x2e,
542 FD_CMD_OPTION = 0x33,
543 FD_CMD_RESTORE = 0x4e,
544 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
545 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
546 FD_CMD_FORMAT_AND_WRITE = 0xcd,
547 FD_CMD_RELATIVE_SEEK_IN = 0xcf
548};
549
550enum {
551 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
552 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
553 FD_CONFIG_POLL = 0x10, /* Poll enabled */
554 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
555 FD_CONFIG_EIS = 0x40 /* No implied seeks */
556};
557
558enum {
559 FD_SR0_EQPMT = 0x10,
560 FD_SR0_SEEK = 0x20,
561 FD_SR0_ABNTERM = 0x40,
562 FD_SR0_INVCMD = 0x80,
563 FD_SR0_RDYCHG = 0xc0
564};
565
566enum {
567 FD_SR1_MA = 0x01, /* Missing address mark */
568 FD_SR1_NW = 0x02, /* Not writable */
569 FD_SR1_ND = 0x04, /* No data */
570 FD_SR1_EC = 0x80 /* End of cylinder */
571};
572
573enum {
574 FD_SR2_MD = 0x01, /* Missing data address mark */
575 FD_SR2_SNS = 0x04, /* Scan not satisfied */
576 FD_SR2_SEH = 0x08 /* Scan equal hit */
577};
578
579enum {
580 FD_SRA_DIR = 0x01,
581 FD_SRA_nWP = 0x02,
582 FD_SRA_nINDX = 0x04,
583 FD_SRA_HDSEL = 0x08,
584 FD_SRA_nTRK0 = 0x10,
585 FD_SRA_STEP = 0x20,
586 FD_SRA_nDRV2 = 0x40,
587 FD_SRA_INTPEND = 0x80
588};
589
590enum {
591 FD_SRB_MTR0 = 0x01,
592 FD_SRB_MTR1 = 0x02,
593 FD_SRB_WGATE = 0x04,
594 FD_SRB_RDATA = 0x08,
595 FD_SRB_WDATA = 0x10,
596 FD_SRB_DR0 = 0x20
597};
598
599enum {
600#if MAX_FD == 4
601 FD_DOR_SELMASK = 0x03,
602#else
603 FD_DOR_SELMASK = 0x01,
604#endif
605 FD_DOR_nRESET = 0x04,
606 FD_DOR_DMAEN = 0x08,
607 FD_DOR_MOTEN0 = 0x10,
608 FD_DOR_MOTEN1 = 0x20,
609 FD_DOR_MOTEN2 = 0x40,
610 FD_DOR_MOTEN3 = 0x80
611};
612
613enum {
614#if MAX_FD == 4
615 FD_TDR_BOOTSEL = 0x0c
616#else
617 FD_TDR_BOOTSEL = 0x04
618#endif
619};
620
621enum {
622 FD_DSR_DRATEMASK= 0x03,
623 FD_DSR_PWRDOWN = 0x40,
624 FD_DSR_SWRESET = 0x80
625};
626
627enum {
628 FD_MSR_DRV0BUSY = 0x01,
629 FD_MSR_DRV1BUSY = 0x02,
630 FD_MSR_DRV2BUSY = 0x04,
631 FD_MSR_DRV3BUSY = 0x08,
632 FD_MSR_CMDBUSY = 0x10,
633 FD_MSR_NONDMA = 0x20,
634 FD_MSR_DIO = 0x40,
635 FD_MSR_RQM = 0x80
636};
637
638enum {
639 FD_DIR_DSKCHG = 0x80
640};
641
642#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
643#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
644#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
645
646/**
647 * Floppy controller state.
648 *
649 * @implements PDMILEDPORTS
650 */
651struct fdctrl_t {
652 /* Controller's identification */
653 uint8_t version;
654 /* HW */
655 uint8_t irq_lvl;
656 uint8_t dma_chann;
657 uint16_t io_base;
658 /* Controller state */
659 TMTIMERHANDLE hResultTimer;
660
661 /* Interrupt delay timers. */
662 TMTIMERHANDLE hXferDelayTimer;
663 TMTIMERHANDLE hIrqDelayTimer;
664 uint16_t uIrqDelayMsec;
665 uint8_t st0;
666 uint8_t st1;
667 uint8_t st2;
668
669 uint8_t sra;
670 uint8_t srb;
671 uint8_t dor;
672 uint8_t tdr;
673 uint8_t dsr;
674 uint8_t msr;
675 uint8_t cur_drv;
676 uint8_t status0;
677 uint8_t status1;
678 uint8_t status2;
679 /* Command FIFO */
680 uint8_t fifo[FD_SECTOR_LEN];
681 uint32_t data_pos;
682 uint32_t data_len;
683 uint8_t data_state;
684 uint8_t data_dir;
685 uint8_t eot; /* last wanted sector */
686 /* States kept only to be returned back */
687 /* Timers state */
688 uint8_t timer0;
689 uint8_t timer1;
690 /* precompensation */
691 uint8_t precomp_trk;
692 uint8_t config;
693 uint8_t lock;
694 /* Power down config (also with status regB access mode */
695 uint8_t pwrd;
696 /* Floppy drives */
697 uint8_t num_floppies;
698 fdrive_t drives[MAX_FD];
699 uint8_t reset_sensei;
700 /** Pointer to device instance. */
701 PPDMDEVINS pDevIns;
702
703 /** Status LUN: The base interface. */
704 PDMIBASE IBaseStatus;
705 /** Status LUN: The Leds interface. */
706 PDMILEDPORTS ILeds;
707 /** Status LUN: The Partner of ILeds. */
708 PPDMILEDCONNECTORS pLedsConnector;
709
710 /** I/O ports: 0x3f0 */
711 IOMIOPORTHANDLE hIoPorts0;
712 /** I/O ports: 0x3f1..0x3f5 */
713 IOMIOPORTHANDLE hIoPorts1;
714 /** I/O port: 0x3f7 */
715 IOMIOPORTHANDLE hIoPorts2;
716};
717
718static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
719{
720 uint32_t retval;
721
722 switch (reg) {
723 case FD_REG_SRA:
724 retval = fdctrl_read_statusA(fdctrl);
725 break;
726 case FD_REG_SRB:
727 retval = fdctrl_read_statusB(fdctrl);
728 break;
729 case FD_REG_DOR:
730 retval = fdctrl_read_dor(fdctrl);
731 break;
732 case FD_REG_TDR:
733 retval = fdctrl_read_tape(fdctrl);
734 break;
735 case FD_REG_MSR:
736 retval = fdctrl_read_main_status(fdctrl);
737 break;
738 case FD_REG_FIFO:
739 retval = fdctrl_read_data(fdctrl);
740 break;
741 case FD_REG_DIR:
742 retval = fdctrl_read_dir(fdctrl);
743 break;
744 default:
745 retval = UINT32_MAX;
746 break;
747 }
748 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
749
750 return retval;
751}
752
753static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
754{
755 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
756
757 switch (reg) {
758 case FD_REG_DOR:
759 fdctrl_write_dor(fdctrl, value);
760 break;
761 case FD_REG_TDR:
762 fdctrl_write_tape(fdctrl, value);
763 break;
764 case FD_REG_DSR:
765 fdctrl_write_rate(fdctrl, value);
766 break;
767 case FD_REG_FIFO:
768 fdctrl_write_data(fdctrl, value);
769 break;
770 case FD_REG_CCR:
771 fdctrl_write_ccr(fdctrl, value);
772 break;
773 default:
774 break;
775 }
776}
777
778/* Change IRQ state */
779static void fdctrl_reset_irq(fdctrl_t *fdctrl)
780{
781 if (!(fdctrl->sra & FD_SRA_INTPEND))
782 return;
783 FLOPPY_DPRINTF("Reset interrupt\n");
784 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
785 fdctrl->sra &= ~FD_SRA_INTPEND;
786}
787
788static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
789{
790 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
791 FLOPPY_DPRINTF("Raising interrupt...\n");
792 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
793 fdctrl->sra |= FD_SRA_INTPEND;
794 }
795 if (status0 & FD_SR0_SEEK) {
796 fdrive_t *cur_drv;
797
798 /* A seek clears the disk change line (if a disk is inserted). */
799 cur_drv = get_cur_drv(fdctrl);
800 if (cur_drv->max_track)
801 cur_drv->dsk_chg = false;
802 }
803
804 fdctrl->reset_sensei = 0;
805 fdctrl->status0 = status0;
806 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
807}
808
809static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
810{
811 if (!fdctrl->uIrqDelayMsec)
812 {
813 /* If not IRQ delay needed, trigger the interrupt now. */
814 fdctrl_raise_irq_now(fdctrl, status0);
815 }
816 else
817 {
818 /* Otherwise schedule completion after a short while. */
819 fdctrl->st0 = status0;
820 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
821 }
822}
823
824/* Reset controller */
825static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
826{
827 int i;
828
829 FLOPPY_DPRINTF("reset controller\n");
830 fdctrl_reset_irq(fdctrl);
831 /* Initialise controller */
832 fdctrl->sra = 0;
833 fdctrl->srb = 0xc0;
834 if (!fdctrl->drives[1].pDrvMedia)
835 fdctrl->sra |= FD_SRA_nDRV2;
836 fdctrl->cur_drv = 0;
837 fdctrl->dor = FD_DOR_nRESET;
838 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
839 fdctrl->msr = FD_MSR_RQM;
840 /* FIFO state */
841 fdctrl->data_pos = 0;
842 fdctrl->data_len = 0;
843 fdctrl->data_state = 0;
844 fdctrl->data_dir = FD_DIR_WRITE;
845 for (i = 0; i < MAX_FD; i++)
846 fd_recalibrate(&fdctrl->drives[i]);
847 fdctrl_reset_fifo(fdctrl);
848 if (do_irq) {
849 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
850 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
851 }
852}
853
854static inline fdrive_t *drv0(fdctrl_t *fdctrl)
855{
856 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
857}
858
859static inline fdrive_t *drv1(fdctrl_t *fdctrl)
860{
861 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
862 return &fdctrl->drives[1];
863 else
864 return &fdctrl->drives[0];
865}
866
867#if MAX_FD == 4
868static inline fdrive_t *drv2(fdctrl_t *fdctrl)
869{
870 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
871 return &fdctrl->drives[2];
872 else
873 return &fdctrl->drives[1];
874}
875
876static inline fdrive_t *drv3(fdctrl_t *fdctrl)
877{
878 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
879 return &fdctrl->drives[3];
880 else
881 return &fdctrl->drives[2];
882}
883#endif
884
885static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
886{
887 switch (fdctrl->cur_drv) {
888 case 0: return drv0(fdctrl);
889 case 1: return drv1(fdctrl);
890#if MAX_FD == 4
891 case 2: return drv2(fdctrl);
892 case 3: return drv3(fdctrl);
893#endif
894 default: return NULL;
895 }
896}
897
898/* Status A register : 0x00 (read-only) */
899static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
900{
901 uint32_t retval = fdctrl->sra;
902
903 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
904
905 return retval;
906}
907
908/* Status B register : 0x01 (read-only) */
909static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
910{
911 uint32_t retval = fdctrl->srb;
912
913 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
914
915 return retval;
916}
917
918/* Digital output register : 0x02 */
919static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
920{
921 uint32_t retval = fdctrl->dor;
922
923 /* Selected drive */
924 retval |= fdctrl->cur_drv;
925 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
926
927 return retval;
928}
929
930static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
931{
932 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
933
934 /* Motors */
935 if (value & FD_DOR_MOTEN0)
936 fdctrl->srb |= FD_SRB_MTR0;
937 else
938 fdctrl->srb &= ~FD_SRB_MTR0;
939 if (value & FD_DOR_MOTEN1)
940 fdctrl->srb |= FD_SRB_MTR1;
941 else
942 fdctrl->srb &= ~FD_SRB_MTR1;
943
944 /* Drive */
945 if (value & 1)
946 fdctrl->srb |= FD_SRB_DR0;
947 else
948 fdctrl->srb &= ~FD_SRB_DR0;
949
950 /* Reset */
951 if (!(value & FD_DOR_nRESET)) {
952 if (fdctrl->dor & FD_DOR_nRESET) {
953 FLOPPY_DPRINTF("controller enter RESET state\n");
954 }
955 } else {
956 if (!(fdctrl->dor & FD_DOR_nRESET)) {
957 FLOPPY_DPRINTF("controller out of RESET state\n");
958 fdctrl_reset(fdctrl, 1);
959 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
960 }
961 }
962 /* Selected drive */
963 fdctrl->cur_drv = value & FD_DOR_SELMASK;
964
965 fdctrl->dor = value;
966}
967
968/* Tape drive register : 0x03 */
969static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
970{
971 uint32_t retval = fdctrl->tdr;
972
973 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
974
975 return retval;
976}
977
978static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
979{
980 /* Reset mode */
981 if (!(fdctrl->dor & FD_DOR_nRESET)) {
982 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
983 return;
984 }
985 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
986 /* Disk boot selection indicator */
987 fdctrl->tdr = value & FD_TDR_BOOTSEL;
988 /* Tape indicators: never allow */
989}
990
991/* Main status register : 0x04 (read) */
992static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
993{
994 uint32_t retval = fdctrl->msr;
995
996 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
997 fdctrl->dor |= FD_DOR_nRESET;
998
999 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1000
1001 return retval;
1002}
1003
1004/* Data select rate register : 0x04 (write) */
1005static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1006{
1007 /* Reset mode */
1008 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1009 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1010 return;
1011 }
1012 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1013 /* Reset: autoclear */
1014 if (value & FD_DSR_SWRESET) {
1015 fdctrl->dor &= ~FD_DOR_nRESET;
1016 fdctrl_reset(fdctrl, 1);
1017 fdctrl->dor |= FD_DOR_nRESET;
1018 }
1019 if (value & FD_DSR_PWRDOWN) {
1020 fdctrl_reset(fdctrl, 1);
1021 }
1022 fdctrl->dsr = value;
1023}
1024
1025/* Configuration control register : 0x07 (write) */
1026static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1027{
1028 /* Reset mode */
1029 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1030 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1031 return;
1032 }
1033 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1034
1035 /* Only the rate selection bits used in AT mode, and we
1036 * store those in the DSR.
1037 */
1038 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1039}
1040
1041static int fdctrl_media_changed(fdrive_t *drv)
1042{
1043 return drv->dsk_chg;
1044}
1045
1046/* Digital input register : 0x07 (read-only) */
1047static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1048{
1049 uint32_t retval = 0;
1050
1051 /* The change line signal is reported by the currently selected
1052 * drive. If the corresponding motor on bit is not set, the drive
1053 * is *not* selected!
1054 */
1055 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1056 && (fdctrl->dor & (0x10 << fdctrl->cur_drv)))
1057 retval |= FD_DIR_DSKCHG;
1058 if (retval != 0)
1059 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1060
1061 return retval;
1062}
1063
1064/* FIFO state control */
1065static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1066{
1067 fdctrl->data_dir = FD_DIR_WRITE;
1068 fdctrl->data_pos = 0;
1069 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1070}
1071
1072/* Set FIFO status for the host to read */
1073static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1074{
1075 fdctrl->data_dir = FD_DIR_READ;
1076 fdctrl->data_len = fifo_len;
1077 fdctrl->data_pos = 0;
1078 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1079 if (do_irq)
1080 fdctrl_raise_irq(fdctrl, 0x00);
1081}
1082
1083/* Set an error: unimplemented/unknown command */
1084static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1085{
1086 RT_NOREF(direction);
1087 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1088 fdctrl->fifo[0] = FD_SR0_INVCMD;
1089 fdctrl_set_fifo(fdctrl, 1, 0);
1090}
1091
1092/* Seek to next sector */
1093static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1094{
1095 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1096 cur_drv->head, cur_drv->track, cur_drv->sect,
1097 fd_sector(cur_drv));
1098 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1099 error in fact */
1100 if (cur_drv->sect >= cur_drv->last_sect ||
1101 cur_drv->sect == fdctrl->eot) {
1102 cur_drv->sect = 1;
1103 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1104 if (cur_drv->head == 0 &&
1105 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1106 cur_drv->head = 1;
1107 } else {
1108 cur_drv->head = 0;
1109 cur_drv->ltrk++;
1110 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1111 return 0;
1112 }
1113 } else {
1114 cur_drv->ltrk++;
1115 return 0;
1116 }
1117 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1118 cur_drv->head, cur_drv->track,
1119 cur_drv->sect, fd_sector(cur_drv));
1120 } else {
1121 cur_drv->sect++;
1122 }
1123 return 1;
1124}
1125
1126/* Callback for transfer end (stop or abort) */
1127static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1128 uint8_t status1, uint8_t status2)
1129{
1130 fdrive_t *cur_drv;
1131
1132 cur_drv = get_cur_drv(fdctrl);
1133 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1134 status0, status1, status2,
1135 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1136 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1137 fdctrl->fifo[1] = status1;
1138 fdctrl->fifo[2] = status2;
1139 fdctrl->fifo[3] = cur_drv->ltrk;
1140 fdctrl->fifo[4] = cur_drv->head;
1141 fdctrl->fifo[5] = cur_drv->sect;
1142 fdctrl->fifo[6] = FD_SECTOR_SC;
1143 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1144 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1145 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1146
1147 fdctrl->data_dir = FD_DIR_READ;
1148 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1149 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1150 }
1151 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1152 fdctrl->msr &= ~FD_MSR_NONDMA;
1153 fdctrl_set_fifo(fdctrl, 7, 1);
1154}
1155
1156static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1157 uint8_t status1, uint8_t status2)
1158{
1159 if (!fdctrl->uIrqDelayMsec)
1160 {
1161 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1162 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1163 }
1164 else
1165 {
1166 /* Otherwise schedule completion after a short while. */
1167 fdctrl->st0 = status0;
1168 fdctrl->st1 = status1;
1169 fdctrl->st2 = status2;
1170 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1171 }
1172}
1173
1174/* Prepare a data transfer (either DMA or FIFO) */
1175static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1176{
1177 fdrive_t *cur_drv;
1178 uint8_t kh, kt, ks;
1179 int did_seek = 0;
1180
1181 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1182 cur_drv = get_cur_drv(fdctrl);
1183 kt = fdctrl->fifo[2];
1184 kh = fdctrl->fifo[3];
1185 ks = fdctrl->fifo[4];
1186 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1187 GET_CUR_DRV(fdctrl), kh, kt, ks,
1188 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1189 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1190 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1191 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1192 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1193 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1194 case 2:
1195 /* sect too big */
1196 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1197 fdctrl->fifo[3] = kt;
1198 fdctrl->fifo[4] = kh;
1199 fdctrl->fifo[5] = ks;
1200 return;
1201 case 3:
1202 /* track too big */
1203 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1204 fdctrl->fifo[3] = kt;
1205 fdctrl->fifo[4] = kh;
1206 fdctrl->fifo[5] = ks;
1207 return;
1208 case 4:
1209 /* No seek enabled */
1210 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1211 fdctrl->fifo[3] = kt;
1212 fdctrl->fifo[4] = kh;
1213 fdctrl->fifo[5] = ks;
1214 return;
1215 case 5:
1216 /* No disk in drive */
1217 /// @todo This is wrong! Command should not complete.
1218 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1219 fdctrl->fifo[3] = kt;
1220 fdctrl->fifo[4] = kh;
1221 fdctrl->fifo[5] = ks;
1222 return;
1223 case 1:
1224 did_seek = 1;
1225 break;
1226 default:
1227 break;
1228 }
1229 /* Check the data rate. If the programmed data rate does not match
1230 * the currently inserted medium, the operation has to fail.
1231 */
1232 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1233 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1234 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1235 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1236 fdctrl->fifo[3] = kt;
1237 fdctrl->fifo[4] = kh;
1238 fdctrl->fifo[5] = ks;
1239 return;
1240 }
1241 /* Set the FIFO state */
1242 fdctrl->data_dir = direction;
1243 fdctrl->data_pos = 0;
1244 fdctrl->msr |= FD_MSR_CMDBUSY;
1245 if (fdctrl->fifo[0] & 0x80)
1246 fdctrl->data_state |= FD_STATE_MULTI;
1247 else
1248 fdctrl->data_state &= ~FD_STATE_MULTI;
1249 if (did_seek)
1250 fdctrl->data_state |= FD_STATE_SEEK;
1251 else
1252 fdctrl->data_state &= ~FD_STATE_SEEK;
1253 if (fdctrl->fifo[5] == 00) {
1254 fdctrl->data_len = fdctrl->fifo[8];
1255 } else {
1256 int tmp;
1257 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1258 tmp = (fdctrl->fifo[6] - ks + 1);
1259 if (fdctrl->fifo[0] & 0x80)
1260 tmp += fdctrl->fifo[6];
1261 fdctrl->data_len *= tmp;
1262 }
1263 fdctrl->eot = fdctrl->fifo[6];
1264 if (fdctrl->dor & FD_DOR_DMAEN) {
1265 int dma_mode;
1266 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1267 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1268 dma_mode = (dma_mode >> 2) & 3;
1269 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1270 dma_mode, direction,
1271 (128 << fdctrl->fifo[5]) *
1272 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1273 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1274 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1275 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1276 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1277 /* No access is allowed until DMA transfer has completed */
1278 fdctrl->msr &= ~FD_MSR_RQM;
1279 /* Now, we just have to wait for the DMA controller to
1280 * recall us...
1281 */
1282 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1283 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1284 return;
1285 } else {
1286 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1287 }
1288 }
1289 FLOPPY_DPRINTF("start non-DMA transfer\n");
1290 fdctrl->msr |= FD_MSR_NONDMA;
1291 if (direction != FD_DIR_WRITE)
1292 fdctrl->msr |= FD_MSR_DIO;
1293
1294 /* IO based transfer: calculate len */
1295 fdctrl_raise_irq(fdctrl, 0x00);
1296 return;
1297}
1298
1299/* Prepare a format data transfer (either DMA or FIFO) */
1300static void fdctrl_start_format(fdctrl_t *fdctrl)
1301{
1302 fdrive_t *cur_drv;
1303 uint8_t ns, dp, kh, kt, ks;
1304
1305 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1306 cur_drv = get_cur_drv(fdctrl);
1307 kt = cur_drv->track;
1308 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1309 ns = fdctrl->fifo[3];
1310 dp = fdctrl->fifo[5];
1311 ks = 1;
1312 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1313 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1314 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1315 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1316 case 2:
1317 /* sect too big */
1318 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1319 fdctrl->fifo[3] = kt;
1320 fdctrl->fifo[4] = kh;
1321 fdctrl->fifo[5] = ks;
1322 return;
1323 case 3:
1324 /* track too big */
1325 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1326 fdctrl->fifo[3] = kt;
1327 fdctrl->fifo[4] = kh;
1328 fdctrl->fifo[5] = ks;
1329 return;
1330 case 4:
1331 /* No seek enabled */
1332 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1333 fdctrl->fifo[3] = kt;
1334 fdctrl->fifo[4] = kh;
1335 fdctrl->fifo[5] = ks;
1336 return;
1337 case 5:
1338 /* No disk in drive */
1339 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1340 fdctrl->fifo[3] = kt;
1341 fdctrl->fifo[4] = kh;
1342 fdctrl->fifo[5] = ks;
1343 return;
1344 case 1:
1345 break;
1346 default:
1347 break;
1348 }
1349 /* It's not clear what should happen if the data rate does not match. */
1350#if 0
1351 /* Check the data rate. If the programmed data rate does not match
1352 * the currently inserted medium, the operation has to fail.
1353 */
1354 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1355 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1356 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1357 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1358 fdctrl->fifo[3] = kt;
1359 fdctrl->fifo[4] = kh;
1360 fdctrl->fifo[5] = ks;
1361 return;
1362 }
1363#endif
1364 /* Set the FIFO state */
1365 fdctrl->data_dir = FD_DIR_FORMAT;
1366 fdctrl->data_pos = 0;
1367 fdctrl->msr |= FD_MSR_CMDBUSY;
1368 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1369 fdctrl->data_len = ns * 4;
1370 fdctrl->eot = ns;
1371 if (fdctrl->dor & FD_DOR_DMAEN) {
1372 int dma_mode;
1373 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1374 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1375 dma_mode = (dma_mode >> 2) & 3;
1376 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1377 dma_mode, fdctrl->data_dir,
1378 (128 << fdctrl->fifo[2]) *
1379 (cur_drv->last_sect + 1), fdctrl->data_len);
1380 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1381 /* No access is allowed until DMA transfer has completed */
1382 fdctrl->msr &= ~FD_MSR_RQM;
1383 /* Now, we just have to wait for the DMA controller to
1384 * recall us...
1385 */
1386 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1387 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1388 return;
1389 } else {
1390 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1391 }
1392 }
1393 FLOPPY_DPRINTF("start non-DMA format\n");
1394 fdctrl->msr |= FD_MSR_NONDMA;
1395 /* IO based transfer: calculate len */
1396 fdctrl_raise_irq(fdctrl, 0x00);
1397
1398 return;
1399}
1400
1401/* Prepare a transfer of deleted data */
1402static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1403{
1404 RT_NOREF(direction);
1405 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1406
1407 /* We don't handle deleted data,
1408 * so we don't return *ANYTHING*
1409 */
1410 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1411}
1412
1413/* Block driver read/write wrappers. */
1414
1415static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1416{
1417 int rc;
1418
1419 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1420
1421 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1422 buf, nb_sectors * FD_SECTOR_LEN);
1423
1424 drv->Led.Actual.s.fWriting = 0;
1425 if (RT_FAILURE(rc))
1426 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1427
1428 return rc;
1429}
1430
1431static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1432{
1433 int rc;
1434
1435 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1436
1437 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1438 buf, nb_sectors * FD_SECTOR_LEN);
1439
1440 drv->Led.Actual.s.fReading = 0;
1441
1442 if (RT_FAILURE(rc))
1443 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1444
1445 return rc;
1446}
1447
1448/**
1449 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1450 */
1451static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1452 unsigned uChannel, uint32_t off, uint32_t cb)
1453{
1454 RT_NOREF(pDevIns, off);
1455 fdctrl_t *fdctrl;
1456 fdrive_t *cur_drv;
1457 int rc;
1458 uint32_t len = 0;
1459 uint32_t start_pos, rel_pos;
1460 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1461
1462 fdctrl = (fdctrl_t *)pvUser;
1463 if (fdctrl->msr & FD_MSR_RQM) {
1464 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1465 return 0;
1466 }
1467 cur_drv = get_cur_drv(fdctrl);
1468 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1469 fdctrl->data_dir == FD_DIR_SCANH)
1470 status2 = FD_SR2_SNS;
1471 if (cb > fdctrl->data_len)
1472 cb = fdctrl->data_len;
1473 if (cur_drv->pDrvMedia == NULL)
1474 {
1475 if (fdctrl->data_dir == FD_DIR_WRITE)
1476 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1477 else
1478 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1479 Assert(len == 0);
1480 goto transfer_error;
1481 }
1482
1483 if (cur_drv->ro)
1484 {
1485 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1486 {
1487 /* Handle readonly medium early, no need to do DMA, touch the
1488 * LED or attempt any writes. A real floppy doesn't attempt
1489 * to write to readonly media either. */
1490 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1491 0x00);
1492 Assert(len == 0);
1493 goto transfer_error;
1494 }
1495 }
1496
1497 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1498 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1499 len = cb - fdctrl->data_pos;
1500 if (len + rel_pos > FD_SECTOR_LEN)
1501 len = FD_SECTOR_LEN - rel_pos;
1502 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1503 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1504 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1505 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1506 (fdctrl->data_dir != FD_DIR_WRITE ||
1507 len < FD_SECTOR_LEN || rel_pos != 0)) {
1508 /* READ & SCAN commands and realign to a sector for WRITE */
1509 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1510 if (RT_FAILURE(rc))
1511 {
1512 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1513 fd_sector(cur_drv));
1514 /* Sure, image size is too small... */
1515 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1516 }
1517 }
1518 switch (fdctrl->data_dir) {
1519 case FD_DIR_READ:
1520 /* READ commands */
1521 {
1522 uint32_t read;
1523 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1524 fdctrl->fifo + rel_pos,
1525 fdctrl->data_pos,
1526 len, &read);
1527 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1528 }
1529 break;
1530 case FD_DIR_WRITE:
1531 /* WRITE commands */
1532 {
1533 uint32_t written;
1534 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1535 fdctrl->fifo + rel_pos,
1536 fdctrl->data_pos,
1537 len, &written);
1538 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1539 }
1540
1541 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1542 if (RT_FAILURE(rc))
1543 {
1544 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1545 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1546 goto transfer_error;
1547 }
1548 break;
1549 case FD_DIR_FORMAT:
1550 /* FORMAT command */
1551 {
1552 uint8_t eot = fdctrl->fifo[3];
1553 uint8_t filler = fdctrl->fifo[5];
1554 uint32_t written;
1555 int sct;
1556 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1557 fdctrl->fifo + rel_pos,
1558 fdctrl->data_pos,
1559 len, &written);
1560 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1561
1562 /* Fill the entire track with desired data pattern. */
1563 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1564 eot, filler);
1565 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1566 for (sct = 0; sct < eot; ++sct)
1567 {
1568 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1569 if (RT_FAILURE(rc))
1570 {
1571 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1572 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1573 goto transfer_error;
1574 }
1575 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1576 }
1577 }
1578 break;
1579 default:
1580 /* SCAN commands */
1581 {
1582 uint8_t tmpbuf[FD_SECTOR_LEN];
1583 int ret;
1584 uint32_t read;
1585 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1586 fdctrl->data_pos, len, &read);
1587 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1588 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1589 if (ret == 0) {
1590 status2 = FD_SR2_SEH;
1591 goto end_transfer;
1592 }
1593 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1594 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1595 status2 = 0x00;
1596 goto end_transfer;
1597 }
1598 }
1599 break;
1600 }
1601 fdctrl->data_pos += len;
1602 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1603 if (rel_pos == 0) {
1604 /* Seek to next sector */
1605 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1606 break;
1607 }
1608 }
1609end_transfer:
1610 len = fdctrl->data_pos - start_pos;
1611 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1612 fdctrl->data_pos, len, fdctrl->data_len);
1613 if (fdctrl->data_dir == FD_DIR_SCANE ||
1614 fdctrl->data_dir == FD_DIR_SCANL ||
1615 fdctrl->data_dir == FD_DIR_SCANH)
1616 status2 = FD_SR2_SEH;
1617 if (FD_DID_SEEK(fdctrl->data_state))
1618 status0 |= FD_SR0_SEEK;
1619 fdctrl->data_len -= len;
1620 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1621transfer_error:
1622
1623 return len;
1624}
1625
1626/* Data register : 0x05 */
1627static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1628{
1629 fdrive_t *cur_drv;
1630 uint32_t retval = 0;
1631 unsigned pos;
1632 int rc;
1633
1634 cur_drv = get_cur_drv(fdctrl);
1635 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1636 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1637 FLOPPY_ERROR("controller not ready for reading\n");
1638 return 0;
1639 }
1640 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1641 if (fdctrl->msr & FD_MSR_NONDMA) {
1642 if (pos == 0) {
1643 if (fdctrl->data_pos != 0)
1644 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1645 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1646 fd_sector(cur_drv));
1647 return 0;
1648 }
1649 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1650 if (RT_FAILURE(rc))
1651 {
1652 FLOPPY_DPRINTF("error getting sector %d\n",
1653 fd_sector(cur_drv));
1654 /* Sure, image size is too small... */
1655 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1656 }
1657 }
1658 }
1659 retval = fdctrl->fifo[pos];
1660 if (++fdctrl->data_pos == fdctrl->data_len) {
1661 fdctrl->data_pos = 0;
1662 /* Switch from transfer mode to status mode
1663 * then from status mode to command mode
1664 */
1665 if (fdctrl->msr & FD_MSR_NONDMA) {
1666 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1667 } else {
1668 fdctrl_reset_fifo(fdctrl);
1669 fdctrl_reset_irq(fdctrl);
1670 }
1671 }
1672 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1673
1674 return retval;
1675}
1676
1677static void fdctrl_format_sector(fdctrl_t *fdctrl)
1678{
1679 fdrive_t *cur_drv;
1680 uint8_t kh, kt, ks;
1681 int ok = 0, rc;
1682
1683 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1684 cur_drv = get_cur_drv(fdctrl);
1685 kt = fdctrl->fifo[6];
1686 kh = fdctrl->fifo[7];
1687 ks = fdctrl->fifo[8];
1688 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1689 GET_CUR_DRV(fdctrl), kh, kt, ks,
1690 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1691 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1692 case 2:
1693 /* sect too big */
1694 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1695 fdctrl->fifo[3] = kt;
1696 fdctrl->fifo[4] = kh;
1697 fdctrl->fifo[5] = ks;
1698 return;
1699 case 3:
1700 /* track too big */
1701 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1702 fdctrl->fifo[3] = kt;
1703 fdctrl->fifo[4] = kh;
1704 fdctrl->fifo[5] = ks;
1705 return;
1706 case 4:
1707 /* No seek enabled */
1708 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1709 fdctrl->fifo[3] = kt;
1710 fdctrl->fifo[4] = kh;
1711 fdctrl->fifo[5] = ks;
1712 return;
1713 case 5:
1714 /* No disk in drive */
1715 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1716 fdctrl->fifo[3] = kt;
1717 fdctrl->fifo[4] = kh;
1718 fdctrl->fifo[5] = ks;
1719 return;
1720 case 1:
1721 fdctrl->data_state |= FD_STATE_SEEK;
1722 break;
1723 default:
1724 break;
1725 }
1726 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1727 if (cur_drv->pDrvMedia) {
1728 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1729 if (RT_FAILURE (rc)) {
1730 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1731 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1732 } else {
1733 ok = 1;
1734 }
1735 }
1736 if (ok) {
1737 if (cur_drv->sect == cur_drv->last_sect) {
1738 fdctrl->data_state &= ~FD_STATE_FORMAT;
1739 /* Last sector done */
1740 if (FD_DID_SEEK(fdctrl->data_state))
1741 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1742 else
1743 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1744 } else {
1745 /* More to do */
1746 fdctrl->data_pos = 0;
1747 fdctrl->data_len = 4;
1748 }
1749 }
1750}
1751
1752static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1753{
1754 RT_NOREF(direction);
1755 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1756 fdctrl->fifo[0] = fdctrl->lock << 4;
1757 fdctrl_set_fifo(fdctrl, 1, 0);
1758}
1759
1760static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1761{
1762 RT_NOREF(direction);
1763 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1764
1765 /* Drives position */
1766 fdctrl->fifo[0] = drv0(fdctrl)->track;
1767 fdctrl->fifo[1] = drv1(fdctrl)->track;
1768#if MAX_FD == 4
1769 fdctrl->fifo[2] = drv2(fdctrl)->track;
1770 fdctrl->fifo[3] = drv3(fdctrl)->track;
1771#else
1772 fdctrl->fifo[2] = 0;
1773 fdctrl->fifo[3] = 0;
1774#endif
1775 /* timers */
1776 fdctrl->fifo[4] = fdctrl->timer0;
1777 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1778 fdctrl->fifo[6] = cur_drv->last_sect;
1779 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1780 (cur_drv->perpendicular << 2);
1781 fdctrl->fifo[8] = fdctrl->config;
1782 fdctrl->fifo[9] = fdctrl->precomp_trk;
1783 fdctrl_set_fifo(fdctrl, 10, 0);
1784}
1785
1786static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1787{
1788 RT_NOREF(direction);
1789 /* Controller's version */
1790 fdctrl->fifo[0] = fdctrl->version;
1791 fdctrl_set_fifo(fdctrl, 1, 0);
1792}
1793
1794static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1795{
1796 RT_NOREF(direction);
1797 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1798 fdctrl_set_fifo(fdctrl, 1, 0);
1799}
1800
1801static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1802{
1803 RT_NOREF(direction);
1804 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1805
1806 /* Drives position */
1807 drv0(fdctrl)->track = fdctrl->fifo[3];
1808 drv1(fdctrl)->track = fdctrl->fifo[4];
1809#if MAX_FD == 4
1810 drv2(fdctrl)->track = fdctrl->fifo[5];
1811 drv3(fdctrl)->track = fdctrl->fifo[6];
1812#endif
1813 /* timers */
1814 fdctrl->timer0 = fdctrl->fifo[7];
1815 fdctrl->timer1 = fdctrl->fifo[8];
1816 cur_drv->last_sect = fdctrl->fifo[9];
1817 fdctrl->lock = fdctrl->fifo[10] >> 7;
1818 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1819 fdctrl->config = fdctrl->fifo[11];
1820 fdctrl->precomp_trk = fdctrl->fifo[12];
1821 fdctrl->pwrd = fdctrl->fifo[13];
1822 fdctrl_reset_fifo(fdctrl);
1823}
1824
1825static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1826{
1827 RT_NOREF(direction);
1828 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1829
1830 fdctrl->fifo[0] = 0;
1831 fdctrl->fifo[1] = 0;
1832 /* Drives position */
1833 fdctrl->fifo[2] = drv0(fdctrl)->track;
1834 fdctrl->fifo[3] = drv1(fdctrl)->track;
1835#if MAX_FD == 4
1836 fdctrl->fifo[4] = drv2(fdctrl)->track;
1837 fdctrl->fifo[5] = drv3(fdctrl)->track;
1838#else
1839 fdctrl->fifo[4] = 0;
1840 fdctrl->fifo[5] = 0;
1841#endif
1842 /* timers */
1843 fdctrl->fifo[6] = fdctrl->timer0;
1844 fdctrl->fifo[7] = fdctrl->timer1;
1845 fdctrl->fifo[8] = cur_drv->last_sect;
1846 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1847 (cur_drv->perpendicular << 2);
1848 fdctrl->fifo[10] = fdctrl->config;
1849 fdctrl->fifo[11] = fdctrl->precomp_trk;
1850 fdctrl->fifo[12] = fdctrl->pwrd;
1851 fdctrl->fifo[13] = 0;
1852 fdctrl->fifo[14] = 0;
1853 fdctrl_set_fifo(fdctrl, 15, 0);
1854}
1855
1856static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1857{
1858 RT_NOREF(direction);
1859 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1860
1861 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1862
1863 fdctrl->msr &= ~FD_MSR_RQM;
1864 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1865 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1866}
1867
1868static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1869{
1870 RT_NOREF(direction);
1871 fdrive_t *cur_drv;
1872 uint8_t ns, dp;
1873
1874 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1875 cur_drv = get_cur_drv(fdctrl);
1876 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1877 ns = fdctrl->fifo[3];
1878 dp = fdctrl->fifo[5];
1879
1880 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1881 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1882 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1883 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1884 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1885
1886 /* Since we cannot actually format anything, we have to make sure that
1887 * whatever new format the guest is trying to establish matches the
1888 * existing format of the medium.
1889 */
1890 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1891 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1892 else
1893 {
1894 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1895 cur_drv->last_sect = ns;
1896
1897 fdctrl_start_format(fdctrl);
1898 }
1899}
1900
1901static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1902{
1903 RT_NOREF(direction);
1904 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1905 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1906 if (fdctrl->fifo[2] & 1)
1907 fdctrl->dor &= ~FD_DOR_DMAEN;
1908 else
1909 fdctrl->dor |= FD_DOR_DMAEN;
1910 /* No result back */
1911 fdctrl_reset_fifo(fdctrl);
1912}
1913
1914static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1915{
1916 RT_NOREF(direction);
1917 fdrive_t *cur_drv;
1918
1919 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1920 cur_drv = get_cur_drv(fdctrl);
1921 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1922 /* 1 Byte status back */
1923 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1924 (cur_drv->track == 0 ? 0x10 : 0x00) |
1925 (cur_drv->head << 2) |
1926 GET_CUR_DRV(fdctrl) |
1927 0x28;
1928 fdctrl_set_fifo(fdctrl, 1, 0);
1929}
1930
1931static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1932{
1933 RT_NOREF(direction);
1934 fdrive_t *cur_drv;
1935 uint8_t st0;
1936
1937 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1938 cur_drv = get_cur_drv(fdctrl);
1939 fd_recalibrate(cur_drv);
1940 fdctrl_reset_fifo(fdctrl);
1941 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1942 /* No drive means no TRK0 signal. */
1943 if (cur_drv->drive == FDRIVE_DRV_NONE)
1944 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1945 /* Raise Interrupt */
1946 fdctrl_raise_irq(fdctrl, st0);
1947}
1948
1949static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1950{
1951 RT_NOREF(direction);
1952 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1953
1954 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1955 if(fdctrl->reset_sensei > 0) {
1956 fdctrl->fifo[0] =
1957 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1958 fdctrl->reset_sensei--;
1959 } else {
1960 /* XXX: status0 handling is broken for read/write
1961 commands, so we do this hack. It should be suppressed
1962 ASAP */
1963 fdctrl->fifo[0] =
1964 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1965 /* Hack to preserve SR0 on equipment check failures (no drive). */
1966 if (fdctrl->status0 & FD_SR0_EQPMT)
1967 fdctrl->fifo[0] = fdctrl->status0;
1968 }
1969
1970 fdctrl->fifo[1] = cur_drv->track;
1971 fdctrl_set_fifo(fdctrl, 2, 0);
1972 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1973 fdctrl->status0 = FD_SR0_RDYCHG;
1974}
1975
1976static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
1977{
1978 RT_NOREF(direction);
1979 fdrive_t *cur_drv;
1980
1981 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
1982 fdctrl->fifo[1], fdctrl->fifo[2]);
1983
1984 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1985 cur_drv = get_cur_drv(fdctrl);
1986 fdctrl_reset_fifo(fdctrl);
1987
1988 /* The seek command just sends step pulses to the drive and doesn't care if
1989 * there's a medium inserted or if it's banging the head against the drive.
1990 */
1991 cur_drv->track = fdctrl->fifo[2];
1992 cur_drv->ltrk = cur_drv->track;
1993 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1994 /* Raise Interrupt */
1995 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
1996}
1997
1998static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
1999{
2000 RT_NOREF(direction);
2001 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2002
2003 if (fdctrl->fifo[1] & 0x80)
2004 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2005 /* No result back */
2006 fdctrl_reset_fifo(fdctrl);
2007}
2008
2009static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2010{
2011 RT_NOREF(direction);
2012 fdctrl->config = fdctrl->fifo[2];
2013 fdctrl->precomp_trk = fdctrl->fifo[3];
2014 /* No result back */
2015 fdctrl_reset_fifo(fdctrl);
2016}
2017
2018static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2019{
2020 RT_NOREF(direction);
2021 fdctrl->pwrd = fdctrl->fifo[1];
2022 fdctrl->fifo[0] = fdctrl->fifo[1];
2023 fdctrl_set_fifo(fdctrl, 1, 0);
2024}
2025
2026static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2027{
2028 RT_NOREF(direction);
2029 /* No result back */
2030 fdctrl_reset_fifo(fdctrl);
2031}
2032
2033static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2034{
2035 RT_NOREF(direction);
2036 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2037
2038 /* This command takes a variable number of parameters. It can be terminated
2039 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2040 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2041 */
2042 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2043
2044 /* Command parameters done */
2045 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2046 /* Data is echoed, but not stored! */
2047 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2048 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2049 fdctrl->fifo[2] = 0;
2050 fdctrl->fifo[3] = 0;
2051 fdctrl_set_fifo(fdctrl, 4, 0);
2052 } else {
2053 fdctrl_reset_fifo(fdctrl);
2054 }
2055 } else
2056 fdctrl->data_len++; /* Wait for another byte. */
2057}
2058
2059static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2060{
2061 RT_NOREF(direction);
2062 fdrive_t *cur_drv;
2063
2064 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2065 cur_drv = get_cur_drv(fdctrl);
2066 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2067 cur_drv->track = cur_drv->max_track - 1;
2068 } else {
2069 cur_drv->track += fdctrl->fifo[2];
2070 }
2071 fdctrl_reset_fifo(fdctrl);
2072 /* Raise Interrupt */
2073 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2074}
2075
2076static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2077{
2078 RT_NOREF(direction);
2079 fdrive_t *cur_drv;
2080
2081 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2082 cur_drv = get_cur_drv(fdctrl);
2083 if (fdctrl->fifo[2] > cur_drv->track) {
2084 cur_drv->track = 0;
2085 } else {
2086 cur_drv->track -= fdctrl->fifo[2];
2087 }
2088 fdctrl_reset_fifo(fdctrl);
2089 /* Raise Interrupt */
2090 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2091}
2092
2093static const struct {
2094 uint8_t value;
2095 uint8_t mask;
2096 const char* name;
2097 int parameters;
2098 void (*handler)(fdctrl_t *fdctrl, int direction);
2099 int direction;
2100} handlers[] = {
2101 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2102 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2103 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2104 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2105 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2106 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2107 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2108 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2109 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2110 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2111 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2112 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2113 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2114 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2115 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2116 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2117 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2118 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2119 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2120 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2121 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2122 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2123 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2124 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2125 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2126 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2127 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2128 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2129 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2130 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2131 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2132 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2133};
2134/* Associate command to an index in the 'handlers' array */
2135static uint8_t command_to_handler[256];
2136
2137static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2138{
2139 fdrive_t *cur_drv;
2140 int pos;
2141
2142 cur_drv = get_cur_drv(fdctrl);
2143 /* Reset mode */
2144 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2145 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2146 return;
2147 }
2148 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2149 FLOPPY_ERROR("controller not ready for writing\n");
2150 return;
2151 }
2152 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2153 /* Is it write command time ? */
2154 if (fdctrl->msr & FD_MSR_NONDMA) {
2155 /* FIFO data write */
2156 pos = fdctrl->data_pos++;
2157 pos %= FD_SECTOR_LEN;
2158 fdctrl->fifo[pos] = value;
2159 if (pos == FD_SECTOR_LEN - 1 ||
2160 fdctrl->data_pos == fdctrl->data_len) {
2161 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2162 }
2163 /* Switch from transfer mode to status mode
2164 * then from status mode to command mode
2165 */
2166 if (fdctrl->data_pos == fdctrl->data_len)
2167 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2168 return;
2169 }
2170 if (fdctrl->data_pos == 0) {
2171 /* Command */
2172 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2173 pos = command_to_handler[value & 0xff];
2174 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2175 fdctrl->data_len = handlers[pos].parameters + 1;
2176 fdctrl->msr |= FD_MSR_CMDBUSY;
2177 }
2178
2179 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2180 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2181 if (fdctrl->data_pos == fdctrl->data_len) {
2182 /* We now have all parameters
2183 * and will be able to treat the command
2184 */
2185 if (fdctrl->data_state & FD_STATE_FORMAT) {
2186 fdctrl_format_sector(fdctrl);
2187 return;
2188 }
2189
2190 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2191 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2192 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2193 }
2194}
2195
2196
2197/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2198
2199/**
2200 * @callback_method_impl{FNTMTIMERDEV}
2201 */
2202static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2203{
2204 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2205 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2206 RT_NOREF(pTimer, pvUser);
2207
2208 /* Pretend we are spinning.
2209 * This is needed for Coherent, which uses READ ID to check for
2210 * sector interleaving.
2211 */
2212 if (cur_drv->last_sect != 0) {
2213 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2214 }
2215 /* READ_ID can't automatically succeed! */
2216 if (!cur_drv->max_track) {
2217 FLOPPY_DPRINTF("read id when no disk in drive\n");
2218 /// @todo This is wrong! Command should not complete.
2219 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2220 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2221 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2222 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2223 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2224 } else if (cur_drv->track >= cur_drv->max_track) {
2225 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2226 cur_drv->track, cur_drv->max_track);
2227 cur_drv->ltrk = 0;
2228 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2229 }
2230 else
2231 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2232}
2233
2234
2235/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2236
2237/**
2238 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2239 */
2240static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2241{
2242 RT_NOREF(pvUser);
2243
2244 if (cb == 1)
2245 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2246 else
2247 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2248 return VINF_SUCCESS;
2249}
2250
2251
2252/**
2253 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2254 */
2255static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2256{
2257 RT_NOREF(pvUser);
2258
2259 if (cb == 1)
2260 {
2261 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2262 return VINF_SUCCESS;
2263 }
2264 return VERR_IOM_IOPORT_UNUSED;
2265}
2266
2267
2268/**
2269 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2270 */
2271static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2272{
2273 RT_NOREF(pvUser);
2274
2275 if (cb == 1)
2276 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2277 else
2278 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2279 return VINF_SUCCESS;
2280}
2281
2282
2283/**
2284 * @callback_method_impl{FNTMTIMERDEV}
2285 */
2286static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2287{
2288 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2289 RT_NOREF(pvUser, pTimer);
2290 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2291}
2292
2293
2294/**
2295 * @callback_method_impl{FNTMTIMERDEV}
2296 */
2297static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2298{
2299 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2300 RT_NOREF(pvUser, pTimer);
2301 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2302}
2303
2304
2305
2306/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2307/**
2308 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2309 */
2310static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2311{
2312 RT_NOREF(pvUser);
2313
2314 if (cb == 1)
2315 {
2316 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2317 return VINF_SUCCESS;
2318 }
2319 return VERR_IOM_IOPORT_UNUSED;
2320}
2321
2322
2323/**
2324 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2325 */
2326static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2327{
2328 RT_NOREF(offPort, pvUser);
2329 Assert(offPort == 0);
2330
2331 if (cb == 1)
2332 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2333 else
2334 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2335 return VINF_SUCCESS;
2336}
2337
2338
2339/**
2340 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2341 */
2342static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2343{
2344 RT_NOREF(pvUser, offPort);
2345 Assert(offPort == 0);
2346
2347 if (cb == 1)
2348 {
2349 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2350 return VINF_SUCCESS;
2351 }
2352 return VERR_IOM_IOPORT_UNUSED;
2353}
2354
2355
2356/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2357
2358/**
2359 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2360 */
2361static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2362{
2363 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2364 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2365 unsigned int i;
2366 int rc;
2367
2368 /* Save the FDC I/O registers... */
2369 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2370 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2371 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2372 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2373 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2374 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2375 /* ...the status registers... */
2376 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2377 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2378 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2379 /* ...the command FIFO... */
2380 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2381 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2382 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2383 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2384 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2385 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2386 /* ...and miscellaneous internal FDC state. */
2387 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2388 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2389 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2390 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2391 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2392 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2393 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2394 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2395 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2396
2397 /* Save the number of drives and per-drive state. Note that the media
2398 * states will be updated in fd_revalidate() and need not be saved.
2399 */
2400 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2401 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2402 for (i = 0; i < pThis->num_floppies; ++i)
2403 {
2404 fdrive_t *d = &pThis->drives[i];
2405
2406 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2407 pHlp->pfnSSMPutU32(pSSM, d->drive);
2408 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2409 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2410 pHlp->pfnSSMPutU8(pSSM, d->head);
2411 pHlp->pfnSSMPutU8(pSSM, d->track);
2412 pHlp->pfnSSMPutU8(pSSM, d->sect);
2413 }
2414 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2415 AssertRCReturn(rc, rc);
2416 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2417 AssertRCReturn(rc, rc);
2418 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2419}
2420
2421
2422/**
2423 * @callback_method_impl{FNSSMDEVLOADEXEC}
2424 */
2425static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2426{
2427 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2428 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2429 unsigned int i;
2430 uint32_t val32;
2431 uint8_t val8;
2432 int rc;
2433
2434 if (uVersion > FDC_SAVESTATE_CURRENT)
2435 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2436 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2437
2438 if (uVersion > FDC_SAVESTATE_OLD)
2439 {
2440 /* Load the FDC I/O registers... */
2441 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2442 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2443 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2444 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2445 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2446 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2447 /* ...the status registers... */
2448 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2449 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2450 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2451 /* ...the command FIFO, if the size matches... */
2452 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2453 AssertRCReturn(rc, rc);
2454 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2455 ("The size of FIFO in saved state doesn't match!\n"),
2456 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2457 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2458 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2459 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2460 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2461 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2462 /* ...and miscellaneous internal FDC state. */
2463 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2464 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2465 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2466 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2467 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2468 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2469 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2470 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2471 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2472
2473 /* Validate the number of drives. */
2474 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2475 AssertRCReturn(rc, rc);
2476 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2477 ("The number of drives in saved state doesn't match!\n"),
2478 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2479
2480 /* Load the per-drive state. */
2481 for (i = 0; i < pThis->num_floppies; ++i)
2482 {
2483 fdrive_t *d = &pThis->drives[i];
2484
2485 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2486 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2487 AssertRCReturn(rc, rc);
2488 d->drive = (fdrive_type_t)val32;
2489 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2490 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2491 pHlp->pfnSSMGetU8(pSSM, &d->head);
2492 pHlp->pfnSSMGetU8(pSSM, &d->track);
2493 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2494 }
2495
2496 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2497 {
2498 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2499 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2500 }
2501 }
2502 else if (uVersion == FDC_SAVESTATE_OLD)
2503 {
2504 /* The old saved state was significantly different. However, we can get
2505 * back most of the controller state and fix the rest by pretending the
2506 * disk in the drive (if any) has been replaced. At any rate there should
2507 * be no difficulty unless the state was saved during a floppy operation.
2508 */
2509
2510 /* First verify a few assumptions. */
2511 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2512 ("The size of FIFO in saved state doesn't match!\n"),
2513 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2514 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2515 ("The number of drives in old saved state doesn't match!\n"),
2516 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2517 /* Now load the old state. */
2518 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2519 /* Toss IRQ level, DMA channel, I/O base, and state. */
2520 pHlp->pfnSSMGetU8(pSSM, &val8);
2521 pHlp->pfnSSMGetU8(pSSM, &val8);
2522 pHlp->pfnSSMGetU32(pSSM, &val32);
2523 pHlp->pfnSSMGetU8(pSSM, &val8);
2524 /* Translate dma_en. */
2525 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2526 AssertRCReturn(rc, rc);
2527 if (val8)
2528 pThis->dor |= FD_DOR_DMAEN;
2529 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2530 /* Translate bootsel. */
2531 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2532 AssertRCReturn(rc, rc);
2533 pThis->tdr |= val8 << 2;
2534 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2535 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2536 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2537 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2538 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2539 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2540 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2541 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2542 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2543 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2544 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2545 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2546 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2547
2548 for (i = 0; i < 2; ++i)
2549 {
2550 fdrive_t *d = &pThis->drives[i];
2551
2552 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2553 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2554 d->drive = (fdrive_type_t)val32;
2555 AssertRCReturn(rc, rc);
2556 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2557 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2558 pHlp->pfnSSMGetU8(pSSM, &d->head);
2559 pHlp->pfnSSMGetU8(pSSM, &d->track);
2560 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2561 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2562 pHlp->pfnSSMGetU8(pSSM, &val8);
2563 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2564 AssertRCReturn(rc, rc);
2565 d->flags = (fdrive_flags_t)val32;
2566 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2567 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2568 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2569 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2570 }
2571 }
2572 else
2573 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2574 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2575}
2576
2577
2578/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2579
2580/**
2581 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2582 */
2583static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2584{
2585 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2586 LogFlow(("fdMountNotify:\n"));
2587 fd_revalidate(pDrv);
2588}
2589
2590
2591/**
2592 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2593 */
2594static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2595{
2596 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2597 LogFlow(("fdUnmountNotify:\n"));
2598 fd_revalidate(pDrv);
2599}
2600
2601
2602/**
2603 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2604 */
2605static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2606{
2607 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2608
2609 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2610 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2611 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2612 return NULL;
2613}
2614
2615
2616/**
2617 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2618 */
2619static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2620 uint32_t *piInstance, uint32_t *piLUN)
2621{
2622 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2623 PPDMDEVINS pDevIns = pDrv->pDevIns;
2624
2625 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2626 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2627 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2628
2629 *ppcszController = pDevIns->pReg->szName;
2630 *piInstance = pDevIns->iInstance;
2631 *piLUN = pDrv->iLUN;
2632
2633 return VINF_SUCCESS;
2634}
2635
2636/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2637
2638/**
2639 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2640 */
2641static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2642{
2643 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2644 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2645 *ppLed = &pThis->drives[iLUN].Led;
2646 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2647 return VINF_SUCCESS;
2648 }
2649 return VERR_PDM_LUN_NOT_FOUND;
2650}
2651
2652
2653/**
2654 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2655 */
2656static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2657{
2658 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2659
2660 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2661 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2662 return NULL;
2663}
2664
2665
2666/**
2667 * Configure a drive.
2668 *
2669 * @returns VBox status code.
2670 * @param drv The drive in question.
2671 * @param pDevIns The driver instance.
2672 * @param fInit Set if we're at init time and can change the drive type.
2673 */
2674static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2675{
2676 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2677 int rc;
2678
2679 /*
2680 * Reset the LED just to be on the safe side.
2681 */
2682 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2683 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2684 drv->Led.Actual.u32 = 0;
2685 drv->Led.Asserted.u32 = 0;
2686
2687 /*
2688 * Try attach the block device and get the interfaces.
2689 */
2690 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2691 if (RT_SUCCESS (rc)) {
2692 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2693 if (drv->pDrvMedia) {
2694 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2695 if (drv->pDrvMount) {
2696 fd_init(drv, fInit);
2697 } else {
2698 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2699 rc = VERR_PDM_MISSING_INTERFACE;
2700 }
2701
2702 } else {
2703 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2704 rc = VERR_PDM_MISSING_INTERFACE;
2705 }
2706 } else {
2707 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2708 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2709 switch (rc) {
2710 case VERR_ACCESS_DENIED:
2711 /* Error already cached by DrvHostBase */
2712 break;
2713 case VERR_PDM_NO_ATTACHED_DRIVER:
2714 /* Legal on architectures without a floppy controller */
2715 break;
2716 default:
2717 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2718 N_ ("The floppy controller cannot attach to the floppy drive"));
2719 break;
2720 }
2721 }
2722
2723 if (RT_FAILURE (rc)) {
2724 drv->pDrvBase = NULL;
2725 drv->pDrvMedia = NULL;
2726 drv->pDrvMount = NULL;
2727 }
2728 LogFlow (("fdConfig: returns %Rrc\n", rc));
2729 return rc;
2730}
2731
2732
2733/**
2734 * @interface_method_impl{PDMDEVREG,pfnAttach}
2735 *
2736 * This is called when we change block driver for a floppy drive.
2737 */
2738static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2739{
2740 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2741 fdrive_t *drv;
2742 int rc;
2743 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2744
2745 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2746 ("The FDC device does not support hotplugging\n"),
2747 VERR_INVALID_PARAMETER);
2748
2749 /*
2750 * Validate.
2751 */
2752 if (iLUN >= 2) {
2753 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2754 iLUN));
2755 return VERR_PDM_DEVINS_NO_ATTACH;
2756 }
2757
2758 /*
2759 * Locate the drive and stuff.
2760 */
2761 drv = &fdctrl->drives[iLUN];
2762
2763 /* the usual paranoia */
2764 AssertRelease (!drv->pDrvBase);
2765 AssertRelease (!drv->pDrvMedia);
2766 AssertRelease (!drv->pDrvMount);
2767
2768 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2769 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2770 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2771 if (RT_SUCCESS(rc)) {
2772 fd_revalidate (drv);
2773 }
2774
2775 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2776 return rc;
2777}
2778
2779
2780/**
2781 * @interface_method_impl{PDMDEVREG,pfnDetach}
2782 *
2783 * The floppy drive has been temporarily 'unplugged'.
2784 */
2785static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2786{
2787 RT_NOREF(fFlags);
2788 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2789 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2790
2791 switch (iLUN)
2792 {
2793 case 0:
2794 case 1:
2795 {
2796 fdrive_t *drv = &pThis->drives[iLUN];
2797 drv->pDrvBase = NULL;
2798 drv->pDrvMedia = NULL;
2799 drv->pDrvMount = NULL;
2800 break;
2801 }
2802
2803 default:
2804 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2805 break;
2806 }
2807}
2808
2809
2810/**
2811 * @interface_method_impl{PDMDEVREG,pfnReset}
2812 *
2813 * I haven't check the specs on what's supposed to happen on reset, but we
2814 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2815 * at wrong time like we do if this was all void.
2816 */
2817static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2818{
2819 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2820 unsigned i;
2821 LogFlow (("fdcReset:\n"));
2822
2823 fdctrl_reset(pThis, 0);
2824
2825 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2826 fd_revalidate(&pThis->drives[i]);
2827}
2828
2829
2830/**
2831 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2832 */
2833static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2834{
2835 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2836 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2837 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2838 int rc;
2839
2840 RT_NOREF(iInstance);
2841 Assert(iInstance == 0);
2842
2843 /*
2844 * Validate configuration.
2845 */
2846 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2847
2848 /*
2849 * Read the configuration.
2850 */
2851 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2852 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2853
2854 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2855 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2856
2857 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2858 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2859
2860 bool fMemMapped;
2861 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2862 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2863
2864 uint16_t uIrqDelay;
2865 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2866 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2867
2868 bool fStatusA;
2869 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2870 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2871
2872 /*
2873 * Initialize data.
2874 */
2875 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2876 pThis->pDevIns = pDevIns;
2877 pThis->version = 0x90; /* Intel 82078 controller */
2878 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2879 pThis->num_floppies = MAX_FD;
2880 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2881 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2882 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2883
2884 /* Fill 'command_to_handler' lookup table */
2885 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2886 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2887 if ((j & handlers[ii].mask) == handlers[ii].value)
2888 command_to_handler[j] = ii;
2889
2890 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
2891 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
2892
2893 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
2894 {
2895 fdrive_t *pDrv = &pThis->drives[i];
2896
2897 pDrv->drive = FDRIVE_DRV_NONE;
2898 pDrv->iLUN = i;
2899 pDrv->pDevIns = pDevIns;
2900
2901 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
2902 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
2903 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
2904 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
2905 pDrv->Led.u32Magic = PDMLED_MAGIC;
2906 }
2907
2908 /*
2909 * Create the FDC timer.
2910 */
2911 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
2912 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Timer", &pThis->hResultTimer);
2913 AssertRCReturn(rc, rc);
2914
2915 /*
2916 * Create the transfer delay timer.
2917 */
2918 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
2919 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Transfer Delay Timer", &pThis->hXferDelayTimer);
2920 AssertRCReturn(rc, rc);
2921
2922 /*
2923 * Create the IRQ delay timer.
2924 */
2925 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
2926 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC IRQ Delay Timer", &pThis->hIrqDelayTimer);
2927 AssertRCReturn(rc, rc);
2928
2929 pThis->uIrqDelayMsec = uIrqDelay;
2930
2931 /*
2932 * Register DMA channel.
2933 */
2934 if (pThis->dma_chann != 0xff)
2935 {
2936 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
2937 AssertRCReturn(rc, rc);
2938 }
2939
2940 /*
2941 * IO / MMIO.
2942 *
2943 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
2944 * Why we skip registering status register A, though, isn't as clear.
2945 */
2946 if (!fMemMapped)
2947 {
2948 static const IOMIOPORTDESC s_aDescs[] =
2949 {
2950 { "SRA", NULL, "Status register A", NULL },
2951 { "SRB", NULL, "Status register B", NULL },
2952 { "DOR", "DOR", "Digital output register", "Digital output register"},
2953 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
2954 { "MSR", "DSR", "Main status register", "Datarate select register" },
2955 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
2956 { "ATA", "ATA", NULL, NULL },
2957 { "DIR", "CCR", "Digital input register", "Configuration control register"},
2958 { NULL, NULL, NULL, NULL }
2959 };
2960
2961 /* 0x3f0 */
2962 if (fStatusA)
2963 {
2964 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
2965 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
2966 AssertRCReturn(rc, rc);
2967 }
2968
2969 /* 0x3f1..0x3f5 */
2970 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
2971 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
2972 AssertRCReturn(rc, rc);
2973
2974 /* 0x3f7 */
2975 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
2976 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
2977 AssertRCReturn(rc, rc);
2978 }
2979 else
2980 AssertMsgFailedReturn(("Memory mapped floppy not support by now\n"), VERR_NOT_SUPPORTED);
2981
2982 /*
2983 * Register the saved state data unit.
2984 */
2985 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
2986 AssertRCReturn(rc, rc);
2987
2988 /*
2989 * Attach the status port (optional).
2990 */
2991 PPDMIBASE pBase;
2992 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
2993 if (RT_SUCCESS (rc))
2994 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
2995 else
2996 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
2997
2998 /*
2999 * Initialize drives.
3000 */
3001 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3002 {
3003 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3004 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3005 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3006 rc);
3007 }
3008
3009 fdctrl_reset(pThis, 0);
3010
3011 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3012 fd_revalidate(&pThis->drives[i]);
3013
3014 return VINF_SUCCESS;
3015}
3016
3017
3018/**
3019 * The device registration structure.
3020 */
3021const PDMDEVREG g_DeviceFloppyController =
3022{
3023 /* .u32Version = */ PDM_DEVREG_VERSION,
3024 /* .uReserved0 = */ 0,
3025 /* .szName = */ "i82078",
3026 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3027 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3028 /* .cMaxInstances = */ 1,
3029 /* .uSharedVersion = */ 42,
3030 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3031 /* .cbInstanceCC = */ 0,
3032 /* .cbInstanceRC = */ 0,
3033 /* .cMaxPciDevices = */ 0,
3034 /* .cMaxMsixVectors = */ 0,
3035 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3036#if defined(IN_RING3)
3037 /* .pszRCMod = */ "",
3038 /* .pszR0Mod = */ "",
3039 /* .pfnConstruct = */ fdcConstruct,
3040 /* .pfnDestruct = */ NULL,
3041 /* .pfnRelocate = */ NULL,
3042 /* .pfnMemSetup = */ NULL,
3043 /* .pfnPowerOn = */ NULL,
3044 /* .pfnReset = */ fdcReset,
3045 /* .pfnSuspend = */ NULL,
3046 /* .pfnResume = */ NULL,
3047 /* .pfnAttach = */ fdcAttach,
3048 /* .pfnDetach = */ fdcDetach,
3049 /* .pfnQueryInterface = */ NULL,
3050 /* .pfnInitComplete = */ NULL,
3051 /* .pfnPowerOff = */ NULL,
3052 /* .pfnSoftReset = */ NULL,
3053 /* .pfnReserved0 = */ NULL,
3054 /* .pfnReserved1 = */ NULL,
3055 /* .pfnReserved2 = */ NULL,
3056 /* .pfnReserved3 = */ NULL,
3057 /* .pfnReserved4 = */ NULL,
3058 /* .pfnReserved5 = */ NULL,
3059 /* .pfnReserved6 = */ NULL,
3060 /* .pfnReserved7 = */ NULL,
3061#elif defined(IN_RING0)
3062 /* .pfnEarlyConstruct = */ NULL,
3063 /* .pfnConstruct = */ NULL,
3064 /* .pfnDestruct = */ NULL,
3065 /* .pfnFinalDestruct = */ NULL,
3066 /* .pfnRequest = */ NULL,
3067 /* .pfnReserved0 = */ NULL,
3068 /* .pfnReserved1 = */ NULL,
3069 /* .pfnReserved2 = */ NULL,
3070 /* .pfnReserved3 = */ NULL,
3071 /* .pfnReserved4 = */ NULL,
3072 /* .pfnReserved5 = */ NULL,
3073 /* .pfnReserved6 = */ NULL,
3074 /* .pfnReserved7 = */ NULL,
3075#elif defined(IN_RC)
3076 /* .pfnConstruct = */ NULL,
3077 /* .pfnReserved0 = */ NULL,
3078 /* .pfnReserved1 = */ NULL,
3079 /* .pfnReserved2 = */ NULL,
3080 /* .pfnReserved3 = */ NULL,
3081 /* .pfnReserved4 = */ NULL,
3082 /* .pfnReserved5 = */ NULL,
3083 /* .pfnReserved6 = */ NULL,
3084 /* .pfnReserved7 = */ NULL,
3085#else
3086# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3087#endif
3088 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3089};
3090
3091/*
3092 * Local Variables:
3093 * mode: c
3094 * c-file-style: "k&r"
3095 * indent-tabs-mode: nil
3096 * End:
3097 */
3098
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