VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 103882

Last change on this file since 103882 was 103882, checked in by vboxsync, 6 weeks ago

VSCSI: For READ(6) and WRITE(6), a request to transfer zero blocks means transferring 256 blocks.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 110.2 KB
Line 
1/* $Id: DevFdc.cpp 103882 2024-03-18 09:38:17Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 * --------------------------------------------------------------------
27 *
28 * This code is based on:
29 *
30 * QEMU Floppy disk emulator (Intel 82078)
31 *
32 * Copyright (c) 2003 Jocelyn Mayer
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a copy
35 * of this software and associated documentation files (the "Software"), to deal
36 * in the Software without restriction, including without limitation the rights
37 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38 * copies of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included in
42 * all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50 * THE SOFTWARE.
51 *
52 */
53
54
55/*********************************************************************************************************************************
56* Header Files *
57*********************************************************************************************************************************/
58#define LOG_GROUP LOG_GROUP_DEV_FDC
59#include <VBox/vmm/pdmdev.h>
60#include <VBox/vmm/pdmstorageifs.h>
61#include <VBox/AssertGuest.h>
62#include <iprt/assert.h>
63#include <iprt/string.h>
64#include <iprt/uuid.h>
65
66#include "VBoxDD.h"
67
68
69/*********************************************************************************************************************************
70* Defined Constants And Macros *
71*********************************************************************************************************************************/
72/** @name FDC saved state versions
73 * @{ */
74#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
75#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
76#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
77/** @}*/
78
79#define MAX_FD 2
80
81
82/********************************************************/
83/* debug Floppy devices */
84/* #define DEBUG_FLOPPY */
85
86#ifdef LOG_ENABLED
87# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
88#else
89# define FLOPPY_DPRINTF(...) do { } while (0)
90#endif
91
92#define FLOPPY_ERROR RTLogPrintf
93
94typedef struct fdctrl_t fdctrl_t;
95
96/********************************************************/
97/* Floppy drive emulation */
98
99/* Drive selection note:
100 * For many commands, the FDC can select one of four drives through the
101 * second command byte. The Digital Output Register (DOR) can also select
102 * one of four drives. On PCs, the FDC drive selection is ignored, but
103 * should be reflected back in command status. Only the DOR drive selection
104 * is effective; on old PCs with a discrete NEC uPD765 or similar, the FDC
105 * drive selection signals (US0/US1) are not connected at all.
106 * NB: A drive is actually selected only when its motor on bit in the DOR
107 * is also set. It is possible to have no drive selected.
108 *
109 * The FDC cur_drv field tracks the drive the FDC thinks is selected, but
110 * the DOR is used for actual drive selection.
111 */
112
113#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
114#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
115
116/* Will always be a fixed parameter for us */
117#define FD_SECTOR_LEN 512
118#define FD_SECTOR_SC 2 /* Sector size code */
119#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
120
121/* Floppy disk drive emulation */
122typedef enum fdrive_type_t {
123 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
124 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
125 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
126 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
127 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
128 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
129} fdrive_type_t;
130
131typedef uint8_t fdrive_flags_t;
132#define FDISK_DBL_SIDES UINT8_C(0x01)
133
134typedef enum fdrive_rate_t {
135 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
136 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
137 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
138 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
139} fdrive_rate_t;
140
141/**
142 * The status for one drive.
143 *
144 * @implements PDMIBASE
145 * @implements PDMIMEDIAPORT
146 * @implements PDMIMOUNTNOTIFY
147 */
148typedef struct fdrive_t {
149 /** Pointer to the owning device instance. */
150 R3PTRTYPE(PPDMDEVINS) pDevIns;
151 /** Pointer to the attached driver's base interface. */
152 R3PTRTYPE(PPDMIBASE) pDrvBase;
153 /** Pointer to the attached driver's block interface. */
154 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
155 /** Pointer to the attached driver's mount interface.
156 * This is NULL if the driver isn't a removable unit. */
157 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
158 /** The base interface. */
159 PDMIBASE IBase;
160 /** The block port interface. */
161 PDMIMEDIAPORT IPort;
162 /** The mount notify interface. */
163 PDMIMOUNTNOTIFY IMountNotify;
164 /** The LUN #. */
165 RTUINT iLUN;
166 /** The LED for this LUN. */
167 PDMLED Led;
168 /* Drive status */
169 fdrive_type_t drive;
170 uint8_t perpendicular; /* 2.88 MB access mode */
171 uint8_t dsk_chg; /* Disk change line */
172 /* Position */
173 uint8_t head;
174 uint8_t track;
175 uint8_t sect;
176 uint8_t ltrk; /* Logical track */
177 /* Media */
178 fdrive_flags_t flags;
179 uint8_t last_sect; /* Nb sector per track */
180 uint8_t max_track; /* Nb of tracks */
181 uint16_t bps; /* Bytes per sector */
182 uint8_t ro; /* Is read-only */
183 uint8_t media_rate; /* Data rate of medium */
184} fdrive_t;
185
186#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
187
188static void fd_init(fdrive_t *drv, bool fInit)
189{
190 /* Drive */
191 if (fInit) {
192 /* Fixate the drive type at init time if possible. */
193 if (drv->pDrvMedia) {
194 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
195 switch (enmType) {
196 case PDMMEDIATYPE_FLOPPY_360:
197 case PDMMEDIATYPE_FLOPPY_1_20:
198 drv->drive = FDRIVE_DRV_120;
199 break;
200 case PDMMEDIATYPE_FLOPPY_720:
201 case PDMMEDIATYPE_FLOPPY_1_44:
202 drv->drive = FDRIVE_DRV_144;
203 break;
204 default:
205 AssertFailed();
206 RT_FALL_THRU();
207 case PDMMEDIATYPE_FLOPPY_2_88:
208 drv->drive = FDRIVE_DRV_288;
209 break;
210 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
211 drv->drive = FDRIVE_DRV_FAKE_15_6;
212 break;
213 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
214 drv->drive = FDRIVE_DRV_FAKE_63_5;
215 break;
216 }
217 } else {
218 drv->drive = FDRIVE_DRV_NONE;
219 }
220 } /* else: The BIOS (and others) get the drive type via the CMOS, so
221 don't change it after the VM has been constructed. */
222 drv->perpendicular = 0;
223 /* Disk */
224 drv->last_sect = 0;
225 drv->max_track = 0;
226}
227
228static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
229 uint8_t last_sect, uint8_t num_sides)
230{
231 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
232}
233
234/* Returns current position, in sectors, for given drive */
235static int fd_sector(fdrive_t *drv)
236{
237 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
238}
239
240/* Seek to a new position:
241 * returns 0 if already on right track
242 * returns 1 if track changed
243 * returns 2 if track is invalid
244 * returns 3 if sector is invalid
245 * returns 4 if seek is disabled
246 * returns 5 if no media in drive
247 */
248static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
249 int enable_seek)
250{
251 int sector;
252 int ret;
253
254 if (!drv->last_sect) {
255 FLOPPY_DPRINTF("no disk in drive (max=%d h=%d c=%02x =s%02x) -> 5\n",
256 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
257 return 5;
258 }
259 if (track > drv->max_track ||
260 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
261 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 2\n",
262 head, track, sect,
263 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
264 return 2;
265 }
266 if (sect > drv->last_sect || sect < 1) {
267 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 3\n",
268 head, track, sect,
269 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
270 return 3;
271 }
272 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
273 ret = 0;
274 if (sector != fd_sector(drv)) {
275#if 0
276 if (!enable_seek) {
277 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
278 head, track, sect, 1, drv->max_track, drv->last_sect);
279 return 4;
280 }
281#else
282 RT_NOREF(enable_seek);
283#endif
284 drv->head = head;
285 if (drv->track != track)
286 ret = 1;
287 drv->track = track;
288 drv->sect = sect;
289 }
290 drv->ltrk = drv->track;
291
292 return ret;
293}
294
295/* Set drive back to track 0 */
296static void fd_recalibrate(fdrive_t *drv)
297{
298 FLOPPY_DPRINTF("recalibrate\n");
299 drv->head = 0;
300 drv->track = 0;
301 drv->ltrk = 0;
302 drv->sect = 1;
303}
304
305/* Recognize floppy formats */
306typedef struct fd_format_t {
307 fdrive_type_t drive;
308 uint8_t last_sect; /**< Number of sectors. */
309 uint8_t max_track; /**< Number of tracks. */
310 uint8_t max_head; /**< Max head number. */
311 fdrive_rate_t rate;
312 const char *str;
313} fd_format_t;
314
315/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
316 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
317 */
318static fd_format_t const fd_formats[] = {
319 /* First entry is default format */
320 /* 1.44 MB 3"1/2 floppy disks */
321 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
322 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
323 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
324 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
325 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
326 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
327 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
328 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
329 /* 2.88 MB 3"1/2 floppy disks */
330 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
331 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
332 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
333 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
334 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
335 /* 720 kB 3"1/2 floppy disks */
336 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
337 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
338 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
339 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
340 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
341 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
342 /* 1.2 MB 5"1/4 floppy disks */
343 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
344 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
345 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
346 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
347 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
348 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
349 /* 720 kB 5"1/4 floppy disks */
350 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
351 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
352 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
353 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
354 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
355 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
356 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
357 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
358 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
359 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
360 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
361 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
362 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
363 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
364 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
365 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
366 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
367 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
368 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
369 /* For larger than real life floppy images (see DrvVD.cpp). */
370 /* 15.6 MB fake floppy disk (just need something big). */
371 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
372 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
373 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
374 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
375 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
376 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
377 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
378 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
379 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
380 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
381 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
382 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
383 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
384 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
385 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
386 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
387 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
388 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
389 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
390 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
391 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
392 /* 63.5 MB fake floppy disk (just need something big). */
393 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
394 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
395 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
396 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
397 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
398 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
399 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
400 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
401 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
402 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
403 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
404 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
405 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
406 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
407 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
408 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
409 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
410 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
411 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
412 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
413 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
414 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
415 /* end */
416 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
417};
418
419/* Revalidate a disk drive after a disk change */
420static void fd_revalidate(fdrive_t *drv)
421{
422 const fd_format_t *parse;
423 uint64_t nb_sectors, size;
424 int i, first_match, match;
425 int nb_heads, max_track, last_sect, ro;
426
427 FLOPPY_DPRINTF("revalidate\n");
428 if ( drv->pDrvMedia
429 && drv->pDrvMount
430 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
431 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
432 nb_heads = max_track = last_sect = 0;
433 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
434 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
435 nb_heads - 1, max_track, last_sect);
436 } else {
437 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
438 nb_sectors = size2 / FD_SECTOR_LEN;
439 match = -1;
440 first_match = -1;
441 for (i = 0;; i++) {
442 parse = &fd_formats[i];
443 if (parse->drive == FDRIVE_DRV_NONE)
444 break;
445 if (drv->drive == parse->drive ||
446 drv->drive == FDRIVE_DRV_NONE) {
447 size = (parse->max_head + 1) * parse->max_track *
448 parse->last_sect;
449 if (nb_sectors == size) {
450 match = i;
451 break;
452 }
453 if (first_match == -1)
454 first_match = i;
455 }
456 }
457 if (match == -1) {
458 if (first_match == -1)
459 match = 1;
460 else
461 match = first_match;
462 parse = &fd_formats[match];
463 }
464 nb_heads = parse->max_head + 1;
465 max_track = parse->max_track;
466 last_sect = parse->last_sect;
467 drv->drive = parse->drive;
468 drv->media_rate = parse->rate;
469 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
470 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
471 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
472 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
473 }
474 if (nb_heads == 1) {
475 drv->flags &= ~FDISK_DBL_SIDES;
476 } else {
477 drv->flags |= FDISK_DBL_SIDES;
478 }
479 drv->max_track = max_track;
480 drv->last_sect = last_sect;
481 drv->ro = ro;
482 } else {
483 FLOPPY_DPRINTF("No disk in drive\n");
484 drv->last_sect = 0;
485 drv->max_track = 0;
486 drv->flags &= ~FDISK_DBL_SIDES;
487 drv->dsk_chg = true; /* Disk change line active. */
488 }
489}
490
491/********************************************************/
492/* Intel 82078 floppy disk controller emulation */
493
494static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
495static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
496static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
497
498static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
499static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
500static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
501static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
502static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
503static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
504static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
505static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
506static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
507static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
508static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
509static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
510
511enum {
512 FD_DIR_WRITE = 0,
513 FD_DIR_READ = 1,
514 FD_DIR_SCANE = 2,
515 FD_DIR_SCANL = 3,
516 FD_DIR_SCANH = 4,
517 FD_DIR_FORMAT = 5
518};
519
520enum {
521 FD_STATE_MULTI = 0x01, /* multi track flag */
522 FD_STATE_FORMAT = 0x02, /* format flag */
523 FD_STATE_SEEK = 0x04 /* seek flag */
524};
525
526enum {
527 FD_REG_SRA = 0x00,
528 FD_REG_SRB = 0x01,
529 FD_REG_DOR = 0x02,
530 FD_REG_TDR = 0x03,
531 FD_REG_MSR = 0x04,
532 FD_REG_DSR = 0x04,
533 FD_REG_FIFO = 0x05,
534 FD_REG_DIR = 0x07,
535 FD_REG_CCR = 0x07
536};
537
538enum {
539 FD_CMD_READ_TRACK = 0x02,
540 FD_CMD_SPECIFY = 0x03,
541 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
542 FD_CMD_WRITE = 0x05,
543 FD_CMD_READ = 0x06,
544 FD_CMD_RECALIBRATE = 0x07,
545 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
546 FD_CMD_WRITE_DELETED = 0x09,
547 FD_CMD_READ_ID = 0x0a,
548 FD_CMD_READ_DELETED = 0x0c,
549 FD_CMD_FORMAT_TRACK = 0x0d,
550 FD_CMD_DUMPREG = 0x0e,
551 FD_CMD_SEEK = 0x0f,
552 FD_CMD_VERSION = 0x10,
553 FD_CMD_SCAN_EQUAL = 0x11,
554 FD_CMD_PERPENDICULAR_MODE = 0x12,
555 FD_CMD_CONFIGURE = 0x13,
556 FD_CMD_LOCK = 0x14,
557 FD_CMD_VERIFY = 0x16,
558 FD_CMD_POWERDOWN_MODE = 0x17,
559 FD_CMD_PART_ID = 0x18,
560 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
561 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
562 FD_CMD_SAVE = 0x2e,
563 FD_CMD_OPTION = 0x33,
564 FD_CMD_RESTORE = 0x4e,
565 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
566 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
567 FD_CMD_FORMAT_AND_WRITE = 0xcd,
568 FD_CMD_RELATIVE_SEEK_IN = 0xcf
569};
570
571enum {
572 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
573 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
574 FD_CONFIG_POLL = 0x10, /* Poll enabled */
575 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
576 FD_CONFIG_EIS = 0x40 /* No implied seeks */
577};
578
579enum {
580 FD_SR0_EQPMT = 0x10,
581 FD_SR0_SEEK = 0x20,
582 FD_SR0_ABNTERM = 0x40,
583 FD_SR0_INVCMD = 0x80,
584 FD_SR0_RDYCHG = 0xc0
585};
586
587enum {
588 FD_SR1_MA = 0x01, /* Missing address mark */
589 FD_SR1_NW = 0x02, /* Not writable */
590 FD_SR1_ND = 0x04, /* No data */
591 FD_SR1_EC = 0x80 /* End of cylinder */
592};
593
594enum {
595 FD_SR2_MD = 0x01, /* Missing data address mark */
596 FD_SR2_SNS = 0x04, /* Scan not satisfied */
597 FD_SR2_SEH = 0x08 /* Scan equal hit */
598};
599
600enum {
601 FD_SRA_DIR = 0x01,
602 FD_SRA_nWP = 0x02,
603 FD_SRA_nINDX = 0x04,
604 FD_SRA_HDSEL = 0x08,
605 FD_SRA_nTRK0 = 0x10,
606 FD_SRA_STEP = 0x20,
607 FD_SRA_nDRV2 = 0x40,
608 FD_SRA_INTPEND = 0x80
609};
610
611enum {
612 FD_SRB_MTR0 = 0x01,
613 FD_SRB_MTR1 = 0x02,
614 FD_SRB_WGATE = 0x04,
615 FD_SRB_RDATA = 0x08,
616 FD_SRB_WDATA = 0x10,
617 FD_SRB_DR0 = 0x20
618};
619
620enum {
621#if MAX_FD == 4
622 FD_DRV_SELMASK = 0x03,
623#else
624 FD_DRV_SELMASK = 0x01,
625#endif
626};
627
628enum {
629 FD_DOR_SELMASK = 0x03, /* Always two bits regardless of FD_DRV_SELMASK. */
630 FD_DOR_nRESET = 0x04,
631 FD_DOR_DMAEN = 0x08,
632 FD_DOR_MOTEN0 = 0x10,
633 FD_DOR_MOTEN1 = 0x20,
634 FD_DOR_MOTEN2 = 0x40,
635 FD_DOR_MOTEN3 = 0x80
636};
637
638enum {
639#if MAX_FD == 4
640 FD_TDR_BOOTSEL = 0x0c
641#else
642 FD_TDR_BOOTSEL = 0x04
643#endif
644};
645
646enum {
647 FD_DSR_DRATEMASK= 0x03,
648 FD_DSR_PWRDOWN = 0x40,
649 FD_DSR_SWRESET = 0x80
650};
651
652enum {
653 FD_MSR_DRV0BUSY = 0x01,
654 FD_MSR_DRV1BUSY = 0x02,
655 FD_MSR_DRV2BUSY = 0x04,
656 FD_MSR_DRV3BUSY = 0x08,
657 FD_MSR_CMDBUSY = 0x10,
658 FD_MSR_NONDMA = 0x20,
659 FD_MSR_DIO = 0x40,
660 FD_MSR_RQM = 0x80
661};
662
663enum {
664 FD_DIR_DSKCHG = 0x80
665};
666
667#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
668#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
669#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
670
671/**
672 * Floppy controller state.
673 *
674 * @implements PDMILEDPORTS
675 */
676struct fdctrl_t {
677 /* Controller's identification */
678 uint8_t version;
679 /* HW */
680 uint8_t irq_lvl;
681 uint8_t dma_chann;
682 uint16_t io_base;
683 /* Controller state */
684 TMTIMERHANDLE hResultTimer;
685
686 /* Interrupt delay timers. */
687 TMTIMERHANDLE hXferDelayTimer;
688 TMTIMERHANDLE hIrqDelayTimer;
689 uint16_t uIrqDelayMsec;
690 uint8_t st0;
691 uint8_t st1;
692 uint8_t st2;
693
694 uint8_t sra;
695 uint8_t srb;
696 uint8_t dor;
697 uint8_t tdr;
698 uint8_t dsr;
699 uint8_t msr;
700 uint8_t cur_drv;
701 uint8_t status0;
702 uint8_t status1;
703 uint8_t status2;
704 /* Command FIFO */
705 uint8_t fifo[FD_SECTOR_LEN];
706 uint32_t data_pos;
707 uint32_t data_len;
708 uint8_t data_state;
709 uint8_t data_dir;
710 uint8_t eot; /* last wanted sector */
711 /* Debugging only */
712 uint8_t cur_cmd;
713 uint8_t prev_cmd;
714 /* States kept only to be returned back */
715 /* Timers state */
716 uint8_t timer0;
717 uint8_t timer1;
718 /* precompensation */
719 uint8_t precomp_trk;
720 uint8_t config;
721 uint8_t lock;
722 /* Power down config (also with status regB access mode */
723 uint8_t pwrd;
724 /* Floppy drives */
725 uint8_t num_floppies;
726 fdrive_t drives[MAX_FD];
727 uint8_t reset_sensei;
728 /** Pointer to device instance. */
729 PPDMDEVINS pDevIns;
730
731 /** Status LUN: The base interface. */
732 PDMIBASE IBaseStatus;
733 /** Status LUN: The Leds interface. */
734 PDMILEDPORTS ILeds;
735 /** Status LUN: The Partner of ILeds. */
736 PPDMILEDCONNECTORS pLedsConnector;
737
738 /** I/O ports: 0x3f0 */
739 IOMIOPORTHANDLE hIoPorts0;
740 /** I/O ports: 0x3f1..0x3f5 */
741 IOMIOPORTHANDLE hIoPorts1;
742 /** I/O port: 0x3f7 */
743 IOMIOPORTHANDLE hIoPorts2;
744};
745
746static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
747{
748 uint32_t retval;
749
750 switch (reg) {
751 case FD_REG_SRA:
752 retval = fdctrl_read_statusA(fdctrl);
753 break;
754 case FD_REG_SRB:
755 retval = fdctrl_read_statusB(fdctrl);
756 break;
757 case FD_REG_DOR:
758 retval = fdctrl_read_dor(fdctrl);
759 break;
760 case FD_REG_TDR:
761 retval = fdctrl_read_tape(fdctrl);
762 break;
763 case FD_REG_MSR:
764 retval = fdctrl_read_main_status(fdctrl);
765 break;
766 case FD_REG_FIFO:
767 retval = fdctrl_read_data(fdctrl);
768 break;
769 case FD_REG_DIR:
770 retval = fdctrl_read_dir(fdctrl);
771 break;
772 default:
773 retval = UINT32_MAX;
774 break;
775 }
776 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
777
778 return retval;
779}
780
781static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
782{
783 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
784
785 switch (reg) {
786 case FD_REG_DOR:
787 fdctrl_write_dor(fdctrl, value);
788 break;
789 case FD_REG_TDR:
790 fdctrl_write_tape(fdctrl, value);
791 break;
792 case FD_REG_DSR:
793 fdctrl_write_data(fdctrl, value);
794// fdctrl_write_rate(fdctrl, value);
795 break;
796 case FD_REG_FIFO:
797 fdctrl_write_data(fdctrl, value);
798 break;
799 case FD_REG_CCR:
800 fdctrl_write_ccr(fdctrl, value);
801 break;
802 default:
803 break;
804 }
805}
806
807/* Change IRQ state */
808static void fdctrl_reset_irq(fdctrl_t *fdctrl)
809{
810 if (!(fdctrl->sra & FD_SRA_INTPEND))
811 return;
812 FLOPPY_DPRINTF("Reset interrupt\n");
813 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
814 fdctrl->sra &= ~FD_SRA_INTPEND;
815}
816
817static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
818{
819 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
820 FLOPPY_DPRINTF("Raising interrupt...\n");
821 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
822 fdctrl->sra |= FD_SRA_INTPEND;
823 }
824 if (status0 & FD_SR0_SEEK) {
825 fdrive_t *cur_drv;
826
827 /* A seek clears the disk change line (if a disk is inserted). */
828 cur_drv = get_cur_drv(fdctrl);
829 if (cur_drv->max_track)
830 cur_drv->dsk_chg = false;
831 }
832
833 fdctrl->reset_sensei = 0;
834 fdctrl->status0 = status0;
835 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
836}
837
838static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
839{
840 if (!fdctrl->uIrqDelayMsec)
841 {
842 /* If not IRQ delay needed, trigger the interrupt now. */
843 fdctrl_raise_irq_now(fdctrl, status0);
844 }
845 else
846 {
847 /* Otherwise schedule completion after a short while. */
848 fdctrl->st0 = status0;
849 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
850 }
851}
852
853/* Reset controller */
854static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
855{
856 int i;
857
858 FLOPPY_DPRINTF("reset controller\n");
859 fdctrl_reset_irq(fdctrl);
860 /* Initialise controller */
861 fdctrl->sra = 0;
862 fdctrl->srb = 0xc0;
863 if (!fdctrl->drives[1].pDrvMedia)
864 fdctrl->sra |= FD_SRA_nDRV2;
865 fdctrl->cur_drv = 0;
866 fdctrl->dor = FD_DOR_nRESET;
867 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
868 fdctrl->msr = FD_MSR_RQM;
869 /* FIFO state */
870 fdctrl->data_pos = 0;
871 fdctrl->data_len = 0;
872 fdctrl->data_state = 0;
873 fdctrl->data_dir = FD_DIR_WRITE;
874 for (i = 0; i < MAX_FD; i++)
875 fd_recalibrate(&fdctrl->drives[i]);
876 fdctrl_reset_fifo(fdctrl);
877 if (do_irq) {
878 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
879 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
880 }
881}
882
883static inline fdrive_t *drv0(fdctrl_t *fdctrl)
884{
885 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
886}
887
888static inline fdrive_t *drv1(fdctrl_t *fdctrl)
889{
890 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
891 return &fdctrl->drives[1];
892 else
893 return &fdctrl->drives[0];
894}
895
896#if MAX_FD == 4
897static inline fdrive_t *drv2(fdctrl_t *fdctrl)
898{
899 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
900 return &fdctrl->drives[2];
901 else
902 return &fdctrl->drives[1];
903}
904
905static inline fdrive_t *drv3(fdctrl_t *fdctrl)
906{
907 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
908 return &fdctrl->drives[3];
909 else
910 return &fdctrl->drives[2];
911}
912#endif
913
914static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
915{
916#if MAX_FD == 2
917 if (fdctrl->dor & FD_DRV_SELMASK)
918 return drv1(fdctrl);
919
920 return drv0(fdctrl);
921#else
922 switch (fdctrl->dor & FD_DRV_SELMASK) {
923 case 0: return drv0(fdctrl);
924 case 1: return drv1(fdctrl);
925# if MAX_FD == 4
926 case 2: return drv2(fdctrl);
927 case 3: return drv3(fdctrl);
928# endif
929 default: return NULL;
930 }
931#endif
932}
933
934/* Status A register : 0x00 (read-only) */
935static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
936{
937 uint32_t retval = fdctrl->sra;
938
939 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
940
941 return retval;
942}
943
944/* Status B register : 0x01 (read-only) */
945static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
946{
947 uint32_t retval = fdctrl->srb;
948
949 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
950
951 return retval;
952}
953
954/* Digital output register : 0x02 */
955static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
956{
957 uint32_t retval = fdctrl->dor;
958
959 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
960
961 return retval;
962}
963
964static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
965{
966 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
967
968 /* Motors */
969 if (value & FD_DOR_MOTEN0)
970 fdctrl->srb |= FD_SRB_MTR0;
971 else
972 fdctrl->srb &= ~FD_SRB_MTR0;
973 if (value & FD_DOR_MOTEN1)
974 fdctrl->srb |= FD_SRB_MTR1;
975 else
976 fdctrl->srb &= ~FD_SRB_MTR1;
977
978 /* Drive */
979 if (value & 1)
980 fdctrl->srb |= FD_SRB_DR0;
981 else
982 fdctrl->srb &= ~FD_SRB_DR0;
983
984 /* Reset */
985 if (!(value & FD_DOR_nRESET)) {
986 if (fdctrl->dor & FD_DOR_nRESET) {
987 FLOPPY_DPRINTF("controller enter RESET state\n");
988 }
989 } else {
990 if (!(fdctrl->dor & FD_DOR_nRESET)) {
991 FLOPPY_DPRINTF("controller out of RESET state\n");
992 fdctrl_reset(fdctrl, 1);
993 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
994 }
995 }
996
997 fdctrl->dor = value;
998}
999
1000/* Tape drive register : 0x03 */
1001static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
1002{
1003 uint32_t retval = fdctrl->tdr;
1004
1005 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1006
1007 return retval;
1008}
1009
1010static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
1011{
1012 /* Reset mode */
1013 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1014 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1015 return;
1016 }
1017 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1018 /* Disk boot selection indicator */
1019 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1020 /* Tape indicators: never allow */
1021}
1022
1023/* Main status register : 0x04 (read) */
1024static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
1025{
1026 uint32_t retval = fdctrl->msr;
1027
1028 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1029 fdctrl->dor |= FD_DOR_nRESET;
1030
1031 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1032
1033 return retval;
1034}
1035
1036/* Data select rate register : 0x04 (write) */
1037static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1038{
1039 /* Reset mode */
1040 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1041 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1042 return;
1043 }
1044 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1045 /* Reset: autoclear */
1046 if (value & FD_DSR_SWRESET) {
1047 fdctrl->dor &= ~FD_DOR_nRESET;
1048// fdctrl_reset(fdctrl, 1);
1049 fdctrl->dor |= FD_DOR_nRESET;
1050 }
1051 if (value & FD_DSR_PWRDOWN) {
1052 fdctrl_reset(fdctrl, 1);
1053 }
1054 fdctrl->dsr = value;
1055}
1056
1057/* Configuration control register : 0x07 (write) */
1058static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1059{
1060 /* Reset mode */
1061 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1062 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1063 return;
1064 }
1065 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1066
1067 /* Only the rate selection bits used in AT mode, and we
1068 * store those in the DSR.
1069 */
1070 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1071}
1072
1073static int fdctrl_media_changed(fdrive_t *drv)
1074{
1075 return drv->dsk_chg;
1076}
1077
1078/* Digital input register : 0x07 (read-only) */
1079static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1080{
1081 uint32_t retval = 0;
1082
1083 /* The change line signal is reported by the currently selected
1084 * drive. If the corresponding motor on bit is not set, the drive
1085 * is *not* selected!
1086 */
1087 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1088 && (fdctrl->dor & (0x10 << (fdctrl->dor & FD_DOR_SELMASK))))
1089 retval |= FD_DIR_DSKCHG;
1090 if (retval != 0)
1091 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1092
1093 return retval;
1094}
1095
1096/* FIFO state control */
1097static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1098{
1099 fdctrl->data_dir = FD_DIR_WRITE;
1100 fdctrl->data_pos = 0;
1101 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1102 fdctrl->prev_cmd = fdctrl->cur_cmd;
1103 fdctrl->cur_cmd = 0;
1104}
1105
1106/* Set FIFO status for the host to read */
1107static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1108{
1109 fdctrl->data_dir = FD_DIR_READ;
1110 fdctrl->data_len = fifo_len;
1111 fdctrl->data_pos = 0;
1112 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1113 if (do_irq)
1114 fdctrl_raise_irq(fdctrl, 0x00);
1115}
1116
1117/* Set an error: unimplemented/unknown command */
1118static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1119{
1120 RT_NOREF(direction);
1121 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1122 fdctrl->fifo[0] = FD_SR0_INVCMD;
1123 fdctrl_set_fifo(fdctrl, 1, 0);
1124}
1125
1126/* Seek to next sector */
1127static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1128{
1129 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1130 cur_drv->head, cur_drv->track, cur_drv->sect,
1131 fd_sector(cur_drv));
1132 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1133 error in fact */
1134 if (cur_drv->sect >= cur_drv->last_sect ||
1135 cur_drv->sect == fdctrl->eot) {
1136 cur_drv->sect = 1;
1137 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1138 if (cur_drv->head == 0 &&
1139 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1140 cur_drv->head = 1;
1141 } else {
1142 cur_drv->head = 0;
1143 cur_drv->ltrk++;
1144 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1145 return 0;
1146 }
1147 } else {
1148 cur_drv->ltrk++;
1149 return 0;
1150 }
1151 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1152 cur_drv->head, cur_drv->track,
1153 cur_drv->sect, fd_sector(cur_drv));
1154 } else {
1155 cur_drv->sect++;
1156 }
1157 return 1;
1158}
1159
1160/* Callback for transfer end (stop or abort) */
1161static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1162 uint8_t status1, uint8_t status2)
1163{
1164 fdrive_t *cur_drv;
1165
1166 cur_drv = get_cur_drv(fdctrl);
1167 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1168 status0, status1, status2,
1169 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1170 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1171 fdctrl->fifo[1] = status1;
1172 fdctrl->fifo[2] = status2;
1173 fdctrl->fifo[3] = cur_drv->ltrk;
1174 fdctrl->fifo[4] = cur_drv->head;
1175 fdctrl->fifo[5] = cur_drv->sect;
1176 fdctrl->fifo[6] = FD_SECTOR_SC;
1177 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1178 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1179 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1180
1181 fdctrl->data_dir = FD_DIR_READ;
1182 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1183 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1184 }
1185 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1186 fdctrl->msr &= ~FD_MSR_NONDMA;
1187 fdctrl_set_fifo(fdctrl, 7, 1);
1188}
1189
1190static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1191 uint8_t status1, uint8_t status2)
1192{
1193 if (!fdctrl->uIrqDelayMsec)
1194 {
1195 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1196 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1197 }
1198 else
1199 {
1200 /* Otherwise schedule completion after a short while. */
1201 fdctrl->st0 = status0;
1202 fdctrl->st1 = status1;
1203 fdctrl->st2 = status2;
1204 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1205 }
1206}
1207
1208/* Prepare a data transfer (either DMA or FIFO) */
1209static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1210{
1211 fdrive_t *cur_drv;
1212 uint8_t kh, kt, ks;
1213 int did_seek = 0;
1214
1215 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1216 cur_drv = get_cur_drv(fdctrl);
1217 kt = fdctrl->fifo[2];
1218 kh = fdctrl->fifo[3];
1219 ks = fdctrl->fifo[4];
1220 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1221 GET_CUR_DRV(fdctrl), kh, kt, ks,
1222 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1223 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1224 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1225 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1226 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1227 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1228 case 2:
1229 /* sect too big */
1230 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1231 fdctrl->fifo[3] = kt;
1232 fdctrl->fifo[4] = kh;
1233 fdctrl->fifo[5] = ks;
1234 return;
1235 case 3:
1236 /* track too big */
1237 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1238 fdctrl->fifo[3] = kt;
1239 fdctrl->fifo[4] = kh;
1240 fdctrl->fifo[5] = ks;
1241 return;
1242 case 4:
1243 /* No seek enabled */
1244 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1245 fdctrl->fifo[3] = kt;
1246 fdctrl->fifo[4] = kh;
1247 fdctrl->fifo[5] = ks;
1248 return;
1249 case 5:
1250 /* No disk in drive */
1251 /// @todo This is wrong! Command should not complete.
1252 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1253 fdctrl->fifo[3] = kt;
1254 fdctrl->fifo[4] = kh;
1255 fdctrl->fifo[5] = ks;
1256 return;
1257 case 1:
1258 did_seek = 1;
1259 break;
1260 default:
1261 break;
1262 }
1263 /* Check the data rate. If the programmed data rate does not match
1264 * the currently inserted medium, the operation has to fail.
1265 */
1266 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1267 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1268 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1269 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1270 fdctrl->fifo[3] = kt;
1271 fdctrl->fifo[4] = kh;
1272 fdctrl->fifo[5] = ks;
1273 return;
1274 }
1275 /* Set the FIFO state */
1276 fdctrl->data_dir = direction;
1277 fdctrl->data_pos = 0;
1278 fdctrl->msr |= FD_MSR_CMDBUSY;
1279 if (fdctrl->fifo[0] & 0x80)
1280 fdctrl->data_state |= FD_STATE_MULTI;
1281 else
1282 fdctrl->data_state &= ~FD_STATE_MULTI;
1283 if (did_seek)
1284 fdctrl->data_state |= FD_STATE_SEEK;
1285 else
1286 fdctrl->data_state &= ~FD_STATE_SEEK;
1287 if (fdctrl->fifo[5] == 00) {
1288 fdctrl->data_len = fdctrl->fifo[8];
1289 } else {
1290 int tmp;
1291 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1292 tmp = (fdctrl->fifo[6] - ks + 1);
1293 if (fdctrl->fifo[0] & 0x80)
1294 tmp += fdctrl->fifo[6];
1295 fdctrl->data_len *= tmp;
1296 }
1297 fdctrl->eot = fdctrl->fifo[6];
1298 if (fdctrl->dor & FD_DOR_DMAEN) {
1299 int dma_mode;
1300 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1301 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1302 dma_mode = (dma_mode >> 2) & 3;
1303 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1304 dma_mode, direction,
1305 (128 << fdctrl->fifo[5]) *
1306 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1307 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1308 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1309 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1310 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1311 /* No access is allowed until DMA transfer has completed */
1312 fdctrl->msr &= ~FD_MSR_RQM;
1313 /* Now, we just have to wait for the DMA controller to
1314 * recall us...
1315 */
1316 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1317 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1318 return;
1319 } else {
1320 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1321 }
1322 }
1323 FLOPPY_DPRINTF("start non-DMA transfer\n");
1324 fdctrl->msr |= FD_MSR_NONDMA;
1325 if (direction != FD_DIR_WRITE)
1326 fdctrl->msr |= FD_MSR_DIO;
1327
1328 /* IO based transfer: calculate len */
1329 fdctrl_raise_irq(fdctrl, 0x00);
1330 return;
1331}
1332
1333/* Prepare a format data transfer (either DMA or FIFO) */
1334static void fdctrl_start_format(fdctrl_t *fdctrl)
1335{
1336 fdrive_t *cur_drv;
1337 uint8_t ns, dp, kh, kt, ks;
1338
1339 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1340 cur_drv = get_cur_drv(fdctrl);
1341 kt = cur_drv->track;
1342 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1343 ns = fdctrl->fifo[3];
1344 dp = fdctrl->fifo[5];
1345 ks = 1;
1346 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1347 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1348 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1349 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1350 case 2:
1351 /* sect too big */
1352 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1353 fdctrl->fifo[3] = kt;
1354 fdctrl->fifo[4] = kh;
1355 fdctrl->fifo[5] = ks;
1356 return;
1357 case 3:
1358 /* track too big */
1359 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1360 fdctrl->fifo[3] = kt;
1361 fdctrl->fifo[4] = kh;
1362 fdctrl->fifo[5] = ks;
1363 return;
1364 case 4:
1365 /* No seek enabled */
1366 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1367 fdctrl->fifo[3] = kt;
1368 fdctrl->fifo[4] = kh;
1369 fdctrl->fifo[5] = ks;
1370 return;
1371 case 5:
1372 /* No disk in drive */
1373 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1374 fdctrl->fifo[3] = kt;
1375 fdctrl->fifo[4] = kh;
1376 fdctrl->fifo[5] = ks;
1377 return;
1378 case 1:
1379 break;
1380 default:
1381 break;
1382 }
1383 /* It's not clear what should happen if the data rate does not match. */
1384#if 0
1385 /* Check the data rate. If the programmed data rate does not match
1386 * the currently inserted medium, the operation has to fail.
1387 */
1388 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1389 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1390 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1391 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1392 fdctrl->fifo[3] = kt;
1393 fdctrl->fifo[4] = kh;
1394 fdctrl->fifo[5] = ks;
1395 return;
1396 }
1397#endif
1398 /* Set the FIFO state */
1399 fdctrl->data_dir = FD_DIR_FORMAT;
1400 fdctrl->data_pos = 0;
1401 fdctrl->msr |= FD_MSR_CMDBUSY;
1402 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1403 fdctrl->data_len = ns * 4;
1404 fdctrl->eot = ns;
1405 if (fdctrl->dor & FD_DOR_DMAEN) {
1406 int dma_mode;
1407 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1408 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1409 dma_mode = (dma_mode >> 2) & 3;
1410 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1411 dma_mode, fdctrl->data_dir,
1412 (128 << fdctrl->fifo[2]) *
1413 (cur_drv->last_sect + 1), fdctrl->data_len);
1414 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1415 /* No access is allowed until DMA transfer has completed */
1416 fdctrl->msr &= ~FD_MSR_RQM;
1417 /* Now, we just have to wait for the DMA controller to
1418 * recall us...
1419 */
1420 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1421 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1422 return;
1423 } else {
1424 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1425 }
1426 }
1427 FLOPPY_DPRINTF("start non-DMA format\n");
1428 fdctrl->msr |= FD_MSR_NONDMA;
1429 /* IO based transfer: calculate len */
1430 fdctrl_raise_irq(fdctrl, 0x00);
1431
1432 return;
1433}
1434
1435/* Prepare a transfer of deleted data */
1436static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1437{
1438 RT_NOREF(direction);
1439 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1440
1441 /* We don't handle deleted data,
1442 * so we don't return *ANYTHING*
1443 */
1444 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1445}
1446
1447/* Block driver read/write wrappers. */
1448
1449static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1450{
1451 int rc;
1452
1453 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1454
1455 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1456 buf, nb_sectors * FD_SECTOR_LEN);
1457
1458 drv->Led.Actual.s.fWriting = 0;
1459 if (RT_FAILURE(rc))
1460 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1461
1462 return rc;
1463}
1464
1465static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1466{
1467 int rc;
1468
1469 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1470
1471 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1472 buf, nb_sectors * FD_SECTOR_LEN);
1473
1474 drv->Led.Actual.s.fReading = 0;
1475
1476 if (RT_FAILURE(rc))
1477 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1478
1479 return rc;
1480}
1481
1482/**
1483 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1484 */
1485static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1486 unsigned uChannel, uint32_t off, uint32_t cb)
1487{
1488 RT_NOREF(pDevIns, off);
1489 fdctrl_t *fdctrl;
1490 fdrive_t *cur_drv;
1491 int rc;
1492 uint32_t len = 0;
1493 uint32_t start_pos, rel_pos;
1494 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1495
1496 fdctrl = (fdctrl_t *)pvUser;
1497 if (fdctrl->msr & FD_MSR_RQM) {
1498 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1499 return 0;
1500 }
1501 cur_drv = get_cur_drv(fdctrl);
1502 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1503 fdctrl->data_dir == FD_DIR_SCANH)
1504 status2 = FD_SR2_SNS;
1505 if (cb > fdctrl->data_len)
1506 cb = fdctrl->data_len;
1507 if (cur_drv->pDrvMedia == NULL)
1508 {
1509 if (fdctrl->data_dir == FD_DIR_WRITE)
1510 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1511 else
1512 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1513 Assert(len == 0);
1514 goto transfer_error;
1515 }
1516
1517 if (cur_drv->ro)
1518 {
1519 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1520 {
1521 /* Handle readonly medium early, no need to do DMA, touch the
1522 * LED or attempt any writes. A real floppy doesn't attempt
1523 * to write to readonly media either. */
1524 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1525 0x00);
1526 Assert(len == 0);
1527 goto transfer_error;
1528 }
1529 }
1530
1531 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1532 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1533 len = cb - fdctrl->data_pos;
1534 if (len + rel_pos > FD_SECTOR_LEN)
1535 len = FD_SECTOR_LEN - rel_pos;
1536 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1537 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1538 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1539 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1540 (fdctrl->data_dir != FD_DIR_WRITE ||
1541 len < FD_SECTOR_LEN || rel_pos != 0)) {
1542 /* READ & SCAN commands and realign to a sector for WRITE */
1543 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1544 if (RT_FAILURE(rc))
1545 {
1546 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1547 fd_sector(cur_drv));
1548 /* Sure, image size is too small... */
1549 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1550 }
1551 }
1552 switch (fdctrl->data_dir) {
1553 case FD_DIR_READ:
1554 /* READ commands */
1555 {
1556 uint32_t read;
1557 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1558 fdctrl->fifo + rel_pos,
1559 fdctrl->data_pos,
1560 len, &read);
1561 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1562 }
1563 break;
1564 case FD_DIR_WRITE:
1565 /* WRITE commands */
1566 {
1567 uint32_t written;
1568 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1569 fdctrl->fifo + rel_pos,
1570 fdctrl->data_pos,
1571 len, &written);
1572 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1573 }
1574
1575 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1576 if (RT_FAILURE(rc))
1577 {
1578 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1579 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1580 goto transfer_error;
1581 }
1582 break;
1583 case FD_DIR_FORMAT:
1584 /* FORMAT command */
1585 {
1586 uint8_t eot = fdctrl->fifo[3];
1587 uint8_t filler = fdctrl->fifo[5];
1588 uint32_t written;
1589 int sct;
1590 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1591 fdctrl->fifo + rel_pos,
1592 fdctrl->data_pos,
1593 len, &written);
1594 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1595
1596 /* Fill the entire track with desired data pattern. */
1597 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1598 eot, filler);
1599 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1600 for (sct = 0; sct < eot; ++sct)
1601 {
1602 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1603 if (RT_FAILURE(rc))
1604 {
1605 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1606 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1607 goto transfer_error;
1608 }
1609 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1610 }
1611 }
1612 break;
1613 default:
1614 /* SCAN commands */
1615 {
1616 uint8_t tmpbuf[FD_SECTOR_LEN];
1617 int ret;
1618 uint32_t read;
1619 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1620 fdctrl->data_pos, len, &read);
1621 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1622 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1623 if (ret == 0) {
1624 status2 = FD_SR2_SEH;
1625 goto end_transfer;
1626 }
1627 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1628 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1629 status2 = 0x00;
1630 goto end_transfer;
1631 }
1632 }
1633 break;
1634 }
1635 fdctrl->data_pos += len;
1636 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1637 if (rel_pos == 0) {
1638 /* Seek to next sector */
1639 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1640 break;
1641 }
1642 }
1643end_transfer:
1644 len = fdctrl->data_pos - start_pos;
1645 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1646 fdctrl->data_pos, len, fdctrl->data_len);
1647 if (fdctrl->data_dir == FD_DIR_SCANE ||
1648 fdctrl->data_dir == FD_DIR_SCANL ||
1649 fdctrl->data_dir == FD_DIR_SCANH)
1650 status2 = FD_SR2_SEH;
1651 if (FD_DID_SEEK(fdctrl->data_state))
1652 status0 |= FD_SR0_SEEK;
1653 fdctrl->data_len -= len;
1654 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1655transfer_error:
1656
1657 return len;
1658}
1659
1660/* Data register : 0x05 */
1661static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1662{
1663 fdrive_t *cur_drv;
1664 uint32_t retval = 0;
1665 unsigned pos;
1666 int rc;
1667
1668 cur_drv = get_cur_drv(fdctrl);
1669 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1670 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1671 FLOPPY_ERROR("controller not ready for reading\n");
1672 return 0;
1673 }
1674 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1675 if (fdctrl->msr & FD_MSR_NONDMA) {
1676 if (cur_drv->pDrvMedia == NULL)
1677 {
1678 if (fdctrl->data_dir == FD_DIR_WRITE)
1679 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1680 else
1681 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1682 } else if (pos == 0) {
1683 if (fdctrl->data_pos != 0)
1684 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1685 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1686 fd_sector(cur_drv));
1687 return 0;
1688 }
1689
1690 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1691 if (RT_FAILURE(rc))
1692 {
1693 FLOPPY_DPRINTF("error getting sector %d\n",
1694 fd_sector(cur_drv));
1695 /* Sure, image size is too small... */
1696 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1697 }
1698 }
1699 }
1700 retval = fdctrl->fifo[pos];
1701 if (++fdctrl->data_pos == fdctrl->data_len) {
1702 fdctrl->data_pos = 0;
1703 /* Switch from transfer mode to status mode
1704 * then from status mode to command mode
1705 */
1706 if (fdctrl->msr & FD_MSR_NONDMA) {
1707 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1708 } else {
1709 fdctrl_reset_fifo(fdctrl);
1710 fdctrl_reset_irq(fdctrl);
1711 }
1712 }
1713 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1714
1715 return retval;
1716}
1717
1718static void fdctrl_format_sector(fdctrl_t *fdctrl)
1719{
1720 fdrive_t *cur_drv;
1721 uint8_t kh, kt, ks;
1722 int ok = 0, rc;
1723
1724 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1725 cur_drv = get_cur_drv(fdctrl);
1726 kt = fdctrl->fifo[6];
1727 kh = fdctrl->fifo[7];
1728 ks = fdctrl->fifo[8];
1729 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1730 GET_CUR_DRV(fdctrl), kh, kt, ks,
1731 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1732 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1733 case 2:
1734 /* sect too big */
1735 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1736 fdctrl->fifo[3] = kt;
1737 fdctrl->fifo[4] = kh;
1738 fdctrl->fifo[5] = ks;
1739 return;
1740 case 3:
1741 /* track too big */
1742 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1743 fdctrl->fifo[3] = kt;
1744 fdctrl->fifo[4] = kh;
1745 fdctrl->fifo[5] = ks;
1746 return;
1747 case 4:
1748 /* No seek enabled */
1749 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1750 fdctrl->fifo[3] = kt;
1751 fdctrl->fifo[4] = kh;
1752 fdctrl->fifo[5] = ks;
1753 return;
1754 case 5:
1755 /* No disk in drive */
1756 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1757 fdctrl->fifo[3] = kt;
1758 fdctrl->fifo[4] = kh;
1759 fdctrl->fifo[5] = ks;
1760 return;
1761 case 1:
1762 fdctrl->data_state |= FD_STATE_SEEK;
1763 break;
1764 default:
1765 break;
1766 }
1767 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1768 if (cur_drv->pDrvMedia) {
1769 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1770 if (RT_FAILURE (rc)) {
1771 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1772 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1773 } else {
1774 ok = 1;
1775 }
1776 }
1777 if (ok) {
1778 if (cur_drv->sect == cur_drv->last_sect) {
1779 fdctrl->data_state &= ~FD_STATE_FORMAT;
1780 /* Last sector done */
1781 if (FD_DID_SEEK(fdctrl->data_state))
1782 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1783 else
1784 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1785 } else {
1786 /* More to do */
1787 fdctrl->data_pos = 0;
1788 fdctrl->data_len = 4;
1789 }
1790 }
1791}
1792
1793static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1794{
1795 RT_NOREF(direction);
1796 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1797 fdctrl->fifo[0] = fdctrl->lock << 4;
1798 fdctrl_set_fifo(fdctrl, 1, 0);
1799}
1800
1801static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1802{
1803 RT_NOREF(direction);
1804 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1805
1806 /* Drives position */
1807 fdctrl->fifo[0] = drv0(fdctrl)->track;
1808 fdctrl->fifo[1] = drv1(fdctrl)->track;
1809#if MAX_FD == 4
1810 fdctrl->fifo[2] = drv2(fdctrl)->track;
1811 fdctrl->fifo[3] = drv3(fdctrl)->track;
1812#else
1813 fdctrl->fifo[2] = 0;
1814 fdctrl->fifo[3] = 0;
1815#endif
1816 /* timers */
1817 fdctrl->fifo[4] = fdctrl->timer0;
1818 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1819 fdctrl->fifo[6] = cur_drv->last_sect;
1820 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1821 (cur_drv->perpendicular << 2);
1822 fdctrl->fifo[8] = fdctrl->config;
1823 fdctrl->fifo[9] = fdctrl->precomp_trk;
1824 fdctrl_set_fifo(fdctrl, 10, 0);
1825}
1826
1827static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1828{
1829 RT_NOREF(direction);
1830 /* Controller's version */
1831 fdctrl->fifo[0] = fdctrl->version;
1832 fdctrl_set_fifo(fdctrl, 1, 0);
1833}
1834
1835static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1836{
1837 RT_NOREF(direction);
1838 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1839 fdctrl_set_fifo(fdctrl, 1, 0);
1840}
1841
1842static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1843{
1844 RT_NOREF(direction);
1845 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1846
1847 /* Drives position */
1848 drv0(fdctrl)->track = fdctrl->fifo[3];
1849 drv1(fdctrl)->track = fdctrl->fifo[4];
1850#if MAX_FD == 4
1851 drv2(fdctrl)->track = fdctrl->fifo[5];
1852 drv3(fdctrl)->track = fdctrl->fifo[6];
1853#endif
1854 /* timers */
1855 fdctrl->timer0 = fdctrl->fifo[7];
1856 fdctrl->timer1 = fdctrl->fifo[8];
1857 cur_drv->last_sect = fdctrl->fifo[9];
1858 fdctrl->lock = fdctrl->fifo[10] >> 7;
1859 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1860 fdctrl->config = fdctrl->fifo[11];
1861 fdctrl->precomp_trk = fdctrl->fifo[12];
1862 fdctrl->pwrd = fdctrl->fifo[13];
1863 fdctrl_reset_fifo(fdctrl);
1864}
1865
1866static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1867{
1868 RT_NOREF(direction);
1869 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1870
1871 fdctrl->fifo[0] = 0;
1872 fdctrl->fifo[1] = 0;
1873 /* Drives position */
1874 fdctrl->fifo[2] = drv0(fdctrl)->track;
1875 fdctrl->fifo[3] = drv1(fdctrl)->track;
1876#if MAX_FD == 4
1877 fdctrl->fifo[4] = drv2(fdctrl)->track;
1878 fdctrl->fifo[5] = drv3(fdctrl)->track;
1879#else
1880 fdctrl->fifo[4] = 0;
1881 fdctrl->fifo[5] = 0;
1882#endif
1883 /* timers */
1884 fdctrl->fifo[6] = fdctrl->timer0;
1885 fdctrl->fifo[7] = fdctrl->timer1;
1886 fdctrl->fifo[8] = cur_drv->last_sect;
1887 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1888 (cur_drv->perpendicular << 2);
1889 fdctrl->fifo[10] = fdctrl->config;
1890 fdctrl->fifo[11] = fdctrl->precomp_trk;
1891 fdctrl->fifo[12] = fdctrl->pwrd;
1892 fdctrl->fifo[13] = 0;
1893 fdctrl->fifo[14] = 0;
1894 fdctrl_set_fifo(fdctrl, 15, 0);
1895}
1896
1897static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1898{
1899 RT_NOREF(direction);
1900 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1901
1902 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1903
1904 fdctrl->msr &= ~FD_MSR_RQM;
1905 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1906 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1907}
1908
1909static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1910{
1911 RT_NOREF(direction);
1912 fdrive_t *cur_drv;
1913 uint8_t ns, dp;
1914
1915 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1916 cur_drv = get_cur_drv(fdctrl);
1917 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1918 ns = fdctrl->fifo[3];
1919 dp = fdctrl->fifo[5];
1920
1921 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1922 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1923 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1924 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1925 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1926
1927 /* Since we cannot actually format anything, we have to make sure that
1928 * whatever new format the guest is trying to establish matches the
1929 * existing format of the medium.
1930 */
1931 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1932 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1933 else
1934 {
1935 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1936 cur_drv->last_sect = ns;
1937
1938 fdctrl_start_format(fdctrl);
1939 }
1940}
1941
1942static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1943{
1944 RT_NOREF(direction);
1945 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1946 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1947 if (fdctrl->fifo[2] & 1)
1948 fdctrl->dor &= ~FD_DOR_DMAEN;
1949 else
1950 fdctrl->dor |= FD_DOR_DMAEN;
1951 /* No result back */
1952 fdctrl_reset_fifo(fdctrl);
1953}
1954
1955static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1956{
1957 RT_NOREF(direction);
1958 fdrive_t *cur_drv;
1959
1960 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1961 cur_drv = get_cur_drv(fdctrl);
1962 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1963 /* 1 Byte status back */
1964 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1965 (cur_drv->track == 0 ? 0x10 : 0x00) |
1966 (cur_drv->head << 2) |
1967 GET_CUR_DRV(fdctrl) |
1968 0x28;
1969 fdctrl_set_fifo(fdctrl, 1, 0);
1970}
1971
1972static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1973{
1974 RT_NOREF(direction);
1975 fdrive_t *cur_drv;
1976 uint8_t st0;
1977
1978 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1979 cur_drv = get_cur_drv(fdctrl);
1980 fd_recalibrate(cur_drv);
1981 fdctrl_reset_fifo(fdctrl);
1982 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1983 /* No drive means no TRK0 signal. */
1984 if (cur_drv->drive == FDRIVE_DRV_NONE)
1985 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1986 /* Raise Interrupt */
1987 fdctrl_raise_irq(fdctrl, st0);
1988}
1989
1990static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1991{
1992 RT_NOREF(direction);
1993 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1994
1995 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1996 if(fdctrl->reset_sensei > 0) {
1997 fdctrl->fifo[0] =
1998 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1999 fdctrl->reset_sensei--;
2000 } else {
2001 /* XXX: status0 handling is broken for read/write
2002 commands, so we do this hack. It should be suppressed
2003 ASAP */
2004 fdctrl->fifo[0] =
2005 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2006 /* Hack to preserve SR0 on equipment check failures (no drive). */
2007 if (fdctrl->status0 & FD_SR0_EQPMT)
2008 fdctrl->fifo[0] = fdctrl->status0;
2009 }
2010
2011 fdctrl->fifo[1] = cur_drv->track;
2012 fdctrl_set_fifo(fdctrl, 2, 0);
2013 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
2014 fdctrl->status0 = FD_SR0_RDYCHG;
2015}
2016
2017static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
2018{
2019 RT_NOREF(direction);
2020 fdrive_t *cur_drv;
2021
2022 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
2023 fdctrl->fifo[1], fdctrl->fifo[2]);
2024
2025 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2026 cur_drv = get_cur_drv(fdctrl);
2027 fdctrl_reset_fifo(fdctrl);
2028
2029 /* The seek command just sends step pulses to the drive and doesn't care if
2030 * there's a medium inserted or if it's banging the head against the drive.
2031 */
2032 cur_drv->track = fdctrl->fifo[2];
2033 cur_drv->ltrk = cur_drv->track;
2034 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2035 /* Raise Interrupt */
2036 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
2037}
2038
2039static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2040{
2041 RT_NOREF(direction);
2042 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2043
2044 if (fdctrl->fifo[1] & 0x80)
2045 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2046 /* No result back */
2047 fdctrl_reset_fifo(fdctrl);
2048}
2049
2050static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2051{
2052 RT_NOREF(direction);
2053 fdctrl->config = fdctrl->fifo[2];
2054 fdctrl->precomp_trk = fdctrl->fifo[3];
2055 /* No result back */
2056 fdctrl_reset_fifo(fdctrl);
2057}
2058
2059static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2060{
2061 RT_NOREF(direction);
2062 fdctrl->pwrd = fdctrl->fifo[1];
2063 fdctrl->fifo[0] = fdctrl->fifo[1];
2064 fdctrl_set_fifo(fdctrl, 1, 0);
2065}
2066
2067static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2068{
2069 RT_NOREF(direction);
2070 /* No result back */
2071 fdctrl_reset_fifo(fdctrl);
2072}
2073
2074static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2075{
2076 RT_NOREF(direction);
2077 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2078
2079 /* This command takes a variable number of parameters. It can be terminated
2080 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2081 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2082 */
2083 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2084
2085 /* Command parameters done */
2086 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2087 /* Data is echoed, but not stored! */
2088 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2089 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2090 fdctrl->fifo[2] = 0;
2091 fdctrl->fifo[3] = 0;
2092 fdctrl_set_fifo(fdctrl, 4, 0);
2093 } else {
2094 fdctrl_reset_fifo(fdctrl);
2095 }
2096 } else
2097 fdctrl->data_len++; /* Wait for another byte. */
2098}
2099
2100static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2101{
2102 RT_NOREF(direction);
2103 fdrive_t *cur_drv;
2104
2105 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2106 cur_drv = get_cur_drv(fdctrl);
2107 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2108 cur_drv->track = cur_drv->max_track - 1;
2109 } else {
2110 cur_drv->track += fdctrl->fifo[2];
2111 }
2112 fdctrl_reset_fifo(fdctrl);
2113 /* Raise Interrupt */
2114 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2115}
2116
2117static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2118{
2119 RT_NOREF(direction);
2120 fdrive_t *cur_drv;
2121
2122 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2123 cur_drv = get_cur_drv(fdctrl);
2124 if (fdctrl->fifo[2] > cur_drv->track) {
2125 cur_drv->track = 0;
2126 } else {
2127 cur_drv->track -= fdctrl->fifo[2];
2128 }
2129 fdctrl_reset_fifo(fdctrl);
2130 /* Raise Interrupt */
2131 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2132}
2133
2134static const struct {
2135 uint8_t value;
2136 uint8_t mask;
2137 const char* name;
2138 int parameters;
2139 void (*handler)(fdctrl_t *fdctrl, int direction);
2140 int direction;
2141} handlers[] = {
2142 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2143 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2144 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2145 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2146 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2147 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2148 { FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2149 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2150 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2151 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2152 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2153 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2154 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2155 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2156 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2157 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2158 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2159 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2160 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2161 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2162 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2163 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2164 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2165 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2166 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2167 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2168 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2169 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2170 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2171 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2172 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2173 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2174};
2175/* Associate command to an index in the 'handlers' array */
2176static uint8_t command_to_handler[256];
2177
2178static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2179{
2180 fdrive_t *cur_drv;
2181 int pos;
2182
2183 cur_drv = get_cur_drv(fdctrl);
2184 /* Reset mode */
2185 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2186 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2187 return;
2188 }
2189 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2190 FLOPPY_ERROR("controller not ready for writing\n");
2191 return;
2192 }
2193 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2194 /* Is it write command time ? */
2195 if (fdctrl->msr & FD_MSR_NONDMA) {
2196 /* FIFO data write */
2197 pos = fdctrl->data_pos++;
2198 pos %= FD_SECTOR_LEN;
2199 fdctrl->fifo[pos] = value;
2200
2201 if (cur_drv->pDrvMedia == NULL)
2202 {
2203 if (fdctrl->data_dir == FD_DIR_WRITE)
2204 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2205 else
2206 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2207 } else if (pos == FD_SECTOR_LEN - 1 ||
2208 fdctrl->data_pos == fdctrl->data_len) {
2209 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2210 }
2211 /* Switch from transfer mode to status mode
2212 * then from status mode to command mode
2213 */
2214 if (fdctrl->data_pos == fdctrl->data_len)
2215 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2216 return;
2217 }
2218 if (fdctrl->data_pos == 0) {
2219 /* Command */
2220 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2221 pos = command_to_handler[value & 0xff];
2222 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2223 fdctrl->data_len = handlers[pos].parameters + 1;
2224 fdctrl->msr |= FD_MSR_CMDBUSY;
2225 fdctrl->cur_cmd = value & 0xff;
2226 }
2227
2228 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2229 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2230 if (fdctrl->data_pos == fdctrl->data_len) {
2231 /* We now have all parameters
2232 * and will be able to treat the command
2233 */
2234 if (fdctrl->data_state & FD_STATE_FORMAT) {
2235 fdctrl_format_sector(fdctrl);
2236 return;
2237 }
2238
2239 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2240 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2241 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2242 }
2243}
2244
2245
2246/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2247
2248/**
2249 * @callback_method_impl{FNTMTIMERDEV}
2250 */
2251static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2252{
2253 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2254 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2255 RT_NOREF(hTimer, pvUser);
2256
2257 /* Pretend we are spinning.
2258 * This is needed for Coherent, which uses READ ID to check for
2259 * sector interleaving.
2260 */
2261 if (cur_drv->last_sect != 0) {
2262 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2263 }
2264 /* READ_ID can't automatically succeed! */
2265 if (!cur_drv->max_track) {
2266 FLOPPY_DPRINTF("read id when no disk in drive\n");
2267 /// @todo This is wrong! Command should not complete.
2268 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2269 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2270 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2271 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2272 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2273 } else if (cur_drv->track >= cur_drv->max_track) {
2274 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2275 cur_drv->track, cur_drv->max_track);
2276 cur_drv->ltrk = 0;
2277 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2278 }
2279 else
2280 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2281}
2282
2283
2284/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2285
2286/**
2287 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2288 */
2289static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2290{
2291 RT_NOREF(pvUser);
2292
2293 if (cb == 1)
2294 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2295 else
2296 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2297 return VINF_SUCCESS;
2298}
2299
2300
2301/**
2302 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2303 */
2304static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2305{
2306 RT_NOREF(pvUser);
2307
2308 if (cb == 1)
2309 {
2310 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2311 return VINF_SUCCESS;
2312 }
2313 return VERR_IOM_IOPORT_UNUSED;
2314}
2315
2316
2317/**
2318 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2319 */
2320static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2321{
2322 RT_NOREF(pvUser);
2323
2324 if (cb == 1)
2325 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2326 else
2327 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2328 return VINF_SUCCESS;
2329}
2330
2331
2332/**
2333 * @callback_method_impl{FNTMTIMERDEV}
2334 */
2335static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2336{
2337 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2338 RT_NOREF(pvUser, hTimer);
2339 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2340}
2341
2342
2343/**
2344 * @callback_method_impl{FNTMTIMERDEV}
2345 */
2346static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2347{
2348 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2349 RT_NOREF(pvUser, hTimer);
2350 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2351}
2352
2353
2354
2355/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2356/**
2357 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2358 */
2359static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2360{
2361 RT_NOREF(pvUser);
2362
2363 if (cb == 1)
2364 {
2365 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2366 return VINF_SUCCESS;
2367 }
2368 return VERR_IOM_IOPORT_UNUSED;
2369}
2370
2371
2372/**
2373 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2374 */
2375static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2376{
2377 RT_NOREF(offPort, pvUser);
2378 Assert(offPort == 0);
2379
2380 if (cb == 1)
2381 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2382 else
2383 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2384 return VINF_SUCCESS;
2385}
2386
2387
2388/**
2389 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2390 */
2391static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2392{
2393 RT_NOREF(pvUser, offPort);
2394 Assert(offPort == 0);
2395
2396 if (cb == 1)
2397 {
2398 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2399 return VINF_SUCCESS;
2400 }
2401 return VERR_IOM_IOPORT_UNUSED;
2402}
2403
2404
2405/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2406
2407/**
2408 * FDC debugger info callback.
2409 *
2410 * @param pDevIns The device instance.
2411 * @param pHlp The output helpers.
2412 * @param pszArgs The arguments.
2413 */
2414static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2415{
2416 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2417 unsigned i;
2418 bool fVerbose = false;
2419
2420 /* Parse arguments. */
2421 if (pszArgs)
2422 fVerbose = strstr(pszArgs, "verbose") != NULL;
2423
2424 /* Show basic information. */
2425 pHlp->pfnPrintf(pHlp, "%s#%d: ",
2426 pDevIns->pReg->szName,
2427 pDevIns->iInstance);
2428 pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2429 pThis->io_base,
2430 pThis->irq_lvl,
2431 pThis->dma_chann);
2432 pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2433
2434 /* Print register contents. */
2435 pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2436 pThis->msr, pThis->dsr, pThis->dor);
2437 pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2438 fdctrl_read_dir(pThis));
2439
2440 /* Print the current command, if any. */
2441 if (pThis->cur_cmd)
2442 pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2443 pThis->cur_cmd,
2444 handlers[command_to_handler[pThis->cur_cmd]].name);
2445 if (pThis->prev_cmd)
2446 pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2447 pThis->prev_cmd,
2448 handlers[command_to_handler[pThis->prev_cmd]].name);
2449
2450
2451 for (i = 0; i < pThis->num_floppies; ++i)
2452 {
2453 fdrive_t *drv = &pThis->drives[i];
2454 pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2455 pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2456 drv->max_track,
2457 drv->last_sect);
2458 pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2459 drv->track,
2460 drv->head,
2461 drv->sect);
2462 }
2463}
2464
2465
2466/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2467
2468/**
2469 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2470 */
2471static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2472{
2473 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2474 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2475 unsigned int i;
2476 int rc;
2477
2478 /* Save the FDC I/O registers... */
2479 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2480 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2481 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2482 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2483 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2484 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2485 /* ...the status registers... */
2486 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2487 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2488 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2489 /* ...the command FIFO... */
2490 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2491 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2492 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2493 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2494 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2495 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2496 /* ...and miscellaneous internal FDC state. */
2497 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2498 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2499 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2500 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2501 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2502 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2503 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2504 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2505 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2506
2507 /* Save the number of drives and per-drive state. Note that the media
2508 * states will be updated in fd_revalidate() and need not be saved.
2509 */
2510 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2511 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2512 for (i = 0; i < pThis->num_floppies; ++i)
2513 {
2514 fdrive_t *d = &pThis->drives[i];
2515
2516 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2517 pHlp->pfnSSMPutU32(pSSM, d->drive);
2518 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2519 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2520 pHlp->pfnSSMPutU8(pSSM, d->head);
2521 pHlp->pfnSSMPutU8(pSSM, d->track);
2522 pHlp->pfnSSMPutU8(pSSM, d->sect);
2523 }
2524 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2525 AssertRCReturn(rc, rc);
2526 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2527 AssertRCReturn(rc, rc);
2528 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2529}
2530
2531
2532/**
2533 * @callback_method_impl{FNSSMDEVLOADEXEC}
2534 */
2535static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2536{
2537 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2538 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2539 unsigned int i;
2540 uint32_t val32;
2541 uint8_t val8;
2542 int rc;
2543
2544 if (uVersion > FDC_SAVESTATE_CURRENT)
2545 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2546 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2547
2548 if (uVersion > FDC_SAVESTATE_OLD)
2549 {
2550 /* Load the FDC I/O registers... */
2551 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2552 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2553 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2554 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2555 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2556 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2557 /* ...the status registers... */
2558 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2559 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2560 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2561 /* ...the command FIFO, if the size matches... */
2562 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2563 AssertRCReturn(rc, rc);
2564 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2565 ("The size of FIFO in saved state doesn't match!\n"),
2566 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2567 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2568 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2569 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2570 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2571 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2572 /* ...and miscellaneous internal FDC state. */
2573 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2574 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2575 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2576 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2577 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2578 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2579 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2580 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2581 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2582
2583 /* Validate the number of drives. */
2584 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2585 AssertRCReturn(rc, rc);
2586 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2587 ("The number of drives in saved state doesn't match!\n"),
2588 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2589
2590 /* Load the per-drive state. */
2591 for (i = 0; i < pThis->num_floppies; ++i)
2592 {
2593 fdrive_t *d = &pThis->drives[i];
2594
2595 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2596 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2597 AssertRCReturn(rc, rc);
2598 d->drive = (fdrive_type_t)val32;
2599 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2600 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2601 pHlp->pfnSSMGetU8(pSSM, &d->head);
2602 pHlp->pfnSSMGetU8(pSSM, &d->track);
2603 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2604 }
2605
2606 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2607 {
2608 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2609 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2610 }
2611 }
2612 else if (uVersion == FDC_SAVESTATE_OLD)
2613 {
2614 /* The old saved state was significantly different. However, we can get
2615 * back most of the controller state and fix the rest by pretending the
2616 * disk in the drive (if any) has been replaced. At any rate there should
2617 * be no difficulty unless the state was saved during a floppy operation.
2618 */
2619
2620 /* First verify a few assumptions. */
2621 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2622 ("The size of FIFO in saved state doesn't match!\n"),
2623 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2624 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2625 ("The number of drives in old saved state doesn't match!\n"),
2626 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2627 /* Now load the old state. */
2628 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2629 /* Toss IRQ level, DMA channel, I/O base, and state. */
2630 pHlp->pfnSSMGetU8(pSSM, &val8);
2631 pHlp->pfnSSMGetU8(pSSM, &val8);
2632 pHlp->pfnSSMGetU32(pSSM, &val32);
2633 pHlp->pfnSSMGetU8(pSSM, &val8);
2634 /* Translate dma_en. */
2635 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2636 AssertRCReturn(rc, rc);
2637 if (val8)
2638 pThis->dor |= FD_DOR_DMAEN;
2639 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2640 /* Translate bootsel. */
2641 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2642 AssertRCReturn(rc, rc);
2643 pThis->tdr |= val8 << 2;
2644 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2645 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2646 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2647 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2648 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2649 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2650 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2651 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2652 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2653 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2654 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2655 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2656 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2657
2658 for (i = 0; i < 2; ++i)
2659 {
2660 fdrive_t *d = &pThis->drives[i];
2661
2662 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2663 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2664 d->drive = (fdrive_type_t)val32;
2665 AssertRCReturn(rc, rc);
2666 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2667 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2668 pHlp->pfnSSMGetU8(pSSM, &d->head);
2669 pHlp->pfnSSMGetU8(pSSM, &d->track);
2670 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2671 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2672 pHlp->pfnSSMGetU8(pSSM, &val8);
2673 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2674 AssertRCReturn(rc, rc);
2675 d->flags = (fdrive_flags_t)val32;
2676 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2677 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2678 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2679 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2680 }
2681 }
2682 else
2683 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2684 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2685}
2686
2687
2688/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2689
2690/**
2691 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2692 */
2693static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2694{
2695 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2696 LogFlow(("fdMountNotify:\n"));
2697 fd_revalidate(pDrv);
2698}
2699
2700
2701/**
2702 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2703 */
2704static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2705{
2706 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2707 LogFlow(("fdUnmountNotify:\n"));
2708 fd_revalidate(pDrv);
2709}
2710
2711
2712/**
2713 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2714 */
2715static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2716{
2717 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2718
2719 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2720 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2721 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2722 return NULL;
2723}
2724
2725
2726/**
2727 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2728 */
2729static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2730 uint32_t *piInstance, uint32_t *piLUN)
2731{
2732 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2733 PPDMDEVINS pDevIns = pDrv->pDevIns;
2734
2735 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2736 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2737 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2738
2739 *ppcszController = pDevIns->pReg->szName;
2740 *piInstance = pDevIns->iInstance;
2741 *piLUN = pDrv->iLUN;
2742
2743 return VINF_SUCCESS;
2744}
2745
2746/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2747
2748/**
2749 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2750 */
2751static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2752{
2753 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2754 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2755 *ppLed = &pThis->drives[iLUN].Led;
2756 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2757 return VINF_SUCCESS;
2758 }
2759 return VERR_PDM_LUN_NOT_FOUND;
2760}
2761
2762
2763/**
2764 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2765 */
2766static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2767{
2768 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2769
2770 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2771 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2772 return NULL;
2773}
2774
2775
2776/**
2777 * Configure a drive.
2778 *
2779 * @returns VBox status code.
2780 * @param drv The drive in question.
2781 * @param pDevIns The driver instance.
2782 * @param fInit Set if we're at init time and can change the drive type.
2783 */
2784static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2785{
2786 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2787 int rc;
2788
2789 /*
2790 * Reset the LED just to be on the safe side.
2791 */
2792 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2793 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2794 drv->Led.Actual.u32 = 0;
2795 drv->Led.Asserted.u32 = 0;
2796
2797 /*
2798 * Try attach the block device and get the interfaces.
2799 */
2800 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2801 if (RT_SUCCESS (rc)) {
2802 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2803 if (drv->pDrvMedia) {
2804 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2805 if (drv->pDrvMount) {
2806 fd_init(drv, fInit);
2807 } else {
2808 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2809 rc = VERR_PDM_MISSING_INTERFACE;
2810 }
2811
2812 } else {
2813 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2814 rc = VERR_PDM_MISSING_INTERFACE;
2815 }
2816 } else {
2817 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2818 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2819 switch (rc) {
2820 case VERR_ACCESS_DENIED:
2821 /* Error already cached by DrvHostBase */
2822 break;
2823 case VERR_PDM_NO_ATTACHED_DRIVER:
2824 /* Legal on architectures without a floppy controller */
2825 break;
2826 default:
2827 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2828 N_ ("The floppy controller cannot attach to the floppy drive"));
2829 break;
2830 }
2831 }
2832
2833 if (RT_FAILURE (rc)) {
2834 drv->pDrvBase = NULL;
2835 drv->pDrvMedia = NULL;
2836 drv->pDrvMount = NULL;
2837 }
2838 LogFlow (("fdConfig: returns %Rrc\n", rc));
2839 return rc;
2840}
2841
2842
2843/**
2844 * @interface_method_impl{PDMDEVREG,pfnAttach}
2845 *
2846 * This is called when we change block driver for a floppy drive.
2847 */
2848static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2849{
2850 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2851 fdrive_t *drv;
2852 int rc;
2853 LogFlow (("fdcAttach: iLUN=%u\n", iLUN));
2854
2855 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2856 ("The FDC device does not support hotplugging\n"),
2857 VERR_INVALID_PARAMETER);
2858
2859 /*
2860 * Validate.
2861 */
2862 if (iLUN >= 2) {
2863 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2864 iLUN));
2865 return VERR_PDM_DEVINS_NO_ATTACH;
2866 }
2867
2868 /*
2869 * Locate the drive and stuff.
2870 */
2871 drv = &fdctrl->drives[iLUN];
2872
2873 /* the usual paranoia */
2874 AssertRelease (!drv->pDrvBase);
2875 AssertRelease (!drv->pDrvMedia);
2876 AssertRelease (!drv->pDrvMount);
2877
2878 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2879 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2880 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2881 if (RT_SUCCESS(rc)) {
2882 fd_revalidate (drv);
2883 }
2884
2885 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2886 return rc;
2887}
2888
2889
2890/**
2891 * @interface_method_impl{PDMDEVREG,pfnDetach}
2892 *
2893 * The floppy drive has been temporarily 'unplugged'.
2894 */
2895static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2896{
2897 RT_NOREF(fFlags);
2898 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2899 LogFlow (("fdcDetach: iLUN=%u\n", iLUN));
2900
2901 switch (iLUN)
2902 {
2903 case 0:
2904 case 1:
2905 {
2906 fdrive_t *drv = &pThis->drives[iLUN];
2907 drv->pDrvBase = NULL;
2908 drv->pDrvMedia = NULL;
2909 drv->pDrvMount = NULL;
2910 break;
2911 }
2912
2913 default:
2914 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2915 break;
2916 }
2917}
2918
2919
2920/**
2921 * @interface_method_impl{PDMDEVREG,pfnReset}
2922 *
2923 * I haven't check the specs on what's supposed to happen on reset, but we
2924 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2925 * at wrong time like we do if this was all void.
2926 */
2927static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2928{
2929 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2930 unsigned i;
2931 LogFlow (("fdcReset:\n"));
2932
2933 fdctrl_reset(pThis, 0);
2934
2935 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2936 fd_revalidate(&pThis->drives[i]);
2937}
2938
2939
2940/**
2941 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2942 */
2943static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2944{
2945 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2946 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2947 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2948 int rc;
2949
2950 RT_NOREF(iInstance);
2951 Assert(iInstance == 0);
2952
2953 /*
2954 * Validate configuration.
2955 */
2956 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2957
2958 /*
2959 * Read the configuration.
2960 */
2961 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2962 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2963
2964 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2965 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2966
2967 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2968 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2969
2970 bool fMemMapped;
2971 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2972 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2973
2974 uint16_t uIrqDelay;
2975 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2976 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2977
2978 bool fStatusA;
2979 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2980 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2981
2982 /*
2983 * Initialize data.
2984 */
2985 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2986 pThis->pDevIns = pDevIns;
2987 pThis->version = 0x90; /* Intel 82078 controller */
2988 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2989 pThis->num_floppies = MAX_FD;
2990 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2991 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2992 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2993
2994 /* Fill 'command_to_handler' lookup table */
2995 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2996 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2997 if ((j & handlers[ii].mask) == handlers[ii].value)
2998 command_to_handler[j] = ii;
2999
3000 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
3001 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
3002
3003 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
3004 {
3005 fdrive_t *pDrv = &pThis->drives[i];
3006
3007 pDrv->drive = FDRIVE_DRV_NONE;
3008 pDrv->iLUN = i;
3009 pDrv->pDevIns = pDevIns;
3010
3011 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
3012 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
3013 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
3014 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
3015 pDrv->Led.u32Magic = PDMLED_MAGIC;
3016 }
3017
3018 /*
3019 * Create the FDC timer.
3020 */
3021 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
3022 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3023 "FDC Timer", &pThis->hResultTimer);
3024 AssertRCReturn(rc, rc);
3025
3026 /*
3027 * Create the transfer delay timer.
3028 */
3029 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3030 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3031 "FDC Transfer Delay", &pThis->hXferDelayTimer);
3032 AssertRCReturn(rc, rc);
3033
3034 /*
3035 * Create the IRQ delay timer.
3036 */
3037 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3038 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3039 "FDC IRQ Delay", &pThis->hIrqDelayTimer);
3040 AssertRCReturn(rc, rc);
3041
3042 pThis->uIrqDelayMsec = uIrqDelay;
3043
3044 /*
3045 * Register DMA channel.
3046 */
3047 if (pThis->dma_chann != 0xff)
3048 {
3049 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3050 AssertRCReturn(rc, rc);
3051 }
3052
3053 /*
3054 * IO / MMIO.
3055 *
3056 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3057 * Why we skip registering status register A, though, isn't as clear.
3058 */
3059 if (!fMemMapped)
3060 {
3061 static const IOMIOPORTDESC s_aDescs[] =
3062 {
3063 { "SRA", NULL, "Status register A", NULL },
3064 { "SRB", NULL, "Status register B", NULL },
3065 { "DOR", "DOR", "Digital output register", "Digital output register"},
3066 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
3067 { "MSR", "DSR", "Main status register", "Datarate select register" },
3068 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3069 { "ATA", "ATA", NULL, NULL },
3070 { "DIR", "CCR", "Digital input register", "Configuration control register"},
3071 { NULL, NULL, NULL, NULL }
3072 };
3073
3074 /* 0x3f0 */
3075 if (fStatusA)
3076 {
3077 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
3078 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3079 AssertRCReturn(rc, rc);
3080 }
3081
3082 /* 0x3f1..0x3f5 */
3083 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3084 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3085 AssertRCReturn(rc, rc);
3086
3087 /* 0x3f7 */
3088 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3089 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3090 AssertRCReturn(rc, rc);
3091 }
3092 else
3093 AssertMsgFailedReturn(("Memory mapped floppy not supported\n"), VERR_NOT_SUPPORTED);
3094
3095 /*
3096 * Register the saved state data unit.
3097 */
3098 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3099 AssertRCReturn(rc, rc);
3100
3101 /*
3102 * Register the debugger info callback.
3103 */
3104 PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3105
3106 /*
3107 * Attach the status port (optional).
3108 */
3109 PPDMIBASE pBase;
3110 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3111 if (RT_SUCCESS (rc))
3112 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3113 else
3114 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3115
3116 /*
3117 * Initialize drives.
3118 */
3119 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3120 {
3121 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3122 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3123 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3124 rc);
3125 }
3126
3127 fdctrl_reset(pThis, 0);
3128
3129 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3130 fd_revalidate(&pThis->drives[i]);
3131
3132 return VINF_SUCCESS;
3133}
3134
3135
3136/**
3137 * The device registration structure.
3138 */
3139const PDMDEVREG g_DeviceFloppyController =
3140{
3141 /* .u32Version = */ PDM_DEVREG_VERSION,
3142 /* .uReserved0 = */ 0,
3143 /* .szName = */ "i82078",
3144 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3145 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3146 /* .cMaxInstances = */ 1,
3147 /* .uSharedVersion = */ 42,
3148 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3149 /* .cbInstanceCC = */ 0,
3150 /* .cbInstanceRC = */ 0,
3151 /* .cMaxPciDevices = */ 0,
3152 /* .cMaxMsixVectors = */ 0,
3153 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3154#if defined(IN_RING3)
3155 /* .pszRCMod = */ "",
3156 /* .pszR0Mod = */ "",
3157 /* .pfnConstruct = */ fdcConstruct,
3158 /* .pfnDestruct = */ NULL,
3159 /* .pfnRelocate = */ NULL,
3160 /* .pfnMemSetup = */ NULL,
3161 /* .pfnPowerOn = */ NULL,
3162 /* .pfnReset = */ fdcReset,
3163 /* .pfnSuspend = */ NULL,
3164 /* .pfnResume = */ NULL,
3165 /* .pfnAttach = */ fdcAttach,
3166 /* .pfnDetach = */ fdcDetach,
3167 /* .pfnQueryInterface = */ NULL,
3168 /* .pfnInitComplete = */ NULL,
3169 /* .pfnPowerOff = */ NULL,
3170 /* .pfnSoftReset = */ NULL,
3171 /* .pfnReserved0 = */ NULL,
3172 /* .pfnReserved1 = */ NULL,
3173 /* .pfnReserved2 = */ NULL,
3174 /* .pfnReserved3 = */ NULL,
3175 /* .pfnReserved4 = */ NULL,
3176 /* .pfnReserved5 = */ NULL,
3177 /* .pfnReserved6 = */ NULL,
3178 /* .pfnReserved7 = */ NULL,
3179#elif defined(IN_RING0)
3180 /* .pfnEarlyConstruct = */ NULL,
3181 /* .pfnConstruct = */ NULL,
3182 /* .pfnDestruct = */ NULL,
3183 /* .pfnFinalDestruct = */ NULL,
3184 /* .pfnRequest = */ NULL,
3185 /* .pfnReserved0 = */ NULL,
3186 /* .pfnReserved1 = */ NULL,
3187 /* .pfnReserved2 = */ NULL,
3188 /* .pfnReserved3 = */ NULL,
3189 /* .pfnReserved4 = */ NULL,
3190 /* .pfnReserved5 = */ NULL,
3191 /* .pfnReserved6 = */ NULL,
3192 /* .pfnReserved7 = */ NULL,
3193#elif defined(IN_RC)
3194 /* .pfnConstruct = */ NULL,
3195 /* .pfnReserved0 = */ NULL,
3196 /* .pfnReserved1 = */ NULL,
3197 /* .pfnReserved2 = */ NULL,
3198 /* .pfnReserved3 = */ NULL,
3199 /* .pfnReserved4 = */ NULL,
3200 /* .pfnReserved5 = */ NULL,
3201 /* .pfnReserved6 = */ NULL,
3202 /* .pfnReserved7 = */ NULL,
3203#else
3204# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3205#endif
3206 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3207};
3208
3209/*
3210 * Local Variables:
3211 * mode: c
3212 * c-file-style: "k&r"
3213 * indent-tabs-mode: nil
3214 * End:
3215 */
3216
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use