VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 103291

Last change on this file since 103291 was 103291, checked in by vboxsync, 3 months ago

Devices/Storage/DevFdc.cpp: Simplify the logic in get_cur_drv() a bit, eliminates 23 false potential NULL pointer dereference errors in our static code analyzer, bugref:3409
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 110.2 KB
Line 
1/* $Id: DevFdc.cpp 103291 2024-02-09 13:23:50Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 * --------------------------------------------------------------------
27 *
28 * This code is based on:
29 *
30 * QEMU Floppy disk emulator (Intel 82078)
31 *
32 * Copyright (c) 2003 Jocelyn Mayer
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a copy
35 * of this software and associated documentation files (the "Software"), to deal
36 * in the Software without restriction, including without limitation the rights
37 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38 * copies of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included in
42 * all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50 * THE SOFTWARE.
51 *
52 */
53
54
55/*********************************************************************************************************************************
56* Header Files *
57*********************************************************************************************************************************/
58#define LOG_GROUP LOG_GROUP_DEV_FDC
59#include <VBox/vmm/pdmdev.h>
60#include <VBox/vmm/pdmstorageifs.h>
61#include <VBox/AssertGuest.h>
62#include <iprt/assert.h>
63#include <iprt/string.h>
64#include <iprt/uuid.h>
65
66#include "VBoxDD.h"
67
68
69/*********************************************************************************************************************************
70* Defined Constants And Macros *
71*********************************************************************************************************************************/
72/** @name FDC saved state versions
73 * @{ */
74#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
75#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
76#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
77/** @}*/
78
79#define MAX_FD 2
80
81
82/********************************************************/
83/* debug Floppy devices */
84/* #define DEBUG_FLOPPY */
85
86#ifdef LOG_ENABLED
87# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
88#else
89# define FLOPPY_DPRINTF(...) do { } while (0)
90#endif
91
92#define FLOPPY_ERROR RTLogPrintf
93
94typedef struct fdctrl_t fdctrl_t;
95
96/********************************************************/
97/* Floppy drive emulation */
98
99/* Drive selection note:
100 * For many commands, the FDC can select one of four drives through the
101 * second command byte. The Digital Output Register (DOR) can also select
102 * one of four drives. On PCs, the FDC drive selection is ignored, but
103 * should be reflected back in command status. Only the DOR drive selection
104 * is effective; on old PCs with a discrete NEC uPD765 or similar, the FDC
105 * drive selection signals (US0/US1) are not connected at all.
106 * NB: A drive is actually selected only when its motor on bit in the DOR
107 * is also set. It is possible to have no drive selected.
108 *
109 * The FDC cur_drv field tracks the drive the FDC thinks is selected, but
110 * the DOR is used for actual drive selection.
111 */
112
113#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
114#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
115
116/* Will always be a fixed parameter for us */
117#define FD_SECTOR_LEN 512
118#define FD_SECTOR_SC 2 /* Sector size code */
119#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
120
121/* Floppy disk drive emulation */
122typedef enum fdrive_type_t {
123 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
124 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
125 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
126 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
127 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
128 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
129} fdrive_type_t;
130
131typedef uint8_t fdrive_flags_t;
132#define FDISK_DBL_SIDES UINT8_C(0x01)
133
134typedef enum fdrive_rate_t {
135 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
136 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
137 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
138 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
139} fdrive_rate_t;
140
141/**
142 * The status for one drive.
143 *
144 * @implements PDMIBASE
145 * @implements PDMIMEDIAPORT
146 * @implements PDMIMOUNTNOTIFY
147 */
148typedef struct fdrive_t {
149 /** Pointer to the owning device instance. */
150 R3PTRTYPE(PPDMDEVINS) pDevIns;
151 /** Pointer to the attached driver's base interface. */
152 R3PTRTYPE(PPDMIBASE) pDrvBase;
153 /** Pointer to the attached driver's block interface. */
154 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
155 /** Pointer to the attached driver's mount interface.
156 * This is NULL if the driver isn't a removable unit. */
157 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
158 /** The base interface. */
159 PDMIBASE IBase;
160 /** The block port interface. */
161 PDMIMEDIAPORT IPort;
162 /** The mount notify interface. */
163 PDMIMOUNTNOTIFY IMountNotify;
164 /** The LUN #. */
165 RTUINT iLUN;
166 /** The LED for this LUN. */
167 PDMLED Led;
168 /* Drive status */
169 fdrive_type_t drive;
170 uint8_t perpendicular; /* 2.88 MB access mode */
171 uint8_t dsk_chg; /* Disk change line */
172 /* Position */
173 uint8_t head;
174 uint8_t track;
175 uint8_t sect;
176 uint8_t ltrk; /* Logical track */
177 /* Media */
178 fdrive_flags_t flags;
179 uint8_t last_sect; /* Nb sector per track */
180 uint8_t max_track; /* Nb of tracks */
181 uint16_t bps; /* Bytes per sector */
182 uint8_t ro; /* Is read-only */
183 uint8_t media_rate; /* Data rate of medium */
184} fdrive_t;
185
186#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
187
188static void fd_init(fdrive_t *drv, bool fInit)
189{
190 /* Drive */
191 if (fInit) {
192 /* Fixate the drive type at init time if possible. */
193 if (drv->pDrvMedia) {
194 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
195 switch (enmType) {
196 case PDMMEDIATYPE_FLOPPY_360:
197 case PDMMEDIATYPE_FLOPPY_1_20:
198 drv->drive = FDRIVE_DRV_120;
199 break;
200 case PDMMEDIATYPE_FLOPPY_720:
201 case PDMMEDIATYPE_FLOPPY_1_44:
202 drv->drive = FDRIVE_DRV_144;
203 break;
204 default:
205 AssertFailed();
206 RT_FALL_THRU();
207 case PDMMEDIATYPE_FLOPPY_2_88:
208 drv->drive = FDRIVE_DRV_288;
209 break;
210 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
211 drv->drive = FDRIVE_DRV_FAKE_15_6;
212 break;
213 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
214 drv->drive = FDRIVE_DRV_FAKE_63_5;
215 break;
216 }
217 } else {
218 drv->drive = FDRIVE_DRV_NONE;
219 }
220 } /* else: The BIOS (and others) get the drive type via the CMOS, so
221 don't change it after the VM has been constructed. */
222 drv->perpendicular = 0;
223 /* Disk */
224 drv->last_sect = 0;
225 drv->max_track = 0;
226}
227
228static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
229 uint8_t last_sect, uint8_t num_sides)
230{
231 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
232}
233
234/* Returns current position, in sectors, for given drive */
235static int fd_sector(fdrive_t *drv)
236{
237 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
238}
239
240/* Seek to a new position:
241 * returns 0 if already on right track
242 * returns 1 if track changed
243 * returns 2 if track is invalid
244 * returns 3 if sector is invalid
245 * returns 4 if seek is disabled
246 * returns 5 if no media in drive
247 */
248static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
249 int enable_seek)
250{
251 int sector;
252 int ret;
253
254 if (!drv->last_sect) {
255 FLOPPY_DPRINTF("no disk in drive (max=%d h=%d c=%02x =s%02x) -> 5\n",
256 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
257 return 5;
258 }
259 if (track > drv->max_track ||
260 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
261 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 2\n",
262 head, track, sect,
263 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
264 return 2;
265 }
266 if (sect > drv->last_sect || sect < 1) {
267 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 3\n",
268 head, track, sect,
269 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
270 return 3;
271 }
272 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
273 ret = 0;
274 if (sector != fd_sector(drv)) {
275#if 0
276 if (!enable_seek) {
277 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
278 head, track, sect, 1, drv->max_track, drv->last_sect);
279 return 4;
280 }
281#else
282 RT_NOREF(enable_seek);
283#endif
284 drv->head = head;
285 if (drv->track != track)
286 ret = 1;
287 drv->track = track;
288 drv->sect = sect;
289 }
290 drv->ltrk = drv->track;
291
292 return ret;
293}
294
295/* Set drive back to track 0 */
296static void fd_recalibrate(fdrive_t *drv)
297{
298 FLOPPY_DPRINTF("recalibrate\n");
299 drv->head = 0;
300 drv->track = 0;
301 drv->ltrk = 0;
302 drv->sect = 1;
303}
304
305/* Recognize floppy formats */
306typedef struct fd_format_t {
307 fdrive_type_t drive;
308 uint8_t last_sect; /**< Number of sectors. */
309 uint8_t max_track; /**< Number of tracks. */
310 uint8_t max_head; /**< Max head number. */
311 fdrive_rate_t rate;
312 const char *str;
313} fd_format_t;
314
315/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
316 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
317 */
318static fd_format_t const fd_formats[] = {
319 /* First entry is default format */
320 /* 1.44 MB 3"1/2 floppy disks */
321 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
322 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
323 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
324 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
325 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
326 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
327 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
328 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
329 /* 2.88 MB 3"1/2 floppy disks */
330 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
331 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
332 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
333 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
334 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
335 /* 720 kB 3"1/2 floppy disks */
336 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
337 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
338 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
339 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
340 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
341 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
342 /* 1.2 MB 5"1/4 floppy disks */
343 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
344 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
345 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
346 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
347 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
348 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
349 /* 720 kB 5"1/4 floppy disks */
350 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
351 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
352 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
353 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
354 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
355 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
356 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
357 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
358 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
359 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
360 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
361 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
362 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
363 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
364 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
365 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
366 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
367 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
368 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
369 /* For larger than real life floppy images (see DrvVD.cpp). */
370 /* 15.6 MB fake floppy disk (just need something big). */
371 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
372 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
373 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
374 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
375 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
376 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
377 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
378 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
379 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
380 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
381 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
382 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
383 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
384 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
385 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
386 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
387 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
388 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
389 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
390 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
391 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
392 /* 63.5 MB fake floppy disk (just need something big). */
393 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
394 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
395 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
396 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
397 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
398 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
399 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
400 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
401 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
402 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
403 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
404 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
405 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
406 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
407 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
408 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
409 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
410 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
411 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
412 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
413 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
414 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
415 /* end */
416 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
417};
418
419/* Revalidate a disk drive after a disk change */
420static void fd_revalidate(fdrive_t *drv)
421{
422 const fd_format_t *parse;
423 uint64_t nb_sectors, size;
424 int i, first_match, match;
425 int nb_heads, max_track, last_sect, ro;
426
427 FLOPPY_DPRINTF("revalidate\n");
428 if ( drv->pDrvMedia
429 && drv->pDrvMount
430 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
431 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
432 nb_heads = max_track = last_sect = 0;
433 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
434 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
435 nb_heads - 1, max_track, last_sect);
436 } else {
437 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
438 nb_sectors = size2 / FD_SECTOR_LEN;
439 match = -1;
440 first_match = -1;
441 for (i = 0;; i++) {
442 parse = &fd_formats[i];
443 if (parse->drive == FDRIVE_DRV_NONE)
444 break;
445 if (drv->drive == parse->drive ||
446 drv->drive == FDRIVE_DRV_NONE) {
447 size = (parse->max_head + 1) * parse->max_track *
448 parse->last_sect;
449 if (nb_sectors == size) {
450 match = i;
451 break;
452 }
453 if (first_match == -1)
454 first_match = i;
455 }
456 }
457 if (match == -1) {
458 if (first_match == -1)
459 match = 1;
460 else
461 match = first_match;
462 parse = &fd_formats[match];
463 }
464 nb_heads = parse->max_head + 1;
465 max_track = parse->max_track;
466 last_sect = parse->last_sect;
467 drv->drive = parse->drive;
468 drv->media_rate = parse->rate;
469 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
470 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
471 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
472 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
473 }
474 if (nb_heads == 1) {
475 drv->flags &= ~FDISK_DBL_SIDES;
476 } else {
477 drv->flags |= FDISK_DBL_SIDES;
478 }
479 drv->max_track = max_track;
480 drv->last_sect = last_sect;
481 drv->ro = ro;
482 } else {
483 FLOPPY_DPRINTF("No disk in drive\n");
484 drv->last_sect = 0;
485 drv->max_track = 0;
486 drv->flags &= ~FDISK_DBL_SIDES;
487 drv->dsk_chg = true; /* Disk change line active. */
488 }
489}
490
491/********************************************************/
492/* Intel 82078 floppy disk controller emulation */
493
494static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
495static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
496static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
497
498static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
499static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
500static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
501static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
502static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
503static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
504static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
505static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
506static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
507static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
508static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
509static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
510
511enum {
512 FD_DIR_WRITE = 0,
513 FD_DIR_READ = 1,
514 FD_DIR_SCANE = 2,
515 FD_DIR_SCANL = 3,
516 FD_DIR_SCANH = 4,
517 FD_DIR_FORMAT = 5
518};
519
520enum {
521 FD_STATE_MULTI = 0x01, /* multi track flag */
522 FD_STATE_FORMAT = 0x02, /* format flag */
523 FD_STATE_SEEK = 0x04 /* seek flag */
524};
525
526enum {
527 FD_REG_SRA = 0x00,
528 FD_REG_SRB = 0x01,
529 FD_REG_DOR = 0x02,
530 FD_REG_TDR = 0x03,
531 FD_REG_MSR = 0x04,
532 FD_REG_DSR = 0x04,
533 FD_REG_FIFO = 0x05,
534 FD_REG_DIR = 0x07,
535 FD_REG_CCR = 0x07
536};
537
538enum {
539 FD_CMD_READ_TRACK = 0x02,
540 FD_CMD_SPECIFY = 0x03,
541 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
542 FD_CMD_WRITE = 0x05,
543 FD_CMD_READ = 0x06,
544 FD_CMD_RECALIBRATE = 0x07,
545 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
546 FD_CMD_WRITE_DELETED = 0x09,
547 FD_CMD_READ_ID = 0x0a,
548 FD_CMD_READ_DELETED = 0x0c,
549 FD_CMD_FORMAT_TRACK = 0x0d,
550 FD_CMD_DUMPREG = 0x0e,
551 FD_CMD_SEEK = 0x0f,
552 FD_CMD_VERSION = 0x10,
553 FD_CMD_SCAN_EQUAL = 0x11,
554 FD_CMD_PERPENDICULAR_MODE = 0x12,
555 FD_CMD_CONFIGURE = 0x13,
556 FD_CMD_LOCK = 0x14,
557 FD_CMD_VERIFY = 0x16,
558 FD_CMD_POWERDOWN_MODE = 0x17,
559 FD_CMD_PART_ID = 0x18,
560 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
561 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
562 FD_CMD_SAVE = 0x2e,
563 FD_CMD_OPTION = 0x33,
564 FD_CMD_RESTORE = 0x4e,
565 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
566 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
567 FD_CMD_FORMAT_AND_WRITE = 0xcd,
568 FD_CMD_RELATIVE_SEEK_IN = 0xcf
569};
570
571enum {
572 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
573 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
574 FD_CONFIG_POLL = 0x10, /* Poll enabled */
575 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
576 FD_CONFIG_EIS = 0x40 /* No implied seeks */
577};
578
579enum {
580 FD_SR0_EQPMT = 0x10,
581 FD_SR0_SEEK = 0x20,
582 FD_SR0_ABNTERM = 0x40,
583 FD_SR0_INVCMD = 0x80,
584 FD_SR0_RDYCHG = 0xc0
585};
586
587enum {
588 FD_SR1_MA = 0x01, /* Missing address mark */
589 FD_SR1_NW = 0x02, /* Not writable */
590 FD_SR1_ND = 0x04, /* No data */
591 FD_SR1_EC = 0x80 /* End of cylinder */
592};
593
594enum {
595 FD_SR2_MD = 0x01, /* Missing data address mark */
596 FD_SR2_SNS = 0x04, /* Scan not satisfied */
597 FD_SR2_SEH = 0x08 /* Scan equal hit */
598};
599
600enum {
601 FD_SRA_DIR = 0x01,
602 FD_SRA_nWP = 0x02,
603 FD_SRA_nINDX = 0x04,
604 FD_SRA_HDSEL = 0x08,
605 FD_SRA_nTRK0 = 0x10,
606 FD_SRA_STEP = 0x20,
607 FD_SRA_nDRV2 = 0x40,
608 FD_SRA_INTPEND = 0x80
609};
610
611enum {
612 FD_SRB_MTR0 = 0x01,
613 FD_SRB_MTR1 = 0x02,
614 FD_SRB_WGATE = 0x04,
615 FD_SRB_RDATA = 0x08,
616 FD_SRB_WDATA = 0x10,
617 FD_SRB_DR0 = 0x20
618};
619
620enum {
621#if MAX_FD == 4
622 FD_DRV_SELMASK = 0x03,
623#else
624 FD_DRV_SELMASK = 0x01,
625#endif
626};
627
628enum {
629 FD_DOR_SELMASK = 0x03, /* Always two bits regardless of FD_DRV_SELMASK. */
630 FD_DOR_nRESET = 0x04,
631 FD_DOR_DMAEN = 0x08,
632 FD_DOR_MOTEN0 = 0x10,
633 FD_DOR_MOTEN1 = 0x20,
634 FD_DOR_MOTEN2 = 0x40,
635 FD_DOR_MOTEN3 = 0x80
636};
637
638enum {
639#if MAX_FD == 4
640 FD_TDR_BOOTSEL = 0x0c
641#else
642 FD_TDR_BOOTSEL = 0x04
643#endif
644};
645
646enum {
647 FD_DSR_DRATEMASK= 0x03,
648 FD_DSR_PWRDOWN = 0x40,
649 FD_DSR_SWRESET = 0x80
650};
651
652enum {
653 FD_MSR_DRV0BUSY = 0x01,
654 FD_MSR_DRV1BUSY = 0x02,
655 FD_MSR_DRV2BUSY = 0x04,
656 FD_MSR_DRV3BUSY = 0x08,
657 FD_MSR_CMDBUSY = 0x10,
658 FD_MSR_NONDMA = 0x20,
659 FD_MSR_DIO = 0x40,
660 FD_MSR_RQM = 0x80
661};
662
663enum {
664 FD_DIR_DSKCHG = 0x80
665};
666
667#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
668#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
669#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
670
671/**
672 * Floppy controller state.
673 *
674 * @implements PDMILEDPORTS
675 */
676struct fdctrl_t {
677 /* Controller's identification */
678 uint8_t version;
679 /* HW */
680 uint8_t irq_lvl;
681 uint8_t dma_chann;
682 uint16_t io_base;
683 /* Controller state */
684 TMTIMERHANDLE hResultTimer;
685
686 /* Interrupt delay timers. */
687 TMTIMERHANDLE hXferDelayTimer;
688 TMTIMERHANDLE hIrqDelayTimer;
689 uint16_t uIrqDelayMsec;
690 uint8_t st0;
691 uint8_t st1;
692 uint8_t st2;
693
694 uint8_t sra;
695 uint8_t srb;
696 uint8_t dor;
697 uint8_t tdr;
698 uint8_t dsr;
699 uint8_t msr;
700 uint8_t cur_drv;
701 uint8_t status0;
702 uint8_t status1;
703 uint8_t status2;
704 /* Command FIFO */
705 uint8_t fifo[FD_SECTOR_LEN];
706 uint32_t data_pos;
707 uint32_t data_len;
708 uint8_t data_state;
709 uint8_t data_dir;
710 uint8_t eot; /* last wanted sector */
711 /* Debugging only */
712 uint8_t cur_cmd;
713 uint8_t prev_cmd;
714 /* States kept only to be returned back */
715 /* Timers state */
716 uint8_t timer0;
717 uint8_t timer1;
718 /* precompensation */
719 uint8_t precomp_trk;
720 uint8_t config;
721 uint8_t lock;
722 /* Power down config (also with status regB access mode */
723 uint8_t pwrd;
724 /* Floppy drives */
725 uint8_t num_floppies;
726 fdrive_t drives[MAX_FD];
727 uint8_t reset_sensei;
728 /** Pointer to device instance. */
729 PPDMDEVINS pDevIns;
730
731 /** Status LUN: The base interface. */
732 PDMIBASE IBaseStatus;
733 /** Status LUN: The Leds interface. */
734 PDMILEDPORTS ILeds;
735 /** Status LUN: The Partner of ILeds. */
736 PPDMILEDCONNECTORS pLedsConnector;
737
738 /** I/O ports: 0x3f0 */
739 IOMIOPORTHANDLE hIoPorts0;
740 /** I/O ports: 0x3f1..0x3f5 */
741 IOMIOPORTHANDLE hIoPorts1;
742 /** I/O port: 0x3f7 */
743 IOMIOPORTHANDLE hIoPorts2;
744};
745
746static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
747{
748 uint32_t retval;
749
750 switch (reg) {
751 case FD_REG_SRA:
752 retval = fdctrl_read_statusA(fdctrl);
753 break;
754 case FD_REG_SRB:
755 retval = fdctrl_read_statusB(fdctrl);
756 break;
757 case FD_REG_DOR:
758 retval = fdctrl_read_dor(fdctrl);
759 break;
760 case FD_REG_TDR:
761 retval = fdctrl_read_tape(fdctrl);
762 break;
763 case FD_REG_MSR:
764 retval = fdctrl_read_main_status(fdctrl);
765 break;
766 case FD_REG_FIFO:
767 retval = fdctrl_read_data(fdctrl);
768 break;
769 case FD_REG_DIR:
770 retval = fdctrl_read_dir(fdctrl);
771 break;
772 default:
773 retval = UINT32_MAX;
774 break;
775 }
776 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
777
778 return retval;
779}
780
781static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
782{
783 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
784
785 switch (reg) {
786 case FD_REG_DOR:
787 fdctrl_write_dor(fdctrl, value);
788 break;
789 case FD_REG_TDR:
790 fdctrl_write_tape(fdctrl, value);
791 break;
792 case FD_REG_DSR:
793 fdctrl_write_rate(fdctrl, value);
794 break;
795 case FD_REG_FIFO:
796 fdctrl_write_data(fdctrl, value);
797 break;
798 case FD_REG_CCR:
799 fdctrl_write_ccr(fdctrl, value);
800 break;
801 default:
802 break;
803 }
804}
805
806/* Change IRQ state */
807static void fdctrl_reset_irq(fdctrl_t *fdctrl)
808{
809 if (!(fdctrl->sra & FD_SRA_INTPEND))
810 return;
811 FLOPPY_DPRINTF("Reset interrupt\n");
812 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
813 fdctrl->sra &= ~FD_SRA_INTPEND;
814}
815
816static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
817{
818 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
819 FLOPPY_DPRINTF("Raising interrupt...\n");
820 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
821 fdctrl->sra |= FD_SRA_INTPEND;
822 }
823 if (status0 & FD_SR0_SEEK) {
824 fdrive_t *cur_drv;
825
826 /* A seek clears the disk change line (if a disk is inserted). */
827 cur_drv = get_cur_drv(fdctrl);
828 if (cur_drv->max_track)
829 cur_drv->dsk_chg = false;
830 }
831
832 fdctrl->reset_sensei = 0;
833 fdctrl->status0 = status0;
834 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
835}
836
837static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
838{
839 if (!fdctrl->uIrqDelayMsec)
840 {
841 /* If not IRQ delay needed, trigger the interrupt now. */
842 fdctrl_raise_irq_now(fdctrl, status0);
843 }
844 else
845 {
846 /* Otherwise schedule completion after a short while. */
847 fdctrl->st0 = status0;
848 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
849 }
850}
851
852/* Reset controller */
853static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
854{
855 int i;
856
857 FLOPPY_DPRINTF("reset controller\n");
858 fdctrl_reset_irq(fdctrl);
859 /* Initialise controller */
860 fdctrl->sra = 0;
861 fdctrl->srb = 0xc0;
862 if (!fdctrl->drives[1].pDrvMedia)
863 fdctrl->sra |= FD_SRA_nDRV2;
864 fdctrl->cur_drv = 0;
865 fdctrl->dor = FD_DOR_nRESET;
866 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
867 fdctrl->msr = FD_MSR_RQM;
868 /* FIFO state */
869 fdctrl->data_pos = 0;
870 fdctrl->data_len = 0;
871 fdctrl->data_state = 0;
872 fdctrl->data_dir = FD_DIR_WRITE;
873 for (i = 0; i < MAX_FD; i++)
874 fd_recalibrate(&fdctrl->drives[i]);
875 fdctrl_reset_fifo(fdctrl);
876 if (do_irq) {
877 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
878 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
879 }
880}
881
882static inline fdrive_t *drv0(fdctrl_t *fdctrl)
883{
884 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
885}
886
887static inline fdrive_t *drv1(fdctrl_t *fdctrl)
888{
889 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
890 return &fdctrl->drives[1];
891 else
892 return &fdctrl->drives[0];
893}
894
895#if MAX_FD == 4
896static inline fdrive_t *drv2(fdctrl_t *fdctrl)
897{
898 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
899 return &fdctrl->drives[2];
900 else
901 return &fdctrl->drives[1];
902}
903
904static inline fdrive_t *drv3(fdctrl_t *fdctrl)
905{
906 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
907 return &fdctrl->drives[3];
908 else
909 return &fdctrl->drives[2];
910}
911#endif
912
913static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
914{
915#if MAX_FD == 2
916 if (fdctrl->dor & FD_DRV_SELMASK)
917 return drv1(fdctrl);
918
919 return drv0(fdctrl);
920#else
921 switch (fdctrl->dor & FD_DRV_SELMASK) {
922 case 0: return drv0(fdctrl);
923 case 1: return drv1(fdctrl);
924# if MAX_FD == 4
925 case 2: return drv2(fdctrl);
926 case 3: return drv3(fdctrl);
927# endif
928 default: return NULL;
929 }
930#endif
931}
932
933/* Status A register : 0x00 (read-only) */
934static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
935{
936 uint32_t retval = fdctrl->sra;
937
938 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
939
940 return retval;
941}
942
943/* Status B register : 0x01 (read-only) */
944static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
945{
946 uint32_t retval = fdctrl->srb;
947
948 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
949
950 return retval;
951}
952
953/* Digital output register : 0x02 */
954static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
955{
956 uint32_t retval = fdctrl->dor;
957
958 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
959
960 return retval;
961}
962
963static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
964{
965 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
966
967 /* Motors */
968 if (value & FD_DOR_MOTEN0)
969 fdctrl->srb |= FD_SRB_MTR0;
970 else
971 fdctrl->srb &= ~FD_SRB_MTR0;
972 if (value & FD_DOR_MOTEN1)
973 fdctrl->srb |= FD_SRB_MTR1;
974 else
975 fdctrl->srb &= ~FD_SRB_MTR1;
976
977 /* Drive */
978 if (value & 1)
979 fdctrl->srb |= FD_SRB_DR0;
980 else
981 fdctrl->srb &= ~FD_SRB_DR0;
982
983 /* Reset */
984 if (!(value & FD_DOR_nRESET)) {
985 if (fdctrl->dor & FD_DOR_nRESET) {
986 FLOPPY_DPRINTF("controller enter RESET state\n");
987 }
988 } else {
989 if (!(fdctrl->dor & FD_DOR_nRESET)) {
990 FLOPPY_DPRINTF("controller out of RESET state\n");
991 fdctrl_reset(fdctrl, 1);
992 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
993 }
994 }
995
996 fdctrl->dor = value;
997}
998
999/* Tape drive register : 0x03 */
1000static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
1001{
1002 uint32_t retval = fdctrl->tdr;
1003
1004 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1005
1006 return retval;
1007}
1008
1009static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
1010{
1011 /* Reset mode */
1012 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1013 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1014 return;
1015 }
1016 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1017 /* Disk boot selection indicator */
1018 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1019 /* Tape indicators: never allow */
1020}
1021
1022/* Main status register : 0x04 (read) */
1023static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
1024{
1025 uint32_t retval = fdctrl->msr;
1026
1027 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1028 fdctrl->dor |= FD_DOR_nRESET;
1029
1030 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1031
1032 return retval;
1033}
1034
1035/* Data select rate register : 0x04 (write) */
1036static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1037{
1038 /* Reset mode */
1039 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1040 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1041 return;
1042 }
1043 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1044 /* Reset: autoclear */
1045 if (value & FD_DSR_SWRESET) {
1046 fdctrl->dor &= ~FD_DOR_nRESET;
1047 fdctrl_reset(fdctrl, 1);
1048 fdctrl->dor |= FD_DOR_nRESET;
1049 }
1050 if (value & FD_DSR_PWRDOWN) {
1051 fdctrl_reset(fdctrl, 1);
1052 }
1053 fdctrl->dsr = value;
1054}
1055
1056/* Configuration control register : 0x07 (write) */
1057static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1058{
1059 /* Reset mode */
1060 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1061 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1062 return;
1063 }
1064 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1065
1066 /* Only the rate selection bits used in AT mode, and we
1067 * store those in the DSR.
1068 */
1069 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1070}
1071
1072static int fdctrl_media_changed(fdrive_t *drv)
1073{
1074 return drv->dsk_chg;
1075}
1076
1077/* Digital input register : 0x07 (read-only) */
1078static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1079{
1080 uint32_t retval = 0;
1081
1082 /* The change line signal is reported by the currently selected
1083 * drive. If the corresponding motor on bit is not set, the drive
1084 * is *not* selected!
1085 */
1086 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1087 && (fdctrl->dor & (0x10 << (fdctrl->dor & FD_DOR_SELMASK))))
1088 retval |= FD_DIR_DSKCHG;
1089 if (retval != 0)
1090 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1091
1092 return retval;
1093}
1094
1095/* FIFO state control */
1096static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1097{
1098 fdctrl->data_dir = FD_DIR_WRITE;
1099 fdctrl->data_pos = 0;
1100 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1101 fdctrl->prev_cmd = fdctrl->cur_cmd;
1102 fdctrl->cur_cmd = 0;
1103}
1104
1105/* Set FIFO status for the host to read */
1106static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1107{
1108 fdctrl->data_dir = FD_DIR_READ;
1109 fdctrl->data_len = fifo_len;
1110 fdctrl->data_pos = 0;
1111 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1112 if (do_irq)
1113 fdctrl_raise_irq(fdctrl, 0x00);
1114}
1115
1116/* Set an error: unimplemented/unknown command */
1117static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1118{
1119 RT_NOREF(direction);
1120 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1121 fdctrl->fifo[0] = FD_SR0_INVCMD;
1122 fdctrl_set_fifo(fdctrl, 1, 0);
1123}
1124
1125/* Seek to next sector */
1126static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1127{
1128 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1129 cur_drv->head, cur_drv->track, cur_drv->sect,
1130 fd_sector(cur_drv));
1131 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1132 error in fact */
1133 if (cur_drv->sect >= cur_drv->last_sect ||
1134 cur_drv->sect == fdctrl->eot) {
1135 cur_drv->sect = 1;
1136 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1137 if (cur_drv->head == 0 &&
1138 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1139 cur_drv->head = 1;
1140 } else {
1141 cur_drv->head = 0;
1142 cur_drv->ltrk++;
1143 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1144 return 0;
1145 }
1146 } else {
1147 cur_drv->ltrk++;
1148 return 0;
1149 }
1150 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1151 cur_drv->head, cur_drv->track,
1152 cur_drv->sect, fd_sector(cur_drv));
1153 } else {
1154 cur_drv->sect++;
1155 }
1156 return 1;
1157}
1158
1159/* Callback for transfer end (stop or abort) */
1160static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1161 uint8_t status1, uint8_t status2)
1162{
1163 fdrive_t *cur_drv;
1164
1165 cur_drv = get_cur_drv(fdctrl);
1166 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1167 status0, status1, status2,
1168 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1169 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1170 fdctrl->fifo[1] = status1;
1171 fdctrl->fifo[2] = status2;
1172 fdctrl->fifo[3] = cur_drv->ltrk;
1173 fdctrl->fifo[4] = cur_drv->head;
1174 fdctrl->fifo[5] = cur_drv->sect;
1175 fdctrl->fifo[6] = FD_SECTOR_SC;
1176 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1177 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1178 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1179
1180 fdctrl->data_dir = FD_DIR_READ;
1181 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1182 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1183 }
1184 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1185 fdctrl->msr &= ~FD_MSR_NONDMA;
1186 fdctrl_set_fifo(fdctrl, 7, 1);
1187}
1188
1189static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1190 uint8_t status1, uint8_t status2)
1191{
1192 if (!fdctrl->uIrqDelayMsec)
1193 {
1194 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1195 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1196 }
1197 else
1198 {
1199 /* Otherwise schedule completion after a short while. */
1200 fdctrl->st0 = status0;
1201 fdctrl->st1 = status1;
1202 fdctrl->st2 = status2;
1203 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1204 }
1205}
1206
1207/* Prepare a data transfer (either DMA or FIFO) */
1208static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1209{
1210 fdrive_t *cur_drv;
1211 uint8_t kh, kt, ks;
1212 int did_seek = 0;
1213
1214 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1215 cur_drv = get_cur_drv(fdctrl);
1216 kt = fdctrl->fifo[2];
1217 kh = fdctrl->fifo[3];
1218 ks = fdctrl->fifo[4];
1219 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1220 GET_CUR_DRV(fdctrl), kh, kt, ks,
1221 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1222 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1223 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1224 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1225 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1226 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1227 case 2:
1228 /* sect too big */
1229 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1230 fdctrl->fifo[3] = kt;
1231 fdctrl->fifo[4] = kh;
1232 fdctrl->fifo[5] = ks;
1233 return;
1234 case 3:
1235 /* track too big */
1236 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1237 fdctrl->fifo[3] = kt;
1238 fdctrl->fifo[4] = kh;
1239 fdctrl->fifo[5] = ks;
1240 return;
1241 case 4:
1242 /* No seek enabled */
1243 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1244 fdctrl->fifo[3] = kt;
1245 fdctrl->fifo[4] = kh;
1246 fdctrl->fifo[5] = ks;
1247 return;
1248 case 5:
1249 /* No disk in drive */
1250 /// @todo This is wrong! Command should not complete.
1251 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1252 fdctrl->fifo[3] = kt;
1253 fdctrl->fifo[4] = kh;
1254 fdctrl->fifo[5] = ks;
1255 return;
1256 case 1:
1257 did_seek = 1;
1258 break;
1259 default:
1260 break;
1261 }
1262 /* Check the data rate. If the programmed data rate does not match
1263 * the currently inserted medium, the operation has to fail.
1264 */
1265 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1266 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1267 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1268 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1269 fdctrl->fifo[3] = kt;
1270 fdctrl->fifo[4] = kh;
1271 fdctrl->fifo[5] = ks;
1272 return;
1273 }
1274 /* Set the FIFO state */
1275 fdctrl->data_dir = direction;
1276 fdctrl->data_pos = 0;
1277 fdctrl->msr |= FD_MSR_CMDBUSY;
1278 if (fdctrl->fifo[0] & 0x80)
1279 fdctrl->data_state |= FD_STATE_MULTI;
1280 else
1281 fdctrl->data_state &= ~FD_STATE_MULTI;
1282 if (did_seek)
1283 fdctrl->data_state |= FD_STATE_SEEK;
1284 else
1285 fdctrl->data_state &= ~FD_STATE_SEEK;
1286 if (fdctrl->fifo[5] == 00) {
1287 fdctrl->data_len = fdctrl->fifo[8];
1288 } else {
1289 int tmp;
1290 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1291 tmp = (fdctrl->fifo[6] - ks + 1);
1292 if (fdctrl->fifo[0] & 0x80)
1293 tmp += fdctrl->fifo[6];
1294 fdctrl->data_len *= tmp;
1295 }
1296 fdctrl->eot = fdctrl->fifo[6];
1297 if (fdctrl->dor & FD_DOR_DMAEN) {
1298 int dma_mode;
1299 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1300 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1301 dma_mode = (dma_mode >> 2) & 3;
1302 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1303 dma_mode, direction,
1304 (128 << fdctrl->fifo[5]) *
1305 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1306 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1307 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1308 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1309 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1310 /* No access is allowed until DMA transfer has completed */
1311 fdctrl->msr &= ~FD_MSR_RQM;
1312 /* Now, we just have to wait for the DMA controller to
1313 * recall us...
1314 */
1315 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1316 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1317 return;
1318 } else {
1319 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1320 }
1321 }
1322 FLOPPY_DPRINTF("start non-DMA transfer\n");
1323 fdctrl->msr |= FD_MSR_NONDMA;
1324 if (direction != FD_DIR_WRITE)
1325 fdctrl->msr |= FD_MSR_DIO;
1326
1327 /* IO based transfer: calculate len */
1328 fdctrl_raise_irq(fdctrl, 0x00);
1329 return;
1330}
1331
1332/* Prepare a format data transfer (either DMA or FIFO) */
1333static void fdctrl_start_format(fdctrl_t *fdctrl)
1334{
1335 fdrive_t *cur_drv;
1336 uint8_t ns, dp, kh, kt, ks;
1337
1338 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1339 cur_drv = get_cur_drv(fdctrl);
1340 kt = cur_drv->track;
1341 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1342 ns = fdctrl->fifo[3];
1343 dp = fdctrl->fifo[5];
1344 ks = 1;
1345 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1346 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1347 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1348 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1349 case 2:
1350 /* sect too big */
1351 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1352 fdctrl->fifo[3] = kt;
1353 fdctrl->fifo[4] = kh;
1354 fdctrl->fifo[5] = ks;
1355 return;
1356 case 3:
1357 /* track too big */
1358 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1359 fdctrl->fifo[3] = kt;
1360 fdctrl->fifo[4] = kh;
1361 fdctrl->fifo[5] = ks;
1362 return;
1363 case 4:
1364 /* No seek enabled */
1365 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1366 fdctrl->fifo[3] = kt;
1367 fdctrl->fifo[4] = kh;
1368 fdctrl->fifo[5] = ks;
1369 return;
1370 case 5:
1371 /* No disk in drive */
1372 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1373 fdctrl->fifo[3] = kt;
1374 fdctrl->fifo[4] = kh;
1375 fdctrl->fifo[5] = ks;
1376 return;
1377 case 1:
1378 break;
1379 default:
1380 break;
1381 }
1382 /* It's not clear what should happen if the data rate does not match. */
1383#if 0
1384 /* Check the data rate. If the programmed data rate does not match
1385 * the currently inserted medium, the operation has to fail.
1386 */
1387 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1388 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1389 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1390 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1391 fdctrl->fifo[3] = kt;
1392 fdctrl->fifo[4] = kh;
1393 fdctrl->fifo[5] = ks;
1394 return;
1395 }
1396#endif
1397 /* Set the FIFO state */
1398 fdctrl->data_dir = FD_DIR_FORMAT;
1399 fdctrl->data_pos = 0;
1400 fdctrl->msr |= FD_MSR_CMDBUSY;
1401 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1402 fdctrl->data_len = ns * 4;
1403 fdctrl->eot = ns;
1404 if (fdctrl->dor & FD_DOR_DMAEN) {
1405 int dma_mode;
1406 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1407 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1408 dma_mode = (dma_mode >> 2) & 3;
1409 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1410 dma_mode, fdctrl->data_dir,
1411 (128 << fdctrl->fifo[2]) *
1412 (cur_drv->last_sect + 1), fdctrl->data_len);
1413 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1414 /* No access is allowed until DMA transfer has completed */
1415 fdctrl->msr &= ~FD_MSR_RQM;
1416 /* Now, we just have to wait for the DMA controller to
1417 * recall us...
1418 */
1419 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1420 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1421 return;
1422 } else {
1423 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1424 }
1425 }
1426 FLOPPY_DPRINTF("start non-DMA format\n");
1427 fdctrl->msr |= FD_MSR_NONDMA;
1428 /* IO based transfer: calculate len */
1429 fdctrl_raise_irq(fdctrl, 0x00);
1430
1431 return;
1432}
1433
1434/* Prepare a transfer of deleted data */
1435static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1436{
1437 RT_NOREF(direction);
1438 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1439
1440 /* We don't handle deleted data,
1441 * so we don't return *ANYTHING*
1442 */
1443 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1444}
1445
1446/* Block driver read/write wrappers. */
1447
1448static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1449{
1450 int rc;
1451
1452 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1453
1454 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1455 buf, nb_sectors * FD_SECTOR_LEN);
1456
1457 drv->Led.Actual.s.fWriting = 0;
1458 if (RT_FAILURE(rc))
1459 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1460
1461 return rc;
1462}
1463
1464static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1465{
1466 int rc;
1467
1468 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1469
1470 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1471 buf, nb_sectors * FD_SECTOR_LEN);
1472
1473 drv->Led.Actual.s.fReading = 0;
1474
1475 if (RT_FAILURE(rc))
1476 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1477
1478 return rc;
1479}
1480
1481/**
1482 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1483 */
1484static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1485 unsigned uChannel, uint32_t off, uint32_t cb)
1486{
1487 RT_NOREF(pDevIns, off);
1488 fdctrl_t *fdctrl;
1489 fdrive_t *cur_drv;
1490 int rc;
1491 uint32_t len = 0;
1492 uint32_t start_pos, rel_pos;
1493 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1494
1495 fdctrl = (fdctrl_t *)pvUser;
1496 if (fdctrl->msr & FD_MSR_RQM) {
1497 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1498 return 0;
1499 }
1500 cur_drv = get_cur_drv(fdctrl);
1501 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1502 fdctrl->data_dir == FD_DIR_SCANH)
1503 status2 = FD_SR2_SNS;
1504 if (cb > fdctrl->data_len)
1505 cb = fdctrl->data_len;
1506 if (cur_drv->pDrvMedia == NULL)
1507 {
1508 if (fdctrl->data_dir == FD_DIR_WRITE)
1509 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1510 else
1511 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1512 Assert(len == 0);
1513 goto transfer_error;
1514 }
1515
1516 if (cur_drv->ro)
1517 {
1518 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1519 {
1520 /* Handle readonly medium early, no need to do DMA, touch the
1521 * LED or attempt any writes. A real floppy doesn't attempt
1522 * to write to readonly media either. */
1523 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1524 0x00);
1525 Assert(len == 0);
1526 goto transfer_error;
1527 }
1528 }
1529
1530 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1531 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1532 len = cb - fdctrl->data_pos;
1533 if (len + rel_pos > FD_SECTOR_LEN)
1534 len = FD_SECTOR_LEN - rel_pos;
1535 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1536 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1537 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1538 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1539 (fdctrl->data_dir != FD_DIR_WRITE ||
1540 len < FD_SECTOR_LEN || rel_pos != 0)) {
1541 /* READ & SCAN commands and realign to a sector for WRITE */
1542 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1543 if (RT_FAILURE(rc))
1544 {
1545 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1546 fd_sector(cur_drv));
1547 /* Sure, image size is too small... */
1548 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1549 }
1550 }
1551 switch (fdctrl->data_dir) {
1552 case FD_DIR_READ:
1553 /* READ commands */
1554 {
1555 uint32_t read;
1556 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1557 fdctrl->fifo + rel_pos,
1558 fdctrl->data_pos,
1559 len, &read);
1560 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1561 }
1562 break;
1563 case FD_DIR_WRITE:
1564 /* WRITE commands */
1565 {
1566 uint32_t written;
1567 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1568 fdctrl->fifo + rel_pos,
1569 fdctrl->data_pos,
1570 len, &written);
1571 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1572 }
1573
1574 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1575 if (RT_FAILURE(rc))
1576 {
1577 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1578 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1579 goto transfer_error;
1580 }
1581 break;
1582 case FD_DIR_FORMAT:
1583 /* FORMAT command */
1584 {
1585 uint8_t eot = fdctrl->fifo[3];
1586 uint8_t filler = fdctrl->fifo[5];
1587 uint32_t written;
1588 int sct;
1589 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1590 fdctrl->fifo + rel_pos,
1591 fdctrl->data_pos,
1592 len, &written);
1593 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1594
1595 /* Fill the entire track with desired data pattern. */
1596 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1597 eot, filler);
1598 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1599 for (sct = 0; sct < eot; ++sct)
1600 {
1601 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1602 if (RT_FAILURE(rc))
1603 {
1604 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1605 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1606 goto transfer_error;
1607 }
1608 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1609 }
1610 }
1611 break;
1612 default:
1613 /* SCAN commands */
1614 {
1615 uint8_t tmpbuf[FD_SECTOR_LEN];
1616 int ret;
1617 uint32_t read;
1618 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1619 fdctrl->data_pos, len, &read);
1620 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1621 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1622 if (ret == 0) {
1623 status2 = FD_SR2_SEH;
1624 goto end_transfer;
1625 }
1626 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1627 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1628 status2 = 0x00;
1629 goto end_transfer;
1630 }
1631 }
1632 break;
1633 }
1634 fdctrl->data_pos += len;
1635 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1636 if (rel_pos == 0) {
1637 /* Seek to next sector */
1638 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1639 break;
1640 }
1641 }
1642end_transfer:
1643 len = fdctrl->data_pos - start_pos;
1644 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1645 fdctrl->data_pos, len, fdctrl->data_len);
1646 if (fdctrl->data_dir == FD_DIR_SCANE ||
1647 fdctrl->data_dir == FD_DIR_SCANL ||
1648 fdctrl->data_dir == FD_DIR_SCANH)
1649 status2 = FD_SR2_SEH;
1650 if (FD_DID_SEEK(fdctrl->data_state))
1651 status0 |= FD_SR0_SEEK;
1652 fdctrl->data_len -= len;
1653 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1654transfer_error:
1655
1656 return len;
1657}
1658
1659/* Data register : 0x05 */
1660static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1661{
1662 fdrive_t *cur_drv;
1663 uint32_t retval = 0;
1664 unsigned pos;
1665 int rc;
1666
1667 cur_drv = get_cur_drv(fdctrl);
1668 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1669 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1670 FLOPPY_ERROR("controller not ready for reading\n");
1671 return 0;
1672 }
1673 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1674 if (fdctrl->msr & FD_MSR_NONDMA) {
1675 if (cur_drv->pDrvMedia == NULL)
1676 {
1677 if (fdctrl->data_dir == FD_DIR_WRITE)
1678 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1679 else
1680 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1681 } else if (pos == 0) {
1682 if (fdctrl->data_pos != 0)
1683 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1684 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1685 fd_sector(cur_drv));
1686 return 0;
1687 }
1688
1689 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1690 if (RT_FAILURE(rc))
1691 {
1692 FLOPPY_DPRINTF("error getting sector %d\n",
1693 fd_sector(cur_drv));
1694 /* Sure, image size is too small... */
1695 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1696 }
1697 }
1698 }
1699 retval = fdctrl->fifo[pos];
1700 if (++fdctrl->data_pos == fdctrl->data_len) {
1701 fdctrl->data_pos = 0;
1702 /* Switch from transfer mode to status mode
1703 * then from status mode to command mode
1704 */
1705 if (fdctrl->msr & FD_MSR_NONDMA) {
1706 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1707 } else {
1708 fdctrl_reset_fifo(fdctrl);
1709 fdctrl_reset_irq(fdctrl);
1710 }
1711 }
1712 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1713
1714 return retval;
1715}
1716
1717static void fdctrl_format_sector(fdctrl_t *fdctrl)
1718{
1719 fdrive_t *cur_drv;
1720 uint8_t kh, kt, ks;
1721 int ok = 0, rc;
1722
1723 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1724 cur_drv = get_cur_drv(fdctrl);
1725 kt = fdctrl->fifo[6];
1726 kh = fdctrl->fifo[7];
1727 ks = fdctrl->fifo[8];
1728 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1729 GET_CUR_DRV(fdctrl), kh, kt, ks,
1730 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1731 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1732 case 2:
1733 /* sect too big */
1734 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1735 fdctrl->fifo[3] = kt;
1736 fdctrl->fifo[4] = kh;
1737 fdctrl->fifo[5] = ks;
1738 return;
1739 case 3:
1740 /* track too big */
1741 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1742 fdctrl->fifo[3] = kt;
1743 fdctrl->fifo[4] = kh;
1744 fdctrl->fifo[5] = ks;
1745 return;
1746 case 4:
1747 /* No seek enabled */
1748 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1749 fdctrl->fifo[3] = kt;
1750 fdctrl->fifo[4] = kh;
1751 fdctrl->fifo[5] = ks;
1752 return;
1753 case 5:
1754 /* No disk in drive */
1755 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1756 fdctrl->fifo[3] = kt;
1757 fdctrl->fifo[4] = kh;
1758 fdctrl->fifo[5] = ks;
1759 return;
1760 case 1:
1761 fdctrl->data_state |= FD_STATE_SEEK;
1762 break;
1763 default:
1764 break;
1765 }
1766 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1767 if (cur_drv->pDrvMedia) {
1768 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1769 if (RT_FAILURE (rc)) {
1770 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1771 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1772 } else {
1773 ok = 1;
1774 }
1775 }
1776 if (ok) {
1777 if (cur_drv->sect == cur_drv->last_sect) {
1778 fdctrl->data_state &= ~FD_STATE_FORMAT;
1779 /* Last sector done */
1780 if (FD_DID_SEEK(fdctrl->data_state))
1781 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1782 else
1783 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1784 } else {
1785 /* More to do */
1786 fdctrl->data_pos = 0;
1787 fdctrl->data_len = 4;
1788 }
1789 }
1790}
1791
1792static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1793{
1794 RT_NOREF(direction);
1795 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1796 fdctrl->fifo[0] = fdctrl->lock << 4;
1797 fdctrl_set_fifo(fdctrl, 1, 0);
1798}
1799
1800static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1801{
1802 RT_NOREF(direction);
1803 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1804
1805 /* Drives position */
1806 fdctrl->fifo[0] = drv0(fdctrl)->track;
1807 fdctrl->fifo[1] = drv1(fdctrl)->track;
1808#if MAX_FD == 4
1809 fdctrl->fifo[2] = drv2(fdctrl)->track;
1810 fdctrl->fifo[3] = drv3(fdctrl)->track;
1811#else
1812 fdctrl->fifo[2] = 0;
1813 fdctrl->fifo[3] = 0;
1814#endif
1815 /* timers */
1816 fdctrl->fifo[4] = fdctrl->timer0;
1817 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1818 fdctrl->fifo[6] = cur_drv->last_sect;
1819 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1820 (cur_drv->perpendicular << 2);
1821 fdctrl->fifo[8] = fdctrl->config;
1822 fdctrl->fifo[9] = fdctrl->precomp_trk;
1823 fdctrl_set_fifo(fdctrl, 10, 0);
1824}
1825
1826static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1827{
1828 RT_NOREF(direction);
1829 /* Controller's version */
1830 fdctrl->fifo[0] = fdctrl->version;
1831 fdctrl_set_fifo(fdctrl, 1, 0);
1832}
1833
1834static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1835{
1836 RT_NOREF(direction);
1837 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1838 fdctrl_set_fifo(fdctrl, 1, 0);
1839}
1840
1841static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1842{
1843 RT_NOREF(direction);
1844 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1845
1846 /* Drives position */
1847 drv0(fdctrl)->track = fdctrl->fifo[3];
1848 drv1(fdctrl)->track = fdctrl->fifo[4];
1849#if MAX_FD == 4
1850 drv2(fdctrl)->track = fdctrl->fifo[5];
1851 drv3(fdctrl)->track = fdctrl->fifo[6];
1852#endif
1853 /* timers */
1854 fdctrl->timer0 = fdctrl->fifo[7];
1855 fdctrl->timer1 = fdctrl->fifo[8];
1856 cur_drv->last_sect = fdctrl->fifo[9];
1857 fdctrl->lock = fdctrl->fifo[10] >> 7;
1858 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1859 fdctrl->config = fdctrl->fifo[11];
1860 fdctrl->precomp_trk = fdctrl->fifo[12];
1861 fdctrl->pwrd = fdctrl->fifo[13];
1862 fdctrl_reset_fifo(fdctrl);
1863}
1864
1865static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1866{
1867 RT_NOREF(direction);
1868 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1869
1870 fdctrl->fifo[0] = 0;
1871 fdctrl->fifo[1] = 0;
1872 /* Drives position */
1873 fdctrl->fifo[2] = drv0(fdctrl)->track;
1874 fdctrl->fifo[3] = drv1(fdctrl)->track;
1875#if MAX_FD == 4
1876 fdctrl->fifo[4] = drv2(fdctrl)->track;
1877 fdctrl->fifo[5] = drv3(fdctrl)->track;
1878#else
1879 fdctrl->fifo[4] = 0;
1880 fdctrl->fifo[5] = 0;
1881#endif
1882 /* timers */
1883 fdctrl->fifo[6] = fdctrl->timer0;
1884 fdctrl->fifo[7] = fdctrl->timer1;
1885 fdctrl->fifo[8] = cur_drv->last_sect;
1886 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1887 (cur_drv->perpendicular << 2);
1888 fdctrl->fifo[10] = fdctrl->config;
1889 fdctrl->fifo[11] = fdctrl->precomp_trk;
1890 fdctrl->fifo[12] = fdctrl->pwrd;
1891 fdctrl->fifo[13] = 0;
1892 fdctrl->fifo[14] = 0;
1893 fdctrl_set_fifo(fdctrl, 15, 0);
1894}
1895
1896static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1897{
1898 RT_NOREF(direction);
1899 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1900
1901 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1902
1903 fdctrl->msr &= ~FD_MSR_RQM;
1904 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1905 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1906}
1907
1908static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1909{
1910 RT_NOREF(direction);
1911 fdrive_t *cur_drv;
1912 uint8_t ns, dp;
1913
1914 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1915 cur_drv = get_cur_drv(fdctrl);
1916 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1917 ns = fdctrl->fifo[3];
1918 dp = fdctrl->fifo[5];
1919
1920 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1921 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1922 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1923 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1924 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1925
1926 /* Since we cannot actually format anything, we have to make sure that
1927 * whatever new format the guest is trying to establish matches the
1928 * existing format of the medium.
1929 */
1930 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1931 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1932 else
1933 {
1934 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1935 cur_drv->last_sect = ns;
1936
1937 fdctrl_start_format(fdctrl);
1938 }
1939}
1940
1941static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1942{
1943 RT_NOREF(direction);
1944 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1945 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1946 if (fdctrl->fifo[2] & 1)
1947 fdctrl->dor &= ~FD_DOR_DMAEN;
1948 else
1949 fdctrl->dor |= FD_DOR_DMAEN;
1950 /* No result back */
1951 fdctrl_reset_fifo(fdctrl);
1952}
1953
1954static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1955{
1956 RT_NOREF(direction);
1957 fdrive_t *cur_drv;
1958
1959 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1960 cur_drv = get_cur_drv(fdctrl);
1961 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1962 /* 1 Byte status back */
1963 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1964 (cur_drv->track == 0 ? 0x10 : 0x00) |
1965 (cur_drv->head << 2) |
1966 GET_CUR_DRV(fdctrl) |
1967 0x28;
1968 fdctrl_set_fifo(fdctrl, 1, 0);
1969}
1970
1971static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1972{
1973 RT_NOREF(direction);
1974 fdrive_t *cur_drv;
1975 uint8_t st0;
1976
1977 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1978 cur_drv = get_cur_drv(fdctrl);
1979 fd_recalibrate(cur_drv);
1980 fdctrl_reset_fifo(fdctrl);
1981 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1982 /* No drive means no TRK0 signal. */
1983 if (cur_drv->drive == FDRIVE_DRV_NONE)
1984 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1985 /* Raise Interrupt */
1986 fdctrl_raise_irq(fdctrl, st0);
1987}
1988
1989static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1990{
1991 RT_NOREF(direction);
1992 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1993
1994 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1995 if(fdctrl->reset_sensei > 0) {
1996 fdctrl->fifo[0] =
1997 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1998 fdctrl->reset_sensei--;
1999 } else {
2000 /* XXX: status0 handling is broken for read/write
2001 commands, so we do this hack. It should be suppressed
2002 ASAP */
2003 fdctrl->fifo[0] =
2004 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2005 /* Hack to preserve SR0 on equipment check failures (no drive). */
2006 if (fdctrl->status0 & FD_SR0_EQPMT)
2007 fdctrl->fifo[0] = fdctrl->status0;
2008 }
2009
2010 fdctrl->fifo[1] = cur_drv->track;
2011 fdctrl_set_fifo(fdctrl, 2, 0);
2012 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
2013 fdctrl->status0 = FD_SR0_RDYCHG;
2014}
2015
2016static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
2017{
2018 RT_NOREF(direction);
2019 fdrive_t *cur_drv;
2020
2021 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
2022 fdctrl->fifo[1], fdctrl->fifo[2]);
2023
2024 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2025 cur_drv = get_cur_drv(fdctrl);
2026 fdctrl_reset_fifo(fdctrl);
2027
2028 /* The seek command just sends step pulses to the drive and doesn't care if
2029 * there's a medium inserted or if it's banging the head against the drive.
2030 */
2031 cur_drv->track = fdctrl->fifo[2];
2032 cur_drv->ltrk = cur_drv->track;
2033 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2034 /* Raise Interrupt */
2035 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
2036}
2037
2038static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2039{
2040 RT_NOREF(direction);
2041 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2042
2043 if (fdctrl->fifo[1] & 0x80)
2044 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2045 /* No result back */
2046 fdctrl_reset_fifo(fdctrl);
2047}
2048
2049static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2050{
2051 RT_NOREF(direction);
2052 fdctrl->config = fdctrl->fifo[2];
2053 fdctrl->precomp_trk = fdctrl->fifo[3];
2054 /* No result back */
2055 fdctrl_reset_fifo(fdctrl);
2056}
2057
2058static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2059{
2060 RT_NOREF(direction);
2061 fdctrl->pwrd = fdctrl->fifo[1];
2062 fdctrl->fifo[0] = fdctrl->fifo[1];
2063 fdctrl_set_fifo(fdctrl, 1, 0);
2064}
2065
2066static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2067{
2068 RT_NOREF(direction);
2069 /* No result back */
2070 fdctrl_reset_fifo(fdctrl);
2071}
2072
2073static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2074{
2075 RT_NOREF(direction);
2076 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2077
2078 /* This command takes a variable number of parameters. It can be terminated
2079 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2080 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2081 */
2082 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2083
2084 /* Command parameters done */
2085 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2086 /* Data is echoed, but not stored! */
2087 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2088 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2089 fdctrl->fifo[2] = 0;
2090 fdctrl->fifo[3] = 0;
2091 fdctrl_set_fifo(fdctrl, 4, 0);
2092 } else {
2093 fdctrl_reset_fifo(fdctrl);
2094 }
2095 } else
2096 fdctrl->data_len++; /* Wait for another byte. */
2097}
2098
2099static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2100{
2101 RT_NOREF(direction);
2102 fdrive_t *cur_drv;
2103
2104 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2105 cur_drv = get_cur_drv(fdctrl);
2106 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2107 cur_drv->track = cur_drv->max_track - 1;
2108 } else {
2109 cur_drv->track += fdctrl->fifo[2];
2110 }
2111 fdctrl_reset_fifo(fdctrl);
2112 /* Raise Interrupt */
2113 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2114}
2115
2116static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2117{
2118 RT_NOREF(direction);
2119 fdrive_t *cur_drv;
2120
2121 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2122 cur_drv = get_cur_drv(fdctrl);
2123 if (fdctrl->fifo[2] > cur_drv->track) {
2124 cur_drv->track = 0;
2125 } else {
2126 cur_drv->track -= fdctrl->fifo[2];
2127 }
2128 fdctrl_reset_fifo(fdctrl);
2129 /* Raise Interrupt */
2130 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2131}
2132
2133static const struct {
2134 uint8_t value;
2135 uint8_t mask;
2136 const char* name;
2137 int parameters;
2138 void (*handler)(fdctrl_t *fdctrl, int direction);
2139 int direction;
2140} handlers[] = {
2141 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2142 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2143 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2144 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2145 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2146 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2147 { FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2148 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2149 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2150 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2151 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2152 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2153 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2154 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2155 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2156 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2157 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2158 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2159 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2160 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2161 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2162 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2163 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2164 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2165 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2166 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2167 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2168 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2169 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2170 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2171 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2172 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2173};
2174/* Associate command to an index in the 'handlers' array */
2175static uint8_t command_to_handler[256];
2176
2177static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2178{
2179 fdrive_t *cur_drv;
2180 int pos;
2181
2182 cur_drv = get_cur_drv(fdctrl);
2183 /* Reset mode */
2184 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2185 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2186 return;
2187 }
2188 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2189 FLOPPY_ERROR("controller not ready for writing\n");
2190 return;
2191 }
2192 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2193 /* Is it write command time ? */
2194 if (fdctrl->msr & FD_MSR_NONDMA) {
2195 /* FIFO data write */
2196 pos = fdctrl->data_pos++;
2197 pos %= FD_SECTOR_LEN;
2198 fdctrl->fifo[pos] = value;
2199
2200 if (cur_drv->pDrvMedia == NULL)
2201 {
2202 if (fdctrl->data_dir == FD_DIR_WRITE)
2203 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2204 else
2205 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2206 } else if (pos == FD_SECTOR_LEN - 1 ||
2207 fdctrl->data_pos == fdctrl->data_len) {
2208 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2209 }
2210 /* Switch from transfer mode to status mode
2211 * then from status mode to command mode
2212 */
2213 if (fdctrl->data_pos == fdctrl->data_len)
2214 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2215 return;
2216 }
2217 if (fdctrl->data_pos == 0) {
2218 /* Command */
2219 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2220 pos = command_to_handler[value & 0xff];
2221 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2222 fdctrl->data_len = handlers[pos].parameters + 1;
2223 fdctrl->msr |= FD_MSR_CMDBUSY;
2224 fdctrl->cur_cmd = value & 0xff;
2225 }
2226
2227 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2228 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2229 if (fdctrl->data_pos == fdctrl->data_len) {
2230 /* We now have all parameters
2231 * and will be able to treat the command
2232 */
2233 if (fdctrl->data_state & FD_STATE_FORMAT) {
2234 fdctrl_format_sector(fdctrl);
2235 return;
2236 }
2237
2238 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2239 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2240 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2241 }
2242}
2243
2244
2245/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2246
2247/**
2248 * @callback_method_impl{FNTMTIMERDEV}
2249 */
2250static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2251{
2252 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2253 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2254 RT_NOREF(hTimer, pvUser);
2255
2256 /* Pretend we are spinning.
2257 * This is needed for Coherent, which uses READ ID to check for
2258 * sector interleaving.
2259 */
2260 if (cur_drv->last_sect != 0) {
2261 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2262 }
2263 /* READ_ID can't automatically succeed! */
2264 if (!cur_drv->max_track) {
2265 FLOPPY_DPRINTF("read id when no disk in drive\n");
2266 /// @todo This is wrong! Command should not complete.
2267 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2268 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2269 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2270 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2271 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2272 } else if (cur_drv->track >= cur_drv->max_track) {
2273 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2274 cur_drv->track, cur_drv->max_track);
2275 cur_drv->ltrk = 0;
2276 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2277 }
2278 else
2279 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2280}
2281
2282
2283/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2284
2285/**
2286 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2287 */
2288static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2289{
2290 RT_NOREF(pvUser);
2291
2292 if (cb == 1)
2293 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2294 else
2295 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2296 return VINF_SUCCESS;
2297}
2298
2299
2300/**
2301 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2302 */
2303static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2304{
2305 RT_NOREF(pvUser);
2306
2307 if (cb == 1)
2308 {
2309 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2310 return VINF_SUCCESS;
2311 }
2312 return VERR_IOM_IOPORT_UNUSED;
2313}
2314
2315
2316/**
2317 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2318 */
2319static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2320{
2321 RT_NOREF(pvUser);
2322
2323 if (cb == 1)
2324 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2325 else
2326 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2327 return VINF_SUCCESS;
2328}
2329
2330
2331/**
2332 * @callback_method_impl{FNTMTIMERDEV}
2333 */
2334static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2335{
2336 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2337 RT_NOREF(pvUser, hTimer);
2338 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2339}
2340
2341
2342/**
2343 * @callback_method_impl{FNTMTIMERDEV}
2344 */
2345static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2346{
2347 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2348 RT_NOREF(pvUser, hTimer);
2349 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2350}
2351
2352
2353
2354/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2355/**
2356 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2357 */
2358static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2359{
2360 RT_NOREF(pvUser);
2361
2362 if (cb == 1)
2363 {
2364 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2365 return VINF_SUCCESS;
2366 }
2367 return VERR_IOM_IOPORT_UNUSED;
2368}
2369
2370
2371/**
2372 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2373 */
2374static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2375{
2376 RT_NOREF(offPort, pvUser);
2377 Assert(offPort == 0);
2378
2379 if (cb == 1)
2380 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2381 else
2382 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2383 return VINF_SUCCESS;
2384}
2385
2386
2387/**
2388 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2389 */
2390static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2391{
2392 RT_NOREF(pvUser, offPort);
2393 Assert(offPort == 0);
2394
2395 if (cb == 1)
2396 {
2397 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2398 return VINF_SUCCESS;
2399 }
2400 return VERR_IOM_IOPORT_UNUSED;
2401}
2402
2403
2404/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2405
2406/**
2407 * FDC debugger info callback.
2408 *
2409 * @param pDevIns The device instance.
2410 * @param pHlp The output helpers.
2411 * @param pszArgs The arguments.
2412 */
2413static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2414{
2415 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2416 unsigned i;
2417 bool fVerbose = false;
2418
2419 /* Parse arguments. */
2420 if (pszArgs)
2421 fVerbose = strstr(pszArgs, "verbose") != NULL;
2422
2423 /* Show basic information. */
2424 pHlp->pfnPrintf(pHlp, "%s#%d: ",
2425 pDevIns->pReg->szName,
2426 pDevIns->iInstance);
2427 pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2428 pThis->io_base,
2429 pThis->irq_lvl,
2430 pThis->dma_chann);
2431 pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2432
2433 /* Print register contents. */
2434 pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2435 pThis->msr, pThis->dsr, pThis->dor);
2436 pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2437 fdctrl_read_dir(pThis));
2438
2439 /* Print the current command, if any. */
2440 if (pThis->cur_cmd)
2441 pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2442 pThis->cur_cmd,
2443 handlers[command_to_handler[pThis->cur_cmd]].name);
2444 if (pThis->prev_cmd)
2445 pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2446 pThis->prev_cmd,
2447 handlers[command_to_handler[pThis->prev_cmd]].name);
2448
2449
2450 for (i = 0; i < pThis->num_floppies; ++i)
2451 {
2452 fdrive_t *drv = &pThis->drives[i];
2453 pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2454 pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2455 drv->max_track,
2456 drv->last_sect);
2457 pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2458 drv->track,
2459 drv->head,
2460 drv->sect);
2461 }
2462}
2463
2464
2465/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2466
2467/**
2468 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2469 */
2470static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2471{
2472 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2473 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2474 unsigned int i;
2475 int rc;
2476
2477 /* Save the FDC I/O registers... */
2478 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2479 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2480 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2481 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2482 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2483 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2484 /* ...the status registers... */
2485 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2486 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2487 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2488 /* ...the command FIFO... */
2489 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2490 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2491 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2492 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2493 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2494 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2495 /* ...and miscellaneous internal FDC state. */
2496 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2497 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2498 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2499 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2500 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2501 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2502 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2503 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2504 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2505
2506 /* Save the number of drives and per-drive state. Note that the media
2507 * states will be updated in fd_revalidate() and need not be saved.
2508 */
2509 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2510 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2511 for (i = 0; i < pThis->num_floppies; ++i)
2512 {
2513 fdrive_t *d = &pThis->drives[i];
2514
2515 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2516 pHlp->pfnSSMPutU32(pSSM, d->drive);
2517 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2518 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2519 pHlp->pfnSSMPutU8(pSSM, d->head);
2520 pHlp->pfnSSMPutU8(pSSM, d->track);
2521 pHlp->pfnSSMPutU8(pSSM, d->sect);
2522 }
2523 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2524 AssertRCReturn(rc, rc);
2525 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2526 AssertRCReturn(rc, rc);
2527 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2528}
2529
2530
2531/**
2532 * @callback_method_impl{FNSSMDEVLOADEXEC}
2533 */
2534static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2535{
2536 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2537 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2538 unsigned int i;
2539 uint32_t val32;
2540 uint8_t val8;
2541 int rc;
2542
2543 if (uVersion > FDC_SAVESTATE_CURRENT)
2544 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2545 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2546
2547 if (uVersion > FDC_SAVESTATE_OLD)
2548 {
2549 /* Load the FDC I/O registers... */
2550 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2551 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2552 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2553 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2554 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2555 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2556 /* ...the status registers... */
2557 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2558 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2559 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2560 /* ...the command FIFO, if the size matches... */
2561 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2562 AssertRCReturn(rc, rc);
2563 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2564 ("The size of FIFO in saved state doesn't match!\n"),
2565 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2566 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2567 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2568 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2569 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2570 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2571 /* ...and miscellaneous internal FDC state. */
2572 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2573 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2574 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2575 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2576 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2577 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2578 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2579 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2580 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2581
2582 /* Validate the number of drives. */
2583 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2584 AssertRCReturn(rc, rc);
2585 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2586 ("The number of drives in saved state doesn't match!\n"),
2587 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2588
2589 /* Load the per-drive state. */
2590 for (i = 0; i < pThis->num_floppies; ++i)
2591 {
2592 fdrive_t *d = &pThis->drives[i];
2593
2594 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2595 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2596 AssertRCReturn(rc, rc);
2597 d->drive = (fdrive_type_t)val32;
2598 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2599 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2600 pHlp->pfnSSMGetU8(pSSM, &d->head);
2601 pHlp->pfnSSMGetU8(pSSM, &d->track);
2602 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2603 }
2604
2605 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2606 {
2607 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2608 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2609 }
2610 }
2611 else if (uVersion == FDC_SAVESTATE_OLD)
2612 {
2613 /* The old saved state was significantly different. However, we can get
2614 * back most of the controller state and fix the rest by pretending the
2615 * disk in the drive (if any) has been replaced. At any rate there should
2616 * be no difficulty unless the state was saved during a floppy operation.
2617 */
2618
2619 /* First verify a few assumptions. */
2620 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2621 ("The size of FIFO in saved state doesn't match!\n"),
2622 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2623 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2624 ("The number of drives in old saved state doesn't match!\n"),
2625 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2626 /* Now load the old state. */
2627 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2628 /* Toss IRQ level, DMA channel, I/O base, and state. */
2629 pHlp->pfnSSMGetU8(pSSM, &val8);
2630 pHlp->pfnSSMGetU8(pSSM, &val8);
2631 pHlp->pfnSSMGetU32(pSSM, &val32);
2632 pHlp->pfnSSMGetU8(pSSM, &val8);
2633 /* Translate dma_en. */
2634 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2635 AssertRCReturn(rc, rc);
2636 if (val8)
2637 pThis->dor |= FD_DOR_DMAEN;
2638 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2639 /* Translate bootsel. */
2640 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2641 AssertRCReturn(rc, rc);
2642 pThis->tdr |= val8 << 2;
2643 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2644 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2645 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2646 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2647 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2648 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2649 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2650 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2651 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2652 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2653 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2654 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2655 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2656
2657 for (i = 0; i < 2; ++i)
2658 {
2659 fdrive_t *d = &pThis->drives[i];
2660
2661 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2662 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2663 d->drive = (fdrive_type_t)val32;
2664 AssertRCReturn(rc, rc);
2665 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2666 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2667 pHlp->pfnSSMGetU8(pSSM, &d->head);
2668 pHlp->pfnSSMGetU8(pSSM, &d->track);
2669 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2670 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2671 pHlp->pfnSSMGetU8(pSSM, &val8);
2672 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2673 AssertRCReturn(rc, rc);
2674 d->flags = (fdrive_flags_t)val32;
2675 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2676 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2677 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2678 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2679 }
2680 }
2681 else
2682 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2683 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2684}
2685
2686
2687/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2688
2689/**
2690 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2691 */
2692static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2693{
2694 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2695 LogFlow(("fdMountNotify:\n"));
2696 fd_revalidate(pDrv);
2697}
2698
2699
2700/**
2701 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2702 */
2703static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2704{
2705 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2706 LogFlow(("fdUnmountNotify:\n"));
2707 fd_revalidate(pDrv);
2708}
2709
2710
2711/**
2712 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2713 */
2714static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2715{
2716 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2717
2718 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2719 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2720 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2721 return NULL;
2722}
2723
2724
2725/**
2726 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2727 */
2728static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2729 uint32_t *piInstance, uint32_t *piLUN)
2730{
2731 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2732 PPDMDEVINS pDevIns = pDrv->pDevIns;
2733
2734 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2735 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2736 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2737
2738 *ppcszController = pDevIns->pReg->szName;
2739 *piInstance = pDevIns->iInstance;
2740 *piLUN = pDrv->iLUN;
2741
2742 return VINF_SUCCESS;
2743}
2744
2745/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2746
2747/**
2748 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2749 */
2750static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2751{
2752 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2753 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2754 *ppLed = &pThis->drives[iLUN].Led;
2755 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2756 return VINF_SUCCESS;
2757 }
2758 return VERR_PDM_LUN_NOT_FOUND;
2759}
2760
2761
2762/**
2763 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2764 */
2765static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2766{
2767 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2768
2769 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2770 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2771 return NULL;
2772}
2773
2774
2775/**
2776 * Configure a drive.
2777 *
2778 * @returns VBox status code.
2779 * @param drv The drive in question.
2780 * @param pDevIns The driver instance.
2781 * @param fInit Set if we're at init time and can change the drive type.
2782 */
2783static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2784{
2785 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2786 int rc;
2787
2788 /*
2789 * Reset the LED just to be on the safe side.
2790 */
2791 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2792 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2793 drv->Led.Actual.u32 = 0;
2794 drv->Led.Asserted.u32 = 0;
2795
2796 /*
2797 * Try attach the block device and get the interfaces.
2798 */
2799 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2800 if (RT_SUCCESS (rc)) {
2801 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2802 if (drv->pDrvMedia) {
2803 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2804 if (drv->pDrvMount) {
2805 fd_init(drv, fInit);
2806 } else {
2807 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2808 rc = VERR_PDM_MISSING_INTERFACE;
2809 }
2810
2811 } else {
2812 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2813 rc = VERR_PDM_MISSING_INTERFACE;
2814 }
2815 } else {
2816 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2817 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2818 switch (rc) {
2819 case VERR_ACCESS_DENIED:
2820 /* Error already cached by DrvHostBase */
2821 break;
2822 case VERR_PDM_NO_ATTACHED_DRIVER:
2823 /* Legal on architectures without a floppy controller */
2824 break;
2825 default:
2826 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2827 N_ ("The floppy controller cannot attach to the floppy drive"));
2828 break;
2829 }
2830 }
2831
2832 if (RT_FAILURE (rc)) {
2833 drv->pDrvBase = NULL;
2834 drv->pDrvMedia = NULL;
2835 drv->pDrvMount = NULL;
2836 }
2837 LogFlow (("fdConfig: returns %Rrc\n", rc));
2838 return rc;
2839}
2840
2841
2842/**
2843 * @interface_method_impl{PDMDEVREG,pfnAttach}
2844 *
2845 * This is called when we change block driver for a floppy drive.
2846 */
2847static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2848{
2849 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2850 fdrive_t *drv;
2851 int rc;
2852 LogFlow (("fdcAttach: iLUN=%u\n", iLUN));
2853
2854 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2855 ("The FDC device does not support hotplugging\n"),
2856 VERR_INVALID_PARAMETER);
2857
2858 /*
2859 * Validate.
2860 */
2861 if (iLUN >= 2) {
2862 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2863 iLUN));
2864 return VERR_PDM_DEVINS_NO_ATTACH;
2865 }
2866
2867 /*
2868 * Locate the drive and stuff.
2869 */
2870 drv = &fdctrl->drives[iLUN];
2871
2872 /* the usual paranoia */
2873 AssertRelease (!drv->pDrvBase);
2874 AssertRelease (!drv->pDrvMedia);
2875 AssertRelease (!drv->pDrvMount);
2876
2877 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2878 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2879 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2880 if (RT_SUCCESS(rc)) {
2881 fd_revalidate (drv);
2882 }
2883
2884 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2885 return rc;
2886}
2887
2888
2889/**
2890 * @interface_method_impl{PDMDEVREG,pfnDetach}
2891 *
2892 * The floppy drive has been temporarily 'unplugged'.
2893 */
2894static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2895{
2896 RT_NOREF(fFlags);
2897 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2898 LogFlow (("fdcDetach: iLUN=%u\n", iLUN));
2899
2900 switch (iLUN)
2901 {
2902 case 0:
2903 case 1:
2904 {
2905 fdrive_t *drv = &pThis->drives[iLUN];
2906 drv->pDrvBase = NULL;
2907 drv->pDrvMedia = NULL;
2908 drv->pDrvMount = NULL;
2909 break;
2910 }
2911
2912 default:
2913 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2914 break;
2915 }
2916}
2917
2918
2919/**
2920 * @interface_method_impl{PDMDEVREG,pfnReset}
2921 *
2922 * I haven't check the specs on what's supposed to happen on reset, but we
2923 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2924 * at wrong time like we do if this was all void.
2925 */
2926static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2927{
2928 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2929 unsigned i;
2930 LogFlow (("fdcReset:\n"));
2931
2932 fdctrl_reset(pThis, 0);
2933
2934 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2935 fd_revalidate(&pThis->drives[i]);
2936}
2937
2938
2939/**
2940 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2941 */
2942static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2943{
2944 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2945 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2946 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2947 int rc;
2948
2949 RT_NOREF(iInstance);
2950 Assert(iInstance == 0);
2951
2952 /*
2953 * Validate configuration.
2954 */
2955 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2956
2957 /*
2958 * Read the configuration.
2959 */
2960 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2961 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2962
2963 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2964 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2965
2966 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2967 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2968
2969 bool fMemMapped;
2970 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2971 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2972
2973 uint16_t uIrqDelay;
2974 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2975 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2976
2977 bool fStatusA;
2978 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2979 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2980
2981 /*
2982 * Initialize data.
2983 */
2984 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2985 pThis->pDevIns = pDevIns;
2986 pThis->version = 0x90; /* Intel 82078 controller */
2987 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2988 pThis->num_floppies = MAX_FD;
2989 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2990 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2991 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2992
2993 /* Fill 'command_to_handler' lookup table */
2994 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2995 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2996 if ((j & handlers[ii].mask) == handlers[ii].value)
2997 command_to_handler[j] = ii;
2998
2999 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
3000 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
3001
3002 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
3003 {
3004 fdrive_t *pDrv = &pThis->drives[i];
3005
3006 pDrv->drive = FDRIVE_DRV_NONE;
3007 pDrv->iLUN = i;
3008 pDrv->pDevIns = pDevIns;
3009
3010 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
3011 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
3012 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
3013 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
3014 pDrv->Led.u32Magic = PDMLED_MAGIC;
3015 }
3016
3017 /*
3018 * Create the FDC timer.
3019 */
3020 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
3021 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3022 "FDC Timer", &pThis->hResultTimer);
3023 AssertRCReturn(rc, rc);
3024
3025 /*
3026 * Create the transfer delay timer.
3027 */
3028 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3029 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3030 "FDC Transfer Delay", &pThis->hXferDelayTimer);
3031 AssertRCReturn(rc, rc);
3032
3033 /*
3034 * Create the IRQ delay timer.
3035 */
3036 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3037 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3038 "FDC IRQ Delay", &pThis->hIrqDelayTimer);
3039 AssertRCReturn(rc, rc);
3040
3041 pThis->uIrqDelayMsec = uIrqDelay;
3042
3043 /*
3044 * Register DMA channel.
3045 */
3046 if (pThis->dma_chann != 0xff)
3047 {
3048 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3049 AssertRCReturn(rc, rc);
3050 }
3051
3052 /*
3053 * IO / MMIO.
3054 *
3055 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3056 * Why we skip registering status register A, though, isn't as clear.
3057 */
3058 if (!fMemMapped)
3059 {
3060 static const IOMIOPORTDESC s_aDescs[] =
3061 {
3062 { "SRA", NULL, "Status register A", NULL },
3063 { "SRB", NULL, "Status register B", NULL },
3064 { "DOR", "DOR", "Digital output register", "Digital output register"},
3065 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
3066 { "MSR", "DSR", "Main status register", "Datarate select register" },
3067 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3068 { "ATA", "ATA", NULL, NULL },
3069 { "DIR", "CCR", "Digital input register", "Configuration control register"},
3070 { NULL, NULL, NULL, NULL }
3071 };
3072
3073 /* 0x3f0 */
3074 if (fStatusA)
3075 {
3076 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
3077 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3078 AssertRCReturn(rc, rc);
3079 }
3080
3081 /* 0x3f1..0x3f5 */
3082 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3083 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3084 AssertRCReturn(rc, rc);
3085
3086 /* 0x3f7 */
3087 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3088 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3089 AssertRCReturn(rc, rc);
3090 }
3091 else
3092 AssertMsgFailedReturn(("Memory mapped floppy not supported\n"), VERR_NOT_SUPPORTED);
3093
3094 /*
3095 * Register the saved state data unit.
3096 */
3097 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3098 AssertRCReturn(rc, rc);
3099
3100 /*
3101 * Register the debugger info callback.
3102 */
3103 PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3104
3105 /*
3106 * Attach the status port (optional).
3107 */
3108 PPDMIBASE pBase;
3109 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3110 if (RT_SUCCESS (rc))
3111 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3112 else
3113 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3114
3115 /*
3116 * Initialize drives.
3117 */
3118 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3119 {
3120 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3121 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3122 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3123 rc);
3124 }
3125
3126 fdctrl_reset(pThis, 0);
3127
3128 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3129 fd_revalidate(&pThis->drives[i]);
3130
3131 return VINF_SUCCESS;
3132}
3133
3134
3135/**
3136 * The device registration structure.
3137 */
3138const PDMDEVREG g_DeviceFloppyController =
3139{
3140 /* .u32Version = */ PDM_DEVREG_VERSION,
3141 /* .uReserved0 = */ 0,
3142 /* .szName = */ "i82078",
3143 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3144 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3145 /* .cMaxInstances = */ 1,
3146 /* .uSharedVersion = */ 42,
3147 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3148 /* .cbInstanceCC = */ 0,
3149 /* .cbInstanceRC = */ 0,
3150 /* .cMaxPciDevices = */ 0,
3151 /* .cMaxMsixVectors = */ 0,
3152 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3153#if defined(IN_RING3)
3154 /* .pszRCMod = */ "",
3155 /* .pszR0Mod = */ "",
3156 /* .pfnConstruct = */ fdcConstruct,
3157 /* .pfnDestruct = */ NULL,
3158 /* .pfnRelocate = */ NULL,
3159 /* .pfnMemSetup = */ NULL,
3160 /* .pfnPowerOn = */ NULL,
3161 /* .pfnReset = */ fdcReset,
3162 /* .pfnSuspend = */ NULL,
3163 /* .pfnResume = */ NULL,
3164 /* .pfnAttach = */ fdcAttach,
3165 /* .pfnDetach = */ fdcDetach,
3166 /* .pfnQueryInterface = */ NULL,
3167 /* .pfnInitComplete = */ NULL,
3168 /* .pfnPowerOff = */ NULL,
3169 /* .pfnSoftReset = */ NULL,
3170 /* .pfnReserved0 = */ NULL,
3171 /* .pfnReserved1 = */ NULL,
3172 /* .pfnReserved2 = */ NULL,
3173 /* .pfnReserved3 = */ NULL,
3174 /* .pfnReserved4 = */ NULL,
3175 /* .pfnReserved5 = */ NULL,
3176 /* .pfnReserved6 = */ NULL,
3177 /* .pfnReserved7 = */ NULL,
3178#elif defined(IN_RING0)
3179 /* .pfnEarlyConstruct = */ NULL,
3180 /* .pfnConstruct = */ NULL,
3181 /* .pfnDestruct = */ NULL,
3182 /* .pfnFinalDestruct = */ NULL,
3183 /* .pfnRequest = */ NULL,
3184 /* .pfnReserved0 = */ NULL,
3185 /* .pfnReserved1 = */ NULL,
3186 /* .pfnReserved2 = */ NULL,
3187 /* .pfnReserved3 = */ NULL,
3188 /* .pfnReserved4 = */ NULL,
3189 /* .pfnReserved5 = */ NULL,
3190 /* .pfnReserved6 = */ NULL,
3191 /* .pfnReserved7 = */ NULL,
3192#elif defined(IN_RC)
3193 /* .pfnConstruct = */ NULL,
3194 /* .pfnReserved0 = */ NULL,
3195 /* .pfnReserved1 = */ NULL,
3196 /* .pfnReserved2 = */ NULL,
3197 /* .pfnReserved3 = */ NULL,
3198 /* .pfnReserved4 = */ NULL,
3199 /* .pfnReserved5 = */ NULL,
3200 /* .pfnReserved6 = */ NULL,
3201 /* .pfnReserved7 = */ NULL,
3202#else
3203# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3204#endif
3205 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3206};
3207
3208/*
3209 * Local Variables:
3210 * mode: c
3211 * c-file-style: "k&r"
3212 * indent-tabs-mode: nil
3213 * End:
3214 */
3215
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use