VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 102258

Last change on this file since 102258 was 102258, checked in by vboxsync, 6 months ago

DevFdc.cpp: Comment update.
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1/* $Id: DevFdc.cpp 102258 2023-11-22 14:05:19Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 * --------------------------------------------------------------------
27 *
28 * This code is based on:
29 *
30 * QEMU Floppy disk emulator (Intel 82078)
31 *
32 * Copyright (c) 2003 Jocelyn Mayer
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a copy
35 * of this software and associated documentation files (the "Software"), to deal
36 * in the Software without restriction, including without limitation the rights
37 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38 * copies of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included in
42 * all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50 * THE SOFTWARE.
51 *
52 */
53
54
55/*********************************************************************************************************************************
56* Header Files *
57*********************************************************************************************************************************/
58#define LOG_GROUP LOG_GROUP_DEV_FDC
59#include <VBox/vmm/pdmdev.h>
60#include <VBox/vmm/pdmstorageifs.h>
61#include <VBox/AssertGuest.h>
62#include <iprt/assert.h>
63#include <iprt/string.h>
64#include <iprt/uuid.h>
65
66#include "VBoxDD.h"
67
68
69/*********************************************************************************************************************************
70* Defined Constants And Macros *
71*********************************************************************************************************************************/
72/** @name FDC saved state versions
73 * @{ */
74#define FDC_SAVESTATE_CURRENT 3 /**< Current version. */
75#define FDC_SAVESTATE_PRE_DELAY 2 /**< Pre IRQDelay. */
76#define FDC_SAVESTATE_OLD 1 /**< The original saved state. */
77/** @}*/
78
79#define MAX_FD 2
80
81
82/********************************************************/
83/* debug Floppy devices */
84/* #define DEBUG_FLOPPY */
85
86#ifdef LOG_ENABLED
87# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
88#else
89# define FLOPPY_DPRINTF(...) do { } while (0)
90#endif
91
92#define FLOPPY_ERROR RTLogPrintf
93
94typedef struct fdctrl_t fdctrl_t;
95
96/********************************************************/
97/* Floppy drive emulation */
98
99/* Drive selection note:
100 * For many commands, the FDC can select one of four drives through the
101 * second command byte. The Digital Output Register (DOR) can also select
102 * one of four drives. On PCs, the FDC drive selection is ignored, but
103 * should be reflected back in command status. Only the DOR drive selection
104 * is effective; on old PCs with a discrete NEC uPD765 or similar, the FDC
105 * drive selection signals (US0/US1) are not connected at all.
106 * NB: A drive is actually selected only when its motor on bit in the DOR
107 * is also set. It is possible to have no drive selected.
108 *
109 * The FDC cur_drv field tracks the drive the FDC thinks is selected, but
110 * the DOR is used for actual drive selection.
111 */
112
113#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
114#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
115
116/* Will always be a fixed parameter for us */
117#define FD_SECTOR_LEN 512
118#define FD_SECTOR_SC 2 /* Sector size code */
119#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
120
121/* Floppy disk drive emulation */
122typedef enum fdrive_type_t {
123 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
124 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
125 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
126 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
127 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
128 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
129} fdrive_type_t;
130
131typedef uint8_t fdrive_flags_t;
132#define FDISK_DBL_SIDES UINT8_C(0x01)
133
134typedef enum fdrive_rate_t {
135 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
136 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
137 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
138 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
139} fdrive_rate_t;
140
141/**
142 * The status for one drive.
143 *
144 * @implements PDMIBASE
145 * @implements PDMIMEDIAPORT
146 * @implements PDMIMOUNTNOTIFY
147 */
148typedef struct fdrive_t {
149 /** Pointer to the owning device instance. */
150 R3PTRTYPE(PPDMDEVINS) pDevIns;
151 /** Pointer to the attached driver's base interface. */
152 R3PTRTYPE(PPDMIBASE) pDrvBase;
153 /** Pointer to the attached driver's block interface. */
154 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
155 /** Pointer to the attached driver's mount interface.
156 * This is NULL if the driver isn't a removable unit. */
157 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
158 /** The base interface. */
159 PDMIBASE IBase;
160 /** The block port interface. */
161 PDMIMEDIAPORT IPort;
162 /** The mount notify interface. */
163 PDMIMOUNTNOTIFY IMountNotify;
164 /** The LUN #. */
165 RTUINT iLUN;
166 /** The LED for this LUN. */
167 PDMLED Led;
168 /* Drive status */
169 fdrive_type_t drive;
170 uint8_t perpendicular; /* 2.88 MB access mode */
171 uint8_t dsk_chg; /* Disk change line */
172 /* Position */
173 uint8_t head;
174 uint8_t track;
175 uint8_t sect;
176 uint8_t ltrk; /* Logical track */
177 /* Media */
178 fdrive_flags_t flags;
179 uint8_t last_sect; /* Nb sector per track */
180 uint8_t max_track; /* Nb of tracks */
181 uint16_t bps; /* Bytes per sector */
182 uint8_t ro; /* Is read-only */
183 uint8_t media_rate; /* Data rate of medium */
184} fdrive_t;
185
186#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
187
188static void fd_init(fdrive_t *drv, bool fInit)
189{
190 /* Drive */
191 if (fInit) {
192 /* Fixate the drive type at init time if possible. */
193 if (drv->pDrvMedia) {
194 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
195 switch (enmType) {
196 case PDMMEDIATYPE_FLOPPY_360:
197 case PDMMEDIATYPE_FLOPPY_1_20:
198 drv->drive = FDRIVE_DRV_120;
199 break;
200 case PDMMEDIATYPE_FLOPPY_720:
201 case PDMMEDIATYPE_FLOPPY_1_44:
202 drv->drive = FDRIVE_DRV_144;
203 break;
204 default:
205 AssertFailed();
206 RT_FALL_THRU();
207 case PDMMEDIATYPE_FLOPPY_2_88:
208 drv->drive = FDRIVE_DRV_288;
209 break;
210 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
211 drv->drive = FDRIVE_DRV_FAKE_15_6;
212 break;
213 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
214 drv->drive = FDRIVE_DRV_FAKE_63_5;
215 break;
216 }
217 } else {
218 drv->drive = FDRIVE_DRV_NONE;
219 }
220 } /* else: The BIOS (and others) get the drive type via the CMOS, so
221 don't change it after the VM has been constructed. */
222 drv->perpendicular = 0;
223 /* Disk */
224 drv->last_sect = 0;
225 drv->max_track = 0;
226}
227
228static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
229 uint8_t last_sect, uint8_t num_sides)
230{
231 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
232}
233
234/* Returns current position, in sectors, for given drive */
235static int fd_sector(fdrive_t *drv)
236{
237 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
238}
239
240/* Seek to a new position:
241 * returns 0 if already on right track
242 * returns 1 if track changed
243 * returns 2 if track is invalid
244 * returns 3 if sector is invalid
245 * returns 4 if seek is disabled
246 * returns 5 if no media in drive
247 */
248static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
249 int enable_seek)
250{
251 int sector;
252 int ret;
253
254 if (!drv->last_sect) {
255 FLOPPY_DPRINTF("no disk in drive (max=%d h=%d c=%02x =s%02x) -> 5\n",
256 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
257 return 5;
258 }
259 if (track > drv->max_track ||
260 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
261 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 2\n",
262 head, track, sect,
263 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
264 return 2;
265 }
266 if (sect > drv->last_sect || sect < 1) {
267 FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 3\n",
268 head, track, sect,
269 1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
270 return 3;
271 }
272 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
273 ret = 0;
274 if (sector != fd_sector(drv)) {
275#if 0
276 if (!enable_seek) {
277 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
278 head, track, sect, 1, drv->max_track, drv->last_sect);
279 return 4;
280 }
281#else
282 RT_NOREF(enable_seek);
283#endif
284 drv->head = head;
285 if (drv->track != track)
286 ret = 1;
287 drv->track = track;
288 drv->sect = sect;
289 }
290 drv->ltrk = drv->track;
291
292 return ret;
293}
294
295/* Set drive back to track 0 */
296static void fd_recalibrate(fdrive_t *drv)
297{
298 FLOPPY_DPRINTF("recalibrate\n");
299 drv->head = 0;
300 drv->track = 0;
301 drv->ltrk = 0;
302 drv->sect = 1;
303}
304
305/* Recognize floppy formats */
306typedef struct fd_format_t {
307 fdrive_type_t drive;
308 uint8_t last_sect; /**< Number of sectors. */
309 uint8_t max_track; /**< Number of tracks. */
310 uint8_t max_head; /**< Max head number. */
311 fdrive_rate_t rate;
312 const char *str;
313} fd_format_t;
314
315/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
316 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
317 */
318static fd_format_t const fd_formats[] = {
319 /* First entry is default format */
320 /* 1.44 MB 3"1/2 floppy disks */
321 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
322 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
323 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
324 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
325 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
326 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
327 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
328 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
329 /* 2.88 MB 3"1/2 floppy disks */
330 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
331 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
332 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
333 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
334 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
335 /* 720 kB 3"1/2 floppy disks */
336 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
337 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
338 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
339 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
340 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
341 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
342 /* 1.2 MB 5"1/4 floppy disks */
343 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
344 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
345 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
346 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
347 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
348 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
349 /* 720 kB 5"1/4 floppy disks */
350 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
351 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
352 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
353 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
354 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
355 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
356 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
357 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
358 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
359 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
360 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
361 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
362 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
363 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
364 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
365 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
366 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
367 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
368 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
369 /* For larger than real life floppy images (see DrvVD.cpp). */
370 /* 15.6 MB fake floppy disk (just need something big). */
371 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
372 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
373 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
374 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
375 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
376 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
377 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
378 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
379 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
380 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
381 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
382 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
383 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
384 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
385 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
386 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
387 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
388 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
389 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
390 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
391 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
392 /* 63.5 MB fake floppy disk (just need something big). */
393 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
394 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
395 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
396 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
397 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
398 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
399 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
400 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
401 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
402 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
403 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
404 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
405 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
406 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
407 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
408 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
409 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
410 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
411 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
412 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
413 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
414 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
415 /* end */
416 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
417};
418
419/* Revalidate a disk drive after a disk change */
420static void fd_revalidate(fdrive_t *drv)
421{
422 const fd_format_t *parse;
423 uint64_t nb_sectors, size;
424 int i, first_match, match;
425 int nb_heads, max_track, last_sect, ro;
426
427 FLOPPY_DPRINTF("revalidate\n");
428 if ( drv->pDrvMedia
429 && drv->pDrvMount
430 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
431 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
432 nb_heads = max_track = last_sect = 0;
433 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
434 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
435 nb_heads - 1, max_track, last_sect);
436 } else {
437 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
438 nb_sectors = size2 / FD_SECTOR_LEN;
439 match = -1;
440 first_match = -1;
441 for (i = 0;; i++) {
442 parse = &fd_formats[i];
443 if (parse->drive == FDRIVE_DRV_NONE)
444 break;
445 if (drv->drive == parse->drive ||
446 drv->drive == FDRIVE_DRV_NONE) {
447 size = (parse->max_head + 1) * parse->max_track *
448 parse->last_sect;
449 if (nb_sectors == size) {
450 match = i;
451 break;
452 }
453 if (first_match == -1)
454 first_match = i;
455 }
456 }
457 if (match == -1) {
458 if (first_match == -1)
459 match = 1;
460 else
461 match = first_match;
462 parse = &fd_formats[match];
463 }
464 nb_heads = parse->max_head + 1;
465 max_track = parse->max_track;
466 last_sect = parse->last_sect;
467 drv->drive = parse->drive;
468 drv->media_rate = parse->rate;
469 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
470 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
471 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
472 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
473 }
474 if (nb_heads == 1) {
475 drv->flags &= ~FDISK_DBL_SIDES;
476 } else {
477 drv->flags |= FDISK_DBL_SIDES;
478 }
479 drv->max_track = max_track;
480 drv->last_sect = last_sect;
481 drv->ro = ro;
482 } else {
483 FLOPPY_DPRINTF("No disk in drive\n");
484 drv->last_sect = 0;
485 drv->max_track = 0;
486 drv->flags &= ~FDISK_DBL_SIDES;
487 drv->dsk_chg = true; /* Disk change line active. */
488 }
489}
490
491/********************************************************/
492/* Intel 82078 floppy disk controller emulation */
493
494static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
495static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
496static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
497
498static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
499static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
500static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
501static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
502static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
503static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
504static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
505static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
506static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
507static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
508static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
509static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
510
511enum {
512 FD_DIR_WRITE = 0,
513 FD_DIR_READ = 1,
514 FD_DIR_SCANE = 2,
515 FD_DIR_SCANL = 3,
516 FD_DIR_SCANH = 4,
517 FD_DIR_FORMAT = 5
518};
519
520enum {
521 FD_STATE_MULTI = 0x01, /* multi track flag */
522 FD_STATE_FORMAT = 0x02, /* format flag */
523 FD_STATE_SEEK = 0x04 /* seek flag */
524};
525
526enum {
527 FD_REG_SRA = 0x00,
528 FD_REG_SRB = 0x01,
529 FD_REG_DOR = 0x02,
530 FD_REG_TDR = 0x03,
531 FD_REG_MSR = 0x04,
532 FD_REG_DSR = 0x04,
533 FD_REG_FIFO = 0x05,
534 FD_REG_DIR = 0x07,
535 FD_REG_CCR = 0x07
536};
537
538enum {
539 FD_CMD_READ_TRACK = 0x02,
540 FD_CMD_SPECIFY = 0x03,
541 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
542 FD_CMD_WRITE = 0x05,
543 FD_CMD_READ = 0x06,
544 FD_CMD_RECALIBRATE = 0x07,
545 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
546 FD_CMD_WRITE_DELETED = 0x09,
547 FD_CMD_READ_ID = 0x0a,
548 FD_CMD_READ_DELETED = 0x0c,
549 FD_CMD_FORMAT_TRACK = 0x0d,
550 FD_CMD_DUMPREG = 0x0e,
551 FD_CMD_SEEK = 0x0f,
552 FD_CMD_VERSION = 0x10,
553 FD_CMD_SCAN_EQUAL = 0x11,
554 FD_CMD_PERPENDICULAR_MODE = 0x12,
555 FD_CMD_CONFIGURE = 0x13,
556 FD_CMD_LOCK = 0x14,
557 FD_CMD_VERIFY = 0x16,
558 FD_CMD_POWERDOWN_MODE = 0x17,
559 FD_CMD_PART_ID = 0x18,
560 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
561 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
562 FD_CMD_SAVE = 0x2e,
563 FD_CMD_OPTION = 0x33,
564 FD_CMD_RESTORE = 0x4e,
565 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
566 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
567 FD_CMD_FORMAT_AND_WRITE = 0xcd,
568 FD_CMD_RELATIVE_SEEK_IN = 0xcf
569};
570
571enum {
572 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
573 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
574 FD_CONFIG_POLL = 0x10, /* Poll enabled */
575 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
576 FD_CONFIG_EIS = 0x40 /* No implied seeks */
577};
578
579enum {
580 FD_SR0_EQPMT = 0x10,
581 FD_SR0_SEEK = 0x20,
582 FD_SR0_ABNTERM = 0x40,
583 FD_SR0_INVCMD = 0x80,
584 FD_SR0_RDYCHG = 0xc0
585};
586
587enum {
588 FD_SR1_MA = 0x01, /* Missing address mark */
589 FD_SR1_NW = 0x02, /* Not writable */
590 FD_SR1_ND = 0x04, /* No data */
591 FD_SR1_EC = 0x80 /* End of cylinder */
592};
593
594enum {
595 FD_SR2_MD = 0x01, /* Missing data address mark */
596 FD_SR2_SNS = 0x04, /* Scan not satisfied */
597 FD_SR2_SEH = 0x08 /* Scan equal hit */
598};
599
600enum {
601 FD_SRA_DIR = 0x01,
602 FD_SRA_nWP = 0x02,
603 FD_SRA_nINDX = 0x04,
604 FD_SRA_HDSEL = 0x08,
605 FD_SRA_nTRK0 = 0x10,
606 FD_SRA_STEP = 0x20,
607 FD_SRA_nDRV2 = 0x40,
608 FD_SRA_INTPEND = 0x80
609};
610
611enum {
612 FD_SRB_MTR0 = 0x01,
613 FD_SRB_MTR1 = 0x02,
614 FD_SRB_WGATE = 0x04,
615 FD_SRB_RDATA = 0x08,
616 FD_SRB_WDATA = 0x10,
617 FD_SRB_DR0 = 0x20
618};
619
620enum {
621#if MAX_FD == 4
622 FD_DRV_SELMASK = 0x03,
623#else
624 FD_DRV_SELMASK = 0x01,
625#endif
626};
627
628enum {
629 FD_DOR_SELMASK = 0x03, /* Always two bits regardless of FD_DRV_SELMASK. */
630 FD_DOR_nRESET = 0x04,
631 FD_DOR_DMAEN = 0x08,
632 FD_DOR_MOTEN0 = 0x10,
633 FD_DOR_MOTEN1 = 0x20,
634 FD_DOR_MOTEN2 = 0x40,
635 FD_DOR_MOTEN3 = 0x80
636};
637
638enum {
639#if MAX_FD == 4
640 FD_TDR_BOOTSEL = 0x0c
641#else
642 FD_TDR_BOOTSEL = 0x04
643#endif
644};
645
646enum {
647 FD_DSR_DRATEMASK= 0x03,
648 FD_DSR_PWRDOWN = 0x40,
649 FD_DSR_SWRESET = 0x80
650};
651
652enum {
653 FD_MSR_DRV0BUSY = 0x01,
654 FD_MSR_DRV1BUSY = 0x02,
655 FD_MSR_DRV2BUSY = 0x04,
656 FD_MSR_DRV3BUSY = 0x08,
657 FD_MSR_CMDBUSY = 0x10,
658 FD_MSR_NONDMA = 0x20,
659 FD_MSR_DIO = 0x40,
660 FD_MSR_RQM = 0x80
661};
662
663enum {
664 FD_DIR_DSKCHG = 0x80
665};
666
667#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
668#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
669#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
670
671/**
672 * Floppy controller state.
673 *
674 * @implements PDMILEDPORTS
675 */
676struct fdctrl_t {
677 /* Controller's identification */
678 uint8_t version;
679 /* HW */
680 uint8_t irq_lvl;
681 uint8_t dma_chann;
682 uint16_t io_base;
683 /* Controller state */
684 TMTIMERHANDLE hResultTimer;
685
686 /* Interrupt delay timers. */
687 TMTIMERHANDLE hXferDelayTimer;
688 TMTIMERHANDLE hIrqDelayTimer;
689 uint16_t uIrqDelayMsec;
690 uint8_t st0;
691 uint8_t st1;
692 uint8_t st2;
693
694 uint8_t sra;
695 uint8_t srb;
696 uint8_t dor;
697 uint8_t tdr;
698 uint8_t dsr;
699 uint8_t msr;
700 uint8_t cur_drv;
701 uint8_t status0;
702 uint8_t status1;
703 uint8_t status2;
704 /* Command FIFO */
705 uint8_t fifo[FD_SECTOR_LEN];
706 uint32_t data_pos;
707 uint32_t data_len;
708 uint8_t data_state;
709 uint8_t data_dir;
710 uint8_t eot; /* last wanted sector */
711 /* Debugging only */
712 uint8_t cur_cmd;
713 uint8_t prev_cmd;
714 /* States kept only to be returned back */
715 /* Timers state */
716 uint8_t timer0;
717 uint8_t timer1;
718 /* precompensation */
719 uint8_t precomp_trk;
720 uint8_t config;
721 uint8_t lock;
722 /* Power down config (also with status regB access mode */
723 uint8_t pwrd;
724 /* Floppy drives */
725 uint8_t num_floppies;
726 fdrive_t drives[MAX_FD];
727 uint8_t reset_sensei;
728 /** Pointer to device instance. */
729 PPDMDEVINS pDevIns;
730
731 /** Status LUN: The base interface. */
732 PDMIBASE IBaseStatus;
733 /** Status LUN: The Leds interface. */
734 PDMILEDPORTS ILeds;
735 /** Status LUN: The Partner of ILeds. */
736 PPDMILEDCONNECTORS pLedsConnector;
737
738 /** I/O ports: 0x3f0 */
739 IOMIOPORTHANDLE hIoPorts0;
740 /** I/O ports: 0x3f1..0x3f5 */
741 IOMIOPORTHANDLE hIoPorts1;
742 /** I/O port: 0x3f7 */
743 IOMIOPORTHANDLE hIoPorts2;
744};
745
746static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
747{
748 uint32_t retval;
749
750 switch (reg) {
751 case FD_REG_SRA:
752 retval = fdctrl_read_statusA(fdctrl);
753 break;
754 case FD_REG_SRB:
755 retval = fdctrl_read_statusB(fdctrl);
756 break;
757 case FD_REG_DOR:
758 retval = fdctrl_read_dor(fdctrl);
759 break;
760 case FD_REG_TDR:
761 retval = fdctrl_read_tape(fdctrl);
762 break;
763 case FD_REG_MSR:
764 retval = fdctrl_read_main_status(fdctrl);
765 break;
766 case FD_REG_FIFO:
767 retval = fdctrl_read_data(fdctrl);
768 break;
769 case FD_REG_DIR:
770 retval = fdctrl_read_dir(fdctrl);
771 break;
772 default:
773 retval = UINT32_MAX;
774 break;
775 }
776 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
777
778 return retval;
779}
780
781static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
782{
783 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
784
785 switch (reg) {
786 case FD_REG_DOR:
787 fdctrl_write_dor(fdctrl, value);
788 break;
789 case FD_REG_TDR:
790 fdctrl_write_tape(fdctrl, value);
791 break;
792 case FD_REG_DSR:
793 fdctrl_write_rate(fdctrl, value);
794 break;
795 case FD_REG_FIFO:
796 fdctrl_write_data(fdctrl, value);
797 break;
798 case FD_REG_CCR:
799 fdctrl_write_ccr(fdctrl, value);
800 break;
801 default:
802 break;
803 }
804}
805
806/* Change IRQ state */
807static void fdctrl_reset_irq(fdctrl_t *fdctrl)
808{
809 if (!(fdctrl->sra & FD_SRA_INTPEND))
810 return;
811 FLOPPY_DPRINTF("Reset interrupt\n");
812 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
813 fdctrl->sra &= ~FD_SRA_INTPEND;
814}
815
816static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
817{
818 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
819 FLOPPY_DPRINTF("Raising interrupt...\n");
820 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
821 fdctrl->sra |= FD_SRA_INTPEND;
822 }
823 if (status0 & FD_SR0_SEEK) {
824 fdrive_t *cur_drv;
825
826 /* A seek clears the disk change line (if a disk is inserted). */
827 cur_drv = get_cur_drv(fdctrl);
828 if (cur_drv->max_track)
829 cur_drv->dsk_chg = false;
830 }
831
832 fdctrl->reset_sensei = 0;
833 fdctrl->status0 = status0;
834 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
835}
836
837static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
838{
839 if (!fdctrl->uIrqDelayMsec)
840 {
841 /* If not IRQ delay needed, trigger the interrupt now. */
842 fdctrl_raise_irq_now(fdctrl, status0);
843 }
844 else
845 {
846 /* Otherwise schedule completion after a short while. */
847 fdctrl->st0 = status0;
848 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
849 }
850}
851
852/* Reset controller */
853static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
854{
855 int i;
856
857 FLOPPY_DPRINTF("reset controller\n");
858 fdctrl_reset_irq(fdctrl);
859 /* Initialise controller */
860 fdctrl->sra = 0;
861 fdctrl->srb = 0xc0;
862 if (!fdctrl->drives[1].pDrvMedia)
863 fdctrl->sra |= FD_SRA_nDRV2;
864 fdctrl->cur_drv = 0;
865 fdctrl->dor = FD_DOR_nRESET;
866 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
867 fdctrl->msr = FD_MSR_RQM;
868 /* FIFO state */
869 fdctrl->data_pos = 0;
870 fdctrl->data_len = 0;
871 fdctrl->data_state = 0;
872 fdctrl->data_dir = FD_DIR_WRITE;
873 for (i = 0; i < MAX_FD; i++)
874 fd_recalibrate(&fdctrl->drives[i]);
875 fdctrl_reset_fifo(fdctrl);
876 if (do_irq) {
877 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
878 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
879 }
880}
881
882static inline fdrive_t *drv0(fdctrl_t *fdctrl)
883{
884 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
885}
886
887static inline fdrive_t *drv1(fdctrl_t *fdctrl)
888{
889 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
890 return &fdctrl->drives[1];
891 else
892 return &fdctrl->drives[0];
893}
894
895#if MAX_FD == 4
896static inline fdrive_t *drv2(fdctrl_t *fdctrl)
897{
898 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
899 return &fdctrl->drives[2];
900 else
901 return &fdctrl->drives[1];
902}
903
904static inline fdrive_t *drv3(fdctrl_t *fdctrl)
905{
906 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
907 return &fdctrl->drives[3];
908 else
909 return &fdctrl->drives[2];
910}
911#endif
912
913static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
914{
915 switch (fdctrl->dor & FD_DRV_SELMASK) {
916 case 0: return drv0(fdctrl);
917 case 1: return drv1(fdctrl);
918#if MAX_FD == 4
919 case 2: return drv2(fdctrl);
920 case 3: return drv3(fdctrl);
921#endif
922 default: return NULL;
923 }
924}
925
926/* Status A register : 0x00 (read-only) */
927static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
928{
929 uint32_t retval = fdctrl->sra;
930
931 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
932
933 return retval;
934}
935
936/* Status B register : 0x01 (read-only) */
937static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
938{
939 uint32_t retval = fdctrl->srb;
940
941 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
942
943 return retval;
944}
945
946/* Digital output register : 0x02 */
947static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
948{
949 uint32_t retval = fdctrl->dor;
950
951 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
952
953 return retval;
954}
955
956static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
957{
958 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
959
960 /* Motors */
961 if (value & FD_DOR_MOTEN0)
962 fdctrl->srb |= FD_SRB_MTR0;
963 else
964 fdctrl->srb &= ~FD_SRB_MTR0;
965 if (value & FD_DOR_MOTEN1)
966 fdctrl->srb |= FD_SRB_MTR1;
967 else
968 fdctrl->srb &= ~FD_SRB_MTR1;
969
970 /* Drive */
971 if (value & 1)
972 fdctrl->srb |= FD_SRB_DR0;
973 else
974 fdctrl->srb &= ~FD_SRB_DR0;
975
976 /* Reset */
977 if (!(value & FD_DOR_nRESET)) {
978 if (fdctrl->dor & FD_DOR_nRESET) {
979 FLOPPY_DPRINTF("controller enter RESET state\n");
980 }
981 } else {
982 if (!(fdctrl->dor & FD_DOR_nRESET)) {
983 FLOPPY_DPRINTF("controller out of RESET state\n");
984 fdctrl_reset(fdctrl, 1);
985 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
986 }
987 }
988
989 fdctrl->dor = value;
990}
991
992/* Tape drive register : 0x03 */
993static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
994{
995 uint32_t retval = fdctrl->tdr;
996
997 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
998
999 return retval;
1000}
1001
1002static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
1003{
1004 /* Reset mode */
1005 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1006 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1007 return;
1008 }
1009 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1010 /* Disk boot selection indicator */
1011 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1012 /* Tape indicators: never allow */
1013}
1014
1015/* Main status register : 0x04 (read) */
1016static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
1017{
1018 uint32_t retval = fdctrl->msr;
1019
1020 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1021 fdctrl->dor |= FD_DOR_nRESET;
1022
1023 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1024
1025 return retval;
1026}
1027
1028/* Data select rate register : 0x04 (write) */
1029static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1030{
1031 /* Reset mode */
1032 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1033 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1034 return;
1035 }
1036 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1037 /* Reset: autoclear */
1038 if (value & FD_DSR_SWRESET) {
1039 fdctrl->dor &= ~FD_DOR_nRESET;
1040 fdctrl_reset(fdctrl, 1);
1041 fdctrl->dor |= FD_DOR_nRESET;
1042 }
1043 if (value & FD_DSR_PWRDOWN) {
1044 fdctrl_reset(fdctrl, 1);
1045 }
1046 fdctrl->dsr = value;
1047}
1048
1049/* Configuration control register : 0x07 (write) */
1050static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1051{
1052 /* Reset mode */
1053 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1054 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1055 return;
1056 }
1057 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1058
1059 /* Only the rate selection bits used in AT mode, and we
1060 * store those in the DSR.
1061 */
1062 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1063}
1064
1065static int fdctrl_media_changed(fdrive_t *drv)
1066{
1067 return drv->dsk_chg;
1068}
1069
1070/* Digital input register : 0x07 (read-only) */
1071static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1072{
1073 uint32_t retval = 0;
1074
1075 /* The change line signal is reported by the currently selected
1076 * drive. If the corresponding motor on bit is not set, the drive
1077 * is *not* selected!
1078 */
1079 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1080 && (fdctrl->dor & (0x10 << (fdctrl->dor & FD_DOR_SELMASK))))
1081 retval |= FD_DIR_DSKCHG;
1082 if (retval != 0)
1083 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1084
1085 return retval;
1086}
1087
1088/* FIFO state control */
1089static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1090{
1091 fdctrl->data_dir = FD_DIR_WRITE;
1092 fdctrl->data_pos = 0;
1093 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1094 fdctrl->prev_cmd = fdctrl->cur_cmd;
1095 fdctrl->cur_cmd = 0;
1096}
1097
1098/* Set FIFO status for the host to read */
1099static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1100{
1101 fdctrl->data_dir = FD_DIR_READ;
1102 fdctrl->data_len = fifo_len;
1103 fdctrl->data_pos = 0;
1104 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1105 if (do_irq)
1106 fdctrl_raise_irq(fdctrl, 0x00);
1107}
1108
1109/* Set an error: unimplemented/unknown command */
1110static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1111{
1112 RT_NOREF(direction);
1113 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1114 fdctrl->fifo[0] = FD_SR0_INVCMD;
1115 fdctrl_set_fifo(fdctrl, 1, 0);
1116}
1117
1118/* Seek to next sector */
1119static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1120{
1121 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1122 cur_drv->head, cur_drv->track, cur_drv->sect,
1123 fd_sector(cur_drv));
1124 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1125 error in fact */
1126 if (cur_drv->sect >= cur_drv->last_sect ||
1127 cur_drv->sect == fdctrl->eot) {
1128 cur_drv->sect = 1;
1129 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1130 if (cur_drv->head == 0 &&
1131 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1132 cur_drv->head = 1;
1133 } else {
1134 cur_drv->head = 0;
1135 cur_drv->ltrk++;
1136 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1137 return 0;
1138 }
1139 } else {
1140 cur_drv->ltrk++;
1141 return 0;
1142 }
1143 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1144 cur_drv->head, cur_drv->track,
1145 cur_drv->sect, fd_sector(cur_drv));
1146 } else {
1147 cur_drv->sect++;
1148 }
1149 return 1;
1150}
1151
1152/* Callback for transfer end (stop or abort) */
1153static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1154 uint8_t status1, uint8_t status2)
1155{
1156 fdrive_t *cur_drv;
1157
1158 cur_drv = get_cur_drv(fdctrl);
1159 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1160 status0, status1, status2,
1161 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1162 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1163 fdctrl->fifo[1] = status1;
1164 fdctrl->fifo[2] = status2;
1165 fdctrl->fifo[3] = cur_drv->ltrk;
1166 fdctrl->fifo[4] = cur_drv->head;
1167 fdctrl->fifo[5] = cur_drv->sect;
1168 fdctrl->fifo[6] = FD_SECTOR_SC;
1169 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1170 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1171 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1172
1173 fdctrl->data_dir = FD_DIR_READ;
1174 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1175 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1176 }
1177 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1178 fdctrl->msr &= ~FD_MSR_NONDMA;
1179 fdctrl_set_fifo(fdctrl, 7, 1);
1180}
1181
1182static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1183 uint8_t status1, uint8_t status2)
1184{
1185 if (!fdctrl->uIrqDelayMsec)
1186 {
1187 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1188 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1189 }
1190 else
1191 {
1192 /* Otherwise schedule completion after a short while. */
1193 fdctrl->st0 = status0;
1194 fdctrl->st1 = status1;
1195 fdctrl->st2 = status2;
1196 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1197 }
1198}
1199
1200/* Prepare a data transfer (either DMA or FIFO) */
1201static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1202{
1203 fdrive_t *cur_drv;
1204 uint8_t kh, kt, ks;
1205 int did_seek = 0;
1206
1207 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1208 cur_drv = get_cur_drv(fdctrl);
1209 kt = fdctrl->fifo[2];
1210 kh = fdctrl->fifo[3];
1211 ks = fdctrl->fifo[4];
1212 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1213 GET_CUR_DRV(fdctrl), kh, kt, ks,
1214 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1215 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1216 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1217 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1218 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1219 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1220 case 2:
1221 /* sect too big */
1222 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1223 fdctrl->fifo[3] = kt;
1224 fdctrl->fifo[4] = kh;
1225 fdctrl->fifo[5] = ks;
1226 return;
1227 case 3:
1228 /* track too big */
1229 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1230 fdctrl->fifo[3] = kt;
1231 fdctrl->fifo[4] = kh;
1232 fdctrl->fifo[5] = ks;
1233 return;
1234 case 4:
1235 /* No seek enabled */
1236 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1237 fdctrl->fifo[3] = kt;
1238 fdctrl->fifo[4] = kh;
1239 fdctrl->fifo[5] = ks;
1240 return;
1241 case 5:
1242 /* No disk in drive */
1243 /// @todo This is wrong! Command should not complete.
1244 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1245 fdctrl->fifo[3] = kt;
1246 fdctrl->fifo[4] = kh;
1247 fdctrl->fifo[5] = ks;
1248 return;
1249 case 1:
1250 did_seek = 1;
1251 break;
1252 default:
1253 break;
1254 }
1255 /* Check the data rate. If the programmed data rate does not match
1256 * the currently inserted medium, the operation has to fail.
1257 */
1258 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1259 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1260 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1261 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1262 fdctrl->fifo[3] = kt;
1263 fdctrl->fifo[4] = kh;
1264 fdctrl->fifo[5] = ks;
1265 return;
1266 }
1267 /* Set the FIFO state */
1268 fdctrl->data_dir = direction;
1269 fdctrl->data_pos = 0;
1270 fdctrl->msr |= FD_MSR_CMDBUSY;
1271 if (fdctrl->fifo[0] & 0x80)
1272 fdctrl->data_state |= FD_STATE_MULTI;
1273 else
1274 fdctrl->data_state &= ~FD_STATE_MULTI;
1275 if (did_seek)
1276 fdctrl->data_state |= FD_STATE_SEEK;
1277 else
1278 fdctrl->data_state &= ~FD_STATE_SEEK;
1279 if (fdctrl->fifo[5] == 00) {
1280 fdctrl->data_len = fdctrl->fifo[8];
1281 } else {
1282 int tmp;
1283 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1284 tmp = (fdctrl->fifo[6] - ks + 1);
1285 if (fdctrl->fifo[0] & 0x80)
1286 tmp += fdctrl->fifo[6];
1287 fdctrl->data_len *= tmp;
1288 }
1289 fdctrl->eot = fdctrl->fifo[6];
1290 if (fdctrl->dor & FD_DOR_DMAEN) {
1291 int dma_mode;
1292 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1293 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1294 dma_mode = (dma_mode >> 2) & 3;
1295 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1296 dma_mode, direction,
1297 (128 << fdctrl->fifo[5]) *
1298 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1299 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1300 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1301 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1302 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1303 /* No access is allowed until DMA transfer has completed */
1304 fdctrl->msr &= ~FD_MSR_RQM;
1305 /* Now, we just have to wait for the DMA controller to
1306 * recall us...
1307 */
1308 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1309 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1310 return;
1311 } else {
1312 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1313 }
1314 }
1315 FLOPPY_DPRINTF("start non-DMA transfer\n");
1316 fdctrl->msr |= FD_MSR_NONDMA;
1317 if (direction != FD_DIR_WRITE)
1318 fdctrl->msr |= FD_MSR_DIO;
1319
1320 /* IO based transfer: calculate len */
1321 fdctrl_raise_irq(fdctrl, 0x00);
1322 return;
1323}
1324
1325/* Prepare a format data transfer (either DMA or FIFO) */
1326static void fdctrl_start_format(fdctrl_t *fdctrl)
1327{
1328 fdrive_t *cur_drv;
1329 uint8_t ns, dp, kh, kt, ks;
1330
1331 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1332 cur_drv = get_cur_drv(fdctrl);
1333 kt = cur_drv->track;
1334 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1335 ns = fdctrl->fifo[3];
1336 dp = fdctrl->fifo[5];
1337 ks = 1;
1338 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1339 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1340 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1341 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1342 case 2:
1343 /* sect too big */
1344 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1345 fdctrl->fifo[3] = kt;
1346 fdctrl->fifo[4] = kh;
1347 fdctrl->fifo[5] = ks;
1348 return;
1349 case 3:
1350 /* track too big */
1351 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1352 fdctrl->fifo[3] = kt;
1353 fdctrl->fifo[4] = kh;
1354 fdctrl->fifo[5] = ks;
1355 return;
1356 case 4:
1357 /* No seek enabled */
1358 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1359 fdctrl->fifo[3] = kt;
1360 fdctrl->fifo[4] = kh;
1361 fdctrl->fifo[5] = ks;
1362 return;
1363 case 5:
1364 /* No disk in drive */
1365 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1366 fdctrl->fifo[3] = kt;
1367 fdctrl->fifo[4] = kh;
1368 fdctrl->fifo[5] = ks;
1369 return;
1370 case 1:
1371 break;
1372 default:
1373 break;
1374 }
1375 /* It's not clear what should happen if the data rate does not match. */
1376#if 0
1377 /* Check the data rate. If the programmed data rate does not match
1378 * the currently inserted medium, the operation has to fail.
1379 */
1380 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1381 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1382 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1383 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1384 fdctrl->fifo[3] = kt;
1385 fdctrl->fifo[4] = kh;
1386 fdctrl->fifo[5] = ks;
1387 return;
1388 }
1389#endif
1390 /* Set the FIFO state */
1391 fdctrl->data_dir = FD_DIR_FORMAT;
1392 fdctrl->data_pos = 0;
1393 fdctrl->msr |= FD_MSR_CMDBUSY;
1394 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1395 fdctrl->data_len = ns * 4;
1396 fdctrl->eot = ns;
1397 if (fdctrl->dor & FD_DOR_DMAEN) {
1398 int dma_mode;
1399 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1400 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1401 dma_mode = (dma_mode >> 2) & 3;
1402 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1403 dma_mode, fdctrl->data_dir,
1404 (128 << fdctrl->fifo[2]) *
1405 (cur_drv->last_sect + 1), fdctrl->data_len);
1406 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1407 /* No access is allowed until DMA transfer has completed */
1408 fdctrl->msr &= ~FD_MSR_RQM;
1409 /* Now, we just have to wait for the DMA controller to
1410 * recall us...
1411 */
1412 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1413 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1414 return;
1415 } else {
1416 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1417 }
1418 }
1419 FLOPPY_DPRINTF("start non-DMA format\n");
1420 fdctrl->msr |= FD_MSR_NONDMA;
1421 /* IO based transfer: calculate len */
1422 fdctrl_raise_irq(fdctrl, 0x00);
1423
1424 return;
1425}
1426
1427/* Prepare a transfer of deleted data */
1428static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1429{
1430 RT_NOREF(direction);
1431 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1432
1433 /* We don't handle deleted data,
1434 * so we don't return *ANYTHING*
1435 */
1436 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1437}
1438
1439/* Block driver read/write wrappers. */
1440
1441static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1442{
1443 int rc;
1444
1445 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1446
1447 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1448 buf, nb_sectors * FD_SECTOR_LEN);
1449
1450 drv->Led.Actual.s.fWriting = 0;
1451 if (RT_FAILURE(rc))
1452 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1453
1454 return rc;
1455}
1456
1457static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1458{
1459 int rc;
1460
1461 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1462
1463 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1464 buf, nb_sectors * FD_SECTOR_LEN);
1465
1466 drv->Led.Actual.s.fReading = 0;
1467
1468 if (RT_FAILURE(rc))
1469 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1470
1471 return rc;
1472}
1473
1474/**
1475 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1476 */
1477static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1478 unsigned uChannel, uint32_t off, uint32_t cb)
1479{
1480 RT_NOREF(pDevIns, off);
1481 fdctrl_t *fdctrl;
1482 fdrive_t *cur_drv;
1483 int rc;
1484 uint32_t len = 0;
1485 uint32_t start_pos, rel_pos;
1486 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1487
1488 fdctrl = (fdctrl_t *)pvUser;
1489 if (fdctrl->msr & FD_MSR_RQM) {
1490 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1491 return 0;
1492 }
1493 cur_drv = get_cur_drv(fdctrl);
1494 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1495 fdctrl->data_dir == FD_DIR_SCANH)
1496 status2 = FD_SR2_SNS;
1497 if (cb > fdctrl->data_len)
1498 cb = fdctrl->data_len;
1499 if (cur_drv->pDrvMedia == NULL)
1500 {
1501 if (fdctrl->data_dir == FD_DIR_WRITE)
1502 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1503 else
1504 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1505 Assert(len == 0);
1506 goto transfer_error;
1507 }
1508
1509 if (cur_drv->ro)
1510 {
1511 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1512 {
1513 /* Handle readonly medium early, no need to do DMA, touch the
1514 * LED or attempt any writes. A real floppy doesn't attempt
1515 * to write to readonly media either. */
1516 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1517 0x00);
1518 Assert(len == 0);
1519 goto transfer_error;
1520 }
1521 }
1522
1523 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1524 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1525 len = cb - fdctrl->data_pos;
1526 if (len + rel_pos > FD_SECTOR_LEN)
1527 len = FD_SECTOR_LEN - rel_pos;
1528 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1529 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1530 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1531 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1532 (fdctrl->data_dir != FD_DIR_WRITE ||
1533 len < FD_SECTOR_LEN || rel_pos != 0)) {
1534 /* READ & SCAN commands and realign to a sector for WRITE */
1535 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1536 if (RT_FAILURE(rc))
1537 {
1538 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1539 fd_sector(cur_drv));
1540 /* Sure, image size is too small... */
1541 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1542 }
1543 }
1544 switch (fdctrl->data_dir) {
1545 case FD_DIR_READ:
1546 /* READ commands */
1547 {
1548 uint32_t read;
1549 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1550 fdctrl->fifo + rel_pos,
1551 fdctrl->data_pos,
1552 len, &read);
1553 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1554 }
1555 break;
1556 case FD_DIR_WRITE:
1557 /* WRITE commands */
1558 {
1559 uint32_t written;
1560 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1561 fdctrl->fifo + rel_pos,
1562 fdctrl->data_pos,
1563 len, &written);
1564 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1565 }
1566
1567 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1568 if (RT_FAILURE(rc))
1569 {
1570 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1571 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1572 goto transfer_error;
1573 }
1574 break;
1575 case FD_DIR_FORMAT:
1576 /* FORMAT command */
1577 {
1578 uint8_t eot = fdctrl->fifo[3];
1579 uint8_t filler = fdctrl->fifo[5];
1580 uint32_t written;
1581 int sct;
1582 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1583 fdctrl->fifo + rel_pos,
1584 fdctrl->data_pos,
1585 len, &written);
1586 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1587
1588 /* Fill the entire track with desired data pattern. */
1589 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1590 eot, filler);
1591 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1592 for (sct = 0; sct < eot; ++sct)
1593 {
1594 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1595 if (RT_FAILURE(rc))
1596 {
1597 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1598 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1599 goto transfer_error;
1600 }
1601 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1602 }
1603 }
1604 break;
1605 default:
1606 /* SCAN commands */
1607 {
1608 uint8_t tmpbuf[FD_SECTOR_LEN];
1609 int ret;
1610 uint32_t read;
1611 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1612 fdctrl->data_pos, len, &read);
1613 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1614 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1615 if (ret == 0) {
1616 status2 = FD_SR2_SEH;
1617 goto end_transfer;
1618 }
1619 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1620 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1621 status2 = 0x00;
1622 goto end_transfer;
1623 }
1624 }
1625 break;
1626 }
1627 fdctrl->data_pos += len;
1628 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1629 if (rel_pos == 0) {
1630 /* Seek to next sector */
1631 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1632 break;
1633 }
1634 }
1635end_transfer:
1636 len = fdctrl->data_pos - start_pos;
1637 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1638 fdctrl->data_pos, len, fdctrl->data_len);
1639 if (fdctrl->data_dir == FD_DIR_SCANE ||
1640 fdctrl->data_dir == FD_DIR_SCANL ||
1641 fdctrl->data_dir == FD_DIR_SCANH)
1642 status2 = FD_SR2_SEH;
1643 if (FD_DID_SEEK(fdctrl->data_state))
1644 status0 |= FD_SR0_SEEK;
1645 fdctrl->data_len -= len;
1646 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1647transfer_error:
1648
1649 return len;
1650}
1651
1652/* Data register : 0x05 */
1653static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1654{
1655 fdrive_t *cur_drv;
1656 uint32_t retval = 0;
1657 unsigned pos;
1658 int rc;
1659
1660 cur_drv = get_cur_drv(fdctrl);
1661 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1662 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1663 FLOPPY_ERROR("controller not ready for reading\n");
1664 return 0;
1665 }
1666 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1667 if (fdctrl->msr & FD_MSR_NONDMA) {
1668 if (cur_drv->pDrvMedia == NULL)
1669 {
1670 if (fdctrl->data_dir == FD_DIR_WRITE)
1671 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1672 else
1673 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1674 } else if (pos == 0) {
1675 if (fdctrl->data_pos != 0)
1676 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1677 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1678 fd_sector(cur_drv));
1679 return 0;
1680 }
1681
1682 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1683 if (RT_FAILURE(rc))
1684 {
1685 FLOPPY_DPRINTF("error getting sector %d\n",
1686 fd_sector(cur_drv));
1687 /* Sure, image size is too small... */
1688 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1689 }
1690 }
1691 }
1692 retval = fdctrl->fifo[pos];
1693 if (++fdctrl->data_pos == fdctrl->data_len) {
1694 fdctrl->data_pos = 0;
1695 /* Switch from transfer mode to status mode
1696 * then from status mode to command mode
1697 */
1698 if (fdctrl->msr & FD_MSR_NONDMA) {
1699 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1700 } else {
1701 fdctrl_reset_fifo(fdctrl);
1702 fdctrl_reset_irq(fdctrl);
1703 }
1704 }
1705 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1706
1707 return retval;
1708}
1709
1710static void fdctrl_format_sector(fdctrl_t *fdctrl)
1711{
1712 fdrive_t *cur_drv;
1713 uint8_t kh, kt, ks;
1714 int ok = 0, rc;
1715
1716 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1717 cur_drv = get_cur_drv(fdctrl);
1718 kt = fdctrl->fifo[6];
1719 kh = fdctrl->fifo[7];
1720 ks = fdctrl->fifo[8];
1721 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1722 GET_CUR_DRV(fdctrl), kh, kt, ks,
1723 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1724 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1725 case 2:
1726 /* sect too big */
1727 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1728 fdctrl->fifo[3] = kt;
1729 fdctrl->fifo[4] = kh;
1730 fdctrl->fifo[5] = ks;
1731 return;
1732 case 3:
1733 /* track too big */
1734 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1735 fdctrl->fifo[3] = kt;
1736 fdctrl->fifo[4] = kh;
1737 fdctrl->fifo[5] = ks;
1738 return;
1739 case 4:
1740 /* No seek enabled */
1741 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1742 fdctrl->fifo[3] = kt;
1743 fdctrl->fifo[4] = kh;
1744 fdctrl->fifo[5] = ks;
1745 return;
1746 case 5:
1747 /* No disk in drive */
1748 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1749 fdctrl->fifo[3] = kt;
1750 fdctrl->fifo[4] = kh;
1751 fdctrl->fifo[5] = ks;
1752 return;
1753 case 1:
1754 fdctrl->data_state |= FD_STATE_SEEK;
1755 break;
1756 default:
1757 break;
1758 }
1759 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1760 if (cur_drv->pDrvMedia) {
1761 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1762 if (RT_FAILURE (rc)) {
1763 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1764 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1765 } else {
1766 ok = 1;
1767 }
1768 }
1769 if (ok) {
1770 if (cur_drv->sect == cur_drv->last_sect) {
1771 fdctrl->data_state &= ~FD_STATE_FORMAT;
1772 /* Last sector done */
1773 if (FD_DID_SEEK(fdctrl->data_state))
1774 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1775 else
1776 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1777 } else {
1778 /* More to do */
1779 fdctrl->data_pos = 0;
1780 fdctrl->data_len = 4;
1781 }
1782 }
1783}
1784
1785static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1786{
1787 RT_NOREF(direction);
1788 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1789 fdctrl->fifo[0] = fdctrl->lock << 4;
1790 fdctrl_set_fifo(fdctrl, 1, 0);
1791}
1792
1793static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1794{
1795 RT_NOREF(direction);
1796 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1797
1798 /* Drives position */
1799 fdctrl->fifo[0] = drv0(fdctrl)->track;
1800 fdctrl->fifo[1] = drv1(fdctrl)->track;
1801#if MAX_FD == 4
1802 fdctrl->fifo[2] = drv2(fdctrl)->track;
1803 fdctrl->fifo[3] = drv3(fdctrl)->track;
1804#else
1805 fdctrl->fifo[2] = 0;
1806 fdctrl->fifo[3] = 0;
1807#endif
1808 /* timers */
1809 fdctrl->fifo[4] = fdctrl->timer0;
1810 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1811 fdctrl->fifo[6] = cur_drv->last_sect;
1812 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1813 (cur_drv->perpendicular << 2);
1814 fdctrl->fifo[8] = fdctrl->config;
1815 fdctrl->fifo[9] = fdctrl->precomp_trk;
1816 fdctrl_set_fifo(fdctrl, 10, 0);
1817}
1818
1819static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1820{
1821 RT_NOREF(direction);
1822 /* Controller's version */
1823 fdctrl->fifo[0] = fdctrl->version;
1824 fdctrl_set_fifo(fdctrl, 1, 0);
1825}
1826
1827static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1828{
1829 RT_NOREF(direction);
1830 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1831 fdctrl_set_fifo(fdctrl, 1, 0);
1832}
1833
1834static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1835{
1836 RT_NOREF(direction);
1837 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1838
1839 /* Drives position */
1840 drv0(fdctrl)->track = fdctrl->fifo[3];
1841 drv1(fdctrl)->track = fdctrl->fifo[4];
1842#if MAX_FD == 4
1843 drv2(fdctrl)->track = fdctrl->fifo[5];
1844 drv3(fdctrl)->track = fdctrl->fifo[6];
1845#endif
1846 /* timers */
1847 fdctrl->timer0 = fdctrl->fifo[7];
1848 fdctrl->timer1 = fdctrl->fifo[8];
1849 cur_drv->last_sect = fdctrl->fifo[9];
1850 fdctrl->lock = fdctrl->fifo[10] >> 7;
1851 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1852 fdctrl->config = fdctrl->fifo[11];
1853 fdctrl->precomp_trk = fdctrl->fifo[12];
1854 fdctrl->pwrd = fdctrl->fifo[13];
1855 fdctrl_reset_fifo(fdctrl);
1856}
1857
1858static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1859{
1860 RT_NOREF(direction);
1861 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1862
1863 fdctrl->fifo[0] = 0;
1864 fdctrl->fifo[1] = 0;
1865 /* Drives position */
1866 fdctrl->fifo[2] = drv0(fdctrl)->track;
1867 fdctrl->fifo[3] = drv1(fdctrl)->track;
1868#if MAX_FD == 4
1869 fdctrl->fifo[4] = drv2(fdctrl)->track;
1870 fdctrl->fifo[5] = drv3(fdctrl)->track;
1871#else
1872 fdctrl->fifo[4] = 0;
1873 fdctrl->fifo[5] = 0;
1874#endif
1875 /* timers */
1876 fdctrl->fifo[6] = fdctrl->timer0;
1877 fdctrl->fifo[7] = fdctrl->timer1;
1878 fdctrl->fifo[8] = cur_drv->last_sect;
1879 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1880 (cur_drv->perpendicular << 2);
1881 fdctrl->fifo[10] = fdctrl->config;
1882 fdctrl->fifo[11] = fdctrl->precomp_trk;
1883 fdctrl->fifo[12] = fdctrl->pwrd;
1884 fdctrl->fifo[13] = 0;
1885 fdctrl->fifo[14] = 0;
1886 fdctrl_set_fifo(fdctrl, 15, 0);
1887}
1888
1889static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1890{
1891 RT_NOREF(direction);
1892 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1893
1894 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1895
1896 fdctrl->msr &= ~FD_MSR_RQM;
1897 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1898 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1899}
1900
1901static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1902{
1903 RT_NOREF(direction);
1904 fdrive_t *cur_drv;
1905 uint8_t ns, dp;
1906
1907 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1908 cur_drv = get_cur_drv(fdctrl);
1909 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1910 ns = fdctrl->fifo[3];
1911 dp = fdctrl->fifo[5];
1912
1913 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1914 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1915 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1916 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1917 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1918
1919 /* Since we cannot actually format anything, we have to make sure that
1920 * whatever new format the guest is trying to establish matches the
1921 * existing format of the medium.
1922 */
1923 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1924 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1925 else
1926 {
1927 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1928 cur_drv->last_sect = ns;
1929
1930 fdctrl_start_format(fdctrl);
1931 }
1932}
1933
1934static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1935{
1936 RT_NOREF(direction);
1937 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1938 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1939 if (fdctrl->fifo[2] & 1)
1940 fdctrl->dor &= ~FD_DOR_DMAEN;
1941 else
1942 fdctrl->dor |= FD_DOR_DMAEN;
1943 /* No result back */
1944 fdctrl_reset_fifo(fdctrl);
1945}
1946
1947static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1948{
1949 RT_NOREF(direction);
1950 fdrive_t *cur_drv;
1951
1952 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1953 cur_drv = get_cur_drv(fdctrl);
1954 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1955 /* 1 Byte status back */
1956 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1957 (cur_drv->track == 0 ? 0x10 : 0x00) |
1958 (cur_drv->head << 2) |
1959 GET_CUR_DRV(fdctrl) |
1960 0x28;
1961 fdctrl_set_fifo(fdctrl, 1, 0);
1962}
1963
1964static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1965{
1966 RT_NOREF(direction);
1967 fdrive_t *cur_drv;
1968 uint8_t st0;
1969
1970 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1971 cur_drv = get_cur_drv(fdctrl);
1972 fd_recalibrate(cur_drv);
1973 fdctrl_reset_fifo(fdctrl);
1974 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1975 /* No drive means no TRK0 signal. */
1976 if (cur_drv->drive == FDRIVE_DRV_NONE)
1977 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1978 /* Raise Interrupt */
1979 fdctrl_raise_irq(fdctrl, st0);
1980}
1981
1982static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1983{
1984 RT_NOREF(direction);
1985 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1986
1987 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1988 if(fdctrl->reset_sensei > 0) {
1989 fdctrl->fifo[0] =
1990 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1991 fdctrl->reset_sensei--;
1992 } else {
1993 /* XXX: status0 handling is broken for read/write
1994 commands, so we do this hack. It should be suppressed
1995 ASAP */
1996 fdctrl->fifo[0] =
1997 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1998 /* Hack to preserve SR0 on equipment check failures (no drive). */
1999 if (fdctrl->status0 & FD_SR0_EQPMT)
2000 fdctrl->fifo[0] = fdctrl->status0;
2001 }
2002
2003 fdctrl->fifo[1] = cur_drv->track;
2004 fdctrl_set_fifo(fdctrl, 2, 0);
2005 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
2006 fdctrl->status0 = FD_SR0_RDYCHG;
2007}
2008
2009static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
2010{
2011 RT_NOREF(direction);
2012 fdrive_t *cur_drv;
2013
2014 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
2015 fdctrl->fifo[1], fdctrl->fifo[2]);
2016
2017 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2018 cur_drv = get_cur_drv(fdctrl);
2019 fdctrl_reset_fifo(fdctrl);
2020
2021 /* The seek command just sends step pulses to the drive and doesn't care if
2022 * there's a medium inserted or if it's banging the head against the drive.
2023 */
2024 cur_drv->track = fdctrl->fifo[2];
2025 cur_drv->ltrk = cur_drv->track;
2026 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2027 /* Raise Interrupt */
2028 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
2029}
2030
2031static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2032{
2033 RT_NOREF(direction);
2034 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2035
2036 if (fdctrl->fifo[1] & 0x80)
2037 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2038 /* No result back */
2039 fdctrl_reset_fifo(fdctrl);
2040}
2041
2042static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2043{
2044 RT_NOREF(direction);
2045 fdctrl->config = fdctrl->fifo[2];
2046 fdctrl->precomp_trk = fdctrl->fifo[3];
2047 /* No result back */
2048 fdctrl_reset_fifo(fdctrl);
2049}
2050
2051static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2052{
2053 RT_NOREF(direction);
2054 fdctrl->pwrd = fdctrl->fifo[1];
2055 fdctrl->fifo[0] = fdctrl->fifo[1];
2056 fdctrl_set_fifo(fdctrl, 1, 0);
2057}
2058
2059static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2060{
2061 RT_NOREF(direction);
2062 /* No result back */
2063 fdctrl_reset_fifo(fdctrl);
2064}
2065
2066static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2067{
2068 RT_NOREF(direction);
2069 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2070
2071 /* This command takes a variable number of parameters. It can be terminated
2072 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2073 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2074 */
2075 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2076
2077 /* Command parameters done */
2078 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2079 /* Data is echoed, but not stored! */
2080 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2081 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2082 fdctrl->fifo[2] = 0;
2083 fdctrl->fifo[3] = 0;
2084 fdctrl_set_fifo(fdctrl, 4, 0);
2085 } else {
2086 fdctrl_reset_fifo(fdctrl);
2087 }
2088 } else
2089 fdctrl->data_len++; /* Wait for another byte. */
2090}
2091
2092static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2093{
2094 RT_NOREF(direction);
2095 fdrive_t *cur_drv;
2096
2097 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2098 cur_drv = get_cur_drv(fdctrl);
2099 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2100 cur_drv->track = cur_drv->max_track - 1;
2101 } else {
2102 cur_drv->track += fdctrl->fifo[2];
2103 }
2104 fdctrl_reset_fifo(fdctrl);
2105 /* Raise Interrupt */
2106 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2107}
2108
2109static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2110{
2111 RT_NOREF(direction);
2112 fdrive_t *cur_drv;
2113
2114 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2115 cur_drv = get_cur_drv(fdctrl);
2116 if (fdctrl->fifo[2] > cur_drv->track) {
2117 cur_drv->track = 0;
2118 } else {
2119 cur_drv->track -= fdctrl->fifo[2];
2120 }
2121 fdctrl_reset_fifo(fdctrl);
2122 /* Raise Interrupt */
2123 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2124}
2125
2126static const struct {
2127 uint8_t value;
2128 uint8_t mask;
2129 const char* name;
2130 int parameters;
2131 void (*handler)(fdctrl_t *fdctrl, int direction);
2132 int direction;
2133} handlers[] = {
2134 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2135 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2136 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2137 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2138 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2139 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2140 { FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2141 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2142 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2143 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2144 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2145 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2146 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2147 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2148 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2149 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2150 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2151 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2152 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2153 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2154 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2155 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2156 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2157 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2158 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2159 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2160 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2161 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2162 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2163 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2164 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2165 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2166};
2167/* Associate command to an index in the 'handlers' array */
2168static uint8_t command_to_handler[256];
2169
2170static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2171{
2172 fdrive_t *cur_drv;
2173 int pos;
2174
2175 cur_drv = get_cur_drv(fdctrl);
2176 /* Reset mode */
2177 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2178 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2179 return;
2180 }
2181 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2182 FLOPPY_ERROR("controller not ready for writing\n");
2183 return;
2184 }
2185 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2186 /* Is it write command time ? */
2187 if (fdctrl->msr & FD_MSR_NONDMA) {
2188 /* FIFO data write */
2189 pos = fdctrl->data_pos++;
2190 pos %= FD_SECTOR_LEN;
2191 fdctrl->fifo[pos] = value;
2192
2193 if (cur_drv->pDrvMedia == NULL)
2194 {
2195 if (fdctrl->data_dir == FD_DIR_WRITE)
2196 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2197 else
2198 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2199 } else if (pos == FD_SECTOR_LEN - 1 ||
2200 fdctrl->data_pos == fdctrl->data_len) {
2201 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2202 }
2203 /* Switch from transfer mode to status mode
2204 * then from status mode to command mode
2205 */
2206 if (fdctrl->data_pos == fdctrl->data_len)
2207 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2208 return;
2209 }
2210 if (fdctrl->data_pos == 0) {
2211 /* Command */
2212 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2213 pos = command_to_handler[value & 0xff];
2214 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2215 fdctrl->data_len = handlers[pos].parameters + 1;
2216 fdctrl->msr |= FD_MSR_CMDBUSY;
2217 fdctrl->cur_cmd = value & 0xff;
2218 }
2219
2220 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2221 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2222 if (fdctrl->data_pos == fdctrl->data_len) {
2223 /* We now have all parameters
2224 * and will be able to treat the command
2225 */
2226 if (fdctrl->data_state & FD_STATE_FORMAT) {
2227 fdctrl_format_sector(fdctrl);
2228 return;
2229 }
2230
2231 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2232 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2233 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2234 }
2235}
2236
2237
2238/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2239
2240/**
2241 * @callback_method_impl{FNTMTIMERDEV}
2242 */
2243static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2244{
2245 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2246 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2247 RT_NOREF(hTimer, pvUser);
2248
2249 /* Pretend we are spinning.
2250 * This is needed for Coherent, which uses READ ID to check for
2251 * sector interleaving.
2252 */
2253 if (cur_drv->last_sect != 0) {
2254 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2255 }
2256 /* READ_ID can't automatically succeed! */
2257 if (!cur_drv->max_track) {
2258 FLOPPY_DPRINTF("read id when no disk in drive\n");
2259 /// @todo This is wrong! Command should not complete.
2260 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2261 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2262 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2263 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2264 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2265 } else if (cur_drv->track >= cur_drv->max_track) {
2266 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2267 cur_drv->track, cur_drv->max_track);
2268 cur_drv->ltrk = 0;
2269 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2270 }
2271 else
2272 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2273}
2274
2275
2276/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2277
2278/**
2279 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2280 */
2281static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2282{
2283 RT_NOREF(pvUser);
2284
2285 if (cb == 1)
2286 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2287 else
2288 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2289 return VINF_SUCCESS;
2290}
2291
2292
2293/**
2294 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2295 */
2296static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2297{
2298 RT_NOREF(pvUser);
2299
2300 if (cb == 1)
2301 {
2302 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2303 return VINF_SUCCESS;
2304 }
2305 return VERR_IOM_IOPORT_UNUSED;
2306}
2307
2308
2309/**
2310 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2311 */
2312static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2313{
2314 RT_NOREF(pvUser);
2315
2316 if (cb == 1)
2317 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2318 else
2319 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2320 return VINF_SUCCESS;
2321}
2322
2323
2324/**
2325 * @callback_method_impl{FNTMTIMERDEV}
2326 */
2327static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2328{
2329 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2330 RT_NOREF(pvUser, hTimer);
2331 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2332}
2333
2334
2335/**
2336 * @callback_method_impl{FNTMTIMERDEV}
2337 */
2338static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2339{
2340 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2341 RT_NOREF(pvUser, hTimer);
2342 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2343}
2344
2345
2346
2347/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2348/**
2349 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2350 */
2351static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2352{
2353 RT_NOREF(pvUser);
2354
2355 if (cb == 1)
2356 {
2357 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2358 return VINF_SUCCESS;
2359 }
2360 return VERR_IOM_IOPORT_UNUSED;
2361}
2362
2363
2364/**
2365 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2366 */
2367static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2368{
2369 RT_NOREF(offPort, pvUser);
2370 Assert(offPort == 0);
2371
2372 if (cb == 1)
2373 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2374 else
2375 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2376 return VINF_SUCCESS;
2377}
2378
2379
2380/**
2381 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2382 */
2383static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2384{
2385 RT_NOREF(pvUser, offPort);
2386 Assert(offPort == 0);
2387
2388 if (cb == 1)
2389 {
2390 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2391 return VINF_SUCCESS;
2392 }
2393 return VERR_IOM_IOPORT_UNUSED;
2394}
2395
2396
2397/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2398
2399/**
2400 * FDC debugger info callback.
2401 *
2402 * @param pDevIns The device instance.
2403 * @param pHlp The output helpers.
2404 * @param pszArgs The arguments.
2405 */
2406static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2407{
2408 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2409 unsigned i;
2410 bool fVerbose = false;
2411
2412 /* Parse arguments. */
2413 if (pszArgs)
2414 fVerbose = strstr(pszArgs, "verbose") != NULL;
2415
2416 /* Show basic information. */
2417 pHlp->pfnPrintf(pHlp, "%s#%d: ",
2418 pDevIns->pReg->szName,
2419 pDevIns->iInstance);
2420 pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2421 pThis->io_base,
2422 pThis->irq_lvl,
2423 pThis->dma_chann);
2424 pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2425
2426 /* Print register contents. */
2427 pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2428 pThis->msr, pThis->dsr, pThis->dor);
2429 pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2430 fdctrl_read_dir(pThis));
2431
2432 /* Print the current command, if any. */
2433 if (pThis->cur_cmd)
2434 pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2435 pThis->cur_cmd,
2436 handlers[command_to_handler[pThis->cur_cmd]].name);
2437 if (pThis->prev_cmd)
2438 pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2439 pThis->prev_cmd,
2440 handlers[command_to_handler[pThis->prev_cmd]].name);
2441
2442
2443 for (i = 0; i < pThis->num_floppies; ++i)
2444 {
2445 fdrive_t *drv = &pThis->drives[i];
2446 pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2447 pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2448 drv->max_track,
2449 drv->last_sect);
2450 pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2451 drv->track,
2452 drv->head,
2453 drv->sect);
2454 }
2455}
2456
2457
2458/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2459
2460/**
2461 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2462 */
2463static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2464{
2465 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2466 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2467 unsigned int i;
2468 int rc;
2469
2470 /* Save the FDC I/O registers... */
2471 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2472 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2473 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2474 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2475 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2476 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2477 /* ...the status registers... */
2478 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2479 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2480 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2481 /* ...the command FIFO... */
2482 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2483 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2484 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2485 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2486 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2487 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2488 /* ...and miscellaneous internal FDC state. */
2489 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2490 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2491 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2492 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2493 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2494 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2495 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2496 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2497 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2498
2499 /* Save the number of drives and per-drive state. Note that the media
2500 * states will be updated in fd_revalidate() and need not be saved.
2501 */
2502 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2503 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2504 for (i = 0; i < pThis->num_floppies; ++i)
2505 {
2506 fdrive_t *d = &pThis->drives[i];
2507
2508 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2509 pHlp->pfnSSMPutU32(pSSM, d->drive);
2510 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2511 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2512 pHlp->pfnSSMPutU8(pSSM, d->head);
2513 pHlp->pfnSSMPutU8(pSSM, d->track);
2514 pHlp->pfnSSMPutU8(pSSM, d->sect);
2515 }
2516 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2517 AssertRCReturn(rc, rc);
2518 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2519 AssertRCReturn(rc, rc);
2520 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2521}
2522
2523
2524/**
2525 * @callback_method_impl{FNSSMDEVLOADEXEC}
2526 */
2527static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2528{
2529 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2530 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2531 unsigned int i;
2532 uint32_t val32;
2533 uint8_t val8;
2534 int rc;
2535
2536 if (uVersion > FDC_SAVESTATE_CURRENT)
2537 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2538 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2539
2540 if (uVersion > FDC_SAVESTATE_OLD)
2541 {
2542 /* Load the FDC I/O registers... */
2543 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2544 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2545 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2546 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2547 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2548 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2549 /* ...the status registers... */
2550 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2551 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2552 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2553 /* ...the command FIFO, if the size matches... */
2554 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2555 AssertRCReturn(rc, rc);
2556 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2557 ("The size of FIFO in saved state doesn't match!\n"),
2558 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2559 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2560 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2561 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2562 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2563 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2564 /* ...and miscellaneous internal FDC state. */
2565 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2566 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2567 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2568 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2569 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2570 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2571 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2572 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2573 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2574
2575 /* Validate the number of drives. */
2576 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2577 AssertRCReturn(rc, rc);
2578 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2579 ("The number of drives in saved state doesn't match!\n"),
2580 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2581
2582 /* Load the per-drive state. */
2583 for (i = 0; i < pThis->num_floppies; ++i)
2584 {
2585 fdrive_t *d = &pThis->drives[i];
2586
2587 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2588 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2589 AssertRCReturn(rc, rc);
2590 d->drive = (fdrive_type_t)val32;
2591 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2592 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2593 pHlp->pfnSSMGetU8(pSSM, &d->head);
2594 pHlp->pfnSSMGetU8(pSSM, &d->track);
2595 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2596 }
2597
2598 if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2599 {
2600 pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2601 pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2602 }
2603 }
2604 else if (uVersion == FDC_SAVESTATE_OLD)
2605 {
2606 /* The old saved state was significantly different. However, we can get
2607 * back most of the controller state and fix the rest by pretending the
2608 * disk in the drive (if any) has been replaced. At any rate there should
2609 * be no difficulty unless the state was saved during a floppy operation.
2610 */
2611
2612 /* First verify a few assumptions. */
2613 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2614 ("The size of FIFO in saved state doesn't match!\n"),
2615 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2616 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2617 ("The number of drives in old saved state doesn't match!\n"),
2618 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2619 /* Now load the old state. */
2620 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2621 /* Toss IRQ level, DMA channel, I/O base, and state. */
2622 pHlp->pfnSSMGetU8(pSSM, &val8);
2623 pHlp->pfnSSMGetU8(pSSM, &val8);
2624 pHlp->pfnSSMGetU32(pSSM, &val32);
2625 pHlp->pfnSSMGetU8(pSSM, &val8);
2626 /* Translate dma_en. */
2627 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2628 AssertRCReturn(rc, rc);
2629 if (val8)
2630 pThis->dor |= FD_DOR_DMAEN;
2631 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2632 /* Translate bootsel. */
2633 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2634 AssertRCReturn(rc, rc);
2635 pThis->tdr |= val8 << 2;
2636 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2637 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2638 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2639 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2640 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2641 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2642 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2643 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2644 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2645 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2646 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2647 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2648 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2649
2650 for (i = 0; i < 2; ++i)
2651 {
2652 fdrive_t *d = &pThis->drives[i];
2653
2654 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2655 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2656 d->drive = (fdrive_type_t)val32;
2657 AssertRCReturn(rc, rc);
2658 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2659 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2660 pHlp->pfnSSMGetU8(pSSM, &d->head);
2661 pHlp->pfnSSMGetU8(pSSM, &d->track);
2662 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2663 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2664 pHlp->pfnSSMGetU8(pSSM, &val8);
2665 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2666 AssertRCReturn(rc, rc);
2667 d->flags = (fdrive_flags_t)val32;
2668 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2669 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2670 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2671 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2672 }
2673 }
2674 else
2675 AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2676 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2677}
2678
2679
2680/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2681
2682/**
2683 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2684 */
2685static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2686{
2687 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2688 LogFlow(("fdMountNotify:\n"));
2689 fd_revalidate(pDrv);
2690}
2691
2692
2693/**
2694 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2695 */
2696static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2697{
2698 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2699 LogFlow(("fdUnmountNotify:\n"));
2700 fd_revalidate(pDrv);
2701}
2702
2703
2704/**
2705 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2706 */
2707static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2708{
2709 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2710
2711 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2712 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2713 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2714 return NULL;
2715}
2716
2717
2718/**
2719 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2720 */
2721static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2722 uint32_t *piInstance, uint32_t *piLUN)
2723{
2724 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2725 PPDMDEVINS pDevIns = pDrv->pDevIns;
2726
2727 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2728 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2729 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2730
2731 *ppcszController = pDevIns->pReg->szName;
2732 *piInstance = pDevIns->iInstance;
2733 *piLUN = pDrv->iLUN;
2734
2735 return VINF_SUCCESS;
2736}
2737
2738/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2739
2740/**
2741 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2742 */
2743static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2744{
2745 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2746 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2747 *ppLed = &pThis->drives[iLUN].Led;
2748 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2749 return VINF_SUCCESS;
2750 }
2751 return VERR_PDM_LUN_NOT_FOUND;
2752}
2753
2754
2755/**
2756 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2757 */
2758static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2759{
2760 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2761
2762 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2763 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2764 return NULL;
2765}
2766
2767
2768/**
2769 * Configure a drive.
2770 *
2771 * @returns VBox status code.
2772 * @param drv The drive in question.
2773 * @param pDevIns The driver instance.
2774 * @param fInit Set if we're at init time and can change the drive type.
2775 */
2776static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2777{
2778 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2779 int rc;
2780
2781 /*
2782 * Reset the LED just to be on the safe side.
2783 */
2784 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2785 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2786 drv->Led.Actual.u32 = 0;
2787 drv->Led.Asserted.u32 = 0;
2788
2789 /*
2790 * Try attach the block device and get the interfaces.
2791 */
2792 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2793 if (RT_SUCCESS (rc)) {
2794 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2795 if (drv->pDrvMedia) {
2796 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2797 if (drv->pDrvMount) {
2798 fd_init(drv, fInit);
2799 } else {
2800 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2801 rc = VERR_PDM_MISSING_INTERFACE;
2802 }
2803
2804 } else {
2805 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2806 rc = VERR_PDM_MISSING_INTERFACE;
2807 }
2808 } else {
2809 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2810 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2811 switch (rc) {
2812 case VERR_ACCESS_DENIED:
2813 /* Error already cached by DrvHostBase */
2814 break;
2815 case VERR_PDM_NO_ATTACHED_DRIVER:
2816 /* Legal on architectures without a floppy controller */
2817 break;
2818 default:
2819 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2820 N_ ("The floppy controller cannot attach to the floppy drive"));
2821 break;
2822 }
2823 }
2824
2825 if (RT_FAILURE (rc)) {
2826 drv->pDrvBase = NULL;
2827 drv->pDrvMedia = NULL;
2828 drv->pDrvMount = NULL;
2829 }
2830 LogFlow (("fdConfig: returns %Rrc\n", rc));
2831 return rc;
2832}
2833
2834
2835/**
2836 * @interface_method_impl{PDMDEVREG,pfnAttach}
2837 *
2838 * This is called when we change block driver for a floppy drive.
2839 */
2840static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2841{
2842 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2843 fdrive_t *drv;
2844 int rc;
2845 LogFlow (("fdcAttach: iLUN=%u\n", iLUN));
2846
2847 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2848 ("The FDC device does not support hotplugging\n"),
2849 VERR_INVALID_PARAMETER);
2850
2851 /*
2852 * Validate.
2853 */
2854 if (iLUN >= 2) {
2855 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2856 iLUN));
2857 return VERR_PDM_DEVINS_NO_ATTACH;
2858 }
2859
2860 /*
2861 * Locate the drive and stuff.
2862 */
2863 drv = &fdctrl->drives[iLUN];
2864
2865 /* the usual paranoia */
2866 AssertRelease (!drv->pDrvBase);
2867 AssertRelease (!drv->pDrvMedia);
2868 AssertRelease (!drv->pDrvMount);
2869
2870 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2871 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2872 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2873 if (RT_SUCCESS(rc)) {
2874 fd_revalidate (drv);
2875 }
2876
2877 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2878 return rc;
2879}
2880
2881
2882/**
2883 * @interface_method_impl{PDMDEVREG,pfnDetach}
2884 *
2885 * The floppy drive has been temporarily 'unplugged'.
2886 */
2887static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2888{
2889 RT_NOREF(fFlags);
2890 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2891 LogFlow (("fdcDetach: iLUN=%u\n", iLUN));
2892
2893 switch (iLUN)
2894 {
2895 case 0:
2896 case 1:
2897 {
2898 fdrive_t *drv = &pThis->drives[iLUN];
2899 drv->pDrvBase = NULL;
2900 drv->pDrvMedia = NULL;
2901 drv->pDrvMount = NULL;
2902 break;
2903 }
2904
2905 default:
2906 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2907 break;
2908 }
2909}
2910
2911
2912/**
2913 * @interface_method_impl{PDMDEVREG,pfnReset}
2914 *
2915 * I haven't check the specs on what's supposed to happen on reset, but we
2916 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2917 * at wrong time like we do if this was all void.
2918 */
2919static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2920{
2921 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2922 unsigned i;
2923 LogFlow (("fdcReset:\n"));
2924
2925 fdctrl_reset(pThis, 0);
2926
2927 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2928 fd_revalidate(&pThis->drives[i]);
2929}
2930
2931
2932/**
2933 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2934 */
2935static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2936{
2937 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2938 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2939 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2940 int rc;
2941
2942 RT_NOREF(iInstance);
2943 Assert(iInstance == 0);
2944
2945 /*
2946 * Validate configuration.
2947 */
2948 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2949
2950 /*
2951 * Read the configuration.
2952 */
2953 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2954 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2955
2956 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2957 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2958
2959 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2960 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2961
2962 bool fMemMapped;
2963 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2964 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2965
2966 uint16_t uIrqDelay;
2967 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2968 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2969
2970 bool fStatusA;
2971 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2972 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2973
2974 /*
2975 * Initialize data.
2976 */
2977 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2978 pThis->pDevIns = pDevIns;
2979 pThis->version = 0x90; /* Intel 82078 controller */
2980 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2981 pThis->num_floppies = MAX_FD;
2982 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2983 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2984 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2985
2986 /* Fill 'command_to_handler' lookup table */
2987 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2988 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2989 if ((j & handlers[ii].mask) == handlers[ii].value)
2990 command_to_handler[j] = ii;
2991
2992 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
2993 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
2994
2995 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
2996 {
2997 fdrive_t *pDrv = &pThis->drives[i];
2998
2999 pDrv->drive = FDRIVE_DRV_NONE;
3000 pDrv->iLUN = i;
3001 pDrv->pDevIns = pDevIns;
3002
3003 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
3004 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
3005 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
3006 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
3007 pDrv->Led.u32Magic = PDMLED_MAGIC;
3008 }
3009
3010 /*
3011 * Create the FDC timer.
3012 */
3013 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
3014 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3015 "FDC Timer", &pThis->hResultTimer);
3016 AssertRCReturn(rc, rc);
3017
3018 /*
3019 * Create the transfer delay timer.
3020 */
3021 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3022 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3023 "FDC Transfer Delay", &pThis->hXferDelayTimer);
3024 AssertRCReturn(rc, rc);
3025
3026 /*
3027 * Create the IRQ delay timer.
3028 */
3029 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3030 TMTIMER_FLAGS_DEFAULT_CRIT_SECT | TMTIMER_FLAGS_NO_RING0,
3031 "FDC IRQ Delay", &pThis->hIrqDelayTimer);
3032 AssertRCReturn(rc, rc);
3033
3034 pThis->uIrqDelayMsec = uIrqDelay;
3035
3036 /*
3037 * Register DMA channel.
3038 */
3039 if (pThis->dma_chann != 0xff)
3040 {
3041 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3042 AssertRCReturn(rc, rc);
3043 }
3044
3045 /*
3046 * IO / MMIO.
3047 *
3048 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3049 * Why we skip registering status register A, though, isn't as clear.
3050 */
3051 if (!fMemMapped)
3052 {
3053 static const IOMIOPORTDESC s_aDescs[] =
3054 {
3055 { "SRA", NULL, "Status register A", NULL },
3056 { "SRB", NULL, "Status register B", NULL },
3057 { "DOR", "DOR", "Digital output register", "Digital output register"},
3058 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
3059 { "MSR", "DSR", "Main status register", "Datarate select register" },
3060 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3061 { "ATA", "ATA", NULL, NULL },
3062 { "DIR", "CCR", "Digital input register", "Configuration control register"},
3063 { NULL, NULL, NULL, NULL }
3064 };
3065
3066 /* 0x3f0 */
3067 if (fStatusA)
3068 {
3069 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
3070 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3071 AssertRCReturn(rc, rc);
3072 }
3073
3074 /* 0x3f1..0x3f5 */
3075 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3076 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3077 AssertRCReturn(rc, rc);
3078
3079 /* 0x3f7 */
3080 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3081 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3082 AssertRCReturn(rc, rc);
3083 }
3084 else
3085 AssertMsgFailedReturn(("Memory mapped floppy not supported\n"), VERR_NOT_SUPPORTED);
3086
3087 /*
3088 * Register the saved state data unit.
3089 */
3090 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3091 AssertRCReturn(rc, rc);
3092
3093 /*
3094 * Register the debugger info callback.
3095 */
3096 PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3097
3098 /*
3099 * Attach the status port (optional).
3100 */
3101 PPDMIBASE pBase;
3102 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3103 if (RT_SUCCESS (rc))
3104 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3105 else
3106 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3107
3108 /*
3109 * Initialize drives.
3110 */
3111 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3112 {
3113 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
3114 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
3115 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3116 rc);
3117 }
3118
3119 fdctrl_reset(pThis, 0);
3120
3121 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3122 fd_revalidate(&pThis->drives[i]);
3123
3124 return VINF_SUCCESS;
3125}
3126
3127
3128/**
3129 * The device registration structure.
3130 */
3131const PDMDEVREG g_DeviceFloppyController =
3132{
3133 /* .u32Version = */ PDM_DEVREG_VERSION,
3134 /* .uReserved0 = */ 0,
3135 /* .szName = */ "i82078",
3136 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3137 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3138 /* .cMaxInstances = */ 1,
3139 /* .uSharedVersion = */ 42,
3140 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3141 /* .cbInstanceCC = */ 0,
3142 /* .cbInstanceRC = */ 0,
3143 /* .cMaxPciDevices = */ 0,
3144 /* .cMaxMsixVectors = */ 0,
3145 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3146#if defined(IN_RING3)
3147 /* .pszRCMod = */ "",
3148 /* .pszR0Mod = */ "",
3149 /* .pfnConstruct = */ fdcConstruct,
3150 /* .pfnDestruct = */ NULL,
3151 /* .pfnRelocate = */ NULL,
3152 /* .pfnMemSetup = */ NULL,
3153 /* .pfnPowerOn = */ NULL,
3154 /* .pfnReset = */ fdcReset,
3155 /* .pfnSuspend = */ NULL,
3156 /* .pfnResume = */ NULL,
3157 /* .pfnAttach = */ fdcAttach,
3158 /* .pfnDetach = */ fdcDetach,
3159 /* .pfnQueryInterface = */ NULL,
3160 /* .pfnInitComplete = */ NULL,
3161 /* .pfnPowerOff = */ NULL,
3162 /* .pfnSoftReset = */ NULL,
3163 /* .pfnReserved0 = */ NULL,
3164 /* .pfnReserved1 = */ NULL,
3165 /* .pfnReserved2 = */ NULL,
3166 /* .pfnReserved3 = */ NULL,
3167 /* .pfnReserved4 = */ NULL,
3168 /* .pfnReserved5 = */ NULL,
3169 /* .pfnReserved6 = */ NULL,
3170 /* .pfnReserved7 = */ NULL,
3171#elif defined(IN_RING0)
3172 /* .pfnEarlyConstruct = */ NULL,
3173 /* .pfnConstruct = */ NULL,
3174 /* .pfnDestruct = */ NULL,
3175 /* .pfnFinalDestruct = */ NULL,
3176 /* .pfnRequest = */ NULL,
3177 /* .pfnReserved0 = */ NULL,
3178 /* .pfnReserved1 = */ NULL,
3179 /* .pfnReserved2 = */ NULL,
3180 /* .pfnReserved3 = */ NULL,
3181 /* .pfnReserved4 = */ NULL,
3182 /* .pfnReserved5 = */ NULL,
3183 /* .pfnReserved6 = */ NULL,
3184 /* .pfnReserved7 = */ NULL,
3185#elif defined(IN_RC)
3186 /* .pfnConstruct = */ NULL,
3187 /* .pfnReserved0 = */ NULL,
3188 /* .pfnReserved1 = */ NULL,
3189 /* .pfnReserved2 = */ NULL,
3190 /* .pfnReserved3 = */ NULL,
3191 /* .pfnReserved4 = */ NULL,
3192 /* .pfnReserved5 = */ NULL,
3193 /* .pfnReserved6 = */ NULL,
3194 /* .pfnReserved7 = */ NULL,
3195#else
3196# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3197#endif
3198 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3199};
3200
3201/*
3202 * Local Variables:
3203 * mode: c
3204 * c-file-style: "k&r"
3205 * indent-tabs-mode: nil
3206 * End:
3207 */
3208
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