[2781] | 1 | /* $Id: DevRTC.cpp 38195 2011-07-27 11:21:13Z vboxsync $ */
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[1] | 2 | /** @file
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[27460] | 3 | * Motorola MC146818 RTC/CMOS Device with PIIX4 extensions.
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[1] | 4 | */
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| 5 |
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| 6 | /*
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[37514] | 7 | * Copyright (C) 2006-2011 Oracle Corporation
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[1] | 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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[5999] | 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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[1] | 16 | * --------------------------------------------------------------------
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| 17 | *
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| 18 | * This code is based on:
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| 19 | *
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| 20 | * QEMU MC146818 RTC emulation
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| 21 | *
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| 22 | * Copyright (c) 2003-2004 Fabrice Bellard
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| 23 | *
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| 24 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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| 25 | * of this software and associated documentation files (the "Software"), to deal
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| 26 | * in the Software without restriction, including without limitation the rights
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| 27 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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| 28 | * copies of the Software, and to permit persons to whom the Software is
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| 29 | * furnished to do so, subject to the following conditions:
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| 30 | *
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| 31 | * The above copyright notice and this permission notice shall be included in
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| 32 | * all copies or substantial portions of the Software.
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| 33 | *
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| 34 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 35 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 36 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 37 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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| 38 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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| 39 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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| 40 | * THE SOFTWARE.
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| 41 | */
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| 42 |
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| 43 | /*******************************************************************************
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| 44 | * Header Files *
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| 45 | *******************************************************************************/
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| 46 | #define LOG_GROUP LOG_GROUP_DEV_RTC
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[35346] | 47 | #include <VBox/vmm/pdmdev.h>
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[1] | 48 | #include <VBox/log.h>
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[29250] | 49 | #include <iprt/asm-math.h>
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[1] | 50 | #include <iprt/assert.h>
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[11209] | 51 | #include <iprt/string.h>
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[1] | 52 |
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[27121] | 53 | #ifdef IN_RING3
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| 54 | # include <iprt/alloc.h>
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| 55 | # include <iprt/uuid.h>
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| 56 | #endif /* IN_RING3 */
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| 57 |
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[35353] | 58 | #include "VBoxDD.h"
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[11214] | 59 |
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[1] | 60 | struct RTCState;
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| 61 | typedef struct RTCState RTCState;
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| 62 |
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| 63 | #define RTC_CRC_START 0x10
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| 64 | #define RTC_CRC_LAST 0x2d
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| 65 | #define RTC_CRC_HIGH 0x2e
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| 66 | #define RTC_CRC_LOW 0x2f
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| 67 |
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[11209] | 68 |
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[1] | 69 | /*******************************************************************************
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| 70 | * Internal Functions *
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| 71 | *******************************************************************************/
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[11209] | 72 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
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[20374] | 73 | RT_C_DECLS_BEGIN
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[1] | 74 | PDMBOTHCBDECL(int) rtcIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
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| 75 | PDMBOTHCBDECL(int) rtcIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
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[20087] | 76 | PDMBOTHCBDECL(void) rtcTimerPeriodic(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
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| 77 | PDMBOTHCBDECL(void) rtcTimerSecond(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
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| 78 | PDMBOTHCBDECL(void) rtcTimerSecond2(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser);
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[20374] | 79 | RT_C_DECLS_END
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[487] | 80 | #endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
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[1] | 81 |
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[11209] | 82 |
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| 83 | /*******************************************************************************
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| 84 | * Defined Constants And Macros *
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| 85 | *******************************************************************************/
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[1] | 86 | /*#define DEBUG_CMOS*/
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| 87 |
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| 88 | #define RTC_SECONDS 0
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| 89 | #define RTC_SECONDS_ALARM 1
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| 90 | #define RTC_MINUTES 2
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| 91 | #define RTC_MINUTES_ALARM 3
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| 92 | #define RTC_HOURS 4
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| 93 | #define RTC_HOURS_ALARM 5
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| 94 | #define RTC_ALARM_DONT_CARE 0xC0
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| 95 |
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| 96 | #define RTC_DAY_OF_WEEK 6
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| 97 | #define RTC_DAY_OF_MONTH 7
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| 98 | #define RTC_MONTH 8
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| 99 | #define RTC_YEAR 9
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| 100 |
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| 101 | #define RTC_REG_A 10
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| 102 | #define RTC_REG_B 11
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| 103 | #define RTC_REG_C 12
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| 104 | #define RTC_REG_D 13
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| 105 |
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| 106 | #define REG_A_UIP 0x80
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| 107 |
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| 108 | #define REG_B_SET 0x80
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| 109 | #define REG_B_PIE 0x40
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| 110 | #define REG_B_AIE 0x20
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| 111 | #define REG_B_UIE 0x10
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| 112 |
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[11209] | 113 |
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[24089] | 114 | /** The saved state version. */
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[27460] | 115 | #define RTC_SAVED_STATE_VERSION 4
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| 116 | /** The saved state version used by VirtualBox pre-3.2.
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| 117 | * This does not include the second 128-byte bank. */
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| 118 | #define RTC_SAVED_STATE_VERSION_VBOX_32PRE 3
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[27121] | 119 | /** The saved state version used by VirtualBox 3.1 and earlier.
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[27460] | 120 | * This does not include disabled by HPET state. */
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[27121] | 121 | #define RTC_SAVED_STATE_VERSION_VBOX_31 2
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[24089] | 122 | /** The saved state version used by VirtualBox 3.0 and earlier.
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| 123 | * This does not include the configuration. */
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| 124 | #define RTC_SAVED_STATE_VERSION_VBOX_30 1
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| 125 |
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| 126 |
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[11209] | 127 | /*******************************************************************************
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| 128 | * Structures and Typedefs *
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| 129 | *******************************************************************************/
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[5310] | 130 | /** @todo Replace struct my_tm with RTTIME. */
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[9088] | 131 | struct my_tm
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[5308] | 132 | {
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| 133 | int32_t tm_sec;
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| 134 | int32_t tm_min;
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| 135 | int32_t tm_hour;
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| 136 | int32_t tm_mday;
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| 137 | int32_t tm_mon;
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| 138 | int32_t tm_year;
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| 139 | int32_t tm_wday;
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| 140 | int32_t tm_yday;
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| 141 | };
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| 142 |
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| 143 |
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[1] | 144 | struct RTCState {
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[27460] | 145 | uint8_t cmos_data[256];
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| 146 | uint8_t cmos_index[2];
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| 147 | uint8_t Alignment0[6];
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[5308] | 148 | struct my_tm current_tm;
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[24089] | 149 | /** The configured IRQ. */
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[1] | 150 | int32_t irq;
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[24089] | 151 | /** The configured I/O port base. */
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| 152 | RTIOPORT IOPortBase;
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[11245] | 153 | /** Use UTC or local time initially. */
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| 154 | bool fUTC;
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[27126] | 155 | /** Disabled by HPET legacy mode. */
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| 156 | bool fDisabledByHpet;
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[1] | 157 | /* periodic timer */
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| 158 | int64_t next_periodic_time;
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| 159 | /* second update */
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| 160 | int64_t next_second_time;
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[11211] | 161 |
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| 162 | /** Pointer to the device instance - R3 Ptr. */
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| 163 | PPDMDEVINSR3 pDevInsR3;
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| 164 | /** The periodic timer (rtcTimerPeriodic) - R3 Ptr. */
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| 165 | PTMTIMERR3 pPeriodicTimerR3;
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| 166 | /** The second timer (rtcTimerSecond) - R3 Ptr. */
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| 167 | PTMTIMERR3 pSecondTimerR3;
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| 168 | /** The second second timer (rtcTimerSecond2) - R3 Ptr. */
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| 169 | PTMTIMERR3 pSecondTimer2R3;
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| 170 |
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| 171 | /** Pointer to the device instance - R0 Ptr. */
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| 172 | PPDMDEVINSR0 pDevInsR0;
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| 173 | /** The periodic timer (rtcTimerPeriodic) - R0 Ptr. */
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[11217] | 174 | PTMTIMERR0 pPeriodicTimerR0;
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| 175 | /** The second timer (rtcTimerSecond) - R0 Ptr. */
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[11211] | 176 | PTMTIMERR0 pSecondTimerR0;
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| 177 | /** The second second timer (rtcTimerSecond2) - R0 Ptr. */
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| 178 | PTMTIMERR0 pSecondTimer2R0;
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| 179 |
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| 180 | /** Pointer to the device instance - RC Ptr. */
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| 181 | PPDMDEVINSRC pDevInsRC;
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| 182 | /** The periodic timer (rtcTimerPeriodic) - RC Ptr. */
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| 183 | PTMTIMERRC pPeriodicTimerRC;
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| 184 | /** The second timer (rtcTimerSecond) - RC Ptr. */
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| 185 | PTMTIMERRC pSecondTimerRC;
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| 186 | /** The second second timer (rtcTimerSecond2) - RC Ptr. */
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| 187 | PTMTIMERRC pSecondTimer2RC;
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| 188 |
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[1] | 189 | /** The RTC registration structure. */
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[11211] | 190 | PDMRTCREG RtcReg;
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[1] | 191 | /** The RTC device helpers. */
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[11211] | 192 | R3PTRTYPE(PCPDMRTCHLP) pRtcHlpR3;
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[3257] | 193 | /** Number of release log entries. Used to prevent flooding. */
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[11211] | 194 | uint32_t cRelLogEntries;
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[32484] | 195 | /** The current/previous logged timer period. */
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| 196 | int32_t CurLogPeriod;
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| 197 | /** The current/previous hinted timer period. */
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| 198 | int32_t CurHintPeriod;
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| 199 | uint32_t u32AlignmentPadding;
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[27126] | 200 |
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| 201 | /** HPET legacy mode notification interface. */
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| 202 | PDMIHPETLEGACYNOTIFY IHpetLegacyNotify;
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[1] | 203 | };
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| 204 |
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[487] | 205 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
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[1] | 206 |
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[37511] | 207 | static void rtc_timer_update(RTCState *pThis, int64_t current_time)
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[1] | 208 | {
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| 209 | int period_code, period;
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[2285] | 210 | uint64_t cur_clock, next_irq_clock;
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[1] | 211 | uint32_t freq;
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| 212 |
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[37513] | 213 | Assert(TMTimerIsLockOwner(pThis->CTX_SUFF(pPeriodicTimer)));
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| 214 | Assert(PDMCritSectIsOwner(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo)));
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| 215 |
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[37511] | 216 | period_code = pThis->cmos_data[RTC_REG_A] & 0x0f;
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| 217 | if ( period_code != 0
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| 218 | && (pThis->cmos_data[RTC_REG_B] & REG_B_PIE))
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| 219 | {
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[1] | 220 | if (period_code <= 2)
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| 221 | period_code += 7;
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| 222 | /* period in 32 kHz cycles */
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| 223 | period = 1 << (period_code - 1);
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| 224 | /* compute 32 kHz clock */
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[37511] | 225 | freq = TMTimerGetFreq(pThis->CTX_SUFF(pPeriodicTimer));
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[1] | 226 |
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[1912] | 227 | cur_clock = ASMMultU64ByU32DivByU32(current_time, 32768, freq);
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[1] | 228 | next_irq_clock = (cur_clock & ~(uint64_t)(period - 1)) + period;
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[37511] | 229 | pThis->next_periodic_time = ASMMultU64ByU32DivByU32(next_irq_clock, freq, 32768) + 1;
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| 230 | TMTimerSet(pThis->CTX_SUFF(pPeriodicTimer), pThis->next_periodic_time);
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[2613] | 231 |
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[30846] | 232 | #ifdef IN_RING3
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[37511] | 233 | if (RT_UNLIKELY(period != pThis->CurLogPeriod))
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[32484] | 234 | #else
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[37511] | 235 | if (RT_UNLIKELY(period != pThis->CurHintPeriod))
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[32484] | 236 | #endif
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[3257] | 237 | {
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[32484] | 238 | #ifdef IN_RING3
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[37511] | 239 | if (pThis->cRelLogEntries++ < 64)
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[3257] | 240 | LogRel(("RTC: period=%#x (%d) %u Hz\n", period, period, _32K / period));
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[37511] | 241 | pThis->CurLogPeriod = period;
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[32484] | 242 | #endif
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[37511] | 243 | pThis->CurHintPeriod = period;
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| 244 | TMTimerSetFrequencyHint(pThis->CTX_SUFF(pPeriodicTimer), _32K / period);
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[3257] | 245 | }
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[37511] | 246 | }
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| 247 | else
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| 248 | {
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| 249 | if (TMTimerIsActive(pThis->CTX_SUFF(pPeriodicTimer)) && pThis->cRelLogEntries++ < 64)
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[2907] | 250 | LogRel(("RTC: stopped the periodic timer\n"));
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[37511] | 251 | TMTimerStop(pThis->CTX_SUFF(pPeriodicTimer));
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[1] | 252 | }
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| 253 | }
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| 254 |
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[37512] | 255 |
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[27121] | 256 | static void rtc_raise_irq(RTCState* pThis, uint32_t iLevel)
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| 257 | {
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| 258 | if (!pThis->fDisabledByHpet)
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| 259 | PDMDevHlpISASetIrq(pThis->CTX_SUFF(pDevIns), pThis->irq, iLevel);
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| 260 | }
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| 261 |
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[1] | 262 |
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[37511] | 263 | DECLINLINE(int) to_bcd(RTCState *pThis, int a)
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[1] | 264 | {
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[37512] | 265 | if (pThis->cmos_data[RTC_REG_B] & 0x04)
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[1] | 266 | return a;
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[37512] | 267 | return ((a / 10) << 4) | (a % 10);
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[1] | 268 | }
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| 269 |
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[37512] | 270 |
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[37511] | 271 | DECLINLINE(int) from_bcd(RTCState *pThis, int a)
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[1] | 272 | {
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[37512] | 273 | if (pThis->cmos_data[RTC_REG_B] & 0x04)
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[1] | 274 | return a;
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[37512] | 275 | return ((a >> 4) * 10) + (a & 0x0f);
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[1] | 276 | }
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| 277 |
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[37512] | 278 |
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[37511] | 279 | static void rtc_set_time(RTCState *pThis)
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[1] | 280 | {
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[37511] | 281 | struct my_tm *tm = &pThis->current_tm;
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[1] | 282 |
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[37511] | 283 | tm->tm_sec = from_bcd(pThis, pThis->cmos_data[RTC_SECONDS]);
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| 284 | tm->tm_min = from_bcd(pThis, pThis->cmos_data[RTC_MINUTES]);
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| 285 | tm->tm_hour = from_bcd(pThis, pThis->cmos_data[RTC_HOURS] & 0x7f);
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| 286 | if ( !(pThis->cmos_data[RTC_REG_B] & 0x02)
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| 287 | && (pThis->cmos_data[RTC_HOURS] & 0x80))
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[1] | 288 | tm->tm_hour += 12;
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[37511] | 289 | tm->tm_wday = from_bcd(pThis, pThis->cmos_data[RTC_DAY_OF_WEEK]);
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| 290 | tm->tm_mday = from_bcd(pThis, pThis->cmos_data[RTC_DAY_OF_MONTH]);
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| 291 | tm->tm_mon = from_bcd(pThis, pThis->cmos_data[RTC_MONTH]) - 1;
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| 292 | tm->tm_year = from_bcd(pThis, pThis->cmos_data[RTC_YEAR]) + 100;
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| 293 | }
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| 294 |
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| 295 |
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[37512] | 296 | /* -=-=-=-=-=- I/O Port Handlers -=-=-=-=-=- */
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[37511] | 297 |
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[37512] | 298 |
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[37511] | 299 | /**
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| 300 | * Port I/O Handler for IN operations.
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| 301 | *
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| 302 | * @returns VBox status code.
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| 303 | *
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| 304 | * @param pDevIns The device instance.
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| 305 | * @param pvUser User argument - ignored.
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| 306 | * @param uPort Port number used for the IN operation.
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| 307 | * @param pu32 Where to store the result.
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| 308 | * @param cb Number of bytes read.
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| 309 | */
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| 310 | PDMBOTHCBDECL(int) rtcIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
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| 311 | {
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| 312 | NOREF(pvUser);
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| 313 | if (cb != 1)
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| 314 | return VERR_IOM_IOPORT_UNUSED;
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| 315 |
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| 316 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
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| 317 | if ((Port & 1) == 0)
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| 318 | *pu32 = 0xff;
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| 319 | else
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| 320 | {
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| 321 | unsigned bank = (Port >> 1) & 1;
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| 322 | switch (pThis->cmos_index[bank])
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| 323 | {
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| 324 | case RTC_SECONDS:
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| 325 | case RTC_MINUTES:
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| 326 | case RTC_HOURS:
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| 327 | case RTC_DAY_OF_WEEK:
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| 328 | case RTC_DAY_OF_MONTH:
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| 329 | case RTC_MONTH:
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| 330 | case RTC_YEAR:
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| 331 | *pu32 = pThis->cmos_data[pThis->cmos_index[0]];
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| 332 | break;
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| 333 |
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| 334 | case RTC_REG_A:
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| 335 | *pu32 = pThis->cmos_data[pThis->cmos_index[0]];
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| 336 | break;
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| 337 |
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| 338 | case RTC_REG_C:
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| 339 | *pu32 = pThis->cmos_data[pThis->cmos_index[0]];
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| 340 | rtc_raise_irq(pThis, 0);
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| 341 | pThis->cmos_data[RTC_REG_C] = 0x00;
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| 342 | break;
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| 343 |
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| 344 | default:
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| 345 | *pu32 = pThis->cmos_data[pThis->cmos_index[bank]];
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| 346 | break;
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| 347 | }
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| 348 |
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| 349 | Log(("CMOS: Read bank %d idx %#04x: %#04x\n", bank, pThis->cmos_index[bank], *pu32));
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[1] | 350 | }
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[37511] | 351 |
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| 352 | return VINF_SUCCESS;
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[1] | 353 | }
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| 354 |
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[37511] | 355 |
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| 356 | /**
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| 357 | * Port I/O Handler for OUT operations.
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| 358 | *
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| 359 | * @returns VBox status code.
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| 360 | *
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| 361 | * @param pDevIns The device instance.
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| 362 | * @param pvUser User argument - ignored.
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| 363 | * @param uPort Port number used for the IN operation.
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| 364 | * @param u32 The value to output.
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| 365 | * @param cb The value size in bytes.
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| 366 | */
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| 367 | PDMBOTHCBDECL(int) rtcIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
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[1] | 368 | {
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[37511] | 369 | NOREF(pvUser);
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| 370 | if (cb != 1)
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| 371 | return VINF_SUCCESS;
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[1] | 372 |
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[37511] | 373 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 374 | uint32_t bank = (Port >> 1) & 1;
|
---|
| 375 | if ((Port & 1) == 0)
|
---|
| 376 | {
|
---|
| 377 | pThis->cmos_index[bank] = (u32 & 0x7f) + (bank * 128);
|
---|
[1] | 378 | }
|
---|
[37511] | 379 | else
|
---|
| 380 | {
|
---|
| 381 | Log(("CMOS: Write bank %d idx %#04x: %#04x (old %#04x)\n", bank,
|
---|
| 382 | pThis->cmos_index[bank], u32, pThis->cmos_data[pThis->cmos_index[bank]]));
|
---|
| 383 |
|
---|
[37513] | 384 | int const idx = pThis->cmos_index[bank];
|
---|
| 385 | switch (idx)
|
---|
[37511] | 386 | {
|
---|
| 387 | case RTC_SECONDS_ALARM:
|
---|
| 388 | case RTC_MINUTES_ALARM:
|
---|
| 389 | case RTC_HOURS_ALARM:
|
---|
| 390 | pThis->cmos_data[pThis->cmos_index[0]] = u32;
|
---|
| 391 | break;
|
---|
| 392 |
|
---|
| 393 | case RTC_SECONDS:
|
---|
| 394 | case RTC_MINUTES:
|
---|
| 395 | case RTC_HOURS:
|
---|
| 396 | case RTC_DAY_OF_WEEK:
|
---|
| 397 | case RTC_DAY_OF_MONTH:
|
---|
| 398 | case RTC_MONTH:
|
---|
| 399 | case RTC_YEAR:
|
---|
| 400 | pThis->cmos_data[pThis->cmos_index[0]] = u32;
|
---|
| 401 | /* if in set mode, do not update the time */
|
---|
| 402 | if (!(pThis->cmos_data[RTC_REG_B] & REG_B_SET))
|
---|
| 403 | rtc_set_time(pThis);
|
---|
| 404 | break;
|
---|
| 405 |
|
---|
| 406 | case RTC_REG_A:
|
---|
[37513] | 407 | case RTC_REG_B:
|
---|
| 408 | {
|
---|
| 409 | /* We need to acquire the clock lock, because of lock ordering
|
---|
| 410 | issues this means having to release the device lock. Since
|
---|
| 411 | we're letting IOM do the locking, we must not return without
|
---|
| 412 | holding the device lock.*/
|
---|
| 413 | PDMCritSectLeave(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo));
|
---|
| 414 | int rc1 = TMTimerLock(pThis->CTX_SUFF(pPeriodicTimer), VINF_SUCCESS /* must get it */);
|
---|
| 415 | int rc2 = PDMCritSectEnter(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo), VINF_SUCCESS /* must get it */);
|
---|
| 416 | AssertRCReturn(rc1, rc1);
|
---|
| 417 | AssertRCReturnStmt(rc2, TMTimerUnlock(pThis->CTX_SUFF(pPeriodicTimer)), rc2);
|
---|
[37511] | 418 |
|
---|
[37513] | 419 | if (idx == RTC_REG_A)
|
---|
[37511] | 420 | {
|
---|
[37513] | 421 | /* UIP bit is read only */
|
---|
| 422 | pThis->cmos_data[RTC_REG_A] = (u32 & ~REG_A_UIP)
|
---|
| 423 | | (pThis->cmos_data[RTC_REG_A] & REG_A_UIP);
|
---|
[37511] | 424 | }
|
---|
| 425 | else
|
---|
| 426 | {
|
---|
[37513] | 427 | if (u32 & REG_B_SET)
|
---|
| 428 | {
|
---|
| 429 | /* set mode: reset UIP mode */
|
---|
| 430 | pThis->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
|
---|
| 431 | #if 0 /* This is probably wrong as it breaks changing the time/date in OS/2. */
|
---|
| 432 | u32 &= ~REG_B_UIE;
|
---|
| 433 | #endif
|
---|
| 434 | }
|
---|
| 435 | else
|
---|
| 436 | {
|
---|
| 437 | /* if disabling set mode, update the time */
|
---|
| 438 | if (pThis->cmos_data[RTC_REG_B] & REG_B_SET)
|
---|
| 439 | rtc_set_time(pThis);
|
---|
| 440 | }
|
---|
| 441 | pThis->cmos_data[RTC_REG_B] = u32;
|
---|
[37511] | 442 | }
|
---|
[37513] | 443 |
|
---|
[37511] | 444 | rtc_timer_update(pThis, TMTimerGet(pThis->CTX_SUFF(pPeriodicTimer)));
|
---|
[37513] | 445 |
|
---|
| 446 | TMTimerUnlock(pThis->CTX_SUFF(pPeriodicTimer));
|
---|
| 447 | /* the caller leaves the other lock. */
|
---|
[37511] | 448 | break;
|
---|
[37513] | 449 | }
|
---|
[37511] | 450 |
|
---|
| 451 | case RTC_REG_C:
|
---|
| 452 | case RTC_REG_D:
|
---|
| 453 | /* cannot write to them */
|
---|
| 454 | break;
|
---|
| 455 |
|
---|
| 456 | default:
|
---|
| 457 | pThis->cmos_data[pThis->cmos_index[bank]] = u32;
|
---|
| 458 | break;
|
---|
| 459 | }
|
---|
| 460 | }
|
---|
| 461 |
|
---|
| 462 | return VINF_SUCCESS;
|
---|
[1] | 463 | }
|
---|
| 464 |
|
---|
[37511] | 465 | #ifdef IN_RING3
|
---|
| 466 |
|
---|
| 467 | /* -=-=-=-=-=- Timers and their support code -=-=-=-=-=- */
|
---|
| 468 |
|
---|
| 469 |
|
---|
| 470 | /**
|
---|
| 471 | * Device timer callback function, periodic.
|
---|
| 472 | *
|
---|
| 473 | * @param pDevIns Device instance of the device which registered the timer.
|
---|
| 474 | * @param pTimer The timer handle.
|
---|
| 475 | * @param pvUser Pointer to the RTC state.
|
---|
| 476 | */
|
---|
| 477 | static DECLCALLBACK(void) rtcTimerPeriodic(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
|
---|
| 478 | {
|
---|
| 479 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[37513] | 480 | Assert(TMTimerIsLockOwner(pThis->CTX_SUFF(pPeriodicTimer)));
|
---|
| 481 | Assert(PDMCritSectIsOwner(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo)));
|
---|
[37511] | 482 |
|
---|
| 483 | rtc_timer_update(pThis, pThis->next_periodic_time);
|
---|
| 484 | pThis->cmos_data[RTC_REG_C] |= 0xc0;
|
---|
| 485 |
|
---|
| 486 | rtc_raise_irq(pThis, 1);
|
---|
| 487 | }
|
---|
| 488 |
|
---|
| 489 |
|
---|
[1] | 490 | /* month is between 0 and 11. */
|
---|
| 491 | static int get_days_in_month(int month, int year)
|
---|
| 492 | {
|
---|
[37511] | 493 | static const int days_tab[12] =
|
---|
| 494 | {
|
---|
[1] | 495 | 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
|
---|
| 496 | };
|
---|
| 497 | int d;
|
---|
[37511] | 498 |
|
---|
[1] | 499 | if ((unsigned )month >= 12)
|
---|
| 500 | return 31;
|
---|
[37511] | 501 |
|
---|
[1] | 502 | d = days_tab[month];
|
---|
[37511] | 503 | if (month == 1)
|
---|
| 504 | {
|
---|
[1] | 505 | if ((year % 4) == 0 && ((year % 100) != 0 || (year % 400) == 0))
|
---|
| 506 | d++;
|
---|
| 507 | }
|
---|
| 508 | return d;
|
---|
| 509 | }
|
---|
| 510 |
|
---|
[37511] | 511 |
|
---|
[1] | 512 | /* update 'tm' to the next second */
|
---|
[5308] | 513 | static void rtc_next_second(struct my_tm *tm)
|
---|
[1] | 514 | {
|
---|
| 515 | int days_in_month;
|
---|
| 516 |
|
---|
| 517 | tm->tm_sec++;
|
---|
[37511] | 518 | if ((unsigned)tm->tm_sec >= 60)
|
---|
| 519 | {
|
---|
[1] | 520 | tm->tm_sec = 0;
|
---|
| 521 | tm->tm_min++;
|
---|
[37511] | 522 | if ((unsigned)tm->tm_min >= 60)
|
---|
| 523 | {
|
---|
[1] | 524 | tm->tm_min = 0;
|
---|
| 525 | tm->tm_hour++;
|
---|
[37511] | 526 | if ((unsigned)tm->tm_hour >= 24)
|
---|
| 527 | {
|
---|
[1] | 528 | tm->tm_hour = 0;
|
---|
| 529 | /* next day */
|
---|
| 530 | tm->tm_wday++;
|
---|
| 531 | if ((unsigned)tm->tm_wday >= 7)
|
---|
| 532 | tm->tm_wday = 0;
|
---|
| 533 | days_in_month = get_days_in_month(tm->tm_mon,
|
---|
| 534 | tm->tm_year + 1900);
|
---|
| 535 | tm->tm_mday++;
|
---|
[37511] | 536 | if (tm->tm_mday < 1)
|
---|
[1] | 537 | tm->tm_mday = 1;
|
---|
[37511] | 538 | else if (tm->tm_mday > days_in_month)
|
---|
| 539 | {
|
---|
[1] | 540 | tm->tm_mday = 1;
|
---|
| 541 | tm->tm_mon++;
|
---|
[37511] | 542 | if (tm->tm_mon >= 12)
|
---|
| 543 | {
|
---|
[1] | 544 | tm->tm_mon = 0;
|
---|
| 545 | tm->tm_year++;
|
---|
| 546 | }
|
---|
| 547 | }
|
---|
| 548 | }
|
---|
| 549 | }
|
---|
| 550 | }
|
---|
| 551 | }
|
---|
| 552 |
|
---|
| 553 |
|
---|
[37511] | 554 | /**
|
---|
| 555 | * Device timer callback function, second.
|
---|
| 556 | *
|
---|
| 557 | * @param pDevIns Device instance of the device which registered the timer.
|
---|
| 558 | * @param pTimer The timer handle.
|
---|
| 559 | * @param pvUser Pointer to the RTC state.
|
---|
| 560 | */
|
---|
| 561 | static DECLCALLBACK(void) rtcTimerSecond(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
|
---|
[1] | 562 | {
|
---|
[37511] | 563 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[37513] | 564 | Assert(TMTimerIsLockOwner(pThis->CTX_SUFF(pPeriodicTimer)));
|
---|
| 565 | Assert(PDMCritSectIsOwner(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo)));
|
---|
[1] | 566 |
|
---|
| 567 | /* if the oscillator is not in normal operation, we do not update */
|
---|
[37511] | 568 | if ((pThis->cmos_data[RTC_REG_A] & 0x70) != 0x20)
|
---|
| 569 | {
|
---|
| 570 | pThis->next_second_time += TMTimerGetFreq(pThis->CTX_SUFF(pSecondTimer));
|
---|
| 571 | TMTimerSet(pThis->CTX_SUFF(pSecondTimer), pThis->next_second_time);
|
---|
| 572 | }
|
---|
| 573 | else
|
---|
| 574 | {
|
---|
| 575 | rtc_next_second(&pThis->current_tm);
|
---|
[1] | 576 |
|
---|
[37511] | 577 | if (!(pThis->cmos_data[RTC_REG_B] & REG_B_SET))
|
---|
| 578 | {
|
---|
[1] | 579 | /* update in progress bit */
|
---|
[37511] | 580 | Log2(("RTC: UIP %x -> 1\n", !!(pThis->cmos_data[RTC_REG_A] & REG_A_UIP)));
|
---|
| 581 | pThis->cmos_data[RTC_REG_A] |= REG_A_UIP;
|
---|
[1] | 582 | }
|
---|
[9117] | 583 |
|
---|
[9088] | 584 | /* 244140 ns = 8 / 32768 seconds */
|
---|
[37511] | 585 | uint64_t delay = TMTimerFromNano(pThis->CTX_SUFF(pSecondTimer2), 244140);
|
---|
| 586 | TMTimerSet(pThis->CTX_SUFF(pSecondTimer2), pThis->next_second_time + delay);
|
---|
[1] | 587 | }
|
---|
| 588 | }
|
---|
| 589 |
|
---|
| 590 |
|
---|
[37511] | 591 | /* Used by rtc_set_date and rtcTimerSecond2. */
|
---|
| 592 | static void rtc_copy_date(RTCState *pThis)
|
---|
[1] | 593 | {
|
---|
[37511] | 594 | const struct my_tm *tm = &pThis->current_tm;
|
---|
[27460] | 595 |
|
---|
[37511] | 596 | pThis->cmos_data[RTC_SECONDS] = to_bcd(pThis, tm->tm_sec);
|
---|
| 597 | pThis->cmos_data[RTC_MINUTES] = to_bcd(pThis, tm->tm_min);
|
---|
| 598 | if (pThis->cmos_data[RTC_REG_B] & 0x02)
|
---|
| 599 | {
|
---|
| 600 | /* 24 hour format */
|
---|
| 601 | pThis->cmos_data[RTC_HOURS] = to_bcd(pThis, tm->tm_hour);
|
---|
[1] | 602 | }
|
---|
[37511] | 603 | else
|
---|
[1] | 604 | {
|
---|
[37511] | 605 | /* 12 hour format */
|
---|
| 606 | pThis->cmos_data[RTC_HOURS] = to_bcd(pThis, tm->tm_hour % 12);
|
---|
| 607 | if (tm->tm_hour >= 12)
|
---|
| 608 | pThis->cmos_data[RTC_HOURS] |= 0x80;
|
---|
[1] | 609 | }
|
---|
[37511] | 610 | pThis->cmos_data[RTC_DAY_OF_WEEK] = to_bcd(pThis, tm->tm_wday);
|
---|
| 611 | pThis->cmos_data[RTC_DAY_OF_MONTH] = to_bcd(pThis, tm->tm_mday);
|
---|
| 612 | pThis->cmos_data[RTC_MONTH] = to_bcd(pThis, tm->tm_mon + 1);
|
---|
| 613 | pThis->cmos_data[RTC_YEAR] = to_bcd(pThis, tm->tm_year % 100);
|
---|
[1] | 614 | }
|
---|
| 615 |
|
---|
| 616 |
|
---|
| 617 | /**
|
---|
[37511] | 618 | * Device timer callback function, second2.
|
---|
[1] | 619 | *
|
---|
| 620 | * @param pDevIns Device instance of the device which registered the timer.
|
---|
| 621 | * @param pTimer The timer handle.
|
---|
[20087] | 622 | * @param pvUser Pointer to the RTC state.
|
---|
[1] | 623 | */
|
---|
[37511] | 624 | static DECLCALLBACK(void) rtcTimerSecond2(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
|
---|
[1] | 625 | {
|
---|
[37511] | 626 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[37513] | 627 | Assert(TMTimerIsLockOwner(pThis->CTX_SUFF(pPeriodicTimer)));
|
---|
| 628 | Assert(PDMCritSectIsOwner(pThis->CTX_SUFF(pDevIns)->CTX_SUFF(pCritSectRo)));
|
---|
[1] | 629 |
|
---|
[37511] | 630 | if (!(pThis->cmos_data[RTC_REG_B] & REG_B_SET))
|
---|
| 631 | rtc_copy_date(pThis);
|
---|
[1] | 632 |
|
---|
[37511] | 633 | /* check alarm */
|
---|
| 634 | if (pThis->cmos_data[RTC_REG_B] & REG_B_AIE)
|
---|
| 635 | {
|
---|
| 636 | if ( ( (pThis->cmos_data[RTC_SECONDS_ALARM] & 0xc0) == 0xc0
|
---|
| 637 | || from_bcd(pThis, pThis->cmos_data[RTC_SECONDS_ALARM]) == pThis->current_tm.tm_sec)
|
---|
| 638 | && ( (pThis->cmos_data[RTC_MINUTES_ALARM] & 0xc0) == 0xc0
|
---|
| 639 | || from_bcd(pThis, pThis->cmos_data[RTC_MINUTES_ALARM]) == pThis->current_tm.tm_min)
|
---|
| 640 | && ( (pThis->cmos_data[RTC_HOURS_ALARM ] & 0xc0) == 0xc0
|
---|
| 641 | || from_bcd(pThis, pThis->cmos_data[RTC_HOURS_ALARM ]) == pThis->current_tm.tm_hour)
|
---|
| 642 | )
|
---|
| 643 | {
|
---|
| 644 | pThis->cmos_data[RTC_REG_C] |= 0xa0;
|
---|
| 645 | rtc_raise_irq(pThis, 1);
|
---|
| 646 | }
|
---|
| 647 | }
|
---|
[1] | 648 |
|
---|
[37511] | 649 | /* update ended interrupt */
|
---|
| 650 | if (pThis->cmos_data[RTC_REG_B] & REG_B_UIE)
|
---|
| 651 | {
|
---|
| 652 | pThis->cmos_data[RTC_REG_C] |= 0x90;
|
---|
| 653 | rtc_raise_irq(pThis, 1);
|
---|
| 654 | }
|
---|
[1] | 655 |
|
---|
[37511] | 656 | /* clear update in progress bit */
|
---|
| 657 | Log2(("RTC: UIP %x -> 0\n", !!(pThis->cmos_data[RTC_REG_A] & REG_A_UIP)));
|
---|
| 658 | pThis->cmos_data[RTC_REG_A] &= ~REG_A_UIP;
|
---|
| 659 |
|
---|
| 660 | pThis->next_second_time += TMTimerGetFreq(pThis->CTX_SUFF(pSecondTimer));
|
---|
| 661 | TMTimerSet(pThis->CTX_SUFF(pSecondTimer), pThis->next_second_time);
|
---|
[1] | 662 | }
|
---|
| 663 |
|
---|
| 664 |
|
---|
[37511] | 665 | /* -=-=-=-=-=- Saved State -=-=-=-=-=- */
|
---|
| 666 |
|
---|
| 667 |
|
---|
[1] | 668 | /**
|
---|
[24089] | 669 | * @copydoc FNSSMDEVLIVEEXEC
|
---|
[1] | 670 | */
|
---|
[24089] | 671 | static DECLCALLBACK(int) rtcLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
|
---|
[1] | 672 | {
|
---|
[11210] | 673 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[11209] | 674 |
|
---|
[24089] | 675 | SSMR3PutU8( pSSM, pThis->irq);
|
---|
| 676 | SSMR3PutIOPort(pSSM, pThis->IOPortBase);
|
---|
| 677 | SSMR3PutBool( pSSM, pThis->fUTC);
|
---|
[11209] | 678 |
|
---|
[24089] | 679 | return VINF_SSM_DONT_CALL_AGAIN;
|
---|
| 680 | }
|
---|
[11209] | 681 |
|
---|
| 682 |
|
---|
[24089] | 683 | /**
|
---|
| 684 | * @copydoc FNSSMDEVSAVEEXEC
|
---|
| 685 | */
|
---|
| 686 | static DECLCALLBACK(int) rtcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
|
---|
| 687 | {
|
---|
| 688 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[11209] | 689 |
|
---|
[24089] | 690 | /* The config. */
|
---|
| 691 | rtcLiveExec(pDevIns, pSSM, SSM_PASS_FINAL);
|
---|
[11209] | 692 |
|
---|
[24089] | 693 | /* The state. */
|
---|
| 694 | SSMR3PutMem(pSSM, pThis->cmos_data, 128);
|
---|
[27460] | 695 | SSMR3PutU8(pSSM, pThis->cmos_index[0]);
|
---|
[24089] | 696 |
|
---|
| 697 | SSMR3PutS32(pSSM, pThis->current_tm.tm_sec);
|
---|
| 698 | SSMR3PutS32(pSSM, pThis->current_tm.tm_min);
|
---|
| 699 | SSMR3PutS32(pSSM, pThis->current_tm.tm_hour);
|
---|
| 700 | SSMR3PutS32(pSSM, pThis->current_tm.tm_wday);
|
---|
| 701 | SSMR3PutS32(pSSM, pThis->current_tm.tm_mday);
|
---|
| 702 | SSMR3PutS32(pSSM, pThis->current_tm.tm_mon);
|
---|
| 703 | SSMR3PutS32(pSSM, pThis->current_tm.tm_year);
|
---|
| 704 |
|
---|
| 705 | TMR3TimerSave(pThis->CTX_SUFF(pPeriodicTimer), pSSM);
|
---|
| 706 |
|
---|
| 707 | SSMR3PutS64(pSSM, pThis->next_periodic_time);
|
---|
| 708 |
|
---|
| 709 | SSMR3PutS64(pSSM, pThis->next_second_time);
|
---|
| 710 | TMR3TimerSave(pThis->CTX_SUFF(pSecondTimer), pSSM);
|
---|
| 711 | TMR3TimerSave(pThis->CTX_SUFF(pSecondTimer2), pSSM);
|
---|
| 712 |
|
---|
[27460] | 713 | SSMR3PutBool(pSSM, pThis->fDisabledByHpet);
|
---|
| 714 |
|
---|
| 715 | SSMR3PutMem(pSSM, &pThis->cmos_data[128], 128);
|
---|
| 716 | return SSMR3PutU8(pSSM, pThis->cmos_index[1]);
|
---|
[1] | 717 | }
|
---|
| 718 |
|
---|
| 719 |
|
---|
| 720 | /**
|
---|
[24089] | 721 | * @copydoc FNSSMDEVLOADEXEC
|
---|
[1] | 722 | */
|
---|
[24089] | 723 | static DECLCALLBACK(int) rtcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
|
---|
[1] | 724 | {
|
---|
[24089] | 725 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 726 | int rc;
|
---|
[11209] | 727 |
|
---|
[24089] | 728 | if ( uVersion != RTC_SAVED_STATE_VERSION
|
---|
[27460] | 729 | && uVersion != RTC_SAVED_STATE_VERSION_VBOX_32PRE
|
---|
[27121] | 730 | && uVersion != RTC_SAVED_STATE_VERSION_VBOX_31
|
---|
[24089] | 731 | && uVersion != RTC_SAVED_STATE_VERSION_VBOX_30)
|
---|
[11209] | 732 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
|
---|
| 733 |
|
---|
[24089] | 734 | /* The config. */
|
---|
| 735 | if (uVersion > RTC_SAVED_STATE_VERSION_VBOX_30)
|
---|
| 736 | {
|
---|
| 737 | uint8_t u8Irq;
|
---|
| 738 | rc = SSMR3GetU8(pSSM, &u8Irq); AssertRCReturn(rc, rc);
|
---|
| 739 | if (u8Irq != pThis->irq)
|
---|
[24265] | 740 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - u8Irq: saved=%#x config=%#x"), u8Irq, pThis->irq);
|
---|
[11209] | 741 |
|
---|
[24089] | 742 | RTIOPORT IOPortBase;
|
---|
| 743 | rc = SSMR3GetIOPort(pSSM, &IOPortBase); AssertRCReturn(rc, rc);
|
---|
| 744 | if (IOPortBase != pThis->IOPortBase)
|
---|
[24265] | 745 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - IOPortBase: saved=%RTiop config=%RTiop"), IOPortBase, pThis->IOPortBase);
|
---|
[11209] | 746 |
|
---|
[24089] | 747 | bool fUTC;
|
---|
| 748 | rc = SSMR3GetBool(pSSM, &fUTC); AssertRCReturn(rc, rc);
|
---|
| 749 | if (fUTC != pThis->fUTC)
|
---|
| 750 | LogRel(("RTC: Config mismatch - fUTC: saved=%RTbool config=%RTbool\n", fUTC, pThis->fUTC));
|
---|
| 751 | }
|
---|
[11209] | 752 |
|
---|
[24089] | 753 | if (uPass != SSM_PASS_FINAL)
|
---|
| 754 | return VINF_SUCCESS;
|
---|
[11209] | 755 |
|
---|
[24089] | 756 | /* The state. */
|
---|
| 757 | SSMR3GetMem(pSSM, pThis->cmos_data, 128);
|
---|
[27460] | 758 | SSMR3GetU8(pSSM, &pThis->cmos_index[0]);
|
---|
[11209] | 759 |
|
---|
[24089] | 760 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_sec);
|
---|
| 761 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_min);
|
---|
| 762 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_hour);
|
---|
| 763 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_wday);
|
---|
| 764 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_mday);
|
---|
| 765 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_mon);
|
---|
| 766 | SSMR3GetS32(pSSM, &pThis->current_tm.tm_year);
|
---|
| 767 |
|
---|
| 768 | TMR3TimerLoad(pThis->CTX_SUFF(pPeriodicTimer), pSSM);
|
---|
| 769 |
|
---|
| 770 | SSMR3GetS64(pSSM, &pThis->next_periodic_time);
|
---|
| 771 |
|
---|
| 772 | SSMR3GetS64(pSSM, &pThis->next_second_time);
|
---|
| 773 | TMR3TimerLoad(pThis->CTX_SUFF(pSecondTimer), pSSM);
|
---|
| 774 | TMR3TimerLoad(pThis->CTX_SUFF(pSecondTimer2), pSSM);
|
---|
| 775 |
|
---|
[27126] | 776 | if (uVersion > RTC_SAVED_STATE_VERSION_VBOX_31)
|
---|
| 777 | SSMR3GetBool(pSSM, &pThis->fDisabledByHpet);
|
---|
| 778 |
|
---|
[27460] | 779 | if (uVersion > RTC_SAVED_STATE_VERSION_VBOX_32PRE)
|
---|
| 780 | {
|
---|
| 781 | /* Second CMOS bank. */
|
---|
| 782 | SSMR3GetMem(pSSM, &pThis->cmos_data[128], 128);
|
---|
| 783 | SSMR3GetU8(pSSM, &pThis->cmos_index[1]);
|
---|
| 784 | }
|
---|
| 785 |
|
---|
[11209] | 786 | int period_code = pThis->cmos_data[RTC_REG_A] & 0x0f;
|
---|
| 787 | if ( period_code != 0
|
---|
[38195] | 788 | && (pThis->cmos_data[RTC_REG_B] & REG_B_PIE))
|
---|
| 789 | {
|
---|
[11209] | 790 | if (period_code <= 2)
|
---|
| 791 | period_code += 7;
|
---|
| 792 | int period = 1 << (period_code - 1);
|
---|
| 793 | LogRel(("RTC: period=%#x (%d) %u Hz (restore)\n", period, period, _32K / period));
|
---|
[38195] | 794 | PDMCritSectEnter(pThis->pDevInsR3->pCritSectRoR3, VINF_SUCCESS);
|
---|
[32484] | 795 | TMTimerSetFrequencyHint(pThis->CTX_SUFF(pPeriodicTimer), _32K / period);
|
---|
[38195] | 796 | PDMCritSectLeave(pThis->pDevInsR3->pCritSectRoR3);
|
---|
[32484] | 797 | pThis->CurLogPeriod = period;
|
---|
| 798 | pThis->CurHintPeriod = period;
|
---|
[38195] | 799 | }
|
---|
| 800 | else
|
---|
| 801 | {
|
---|
[11209] | 802 | LogRel(("RTC: stopped the periodic timer (restore)\n"));
|
---|
[32484] | 803 | pThis->CurLogPeriod = 0;
|
---|
| 804 | pThis->CurHintPeriod = 0;
|
---|
[11209] | 805 | }
|
---|
| 806 | pThis->cRelLogEntries = 0;
|
---|
[27121] | 807 |
|
---|
[11209] | 808 | return VINF_SUCCESS;
|
---|
[1] | 809 | }
|
---|
| 810 |
|
---|
| 811 |
|
---|
| 812 | /* -=-=-=-=-=- PDM Interface provided by the RTC device -=-=-=-=-=- */
|
---|
| 813 |
|
---|
| 814 | /**
|
---|
| 815 | * Calculate and update the standard CMOS checksum.
|
---|
| 816 | *
|
---|
[11269] | 817 | * @param pThis Pointer to the RTC state data.
|
---|
[1] | 818 | */
|
---|
[11269] | 819 | static void rtcCalcCRC(RTCState *pThis)
|
---|
[1] | 820 | {
|
---|
| 821 | uint16_t u16;
|
---|
| 822 | unsigned i;
|
---|
| 823 |
|
---|
| 824 | for (i = RTC_CRC_START, u16 = 0; i <= RTC_CRC_LAST; i++)
|
---|
[11269] | 825 | u16 += pThis->cmos_data[i];
|
---|
[37511] | 826 | pThis->cmos_data[RTC_CRC_LOW] = u16 & 0xff;
|
---|
[11269] | 827 | pThis->cmos_data[RTC_CRC_HIGH] = (u16 >> 8) & 0xff;
|
---|
[1] | 828 | }
|
---|
| 829 |
|
---|
| 830 |
|
---|
| 831 | /**
|
---|
| 832 | * Write to a CMOS register and update the checksum if necessary.
|
---|
| 833 | *
|
---|
| 834 | * @returns VBox status code.
|
---|
| 835 | * @param pDevIns Device instance of the RTC.
|
---|
[27460] | 836 | * @param iReg The CMOS register index; bit 8 determines bank.
|
---|
[1] | 837 | * @param u8Value The CMOS register value.
|
---|
| 838 | */
|
---|
| 839 | static DECLCALLBACK(int) rtcCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
|
---|
| 840 | {
|
---|
[11269] | 841 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 842 | if (iReg < RT_ELEMENTS(pThis->cmos_data))
|
---|
[1] | 843 | {
|
---|
[37511] | 844 | PDMCritSectEnter(pDevIns->pCritSectRoR3, VERR_IGNORED);
|
---|
| 845 |
|
---|
[11269] | 846 | pThis->cmos_data[iReg] = u8Value;
|
---|
[1] | 847 |
|
---|
| 848 | /* does it require checksum update? */
|
---|
| 849 | if ( iReg >= RTC_CRC_START
|
---|
| 850 | && iReg <= RTC_CRC_LAST)
|
---|
[11269] | 851 | rtcCalcCRC(pThis);
|
---|
[1] | 852 |
|
---|
[37511] | 853 | PDMCritSectLeave(pDevIns->pCritSectRoR3);
|
---|
[1] | 854 | return VINF_SUCCESS;
|
---|
| 855 | }
|
---|
[37511] | 856 |
|
---|
[1] | 857 | AssertMsgFailed(("iReg=%d\n", iReg));
|
---|
| 858 | return VERR_INVALID_PARAMETER;
|
---|
| 859 | }
|
---|
| 860 |
|
---|
| 861 |
|
---|
| 862 | /**
|
---|
| 863 | * Read a CMOS register.
|
---|
| 864 | *
|
---|
| 865 | * @returns VBox status code.
|
---|
| 866 | * @param pDevIns Device instance of the RTC.
|
---|
[27460] | 867 | * @param iReg The CMOS register index; bit 8 determines bank.
|
---|
[1] | 868 | * @param pu8Value Where to store the CMOS register value.
|
---|
| 869 | */
|
---|
| 870 | static DECLCALLBACK(int) rtcCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
|
---|
| 871 | {
|
---|
[11269] | 872 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 873 | if (iReg < RT_ELEMENTS(pThis->cmos_data))
|
---|
[1] | 874 | {
|
---|
[37511] | 875 | PDMCritSectEnter(pDevIns->pCritSectRoR3, VERR_IGNORED);
|
---|
| 876 |
|
---|
[11269] | 877 | *pu8Value = pThis->cmos_data[iReg];
|
---|
[37511] | 878 |
|
---|
| 879 | PDMCritSectLeave(pDevIns->pCritSectRoR3);
|
---|
[1] | 880 | return VINF_SUCCESS;
|
---|
| 881 | }
|
---|
| 882 | AssertMsgFailed(("iReg=%d\n", iReg));
|
---|
| 883 | return VERR_INVALID_PARAMETER;
|
---|
| 884 | }
|
---|
| 885 |
|
---|
| 886 |
|
---|
[37511] | 887 | /**
|
---|
| 888 | * @interface_method_impl{PDMIHPETLEGACYNOTIFY,pfnModeChanged}
|
---|
| 889 | */
|
---|
| 890 | static DECLCALLBACK(void) rtcHpetLegacyNotify_ModeChanged(PPDMIHPETLEGACYNOTIFY pInterface, bool fActivated)
|
---|
| 891 | {
|
---|
| 892 | RTCState *pThis = RT_FROM_MEMBER(pInterface, RTCState, IHpetLegacyNotify);
|
---|
| 893 | PDMCritSectEnter(pThis->pDevInsR3->pCritSectRoR3, VERR_IGNORED);
|
---|
| 894 |
|
---|
| 895 | pThis->fDisabledByHpet = fActivated;
|
---|
| 896 |
|
---|
| 897 | PDMCritSectLeave(pThis->pDevInsR3->pCritSectRoR3);
|
---|
| 898 | }
|
---|
| 899 |
|
---|
| 900 |
|
---|
[1] | 901 | /* -=-=-=-=-=- based on bits from pc.c -=-=-=-=-=- */
|
---|
| 902 |
|
---|
[37511] | 903 |
|
---|
| 904 | static void rtc_set_memory(RTCState *pThis, int addr, int val)
|
---|
| 905 | {
|
---|
| 906 | if (addr >= 0 && addr <= 127)
|
---|
| 907 | pThis->cmos_data[addr] = val;
|
---|
| 908 | }
|
---|
| 909 |
|
---|
| 910 |
|
---|
| 911 | static void rtc_set_date(RTCState *pThis, const struct my_tm *tm)
|
---|
| 912 | {
|
---|
| 913 | pThis->current_tm = *tm;
|
---|
| 914 | rtc_copy_date(pThis);
|
---|
| 915 | }
|
---|
| 916 |
|
---|
| 917 |
|
---|
[1] | 918 | /** @copydoc FNPDMDEVINITCOMPLETE */
|
---|
| 919 | static DECLCALLBACK(int) rtcInitComplete(PPDMDEVINS pDevIns)
|
---|
| 920 | {
|
---|
[2613] | 921 | /** @todo this should be (re)done at power on if we didn't load a state... */
|
---|
[11269] | 922 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[1] | 923 |
|
---|
| 924 | /*
|
---|
| 925 | * Set the CMOS date/time.
|
---|
| 926 | */
|
---|
| 927 | RTTIMESPEC Now;
|
---|
[26158] | 928 | PDMDevHlpTMUtcNow(pDevIns, &Now);
|
---|
[2613] | 929 | RTTIME Time;
|
---|
[11269] | 930 | if (pThis->fUTC)
|
---|
[1] | 931 | RTTimeExplode(&Time, &Now);
|
---|
| 932 | else
|
---|
| 933 | RTTimeLocalExplode(&Time, &Now);
|
---|
[2613] | 934 |
|
---|
[5308] | 935 | struct my_tm Tm;
|
---|
[2613] | 936 | memset(&Tm, 0, sizeof(Tm));
|
---|
| 937 | Tm.tm_year = Time.i32Year - 1900;
|
---|
[2627] | 938 | Tm.tm_mon = Time.u8Month - 1;
|
---|
[2613] | 939 | Tm.tm_mday = Time.u8MonthDay;
|
---|
[33540] | 940 | Tm.tm_wday = (Time.u8WeekDay + 1 + 7) % 7; /* 0 = Monday -> Sunday */
|
---|
[2627] | 941 | Tm.tm_yday = Time.u16YearDay - 1;
|
---|
[2613] | 942 | Tm.tm_hour = Time.u8Hour;
|
---|
| 943 | Tm.tm_min = Time.u8Minute;
|
---|
| 944 | Tm.tm_sec = Time.u8Second;
|
---|
| 945 |
|
---|
[11269] | 946 | rtc_set_date(pThis, &Tm);
|
---|
[1] | 947 |
|
---|
[11269] | 948 | int iYear = to_bcd(pThis, (Tm.tm_year / 100) + 19); /* tm_year is 1900 based */
|
---|
[37512] | 949 | rtc_set_memory(pThis, 0x32, iYear); /* 32h - Century Byte (BCD value for the century */
|
---|
| 950 | rtc_set_memory(pThis, 0x37, iYear); /* 37h - (IBM PS/2) Date Century Byte */
|
---|
[1] | 951 |
|
---|
| 952 | /*
|
---|
| 953 | * Recalculate the checksum just in case.
|
---|
| 954 | */
|
---|
[11269] | 955 | rtcCalcCRC(pThis);
|
---|
[1] | 956 |
|
---|
[27460] | 957 | Log(("CMOS bank 0: \n%16.128Rhxd\n", &pThis->cmos_data[0]));
|
---|
| 958 | Log(("CMOS bank 1: \n%16.128Rhxd\n", &pThis->cmos_data[128]));
|
---|
[1] | 959 | return VINF_SUCCESS;
|
---|
| 960 | }
|
---|
| 961 |
|
---|
| 962 |
|
---|
| 963 | /* -=-=-=-=-=- real code -=-=-=-=-=- */
|
---|
| 964 |
|
---|
| 965 | /**
|
---|
[27126] | 966 | * @interface_method_impl{PDMIBASE,pfnQueryInterface}
|
---|
[1] | 967 | */
|
---|
[27126] | 968 | static DECLCALLBACK(void *) rtcQueryInterface(PPDMIBASE pInterface, const char *pszIID)
|
---|
[1] | 969 | {
|
---|
[27126] | 970 | PPDMDEVINS pDevIns = RT_FROM_MEMBER(pInterface, PDMDEVINS, IBase);
|
---|
| 971 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 972 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevIns->IBase);
|
---|
| 973 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIHPETLEGACYNOTIFY, &pThis->IHpetLegacyNotify);
|
---|
| 974 | return NULL;
|
---|
[1] | 975 | }
|
---|
| 976 |
|
---|
[27121] | 977 | /**
|
---|
[27126] | 978 | * @copydoc
|
---|
[27121] | 979 | */
|
---|
[27126] | 980 | static DECLCALLBACK(void) rtcRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
|
---|
[27121] | 981 | {
|
---|
[27126] | 982 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
| 983 |
|
---|
| 984 | pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
| 985 | pThis->pPeriodicTimerRC = TMTimerRCPtr(pThis->pPeriodicTimerR3);
|
---|
| 986 | pThis->pSecondTimerRC = TMTimerRCPtr(pThis->pSecondTimerR3);
|
---|
| 987 | pThis->pSecondTimer2RC = TMTimerRCPtr(pThis->pSecondTimer2R3);
|
---|
[27121] | 988 | }
|
---|
| 989 |
|
---|
[27126] | 990 |
|
---|
[27121] | 991 | /**
|
---|
[26160] | 992 | * @interface_method_impl{PDMDEVREG,pfnConstruct}
|
---|
[1] | 993 | */
|
---|
[26173] | 994 | static DECLCALLBACK(int) rtcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
|
---|
[1] | 995 | {
|
---|
[11269] | 996 | RTCState *pThis = PDMINS_2_DATA(pDevIns, RTCState *);
|
---|
[1] | 997 | int rc;
|
---|
| 998 | Assert(iInstance == 0);
|
---|
| 999 |
|
---|
| 1000 | /*
|
---|
| 1001 | * Validate configuration.
|
---|
| 1002 | */
|
---|
[26173] | 1003 | if (!CFGMR3AreValuesValid(pCfg,
|
---|
[24089] | 1004 | "Irq\0"
|
---|
| 1005 | "Base\0"
|
---|
| 1006 | "UseUTC\0"
|
---|
| 1007 | "GCEnabled\0"
|
---|
| 1008 | "R0Enabled\0"))
|
---|
[1] | 1009 | return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
|
---|
| 1010 |
|
---|
| 1011 | /*
|
---|
| 1012 | * Init the data.
|
---|
| 1013 | */
|
---|
[24089] | 1014 | uint8_t u8Irq;
|
---|
[26173] | 1015 | rc = CFGMR3QueryU8Def(pCfg, "Irq", &u8Irq, 8);
|
---|
[11212] | 1016 | if (RT_FAILURE(rc))
|
---|
[1] | 1017 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 1018 | N_("Configuration error: Querying \"Irq\" as a uint8_t failed"));
|
---|
[24089] | 1019 | pThis->irq = u8Irq;
|
---|
[1] | 1020 |
|
---|
[26173] | 1021 | rc = CFGMR3QueryPortDef(pCfg, "Base", &pThis->IOPortBase, 0x70);
|
---|
[11212] | 1022 | if (RT_FAILURE(rc))
|
---|
[1] | 1023 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
[24089] | 1024 | N_("Configuration error: Querying \"Base\" as a RTIOPORT failed"));
|
---|
[1] | 1025 |
|
---|
[26173] | 1026 | rc = CFGMR3QueryBoolDef(pCfg, "UseUTC", &pThis->fUTC, false);
|
---|
[24089] | 1027 | if (RT_FAILURE(rc))
|
---|
| 1028 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 1029 | N_("Configuration error: Querying \"UseUTC\" as a bool failed"));
|
---|
| 1030 |
|
---|
| 1031 | bool fGCEnabled;
|
---|
[26173] | 1032 | rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &fGCEnabled, true);
|
---|
[11212] | 1033 | if (RT_FAILURE(rc))
|
---|
[1] | 1034 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 1035 | N_("Configuration error: failed to read GCEnabled as boolean"));
|
---|
| 1036 |
|
---|
[24089] | 1037 | bool fR0Enabled;
|
---|
[26173] | 1038 | rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &fR0Enabled, true);
|
---|
[11212] | 1039 | if (RT_FAILURE(rc))
|
---|
[1] | 1040 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 1041 | N_("Configuration error: failed to read R0Enabled as boolean"));
|
---|
| 1042 |
|
---|
[24089] | 1043 | Log(("RTC: Irq=%#x Base=%#x fGCEnabled=%RTbool fR0Enabled=%RTbool\n",
|
---|
| 1044 | u8Irq, pThis->IOPortBase, fGCEnabled, fR0Enabled));
|
---|
[1] | 1045 |
|
---|
| 1046 |
|
---|
[11269] | 1047 | pThis->pDevInsR3 = pDevIns;
|
---|
| 1048 | pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
|
---|
| 1049 | pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
| 1050 | pThis->cmos_data[RTC_REG_A] = 0x26;
|
---|
| 1051 | pThis->cmos_data[RTC_REG_B] = 0x02;
|
---|
| 1052 | pThis->cmos_data[RTC_REG_C] = 0x00;
|
---|
| 1053 | pThis->cmos_data[RTC_REG_D] = 0x80;
|
---|
| 1054 | pThis->RtcReg.u32Version = PDM_RTCREG_VERSION;
|
---|
| 1055 | pThis->RtcReg.pfnRead = rtcCMOSRead;
|
---|
| 1056 | pThis->RtcReg.pfnWrite = rtcCMOSWrite;
|
---|
[27121] | 1057 | pThis->fDisabledByHpet = false;
|
---|
[1] | 1058 |
|
---|
[27126] | 1059 | /* IBase */
|
---|
| 1060 | pDevIns->IBase.pfnQueryInterface = rtcQueryInterface;
|
---|
| 1061 | /* IHpetLegacyNotify */
|
---|
| 1062 | pThis->IHpetLegacyNotify.pfnModeChanged = rtcHpetLegacyNotify_ModeChanged;
|
---|
| 1063 |
|
---|
[1] | 1064 | /*
|
---|
[37526] | 1065 | * Create timers.
|
---|
[1] | 1066 | */
|
---|
[37526] | 1067 | PTMTIMER pTimer;
|
---|
| 1068 | /* Periodic timer. */
|
---|
[20087] | 1069 | rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerPeriodic, pThis,
|
---|
| 1070 | TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Periodic",
|
---|
[37526] | 1071 | &pTimer);
|
---|
[11210] | 1072 | if (RT_FAILURE(rc))
|
---|
[1] | 1073 | return rc;
|
---|
[37526] | 1074 | pThis->pPeriodicTimerR3 = pTimer;
|
---|
| 1075 | pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pTimer);
|
---|
| 1076 | pThis->pPeriodicTimerRC = TMTimerRCPtr(pTimer);
|
---|
[11211] | 1077 |
|
---|
[37526] | 1078 | /* Seconds timer. */
|
---|
[20087] | 1079 | rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond, pThis,
|
---|
| 1080 | TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second",
|
---|
[37526] | 1081 | &pTimer);
|
---|
[11210] | 1082 | if (RT_FAILURE(rc))
|
---|
[1] | 1083 | return rc;
|
---|
[37526] | 1084 | pThis->pSecondTimerR3 = pTimer;
|
---|
| 1085 | pThis->pSecondTimerR0 = TMTimerR0Ptr(pTimer);
|
---|
| 1086 | pThis->pSecondTimerRC = TMTimerRCPtr(pTimer);
|
---|
[11211] | 1087 |
|
---|
[37526] | 1088 | /* The second2 timer, this is always active. */
|
---|
[20087] | 1089 | rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond2, pThis,
|
---|
| 1090 | TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second2",
|
---|
[37526] | 1091 | &pTimer);
|
---|
[11210] | 1092 | if (RT_FAILURE(rc))
|
---|
[1] | 1093 | return rc;
|
---|
[37526] | 1094 | pThis->pSecondTimer2R3 = pTimer;
|
---|
| 1095 | pThis->pSecondTimer2R0 = TMTimerR0Ptr(pTimer);
|
---|
| 1096 | pThis->pSecondTimer2RC = TMTimerRCPtr(pTimer);
|
---|
| 1097 | pThis->next_second_time = TMTimerGet(pTimer)
|
---|
| 1098 | + (TMTimerGetFreq(pTimer) * 99) / 100;
|
---|
| 1099 | rc = TMTimerLock(pTimer, VERR_IGNORED);
|
---|
| 1100 | AssertRCReturn(rc, rc);
|
---|
| 1101 | rc = TMTimerSet(pTimer, pThis->next_second_time);
|
---|
| 1102 | TMTimerUnlock(pTimer);
|
---|
| 1103 | AssertRCReturn(rc, rc);
|
---|
[1] | 1104 |
|
---|
[37526] | 1105 | /*
|
---|
| 1106 | * Register I/O ports.
|
---|
| 1107 | */
|
---|
[27460] | 1108 | rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase, 4, NULL,
|
---|
[24089] | 1109 | rtcIOPortWrite, rtcIOPortRead, NULL, NULL, "MC146818 RTC/CMOS");
|
---|
[11210] | 1110 | if (RT_FAILURE(rc))
|
---|
[1] | 1111 | return rc;
|
---|
| 1112 | if (fGCEnabled)
|
---|
| 1113 | {
|
---|
[37511] | 1114 | rc = PDMDevHlpIOPortRegisterRC(pDevIns, pThis->IOPortBase, 4, NIL_RTRCPTR,
|
---|
[24089] | 1115 | "rtcIOPortWrite", "rtcIOPortRead", NULL, NULL, "MC146818 RTC/CMOS");
|
---|
[11210] | 1116 | if (RT_FAILURE(rc))
|
---|
[1] | 1117 | return rc;
|
---|
| 1118 | }
|
---|
| 1119 | if (fR0Enabled)
|
---|
| 1120 | {
|
---|
[37511] | 1121 | rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->IOPortBase, 4, NIL_RTR0PTR,
|
---|
[24089] | 1122 | "rtcIOPortWrite", "rtcIOPortRead", NULL, NULL, "MC146818 RTC/CMOS");
|
---|
[11210] | 1123 | if (RT_FAILURE(rc))
|
---|
[1] | 1124 | return rc;
|
---|
| 1125 | }
|
---|
| 1126 |
|
---|
[37526] | 1127 | /*
|
---|
| 1128 | * Register the saved state.
|
---|
| 1129 | */
|
---|
[24089] | 1130 | rc = PDMDevHlpSSMRegister3(pDevIns, RTC_SAVED_STATE_VERSION, sizeof(*pThis), rtcLiveExec, rtcSaveExec, rtcLoadExec);
|
---|
[11210] | 1131 | if (RT_FAILURE(rc))
|
---|
[1] | 1132 | return rc;
|
---|
| 1133 |
|
---|
| 1134 | /*
|
---|
[11211] | 1135 | * Register ourselves as the RTC/CMOS with PDM.
|
---|
[1] | 1136 | */
|
---|
[26169] | 1137 | rc = PDMDevHlpRTCRegister(pDevIns, &pThis->RtcReg, &pThis->pRtcHlpR3);
|
---|
[11210] | 1138 | if (RT_FAILURE(rc))
|
---|
[1] | 1139 | return rc;
|
---|
| 1140 |
|
---|
| 1141 | return VINF_SUCCESS;
|
---|
| 1142 | }
|
---|
| 1143 |
|
---|
| 1144 |
|
---|
| 1145 | /**
|
---|
| 1146 | * The device registration structure.
|
---|
| 1147 | */
|
---|
| 1148 | const PDMDEVREG g_DeviceMC146818 =
|
---|
| 1149 | {
|
---|
| 1150 | /* u32Version */
|
---|
| 1151 | PDM_DEVREG_VERSION,
|
---|
[26165] | 1152 | /* szName */
|
---|
[1] | 1153 | "mc146818",
|
---|
[12977] | 1154 | /* szRCMod */
|
---|
[1] | 1155 | "VBoxDDGC.gc",
|
---|
| 1156 | /* szR0Mod */
|
---|
| 1157 | "VBoxDDR0.r0",
|
---|
| 1158 | /* pszDescription */
|
---|
| 1159 | "Motorola MC146818 RTC/CMOS Device.",
|
---|
| 1160 | /* fFlags */
|
---|
[12977] | 1161 | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32_64 | PDM_DEVREG_FLAGS_PAE36 | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0,
|
---|
[1] | 1162 | /* fClass */
|
---|
| 1163 | PDM_DEVREG_CLASS_RTC,
|
---|
| 1164 | /* cMaxInstances */
|
---|
| 1165 | 1,
|
---|
| 1166 | /* cbInstance */
|
---|
| 1167 | sizeof(RTCState),
|
---|
| 1168 | /* pfnConstruct */
|
---|
| 1169 | rtcConstruct,
|
---|
| 1170 | /* pfnDestruct */
|
---|
| 1171 | NULL,
|
---|
| 1172 | /* pfnRelocate */
|
---|
| 1173 | rtcRelocate,
|
---|
| 1174 | /* pfnIOCtl */
|
---|
| 1175 | NULL,
|
---|
| 1176 | /* pfnPowerOn */
|
---|
| 1177 | NULL,
|
---|
| 1178 | /* pfnReset */
|
---|
| 1179 | NULL,
|
---|
| 1180 | /* pfnSuspend */
|
---|
| 1181 | NULL,
|
---|
| 1182 | /* pfnResume */
|
---|
| 1183 | NULL,
|
---|
| 1184 | /* pfnAttach */
|
---|
| 1185 | NULL,
|
---|
| 1186 | /* pfnDetach */
|
---|
| 1187 | NULL,
|
---|
| 1188 | /* pfnQueryInterface */
|
---|
| 1189 | NULL,
|
---|
| 1190 | /* pfnInitComplete */
|
---|
[12977] | 1191 | rtcInitComplete,
|
---|
| 1192 | /* pfnPowerOff */
|
---|
| 1193 | NULL,
|
---|
| 1194 | /* pfnSoftReset */
|
---|
| 1195 | NULL,
|
---|
| 1196 | /* u32VersionEnd */
|
---|
| 1197 | PDM_DEVREG_VERSION
|
---|
[1] | 1198 | };
|
---|
[24089] | 1199 |
|
---|
[1] | 1200 | #endif /* IN_RING3 */
|
---|
[487] | 1201 | #endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
|
---|
[27126] | 1202 |
|
---|