1 | /* $Id: DevPcArch.cpp 106061 2024-09-16 14:03:52Z vboxsync $ */
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2 | /** @file
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3 | * DevPcArch - PC Architecture Device.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2024 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 |
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29 | /*********************************************************************************************************************************
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30 | * Header Files *
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31 | *********************************************************************************************************************************/
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32 | #define LOG_GROUP LOG_GROUP_DEV_PC_ARCH
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33 | #include <VBox/vmm/pdmdev.h>
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34 | #include <VBox/vmm/mm.h>
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35 | #include <VBox/vmm/pgm.h>
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36 | #include <VBox/log.h>
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37 | #include <VBox/err.h>
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38 | #include <iprt/assert.h>
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39 | #include <iprt/string.h>
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40 |
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41 | #include "VBoxDD.h"
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42 |
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43 |
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44 | /*********************************************************************************************************************************
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45 | * Structures and Typedefs *
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46 | *********************************************************************************************************************************/
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47 |
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48 | /**
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49 | * PC Bios instance data structure.
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50 | */
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51 | typedef struct DEVPCARCH
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52 | {
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53 | /** Pointer back to the device instance. */
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54 | PPDMDEVINS pDevIns;
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55 | } DEVPCARCH, *PDEVPCARCH;
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56 |
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57 |
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58 |
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59 | /**
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60 | * @callback_method_impl{FNIOMIOPORTNEWIN, Math coprocessor.}
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61 | * @note offPort is absolute
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62 | */
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63 | static DECLCALLBACK(VBOXSTRICTRC)
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64 | pcarchIOPortFPURead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
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65 | {
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66 | int rc;
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67 | NOREF(pvUser); NOREF(pDevIns); NOREF(pu32);
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68 | rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", offPort, cb);
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69 | if (rc == VINF_SUCCESS)
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70 | rc = VERR_IOM_IOPORT_UNUSED;
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71 | return rc;
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72 | }
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73 |
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74 | /**
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75 | * @callback_method_impl{FNIOMIOPORTNEWOUT, Math coprocessor.}
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76 | * @note offPort is absolute
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77 | * @todo Add IGNNE support.
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78 | */
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79 | static DECLCALLBACK(VBOXSTRICTRC)
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80 | pcarchIOPortFPUWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
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81 | {
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82 | int rc = VINF_SUCCESS;
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83 | NOREF(pvUser);
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84 | if (cb == 1)
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85 | {
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86 | switch (offPort)
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87 | {
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88 | /*
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89 | * Clear busy latch.
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90 | */
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91 | case 0xf0:
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92 | Log2(("PCARCH: FPU Clear busy latch u32=%#x\n", u32));
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93 | /* This is triggered when booting Knoppix (3.7) */
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94 | #if 0
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95 | if (!u32)
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96 | rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", offPort, cb, u32);
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97 | #endif
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98 | /* pDevIns->pHlp->pfnPICSetIrq(pDevIns, 13, 0); */
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99 | break;
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100 |
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101 | /* Reset. */
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102 | case 0xf1:
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103 | Log2(("PCARCH: FPU Reset cb=%d u32=%#x\n", cb, u32));
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104 | /** @todo figure out what the difference between FPU ports 0xf0 and 0xf1 are... */
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105 | /* pDevIns->pHlp->pfnPICSetIrq(pDevIns, 13, 0); */
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106 | break;
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107 |
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108 | /* opcode transfers */
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109 | case 0xf8:
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110 | case 0xfa:
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111 | case 0xfc:
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112 | default:
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113 | rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", offPort, cb, u32);
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114 | break;
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115 | }
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116 | /* this works better, but probably not entirely correct. */
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117 | PDMDevHlpISASetIrq(pDevIns, 13, 0);
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118 | }
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119 | else
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120 | rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", offPort, cb, u32);
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121 | return rc;
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122 | }
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123 |
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124 |
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125 | /**
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126 | * @callback_method_impl{FNIOMIOPORTIN, PS/2 system control port A.}
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127 | *
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128 | * @todo Check if the A20 enable/disable method implemented here in any way
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129 | * should cooperate with the one implemented in the PS/2 keyboard device.
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130 | * This probably belongs together in the PS/2 keyboard device (since that
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131 | * is where the "port B" mentioned by Ralph Brown is implemented).
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132 | *
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133 | * @remark Ralph Brown and friends have this to say about this port:
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134 | *
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135 | * @verbatim
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136 | 0092 RW PS/2 system control port A (port B is at PORT 0061h) (see #P0415)
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137 |
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138 | Bitfields for PS/2 system control port A:
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139 | Bit(s) Description (Table P0415)
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140 | 7-6 any bit set to 1 turns activity light on
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141 | 5 unused
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142 | 4 watchdog timout occurred
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143 | 3 =0 RTC/CMOS security lock (on password area) unlocked
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144 | =1 CMOS locked (done by POST)
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145 | 2 unused
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146 | 1 A20 is active
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147 | 0 =0 system reset or write
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148 | =1 pulse alternate reset pin (high-speed alternate CPU reset)
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149 | Notes: once set, bit 3 may only be cleared by a power-on reset
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150 | on at least the C&T 82C235, bit 0 remains set through a CPU reset to
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151 | allow the BIOS to determine the reset method
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152 | on the PS/2 30-286 & "Tortuga" the INT 15h/87h memory copy does
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153 | not use this port for A20 control, but instead uses the keyboard
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154 | controller (8042). Reportedly this may cause the system to crash
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155 | when access to the 8042 is disabled in password server mode
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156 | (see #P0398).
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157 | SeeAlso: #P0416,#P0417,MSR 00001000h
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158 | * @endverbatim
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159 | * @note offPort is absolute
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160 | */
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161 | static DECLCALLBACK(VBOXSTRICTRC)
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162 | pcarchIOPortPS2SysControlPortARead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
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163 | {
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164 | RT_NOREF1(pvUser);
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165 | if (cb == 1)
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166 | {
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167 | *pu32 = PDMDevHlpA20IsEnabled(pDevIns) << 1;
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168 | return VINF_SUCCESS;
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169 | }
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170 | return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", offPort, cb);
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171 | }
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172 |
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173 |
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174 | /**
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175 | * @callback_method_impl{FNIOMIOPORTOUT, PS/2 system control port A.}
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176 | * @see Remark and todo of pcarchIOPortPS2SysControlPortARead().
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177 | * @note offPort is absolute
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178 | */
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179 | static DECLCALLBACK(VBOXSTRICTRC)
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180 | pcarchIOPortPS2SysControlPortAWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
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181 | {
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182 | NOREF(pvUser);
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183 | if (cb == 1)
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184 | {
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185 | /*
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186 | * Fast reset?
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187 | */
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188 | if (u32 & 1)
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189 | {
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190 | LogRel(("Reset initiated by system port A\n"));
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191 | return PDMDevHlpVMReset(pDevIns, PDMVMRESET_F_PORT_A);
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192 | }
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193 |
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194 | /*
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195 | * A20 is the only thing we care about of the other stuff.
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196 | */
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197 | PDMDevHlpA20Set(pDevIns, !!(u32 & 2));
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198 | return VINF_SUCCESS;
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199 | }
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200 | return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", offPort, cb, u32);
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201 | }
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202 |
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203 |
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204 | /**
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205 | * @interface_method_impl{PDMDEVREG,pfnConstruct}
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206 | */
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207 | static DECLCALLBACK(int) pcarchConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
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208 | {
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209 | PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
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210 | PDEVPCARCH pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPCARCH);
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211 | int rc;
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212 | RT_NOREF(iInstance, pCfg);
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213 | Assert(iInstance == 0);
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214 |
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215 | /*
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216 | * Validate configuration.
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217 | */
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218 | PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "", "");
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219 |
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220 | /*
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221 | * Init the data.
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222 | */
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223 | pThis->pDevIns = pDevIns;
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224 |
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225 | /*
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226 | * Register I/O Ports
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227 | */
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228 | IOMIOPORTHANDLE hIoPorts;
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229 | rc = PDMDevHlpIoPortCreateFlagsAndMap(pDevIns, 0xf0 /*uPort*/, 0x10 /*cPorts*/, IOM_IOPORT_F_ABS,
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230 | pcarchIOPortFPUWrite, pcarchIOPortFPURead,
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231 | "Math Co-Processor (DOS/OS2 mode)", NULL /*paExtDescs*/, &hIoPorts);
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232 | AssertRCReturn(rc, rc);
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233 | rc = PDMDevHlpIoPortCreateFlagsAndMap(pDevIns, 0x92 /*uPort*/, 1 /*cPorts*/, IOM_IOPORT_F_ABS,
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234 | pcarchIOPortPS2SysControlPortAWrite, pcarchIOPortPS2SysControlPortARead,
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235 | "PS/2 system control port A (A20 and more)", NULL /*paExtDescs*/, &hIoPorts);
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236 | AssertRCReturn(rc, rc);
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237 |
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238 | return VINF_SUCCESS;
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239 | }
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240 |
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241 |
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242 | /**
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243 | * The device registration structure.
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244 | */
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245 | const PDMDEVREG g_DevicePcArch =
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246 | {
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247 | /* .u32Version = */ PDM_DEVREG_VERSION,
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248 | /* .uReserved0 = */ 0,
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249 | /* .szName = */ "pcarch",
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250 | /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
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251 | /* .fClass = */ PDM_DEVREG_CLASS_ARCH,
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252 | /* .cMaxInstances = */ 1,
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253 | /* .uSharedVersion = */ 42,
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254 | /* .cbInstanceShared = */ sizeof(DEVPCARCH),
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255 | /* .cbInstanceCC = */ 0,
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256 | /* .cbInstanceRC = */ 0,
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257 | /* .cMaxPciDevices = */ 0,
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258 | /* .cMaxMsixVectors = */ 0,
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259 | /* .pszDescription = */ "PC Architecture Device",
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260 | #if defined(IN_RING3)
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261 | /* .pszRCMod = */ "",
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262 | /* .pszR0Mod = */ "",
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263 | /* .pfnConstruct = */ pcarchConstruct,
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264 | /* .pfnDestruct = */ NULL,
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265 | /* .pfnRelocate = */ NULL,
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266 | /* .pfnMemSetup = */ NULL,
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267 | /* .pfnPowerOn = */ NULL,
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268 | /* .pfnReset = */ NULL,
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269 | /* .pfnSuspend = */ NULL,
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270 | /* .pfnResume = */ NULL,
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271 | /* .pfnAttach = */ NULL,
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272 | /* .pfnDetach = */ NULL,
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273 | /* .pfnQueryInterface = */ NULL,
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274 | /* .pfnInitComplete = */ NULL,
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275 | /* .pfnPowerOff = */ NULL,
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276 | /* .pfnSoftReset = */ NULL,
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277 | /* .pfnReserved0 = */ NULL,
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278 | /* .pfnReserved1 = */ NULL,
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279 | /* .pfnReserved2 = */ NULL,
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280 | /* .pfnReserved3 = */ NULL,
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281 | /* .pfnReserved4 = */ NULL,
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282 | /* .pfnReserved5 = */ NULL,
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283 | /* .pfnReserved6 = */ NULL,
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284 | /* .pfnReserved7 = */ NULL,
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285 | #elif defined(IN_RING0)
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286 | /* .pfnEarlyConstruct = */ NULL,
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287 | /* .pfnConstruct = */ NULL,
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288 | /* .pfnDestruct = */ NULL,
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289 | /* .pfnFinalDestruct = */ NULL,
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290 | /* .pfnRequest = */ NULL,
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291 | /* .pfnReserved0 = */ NULL,
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292 | /* .pfnReserved1 = */ NULL,
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293 | /* .pfnReserved2 = */ NULL,
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294 | /* .pfnReserved3 = */ NULL,
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295 | /* .pfnReserved4 = */ NULL,
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296 | /* .pfnReserved5 = */ NULL,
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297 | /* .pfnReserved6 = */ NULL,
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298 | /* .pfnReserved7 = */ NULL,
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299 | #elif defined(IN_RC)
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300 | /* .pfnConstruct = */ NULL,
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301 | /* .pfnReserved0 = */ NULL,
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302 | /* .pfnReserved1 = */ NULL,
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303 | /* .pfnReserved2 = */ NULL,
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304 | /* .pfnReserved3 = */ NULL,
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305 | /* .pfnReserved4 = */ NULL,
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306 | /* .pfnReserved5 = */ NULL,
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307 | /* .pfnReserved6 = */ NULL,
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308 | /* .pfnReserved7 = */ NULL,
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309 | #else
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310 | # error "Not in IN_RING3, IN_RING0 or IN_RC!"
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311 | #endif
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312 | /* .u32VersionEnd = */ PDM_DEVREG_VERSION
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313 | };
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314 |
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