[99542] | 1 | /* $Id: DevFlashCFI.cpp 100765 2023-08-01 10:34:42Z vboxsync $ */
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| 2 | /** @file
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| 3 | * DevFlashCFI - A simple Flash device implementing the Common Flash Interface
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| 4 | * using the sepc from https://ia803103.us.archive.org/30/items/m30l0r7000t0/m30l0r7000t0.pdf
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| 5 | *
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| 6 | * Implemented as an MMIO device attached directly to the CPU, not behind any
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| 7 | * bus. Typically mapped as part of the firmware image.
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| 8 | */
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| 9 |
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| 10 | /*
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| 11 | * Copyright (C) 2023 Oracle and/or its affiliates.
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| 12 | *
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| 13 | * This file is part of VirtualBox base platform packages, as
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| 14 | * available from https://www.virtualbox.org.
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| 15 | *
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| 16 | * This program is free software; you can redistribute it and/or
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| 17 | * modify it under the terms of the GNU General Public License
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| 18 | * as published by the Free Software Foundation, in version 3 of the
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| 19 | * License.
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| 20 | *
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| 21 | * This program is distributed in the hope that it will be useful, but
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| 22 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 24 | * General Public License for more details.
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| 25 | *
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| 26 | * You should have received a copy of the GNU General Public License
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| 27 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 28 | *
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| 29 | * SPDX-License-Identifier: GPL-3.0-only
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| 30 | */
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| 31 |
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| 32 |
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| 33 | /*********************************************************************************************************************************
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| 34 | * Header Files *
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| 35 | *********************************************************************************************************************************/
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| 36 | #define LOG_GROUP LOG_GROUP_DEV_FLASH
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| 37 | #include <VBox/vmm/pdmdev.h>
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| 38 | #include <VBox/log.h>
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| 39 | #include <VBox/err.h>
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| 40 | #include <iprt/assert.h>
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| 41 | #include <iprt/string.h>
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| 42 | #include <iprt/file.h>
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[99943] | 43 | #include <iprt/uuid.h>
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[99542] | 44 |
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| 45 | #include "VBoxDD.h"
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| 46 |
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| 47 |
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| 48 | /*********************************************************************************************************************************
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| 49 | * Defined Constants And Macros *
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| 50 | *********************************************************************************************************************************/
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[100762] | 51 |
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| 52 | /** Saved state version. */
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| 53 | #define FLASH_SAVED_STATE_VERSION 1
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| 54 |
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[99542] | 55 | /** @name CFI (Command User Interface) Commands.
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| 56 | * @{ */
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| 57 | /** Block erase setup */
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| 58 | #define FLASH_CFI_CMD_BLOCK_ERASE_SETUP 0x20
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| 59 | /** Clear status register. */
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| 60 | #define FLASH_CFI_CMD_CLEAR_STATUS_REG 0x50
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| 61 | /** Read status register. */
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| 62 | #define FLASH_CFI_CMD_READ_STATUS_REG 0x70
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| 63 | /** Read status register. */
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| 64 | #define FLASH_CFI_CMD_READ_DEVICE_ID 0x90
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| 65 | /** Buffered program setup. */
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| 66 | #define FLASH_CFI_CMD_BUFFERED_PROGRAM_SETUP 0xe8
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| 67 | /** Buffered program setup. */
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| 68 | #define FLASH_CFI_CMD_BUFFERED_PROGRAM_CONFIRM 0xd0
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| 69 | /** Read from the flash array. */
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| 70 | #define FLASH_CFI_CMD_ARRAY_READ 0xff
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| 71 | /** @} */
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| 72 |
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| 73 | /** @name Status register bits.
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| 74 | * @{ */
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| 75 | /** Bank Write/Multiple Word Program Status Bit. */
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| 76 | #define FLASH_CFI_SR_BWS RT_BIT(0)
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| 77 | /** Block Protection Status Bit. */
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| 78 | #define FLASH_CFI_SR_BLOCK_PROTETION RT_BIT(1)
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| 79 | #define FLASH_CFI_SR_PROGRAM_SUSPEND RT_BIT(2)
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| 80 | #define FLASH_CFI_SR_VPP RT_BIT(3)
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| 81 | #define FLASH_CFI_SR_PROGRAM RT_BIT(4)
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| 82 | #define FLASH_CFI_SR_ERASE RT_BIT(5)
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| 83 | #define FLASH_CFI_SR_ERASE_SUSPEND RT_BIT(6)
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| 84 | #define FLASH_CFI_SR_PROGRAM_ERASE RT_BIT(7)
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| 85 | /** @} */
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| 86 |
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[99943] | 87 | /** The namespace the NVRAM content is stored under (historical reasons). */
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| 88 | #define FLASH_CFI_VFS_NAMESPACE "efi"
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[99542] | 89 |
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[99943] | 90 |
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[99542] | 91 | /*********************************************************************************************************************************
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| 92 | * Structures and Typedefs *
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| 93 | *********************************************************************************************************************************/
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| 94 | /**
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| 95 | * The flash device, shared state.
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| 96 | */
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| 97 | typedef struct DEVFLASHCFI
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| 98 | {
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| 99 | /** The current command. */
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| 100 | uint16_t u16Cmd;
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| 101 | /** The status register. */
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| 102 | uint8_t bStatus;
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| 103 | /** Current bus cycle. */
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| 104 | uint8_t cBusCycle;
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| 105 |
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| 106 | uint8_t cWordsTransfered;
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| 107 |
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| 108 | /** @name The following state does not change at runtime
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| 109 | * @{ */
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| 110 | /** When set, indicates the state was saved. */
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| 111 | bool fStateSaved;
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| 112 | /** Manufacturer (high byte) and device (low byte) ID. */
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| 113 | uint16_t u16FlashId;
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| 114 | /** The configured block size of the device. */
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| 115 | uint16_t cbBlockSize;
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| 116 | /** The actual flash memory data. */
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| 117 | R3PTRTYPE(uint8_t *) pbFlash;
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| 118 | /** The flash memory region size. */
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| 119 | uint32_t cbFlashSize;
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| 120 | /** @} */
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| 121 |
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| 122 | /** The file conaining the flash content. */
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| 123 | char *pszFlashFile;
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| 124 | /** The guest physical memory base address. */
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| 125 | RTGCPHYS GCPhysFlashBase;
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| 126 | /** The handle to the MMIO region. */
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| 127 | IOMMMIOHANDLE hMmio;
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[99943] | 128 |
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| 129 | /** The offset of the block to write. */
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| 130 | uint32_t offBlock;
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| 131 | /** Number of bytes to write. */
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| 132 | uint32_t cbWrite;
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| 133 | /** The word buffer for the buffered program command (32 16-bit words for each emulated chip). */
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| 134 | uint8_t abProgramBuf[2 * 32 * sizeof(uint16_t)];
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| 135 |
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| 136 | /**
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| 137 | * NVRAM port - LUN\#0.
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| 138 | */
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| 139 | struct
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| 140 | {
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| 141 | /** The base interface we provide the NVRAM driver. */
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| 142 | PDMIBASE IBase;
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| 143 | /** The NVRAM driver base interface. */
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| 144 | PPDMIBASE pDrvBase;
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| 145 | /** The VFS interface of the driver below for NVRAM state loading and storing. */
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| 146 | PPDMIVFSCONNECTOR pDrvVfs;
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| 147 | } Lun0;
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[99542] | 148 | } DEVFLASHCFI;
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| 149 | /** Pointer to the Flash device state. */
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| 150 | typedef DEVFLASHCFI *PDEVFLASHCFI;
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| 151 |
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| 152 |
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| 153 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
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| 154 |
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| 155 |
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| 156 | /**
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| 157 | * @callback_method_impl{FNIOMMMIONEWWRITE, Flash memory write}
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| 158 | */
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| 159 | static DECLCALLBACK(VBOXSTRICTRC) flashMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb)
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| 160 | {
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| 161 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
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| 162 | RT_NOREF1(pvUser);
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| 163 |
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| 164 | /** @todo For now we only emulate a x32 device using two x16 chips so the command must be send to both chips at the same time
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| 165 | * (and we don't support sending different commands to both devices). */
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| 166 | Assert(cb == sizeof(uint32_t));
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| 167 | uint32_t u32Val = *(const uint32_t *)pv;
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| 168 |
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| 169 | LogFlowFunc(("off=%RGp u32Val=%#x cb=%u\n", off, u32Val, cb));
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| 170 |
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| 171 | if (pThis->cBusCycle == 0)
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| 172 | {
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| 173 | /* Writes new command, the comand must be sent to both chips at the same time. */
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| 174 | Assert((u32Val >> 16) == (u32Val & 0xffff));
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| 175 | switch (u32Val & 0xffff)
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| 176 | {
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| 177 | case FLASH_CFI_CMD_READ_STATUS_REG:
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| 178 | case FLASH_CFI_CMD_ARRAY_READ:
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| 179 | case FLASH_CFI_CMD_READ_DEVICE_ID:
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| 180 | pThis->u16Cmd = u32Val;
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| 181 | break;
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| 182 | case FLASH_CFI_CMD_BLOCK_ERASE_SETUP:
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| 183 | pThis->u16Cmd = u32Val;
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| 184 | pThis->cBusCycle++;
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| 185 | break;
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| 186 | case FLASH_CFI_CMD_BUFFERED_PROGRAM_SETUP:
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| 187 | Assert(pThis->bStatus & FLASH_CFI_SR_PROGRAM_ERASE);
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[99943] | 188 | pThis->u16Cmd = u32Val;
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| 189 | pThis->offBlock = (uint32_t)off;
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[99542] | 190 | pThis->cBusCycle++;
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| 191 | break;
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| 192 | case FLASH_CFI_CMD_CLEAR_STATUS_REG:
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| 193 | pThis->bStatus &= ~(FLASH_CFI_SR_BLOCK_PROTETION | FLASH_CFI_SR_VPP | FLASH_CFI_SR_PROGRAM | FLASH_CFI_SR_ERASE);
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| 194 | pThis->u16Cmd = FLASH_CFI_CMD_ARRAY_READ;
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| 195 | break;
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| 196 | default:
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| 197 | AssertReleaseFailed();
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| 198 | }
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| 199 | }
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| 200 | else if (pThis->cBusCycle == 1)
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| 201 | {
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| 202 | switch (pThis->u16Cmd)
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| 203 | {
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| 204 | case FLASH_CFI_CMD_BLOCK_ERASE_SETUP:
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| 205 | {
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| 206 | /* This contains the address. */
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| 207 | pThis->u16Cmd = FLASH_CFI_CMD_READ_STATUS_REG;
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| 208 | pThis->cBusCycle = 0;
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[99943] | 209 | memset(pThis->pbFlash + off, 0xff, RT_MIN(pThis->cbFlashSize - off, pThis->cbBlockSize));
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[99542] | 210 | break;
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| 211 | }
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| 212 | case FLASH_CFI_CMD_BUFFERED_PROGRAM_SETUP:
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| 213 | {
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| 214 | /* Receives the number of words to be transfered. */
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[99943] | 215 | pThis->cWordsTransfered = (u32Val & 0xffff) + 1;
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| 216 | pThis->cbWrite = pThis->cWordsTransfered * 2 * sizeof(uint16_t);
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| 217 | if (pThis->cbWrite <= sizeof(pThis->abProgramBuf))
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| 218 | pThis->cBusCycle++;
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| 219 | else
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| 220 | AssertReleaseFailed();
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[99542] | 221 | break;
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| 222 | }
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| 223 | }
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| 224 | }
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| 225 | else if (pThis->cBusCycle == 2)
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| 226 | {
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| 227 | switch (pThis->u16Cmd)
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| 228 | {
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| 229 | case FLASH_CFI_CMD_BUFFERED_PROGRAM_SETUP:
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| 230 | {
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| 231 | /* Receives the address and data. */
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| 232 | if (!pThis->cWordsTransfered)
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| 233 | {
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| 234 | /* Should be the confirm now. */
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| 235 | if ((u32Val & 0xffff) == FLASH_CFI_CMD_BUFFERED_PROGRAM_CONFIRM)
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| 236 | {
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[99943] | 237 | if (pThis->offBlock + pThis->cbWrite <= pThis->cbFlashSize)
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| 238 | memcpy(pThis->pbFlash + pThis->offBlock, &pThis->abProgramBuf[0], pThis->cbWrite);
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[99542] | 239 | /* Reset to read array. */
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| 240 | pThis->cBusCycle = 0;
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| 241 | pThis->u16Cmd = FLASH_CFI_CMD_ARRAY_READ;
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| 242 | }
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[99943] | 243 | else
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| 244 | AssertReleaseFailed();
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[99542] | 245 | }
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| 246 | else
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[99943] | 247 | {
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| 248 | if ( off >= pThis->offBlock
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| 249 | && (off + cb >= pThis->offBlock)
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| 250 | && ((off + cb) - pThis->offBlock) <= sizeof(pThis->abProgramBuf))
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| 251 | memcpy(&pThis->abProgramBuf[off - pThis->offBlock], pv, cb);
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| 252 | else
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| 253 | AssertReleaseFailed();
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[99542] | 254 | pThis->cWordsTransfered--;
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[99943] | 255 | }
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[99542] | 256 | break;
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| 257 | }
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| 258 | }
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| 259 | }
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| 260 | else
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| 261 | AssertReleaseFailed();
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| 262 |
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| 263 | LogFlow(("flashWrite: completed write at %08RX32 (LB %u)\n", off, cb));
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| 264 | return VINF_SUCCESS;
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| 265 | }
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| 266 |
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| 267 |
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| 268 | /**
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| 269 | * @callback_method_impl{FNIOMMMIONEWREAD, Flash memory read}
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| 270 | */
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| 271 | static DECLCALLBACK(VBOXSTRICTRC) flashMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb)
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| 272 | {
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| 273 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
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| 274 | RT_NOREF1(pvUser);
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| 275 |
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| 276 | LogFlowFunc(("off=%RGp cb=%u\n", off, cb));
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| 277 |
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| 278 | if (pThis->u16Cmd == FLASH_CFI_CMD_ARRAY_READ)
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| 279 | {
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| 280 | size_t cbThisRead = RT_MIN(cb, pThis->cbFlashSize - off);
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| 281 | size_t cbSetFf = cb - cbThisRead;
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| 282 | if (cbThisRead)
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| 283 | memcpy(pv, &pThis->pbFlash[off], cbThisRead);
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| 284 | if (cbSetFf)
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| 285 | memset((uint8_t *)pv + cbThisRead, 0xff, cbSetFf);
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| 286 | }
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| 287 | else
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| 288 | {
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| 289 | /** @todo For now we only emulate a x32 device using two x16 chips so the command must be send to both chips at the same time. */
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| 290 | Assert(cb == sizeof(uint32_t));
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| 291 |
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| 292 | uint32_t *pu32 = (uint32_t *)pv;
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| 293 | switch (pThis->u16Cmd)
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| 294 | {
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| 295 | case FLASH_CFI_CMD_READ_DEVICE_ID:
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| 296 | *pu32 = 0; /** @todo */
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| 297 | break;
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| 298 | case FLASH_CFI_CMD_READ_STATUS_REG:
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| 299 | case FLASH_CFI_CMD_BUFFERED_PROGRAM_SETUP:
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| 300 | *pu32 = ((uint32_t)pThis->bStatus << 16) | pThis->bStatus;
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| 301 | break;
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| 302 | default:
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| 303 | AssertReleaseFailed();
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| 304 | }
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| 305 | }
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| 306 |
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| 307 | LogFlow(("flashRead: completed read at %08RX32 (LB %u)\n", off, cb));
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| 308 | return VINF_SUCCESS;
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| 309 | }
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| 310 |
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| 311 |
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[99943] | 312 | /**
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| 313 | * @copydoc(PDMIBASE::pfnQueryInterface)
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| 314 | */
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| 315 | static DECLCALLBACK(void *) flashR3QueryInterface(PPDMIBASE pInterface, const char *pszIID)
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| 316 | {
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| 317 | LogFlowFunc(("ENTER: pIBase=%p pszIID=%p\n", pInterface, pszIID));
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| 318 | PDEVFLASHCFI pThis = RT_FROM_MEMBER(pInterface, DEVFLASHCFI, Lun0.IBase);
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| 319 |
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| 320 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->Lun0.IBase);
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| 321 | return NULL;
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| 322 | }
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| 323 |
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| 324 |
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[100762] | 325 | /* -=-=-=-=-=-=-=-=- Saved State -=-=-=-=-=-=-=-=- */
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| 326 |
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| 327 | /**
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| 328 | * @callback_method_impl{FNSSMDEVLIVEEXEC}
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| 329 | */
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| 330 | static DECLCALLBACK(int) flashR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
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| 331 | {
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| 332 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
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| 333 | PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
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| 334 | RT_NOREF(uPass);
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| 335 |
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| 336 | pHlp->pfnSSMPutGCPhys(pSSM, pThis->GCPhysFlashBase);
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| 337 | pHlp->pfnSSMPutU32( pSSM, pThis->cbFlashSize);
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| 338 | pHlp->pfnSSMPutU16( pSSM, pThis->u16FlashId);
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| 339 | pHlp->pfnSSMPutU16( pSSM, pThis->cbBlockSize);
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| 340 | return VINF_SSM_DONT_CALL_AGAIN;
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| 341 | }
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| 342 |
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| 343 |
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| 344 | /**
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[99542] | 345 | * @callback_method_impl{FNSSMDEVSAVEEXEC}
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| 346 | */
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[100762] | 347 | static DECLCALLBACK(int) flashR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
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[99542] | 348 | {
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[100762] | 349 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
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| 350 | PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
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| 351 |
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| 352 | /* The config. */
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| 353 | flashR3LiveExec(pDevIns, pSSM, SSM_PASS_FINAL);
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| 354 |
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| 355 | /* The state. */
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| 356 | pHlp->pfnSSMPutU16(pSSM, pThis->u16Cmd);
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| 357 | pHlp->pfnSSMPutU8( pSSM, pThis->bStatus);
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| 358 | pHlp->pfnSSMPutU8( pSSM, pThis->cBusCycle);
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| 359 | pHlp->pfnSSMPutU8( pSSM, pThis->cWordsTransfered);
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| 360 | pHlp->pfnSSMPutMem(pSSM, pThis->pbFlash, pThis->cbFlashSize);
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| 361 | pHlp->pfnSSMPutU32(pSSM, pThis->offBlock);
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| 362 | pHlp->pfnSSMPutU32(pSSM, pThis->cbWrite);
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| 363 | pHlp->pfnSSMPutMem(pSSM, &pThis->abProgramBuf[0], sizeof(pThis->abProgramBuf));
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| 364 |
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| 365 | pThis->fStateSaved = true;
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| 366 | return pHlp->pfnSSMPutU32(pSSM, UINT32_MAX); /* sanity/terminator */
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[99542] | 367 | }
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| 368 |
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| 369 |
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| 370 | /**
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| 371 | * @callback_method_impl{FNSSMDEVLOADEXEC}
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| 372 | */
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[100762] | 373 | static DECLCALLBACK(int) flashR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
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[99542] | 374 | {
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[100762] | 375 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
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| 376 | PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
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[99542] | 377 |
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| 378 | /* Fend off unsupported versions. */
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| 379 | if (uVersion != FLASH_SAVED_STATE_VERSION)
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| 380 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
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| 381 |
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[100762] | 382 | /* The config. */
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| 383 | RTGCPHYS GCPhysFlashBase;
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| 384 | int rc = pHlp->pfnSSMGetGCPhys(pSSM, &GCPhysFlashBase);
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| 385 | AssertRCReturn(rc, rc);
|
---|
| 386 | if (GCPhysFlashBase != pThis->GCPhysFlashBase)
|
---|
| 387 | return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - GCPhysFlashBase: saved=%RGp config=%RGp"),
|
---|
| 388 | GCPhysFlashBase, pThis->GCPhysFlashBase);
|
---|
| 389 |
|
---|
| 390 | uint32_t cbFlashSize;
|
---|
| 391 | rc = pHlp->pfnSSMGetU32(pSSM, &cbFlashSize);
|
---|
| 392 | AssertRCReturn(rc, rc);
|
---|
| 393 | if (cbFlashSize != pThis->cbFlashSize)
|
---|
| 394 | return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - cbFlashSize: saved=%#x config=%#x"),
|
---|
| 395 | cbFlashSize, pThis->cbFlashSize);
|
---|
| 396 |
|
---|
| 397 | uint16_t u16FlashId;
|
---|
| 398 | rc = pHlp->pfnSSMGetU16(pSSM, &u16FlashId);
|
---|
| 399 | AssertRCReturn(rc, rc);
|
---|
| 400 | if (u16FlashId != pThis->u16FlashId)
|
---|
| 401 | return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - u16FlashId: saved=%#x config=%#x"),
|
---|
| 402 | u16FlashId, pThis->u16FlashId);
|
---|
| 403 |
|
---|
| 404 | uint16_t cbBlockSize;
|
---|
| 405 | rc = pHlp->pfnSSMGetU16(pSSM, &cbBlockSize);
|
---|
| 406 | AssertRCReturn(rc, rc);
|
---|
| 407 | if (cbBlockSize != pThis->cbBlockSize)
|
---|
| 408 | return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - cbBlockSize: saved=%#x config=%#x"),
|
---|
| 409 | cbBlockSize, pThis->cbBlockSize);
|
---|
| 410 |
|
---|
| 411 | if (uPass != SSM_PASS_FINAL)
|
---|
| 412 | return VINF_SUCCESS;
|
---|
| 413 |
|
---|
| 414 | /* The state. */
|
---|
| 415 | pHlp->pfnSSMGetU16(pSSM, &pThis->u16Cmd);
|
---|
| 416 | pHlp->pfnSSMGetU8( pSSM, &pThis->bStatus);
|
---|
| 417 | pHlp->pfnSSMGetU8( pSSM, &pThis->cBusCycle);
|
---|
| 418 | pHlp->pfnSSMGetU8( pSSM, &pThis->cWordsTransfered);
|
---|
| 419 | pHlp->pfnSSMGetMem(pSSM, pThis->pbFlash, pThis->cbFlashSize);
|
---|
| 420 | pHlp->pfnSSMGetU32(pSSM, &pThis->offBlock);
|
---|
| 421 | pHlp->pfnSSMGetU32(pSSM, &pThis->cbWrite);
|
---|
| 422 | pHlp->pfnSSMGetMem(pSSM, &pThis->abProgramBuf[0], sizeof(pThis->abProgramBuf));
|
---|
| 423 |
|
---|
| 424 | /* The marker. */
|
---|
| 425 | uint32_t u32;
|
---|
| 426 | rc = pHlp->pfnSSMGetU32(pSSM, &u32);
|
---|
| 427 | AssertRCReturn(rc, rc);
|
---|
| 428 | AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
|
---|
| 429 |
|
---|
| 430 | return VINF_SUCCESS;
|
---|
[99542] | 431 | }
|
---|
| 432 |
|
---|
[100762] | 433 |
|
---|
[99542] | 434 | /**
|
---|
| 435 | * @interface_method_impl{PDMDEVREG,pfnReset}
|
---|
| 436 | */
|
---|
| 437 | static DECLCALLBACK(void) flashR3Reset(PPDMDEVINS pDevIns)
|
---|
| 438 | {
|
---|
| 439 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
|
---|
| 440 |
|
---|
| 441 | /*
|
---|
| 442 | * Initialize the device state.
|
---|
| 443 | */
|
---|
| 444 | pThis->u16Cmd = FLASH_CFI_CMD_ARRAY_READ;
|
---|
| 445 | pThis->bStatus = FLASH_CFI_SR_PROGRAM_ERASE; /* Prgram/Erase controller is inactive. */
|
---|
| 446 | pThis->cBusCycle = 0;
|
---|
| 447 | }
|
---|
| 448 |
|
---|
| 449 |
|
---|
| 450 | /**
|
---|
[99943] | 451 | * @interface_method_impl{PDMDEVREG,pfnPowerOff}
|
---|
| 452 | */
|
---|
| 453 | static DECLCALLBACK(void) flashR3PowerOff(PPDMDEVINS pDevIns)
|
---|
| 454 | {
|
---|
[100765] | 455 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
|
---|
| 456 | int rc = VINF_SUCCESS;
|
---|
| 457 |
|
---|
| 458 | if (!pThis->fStateSaved)
|
---|
| 459 | {
|
---|
| 460 | if (pThis->Lun0.pDrvVfs)
|
---|
| 461 | {
|
---|
| 462 | AssertPtr(pThis->pszFlashFile);
|
---|
| 463 | rc = pThis->Lun0.pDrvVfs->pfnWriteAll(pThis->Lun0.pDrvVfs, FLASH_CFI_VFS_NAMESPACE, pThis->pszFlashFile,
|
---|
| 464 | pThis->pbFlash, pThis->cbFlashSize);
|
---|
| 465 | if (RT_FAILURE(rc))
|
---|
| 466 | LogRel(("FlashCFI: Failed to save flash file to NVRAM store: %Rrc\n", rc));
|
---|
| 467 | }
|
---|
| 468 | else if (pThis->pszFlashFile)
|
---|
| 469 | {
|
---|
| 470 | RTFILE hFlashFile = NIL_RTFILE;
|
---|
| 471 |
|
---|
| 472 | rc = RTFileOpen(&hFlashFile, pThis->pszFlashFile, RTFILE_O_READWRITE | RTFILE_O_OPEN_CREATE | RTFILE_O_DENY_WRITE);
|
---|
| 473 | if (RT_SUCCESS(rc))
|
---|
| 474 | {
|
---|
| 475 | rc = RTFileWrite(hFlashFile, pThis->pbFlash, pThis->cbFlashSize, NULL);
|
---|
| 476 | RTFileClose(hFlashFile);
|
---|
| 477 | if (RT_FAILURE(rc))
|
---|
| 478 | PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to write flash file"));
|
---|
| 479 | }
|
---|
| 480 | else
|
---|
| 481 | PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to open flash file"));
|
---|
| 482 | }
|
---|
| 483 | }
|
---|
[99943] | 484 | }
|
---|
| 485 |
|
---|
| 486 |
|
---|
| 487 | /**
|
---|
[99542] | 488 | * @interface_method_impl{PDMDEVREG,pfnDestruct}
|
---|
| 489 | */
|
---|
| 490 | static DECLCALLBACK(int) flashR3Destruct(PPDMDEVINS pDevIns)
|
---|
| 491 | {
|
---|
| 492 | PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
|
---|
| 493 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
|
---|
| 494 |
|
---|
| 495 | if (pThis->pbFlash)
|
---|
| 496 | {
|
---|
| 497 | PDMDevHlpMMHeapFree(pDevIns, pThis->pbFlash);
|
---|
| 498 | pThis->pbFlash = NULL;
|
---|
| 499 | }
|
---|
| 500 |
|
---|
| 501 | return VINF_SUCCESS;
|
---|
| 502 | }
|
---|
| 503 |
|
---|
| 504 |
|
---|
| 505 | /**
|
---|
| 506 | * @interface_method_impl{PDMDEVREG,pfnConstruct}
|
---|
| 507 | */
|
---|
| 508 | static DECLCALLBACK(int) flashR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
|
---|
| 509 | {
|
---|
| 510 | PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
|
---|
| 511 | PDEVFLASHCFI pThis = PDMDEVINS_2_DATA(pDevIns, PDEVFLASHCFI);
|
---|
| 512 | PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
|
---|
| 513 |
|
---|
| 514 | Assert(iInstance == 0); RT_NOREF1(iInstance);
|
---|
| 515 |
|
---|
| 516 | /*
|
---|
[99943] | 517 | * Initalize the basic variables so that the destructor always works.
|
---|
| 518 | */
|
---|
| 519 | pThis->Lun0.IBase.pfnQueryInterface = flashR3QueryInterface;
|
---|
| 520 |
|
---|
| 521 |
|
---|
| 522 | /*
|
---|
[99542] | 523 | * Validate configuration.
|
---|
| 524 | */
|
---|
| 525 | PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DeviceId|BaseAddress|Size|BlockSize|FlashFile", "");
|
---|
| 526 |
|
---|
| 527 | /*
|
---|
| 528 | * Read configuration.
|
---|
| 529 | */
|
---|
| 530 |
|
---|
| 531 | uint16_t u16FlashId = 0;
|
---|
| 532 | int rc = pHlp->pfnCFGMQueryU16Def(pCfg, "DeviceId", &u16FlashId, 0xA289);
|
---|
| 533 | if (RT_FAILURE(rc))
|
---|
| 534 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 535 | N_("Configuration error: Querying \"DeviceId\" as an integer failed"));
|
---|
| 536 |
|
---|
| 537 | /* The default base address is 2MB below 4GB. */
|
---|
| 538 | rc = pHlp->pfnCFGMQueryU64Def(pCfg, "BaseAddress", &pThis->GCPhysFlashBase, 0xFFE00000);
|
---|
| 539 | if (RT_FAILURE(rc))
|
---|
| 540 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 541 | N_("Configuration error: Querying \"BaseAddress\" as an integer failed"));
|
---|
| 542 |
|
---|
| 543 | /* The default flash device size is 128K. */
|
---|
[99943] | 544 | uint64_t cbFlash = 0;
|
---|
| 545 | rc = pHlp->pfnCFGMQueryU64Def(pCfg, "Size", &cbFlash, 128 * _1K);
|
---|
[99542] | 546 | if (RT_FAILURE(rc))
|
---|
| 547 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 548 | N_("Configuration error: Querying \"Size\" as an integer failed"));
|
---|
| 549 |
|
---|
| 550 | /* The default flash device block size is 4K. */
|
---|
| 551 | uint16_t cbBlock = 0;
|
---|
| 552 | rc = pHlp->pfnCFGMQueryU16Def(pCfg, "BlockSize", &cbBlock, _4K);
|
---|
| 553 | if (RT_FAILURE(rc))
|
---|
| 554 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 555 | N_("Configuration error: Querying \"BlockSize\" as an integer failed"));
|
---|
| 556 |
|
---|
| 557 | rc = pHlp->pfnCFGMQueryStringAlloc(pCfg, "FlashFile", &pThis->pszFlashFile);
|
---|
| 558 | if (RT_FAILURE(rc))
|
---|
| 559 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
| 560 | N_("Configuration error: Querying \"FlashFile\" as a string failed"));
|
---|
| 561 |
|
---|
| 562 | /*
|
---|
| 563 | * Initialize the flash core.
|
---|
| 564 | */
|
---|
| 565 | pThis->u16FlashId = u16FlashId;
|
---|
| 566 | pThis->cbBlockSize = cbBlock;
|
---|
| 567 | pThis->cbFlashSize = cbFlash;
|
---|
| 568 |
|
---|
| 569 | /* Set up the flash data. */
|
---|
| 570 | pThis->pbFlash = (uint8_t *)PDMDevHlpMMHeapAlloc(pDevIns, pThis->cbFlashSize);
|
---|
| 571 | if (!pThis->pbFlash)
|
---|
| 572 | return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY, N_("Failed to allocate heap memory"));
|
---|
| 573 |
|
---|
| 574 | /* Default value for empty flash. */
|
---|
| 575 | memset(pThis->pbFlash, 0xff, pThis->cbFlashSize);
|
---|
| 576 |
|
---|
| 577 | /* Reset the dynamic state.*/
|
---|
| 578 | flashR3Reset(pDevIns);
|
---|
| 579 |
|
---|
[99943] | 580 | /*
|
---|
| 581 | * NVRAM storage.
|
---|
| 582 | */
|
---|
| 583 | rc = PDMDevHlpDriverAttach(pDevIns, 0, &pThis->Lun0.IBase, &pThis->Lun0.pDrvBase, "NvramStorage");
|
---|
| 584 | if (RT_SUCCESS(rc))
|
---|
| 585 | {
|
---|
| 586 | pThis->Lun0.pDrvVfs = PDMIBASE_QUERY_INTERFACE(pThis->Lun0.pDrvBase, PDMIVFSCONNECTOR);
|
---|
| 587 | if (!pThis->Lun0.pDrvVfs)
|
---|
| 588 | return PDMDevHlpVMSetError(pDevIns, VERR_PDM_MISSING_INTERFACE_BELOW, RT_SRC_POS, N_("NVRAM storage driver is missing VFS interface below"));
|
---|
| 589 | }
|
---|
| 590 | else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
|
---|
| 591 | rc = VINF_SUCCESS; /* Missing driver is no error condition. */
|
---|
| 592 | else
|
---|
| 593 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, N_("Can't attach Nvram Storage driver"));
|
---|
[99542] | 594 |
|
---|
[99943] | 595 | if (pThis->Lun0.pDrvVfs)
|
---|
| 596 | {
|
---|
| 597 | AssertPtr(pThis->pszFlashFile);
|
---|
| 598 | rc = pThis->Lun0.pDrvVfs->pfnQuerySize(pThis->Lun0.pDrvVfs, FLASH_CFI_VFS_NAMESPACE, pThis->pszFlashFile, &cbFlash);
|
---|
| 599 | if (RT_SUCCESS(rc))
|
---|
| 600 | {
|
---|
| 601 | if (cbFlash <= pThis->cbFlashSize)
|
---|
| 602 | rc = pThis->Lun0.pDrvVfs->pfnReadAll(pThis->Lun0.pDrvVfs, FLASH_CFI_VFS_NAMESPACE, pThis->pszFlashFile,
|
---|
| 603 | pThis->pbFlash, pThis->cbFlashSize);
|
---|
| 604 | else
|
---|
| 605 | return PDMDEV_SET_ERROR(pDevIns, VERR_BUFFER_OVERFLOW, N_("Configured flash size is too small to fit the saved NVRAM content"));
|
---|
| 606 | }
|
---|
| 607 | }
|
---|
| 608 | else if (pThis->pszFlashFile)
|
---|
| 609 | {
|
---|
| 610 | RTFILE hFlashFile = NIL_RTFILE;
|
---|
| 611 | rc = RTFileOpen(&hFlashFile, pThis->pszFlashFile, RTFILE_O_READ | RTFILE_O_OPEN | RTFILE_O_DENY_WRITE);
|
---|
| 612 | if (RT_FAILURE(rc))
|
---|
| 613 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to open flash file"));
|
---|
[99542] | 614 |
|
---|
[99943] | 615 | size_t cbRead = 0;
|
---|
| 616 | rc = RTFileRead(hFlashFile, pThis->pbFlash, pThis->cbFlashSize, &cbRead);
|
---|
| 617 | RTFileClose(hFlashFile);
|
---|
| 618 | if (RT_FAILURE(rc))
|
---|
| 619 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to read flash file"));
|
---|
[99542] | 620 |
|
---|
[99943] | 621 | LogRel(("flash-cfi#%u: Read %zu bytes from file (asked for %u)\n.", cbRead, pThis->cbFlashSize, iInstance));
|
---|
| 622 | }
|
---|
| 623 |
|
---|
[99542] | 624 | /*
|
---|
| 625 | * Register MMIO region.
|
---|
| 626 | */
|
---|
| 627 | rc = PDMDevHlpMmioCreateExAndMap(pDevIns, pThis->GCPhysFlashBase, cbFlash,
|
---|
| 628 | IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, NULL, UINT32_MAX,
|
---|
| 629 | flashMMIOWrite, flashMMIORead, NULL, NULL, "Flash Memory", &pThis->hMmio);
|
---|
| 630 | AssertRCReturn(rc, rc);
|
---|
| 631 | LogRel(("Registered %uKB flash at %RGp\n", pThis->cbFlashSize / _1K, pThis->GCPhysFlashBase));
|
---|
| 632 |
|
---|
| 633 | /*
|
---|
| 634 | * Register saved state.
|
---|
| 635 | */
|
---|
[100762] | 636 | rc = PDMDevHlpSSMRegisterEx(pDevIns, FLASH_SAVED_STATE_VERSION, sizeof(*pThis), NULL,
|
---|
| 637 | NULL, flashR3LiveExec, NULL,
|
---|
| 638 | NULL, flashR3SaveExec, NULL,
|
---|
| 639 | NULL, flashR3LoadExec, NULL);
|
---|
[99542] | 640 | AssertRCReturn(rc, rc);
|
---|
| 641 |
|
---|
| 642 | return VINF_SUCCESS;
|
---|
| 643 | }
|
---|
| 644 |
|
---|
| 645 |
|
---|
| 646 | /**
|
---|
| 647 | * The device registration structure.
|
---|
| 648 | */
|
---|
| 649 | const PDMDEVREG g_DeviceFlashCFI =
|
---|
| 650 | {
|
---|
| 651 | /* .u32Version = */ PDM_DEVREG_VERSION,
|
---|
| 652 | /* .uReserved0 = */ 0,
|
---|
| 653 | /* .szName = */ "flash-cfi",
|
---|
| 654 | /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
|
---|
| 655 | /* .fClass = */ PDM_DEVREG_CLASS_ARCH,
|
---|
| 656 | /* .cMaxInstances = */ 1,
|
---|
| 657 | /* .uSharedVersion = */ 42,
|
---|
| 658 | /* .cbInstanceShared = */ sizeof(DEVFLASHCFI),
|
---|
| 659 | /* .cbInstanceCC = */ 0,
|
---|
| 660 | /* .cbInstanceRC = */ 0,
|
---|
| 661 | /* .cMaxPciDevices = */ 0,
|
---|
| 662 | /* .cMaxMsixVectors = */ 0,
|
---|
| 663 | /* .pszDescription = */ "Flash Memory Device",
|
---|
| 664 | #if defined(IN_RING3)
|
---|
| 665 | /* .pszRCMod = */ "",
|
---|
| 666 | /* .pszR0Mod = */ "",
|
---|
| 667 | /* .pfnConstruct = */ flashR3Construct,
|
---|
| 668 | /* .pfnDestruct = */ flashR3Destruct,
|
---|
| 669 | /* .pfnRelocate = */ NULL,
|
---|
| 670 | /* .pfnMemSetup = */ NULL,
|
---|
| 671 | /* .pfnPowerOn = */ NULL,
|
---|
| 672 | /* .pfnReset = */ flashR3Reset,
|
---|
| 673 | /* .pfnSuspend = */ NULL,
|
---|
| 674 | /* .pfnResume = */ NULL,
|
---|
| 675 | /* .pfnAttach = */ NULL,
|
---|
| 676 | /* .pfnDetach = */ NULL,
|
---|
| 677 | /* .pfnQueryInterface = */ NULL,
|
---|
| 678 | /* .pfnInitComplete = */ NULL,
|
---|
[99943] | 679 | /* .pfnPowerOff = */ flashR3PowerOff,
|
---|
[99542] | 680 | /* .pfnSoftReset = */ NULL,
|
---|
| 681 | /* .pfnReserved0 = */ NULL,
|
---|
| 682 | /* .pfnReserved1 = */ NULL,
|
---|
| 683 | /* .pfnReserved2 = */ NULL,
|
---|
| 684 | /* .pfnReserved3 = */ NULL,
|
---|
| 685 | /* .pfnReserved4 = */ NULL,
|
---|
| 686 | /* .pfnReserved5 = */ NULL,
|
---|
| 687 | /* .pfnReserved6 = */ NULL,
|
---|
| 688 | /* .pfnReserved7 = */ NULL,
|
---|
| 689 | #elif defined(IN_RING0)
|
---|
| 690 | /* .pfnEarlyConstruct = */ NULL,
|
---|
| 691 | /* .pfnConstruct = */ NULL,
|
---|
| 692 | /* .pfnDestruct = */ NULL,
|
---|
| 693 | /* .pfnFinalDestruct = */ NULL,
|
---|
| 694 | /* .pfnRequest = */ NULL,
|
---|
| 695 | /* .pfnReserved0 = */ NULL,
|
---|
| 696 | /* .pfnReserved1 = */ NULL,
|
---|
| 697 | /* .pfnReserved2 = */ NULL,
|
---|
| 698 | /* .pfnReserved3 = */ NULL,
|
---|
| 699 | /* .pfnReserved4 = */ NULL,
|
---|
| 700 | /* .pfnReserved5 = */ NULL,
|
---|
| 701 | /* .pfnReserved6 = */ NULL,
|
---|
| 702 | /* .pfnReserved7 = */ NULL,
|
---|
| 703 | #elif defined(IN_RC)
|
---|
| 704 | /* .pfnConstruct = */ NULL,
|
---|
| 705 | /* .pfnReserved0 = */ NULL,
|
---|
| 706 | /* .pfnReserved1 = */ NULL,
|
---|
| 707 | /* .pfnReserved2 = */ NULL,
|
---|
| 708 | /* .pfnReserved3 = */ NULL,
|
---|
| 709 | /* .pfnReserved4 = */ NULL,
|
---|
| 710 | /* .pfnReserved5 = */ NULL,
|
---|
| 711 | /* .pfnReserved6 = */ NULL,
|
---|
| 712 | /* .pfnReserved7 = */ NULL,
|
---|
| 713 | #else
|
---|
| 714 | # error "Not in IN_RING3, IN_RING0 or IN_RC!"
|
---|
| 715 | #endif
|
---|
| 716 | /* .u32VersionEnd = */ PDM_DEVREG_VERSION
|
---|
| 717 | };
|
---|
| 718 |
|
---|
| 719 | #endif /* VBOX_DEVICE_STRUCT_TESTCASE */
|
---|