VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/vmsvga_include/svga3d_cmd.h

Last change on this file was 102406, checked in by vboxsync, 6 months ago

Devices/Graphics: header update. bugref:10529
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1/* SPDX-License-Identifier: GPL-2.0 OR MIT */
2/**********************************************************
3 * Copyright 1998-2020 VMware, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person
6 * obtaining a copy of this software and associated documentation
7 * files (the "Software"), to deal in the Software without
8 * restriction, including without limitation the rights to use, copy,
9 * modify, merge, publish, distribute, sublicense, and/or sell copies
10 * of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
20 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
21 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 **********************************************************/
26
27/*
28 * svga3d_cmd.h --
29 *
30 * SVGA 3d hardware cmd definitions
31 */
32
33#ifndef _SVGA3D_CMD_H_
34#define _SVGA3D_CMD_H_
35
36#define INCLUDE_ALLOW_MODULE
37#define INCLUDE_ALLOW_USERLEVEL
38#define INCLUDE_ALLOW_VMCORE
39
40#include "includeCheck.h"
41#include "svga3d_types.h"
42
43/*
44 * Identifiers for commands in the command FIFO.
45 *
46 * IDs between 1000 and 1039 (inclusive) were used by obsolete versions of
47 * the SVGA3D protocol and remain reserved; they should not be used in the
48 * future.
49 *
50 * IDs between 1040 and 2999 (inclusive) are available for use by the
51 * current SVGA3D protocol.
52 *
53 * FIFO clients other than SVGA3D should stay below 1000, or at 3000
54 * and up.
55 */
56
57typedef enum {
58 SVGA_3D_CMD_LEGACY_BASE = 1000,
59 SVGA_3D_CMD_BASE = 1040,
60
61 SVGA_3D_CMD_SURFACE_DEFINE = 1040,
62 SVGA_3D_CMD_SURFACE_DESTROY = 1041,
63 SVGA_3D_CMD_SURFACE_COPY = 1042,
64 SVGA_3D_CMD_SURFACE_STRETCHBLT = 1043,
65 SVGA_3D_CMD_SURFACE_DMA = 1044,
66 SVGA_3D_CMD_CONTEXT_DEFINE = 1045,
67 SVGA_3D_CMD_CONTEXT_DESTROY = 1046,
68 SVGA_3D_CMD_SETTRANSFORM = 1047,
69 SVGA_3D_CMD_SETZRANGE = 1048,
70 SVGA_3D_CMD_SETRENDERSTATE = 1049,
71 SVGA_3D_CMD_SETRENDERTARGET = 1050,
72 SVGA_3D_CMD_SETTEXTURESTATE = 1051,
73 SVGA_3D_CMD_SETMATERIAL = 1052,
74 SVGA_3D_CMD_SETLIGHTDATA = 1053,
75 SVGA_3D_CMD_SETLIGHTENABLED = 1054,
76 SVGA_3D_CMD_SETVIEWPORT = 1055,
77 SVGA_3D_CMD_SETCLIPPLANE = 1056,
78 SVGA_3D_CMD_CLEAR = 1057,
79 SVGA_3D_CMD_PRESENT = 1058,
80 SVGA_3D_CMD_SHADER_DEFINE = 1059,
81 SVGA_3D_CMD_SHADER_DESTROY = 1060,
82 SVGA_3D_CMD_SET_SHADER = 1061,
83 SVGA_3D_CMD_SET_SHADER_CONST = 1062,
84 SVGA_3D_CMD_DRAW_PRIMITIVES = 1063,
85 SVGA_3D_CMD_SETSCISSORRECT = 1064,
86 SVGA_3D_CMD_BEGIN_QUERY = 1065,
87 SVGA_3D_CMD_END_QUERY = 1066,
88 SVGA_3D_CMD_WAIT_FOR_QUERY = 1067,
89 SVGA_3D_CMD_PRESENT_READBACK = 1068,
90 SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN = 1069,
91 SVGA_3D_CMD_SURFACE_DEFINE_V2 = 1070,
92 SVGA_3D_CMD_GENERATE_MIPMAPS = 1071,
93 SVGA_3D_CMD_DEAD4 = 1072,
94 SVGA_3D_CMD_DEAD5 = 1073,
95 SVGA_3D_CMD_DEAD6 = 1074,
96 SVGA_3D_CMD_DEAD7 = 1075,
97 SVGA_3D_CMD_DEAD8 = 1076,
98 SVGA_3D_CMD_DEAD9 = 1077,
99 SVGA_3D_CMD_DEAD10 = 1078,
100 SVGA_3D_CMD_DEAD11 = 1079,
101 SVGA_3D_CMD_ACTIVATE_SURFACE = 1080,
102 SVGA_3D_CMD_DEACTIVATE_SURFACE = 1081,
103 SVGA_3D_CMD_SCREEN_DMA = 1082,
104#ifndef VBOX
105 SVGA_3D_CMD_DEAD1 = 1083,
106#else
107 SVGA_3D_CMD_VB_DX_CLEAR_RENDERTARGET_VIEW_REGION = 1083,
108#endif
109 SVGA_3D_CMD_DEAD2 = 1084,
110
111 SVGA_3D_CMD_DEAD12 = 1085,
112 SVGA_3D_CMD_DEAD13 = 1086,
113 SVGA_3D_CMD_DEAD14 = 1087,
114 SVGA_3D_CMD_DEAD15 = 1088,
115 SVGA_3D_CMD_DEAD16 = 1089,
116 SVGA_3D_CMD_DEAD17 = 1090,
117
118 SVGA_3D_CMD_SET_OTABLE_BASE = 1091,
119 SVGA_3D_CMD_READBACK_OTABLE = 1092,
120
121 SVGA_3D_CMD_DEFINE_GB_MOB = 1093,
122 SVGA_3D_CMD_DESTROY_GB_MOB = 1094,
123 SVGA_3D_CMD_DEAD3 = 1095,
124 SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING = 1096,
125
126 SVGA_3D_CMD_DEFINE_GB_SURFACE = 1097,
127 SVGA_3D_CMD_DESTROY_GB_SURFACE = 1098,
128 SVGA_3D_CMD_BIND_GB_SURFACE = 1099,
129 SVGA_3D_CMD_COND_BIND_GB_SURFACE = 1100,
130 SVGA_3D_CMD_UPDATE_GB_IMAGE = 1101,
131 SVGA_3D_CMD_UPDATE_GB_SURFACE = 1102,
132 SVGA_3D_CMD_READBACK_GB_IMAGE = 1103,
133 SVGA_3D_CMD_READBACK_GB_SURFACE = 1104,
134 SVGA_3D_CMD_INVALIDATE_GB_IMAGE = 1105,
135 SVGA_3D_CMD_INVALIDATE_GB_SURFACE = 1106,
136
137 SVGA_3D_CMD_DEFINE_GB_CONTEXT = 1107,
138 SVGA_3D_CMD_DESTROY_GB_CONTEXT = 1108,
139 SVGA_3D_CMD_BIND_GB_CONTEXT = 1109,
140 SVGA_3D_CMD_READBACK_GB_CONTEXT = 1110,
141 SVGA_3D_CMD_INVALIDATE_GB_CONTEXT = 1111,
142
143 SVGA_3D_CMD_DEFINE_GB_SHADER = 1112,
144 SVGA_3D_CMD_DESTROY_GB_SHADER = 1113,
145 SVGA_3D_CMD_BIND_GB_SHADER = 1114,
146
147 SVGA_3D_CMD_SET_OTABLE_BASE64 = 1115,
148
149 SVGA_3D_CMD_BEGIN_GB_QUERY = 1116,
150 SVGA_3D_CMD_END_GB_QUERY = 1117,
151 SVGA_3D_CMD_WAIT_FOR_GB_QUERY = 1118,
152
153 SVGA_3D_CMD_NOP = 1119,
154
155 SVGA_3D_CMD_ENABLE_GART = 1120,
156 SVGA_3D_CMD_DISABLE_GART = 1121,
157 SVGA_3D_CMD_MAP_MOB_INTO_GART = 1122,
158 SVGA_3D_CMD_UNMAP_GART_RANGE = 1123,
159
160 SVGA_3D_CMD_DEFINE_GB_SCREENTARGET = 1124,
161 SVGA_3D_CMD_DESTROY_GB_SCREENTARGET = 1125,
162 SVGA_3D_CMD_BIND_GB_SCREENTARGET = 1126,
163 SVGA_3D_CMD_UPDATE_GB_SCREENTARGET = 1127,
164
165 SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL = 1128,
166 SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL = 1129,
167
168 SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE = 1130,
169
170 SVGA_3D_CMD_GB_SCREEN_DMA = 1131,
171 SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH = 1132,
172 SVGA_3D_CMD_GB_MOB_FENCE = 1133,
173 SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 = 1134,
174 SVGA_3D_CMD_DEFINE_GB_MOB64 = 1135,
175 SVGA_3D_CMD_REDEFINE_GB_MOB64 = 1136,
176 SVGA_3D_CMD_NOP_ERROR = 1137,
177
178 SVGA_3D_CMD_SET_VERTEX_STREAMS = 1138,
179 SVGA_3D_CMD_SET_VERTEX_DECLS = 1139,
180 SVGA_3D_CMD_SET_VERTEX_DIVISORS = 1140,
181 SVGA_3D_CMD_DRAW = 1141,
182 SVGA_3D_CMD_DRAW_INDEXED = 1142,
183
184 /*
185 * DX10 Commands
186 */
187 SVGA_3D_CMD_DX_MIN = 1143,
188 SVGA_3D_CMD_DX_DEFINE_CONTEXT = 1143,
189 SVGA_3D_CMD_DX_DESTROY_CONTEXT = 1144,
190 SVGA_3D_CMD_DX_BIND_CONTEXT = 1145,
191 SVGA_3D_CMD_DX_READBACK_CONTEXT = 1146,
192 SVGA_3D_CMD_DX_INVALIDATE_CONTEXT = 1147,
193 SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER = 1148,
194 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES = 1149,
195 SVGA_3D_CMD_DX_SET_SHADER = 1150,
196 SVGA_3D_CMD_DX_SET_SAMPLERS = 1151,
197 SVGA_3D_CMD_DX_DRAW = 1152,
198 SVGA_3D_CMD_DX_DRAW_INDEXED = 1153,
199 SVGA_3D_CMD_DX_DRAW_INSTANCED = 1154,
200 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED = 1155,
201 SVGA_3D_CMD_DX_DRAW_AUTO = 1156,
202 SVGA_3D_CMD_DX_SET_INPUT_LAYOUT = 1157,
203 SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS = 1158,
204 SVGA_3D_CMD_DX_SET_INDEX_BUFFER = 1159,
205 SVGA_3D_CMD_DX_SET_TOPOLOGY = 1160,
206 SVGA_3D_CMD_DX_SET_RENDERTARGETS = 1161,
207 SVGA_3D_CMD_DX_SET_BLEND_STATE = 1162,
208 SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE = 1163,
209 SVGA_3D_CMD_DX_SET_RASTERIZER_STATE = 1164,
210 SVGA_3D_CMD_DX_DEFINE_QUERY = 1165,
211 SVGA_3D_CMD_DX_DESTROY_QUERY = 1166,
212 SVGA_3D_CMD_DX_BIND_QUERY = 1167,
213 SVGA_3D_CMD_DX_SET_QUERY_OFFSET = 1168,
214 SVGA_3D_CMD_DX_BEGIN_QUERY = 1169,
215 SVGA_3D_CMD_DX_END_QUERY = 1170,
216 SVGA_3D_CMD_DX_READBACK_QUERY = 1171,
217 SVGA_3D_CMD_DX_SET_PREDICATION = 1172,
218 SVGA_3D_CMD_DX_SET_SOTARGETS = 1173,
219 SVGA_3D_CMD_DX_SET_VIEWPORTS = 1174,
220 SVGA_3D_CMD_DX_SET_SCISSORRECTS = 1175,
221 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW = 1176,
222 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW = 1177,
223 SVGA_3D_CMD_DX_PRED_COPY_REGION = 1178,
224 SVGA_3D_CMD_DX_PRED_COPY = 1179,
225 SVGA_3D_CMD_DX_PRESENTBLT = 1180,
226 SVGA_3D_CMD_DX_GENMIPS = 1181,
227 SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE = 1182,
228 SVGA_3D_CMD_DX_READBACK_SUBRESOURCE = 1183,
229 SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE = 1184,
230 SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW = 1185,
231 SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW = 1186,
232 SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW = 1187,
233 SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW = 1188,
234 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW = 1189,
235 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW = 1190,
236 SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT = 1191,
237 SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT = 1192,
238 SVGA_3D_CMD_DX_DEFINE_BLEND_STATE = 1193,
239 SVGA_3D_CMD_DX_DESTROY_BLEND_STATE = 1194,
240 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE = 1195,
241 SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE = 1196,
242 SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE = 1197,
243 SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE = 1198,
244 SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE = 1199,
245 SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE = 1200,
246 SVGA_3D_CMD_DX_DEFINE_SHADER = 1201,
247 SVGA_3D_CMD_DX_DESTROY_SHADER = 1202,
248 SVGA_3D_CMD_DX_BIND_SHADER = 1203,
249 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT = 1204,
250 SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT = 1205,
251 SVGA_3D_CMD_DX_SET_STREAMOUTPUT = 1206,
252 SVGA_3D_CMD_DX_SET_COTABLE = 1207,
253 SVGA_3D_CMD_DX_READBACK_COTABLE = 1208,
254 SVGA_3D_CMD_DX_BUFFER_COPY = 1209,
255 SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER = 1210,
256 SVGA_3D_CMD_DX_SURFACE_COPY_AND_READBACK = 1211,
257 SVGA_3D_CMD_DX_MOVE_QUERY = 1212,
258 SVGA_3D_CMD_DX_BIND_ALL_QUERY = 1213,
259 SVGA_3D_CMD_DX_READBACK_ALL_QUERY = 1214,
260 SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER = 1215,
261 SVGA_3D_CMD_DX_MOB_FENCE_64 = 1216,
262 SVGA_3D_CMD_DX_BIND_ALL_SHADER = 1217,
263 SVGA_3D_CMD_DX_HINT = 1218,
264 SVGA_3D_CMD_DX_BUFFER_UPDATE = 1219,
265 SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET = 1220,
266 SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET = 1221,
267 SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET = 1222,
268 SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET = 1223,
269 SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET = 1224,
270 SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET = 1225,
271
272 SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER = 1226,
273 SVGA_3D_CMD_DX_MAX = 1227,
274
275 SVGA_3D_CMD_SCREEN_COPY = 1227,
276
277 SVGA_3D_CMD_RESERVED1 = 1228,
278 SVGA_3D_CMD_RESERVED2 = 1229,
279 SVGA_3D_CMD_RESERVED3 = 1230,
280 SVGA_3D_CMD_RESERVED4 = 1231,
281 SVGA_3D_CMD_RESERVED5 = 1232,
282 SVGA_3D_CMD_RESERVED6 = 1233,
283 SVGA_3D_CMD_RESERVED7 = 1234,
284 SVGA_3D_CMD_RESERVED8 = 1235,
285
286 SVGA_3D_CMD_GROW_OTABLE = 1236,
287 SVGA_3D_CMD_DX_GROW_COTABLE = 1237,
288 SVGA_3D_CMD_INTRA_SURFACE_COPY = 1238,
289
290 SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 = 1239,
291
292 SVGA_3D_CMD_DX_RESOLVE_COPY = 1240,
293 SVGA_3D_CMD_DX_PRED_RESOLVE_COPY = 1241,
294 SVGA_3D_CMD_DX_PRED_CONVERT_REGION = 1242,
295 SVGA_3D_CMD_DX_PRED_CONVERT = 1243,
296 SVGA_3D_CMD_WHOLE_SURFACE_COPY = 1244,
297
298 SVGA_3D_CMD_DX_DEFINE_UA_VIEW = 1245,
299 SVGA_3D_CMD_DX_DESTROY_UA_VIEW = 1246,
300 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT = 1247,
301 SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT = 1248,
302 SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT = 1249,
303 SVGA_3D_CMD_DX_SET_UA_VIEWS = 1250,
304
305 SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT = 1251,
306 SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT = 1252,
307 SVGA_3D_CMD_DX_DISPATCH = 1253,
308 SVGA_3D_CMD_DX_DISPATCH_INDIRECT = 1254,
309
310 SVGA_3D_CMD_WRITE_ZERO_SURFACE = 1255,
311 SVGA_3D_CMD_HINT_ZERO_SURFACE = 1256,
312 SVGA_3D_CMD_DX_TRANSFER_TO_BUFFER = 1257,
313 SVGA_3D_CMD_DX_SET_STRUCTURE_COUNT = 1258,
314
315 SVGA_3D_CMD_LOGICOPS_BITBLT = 1259,
316 SVGA_3D_CMD_LOGICOPS_TRANSBLT = 1260,
317 SVGA_3D_CMD_LOGICOPS_STRETCHBLT = 1261,
318 SVGA_3D_CMD_LOGICOPS_COLORFILL = 1262,
319 SVGA_3D_CMD_LOGICOPS_ALPHABLEND = 1263,
320 SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND = 1264,
321
322 SVGA_3D_CMD_RESERVED2_1 = 1265,
323
324 SVGA_3D_CMD_RESERVED2_2 = 1266,
325 SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 = 1267,
326 SVGA_3D_CMD_DX_SET_CS_UA_VIEWS = 1268,
327 SVGA_3D_CMD_DX_SET_MIN_LOD = 1269,
328 SVGA_3D_CMD_RESERVED2_3 = 1270,
329 SVGA_3D_CMD_RESERVED2_4 = 1271,
330 SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2 = 1272,
331 SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB = 1273,
332 SVGA_3D_CMD_DX_SET_SHADER_IFACE = 1274,
333 SVGA_3D_CMD_DX_BIND_STREAMOUTPUT = 1275,
334 SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS = 1276,
335 SVGA_3D_CMD_DX_BIND_SHADER_IFACE = 1277,
336
337 SVGA_3D_CMD_MAX = 1278,
338 SVGA_3D_CMD_FUTURE_MAX = 3000
339
340#ifdef VBOX
341 ,
342 /* VirtualBox commands */
343 VBSVGA_3D_CMD_BASE = 1000000, /* Arbitrary */
344 VBSVGA_3D_CMD_MIN = VBSVGA_3D_CMD_BASE,
345 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR = VBSVGA_3D_CMD_BASE + 0,
346 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 1,
347 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_DECODER = VBSVGA_3D_CMD_BASE + 2,
348 VBSVGA_3D_CMD_DX_VIDEO_DECODER_BEGIN_FRAME = VBSVGA_3D_CMD_BASE + 3,
349 VBSVGA_3D_CMD_DX_VIDEO_DECODER_SUBMIT_BUFFERS = VBSVGA_3D_CMD_BASE + 4,
350 VBSVGA_3D_CMD_DX_VIDEO_DECODER_END_FRAME = VBSVGA_3D_CMD_BASE + 5,
351 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_INPUT_VIEW = VBSVGA_3D_CMD_BASE + 6,
352 VBSVGA_3D_CMD_DX_DEFINE_VIDEO_PROCESSOR_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 7,
353 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_BLT = VBSVGA_3D_CMD_BASE + 8,
354 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER = VBSVGA_3D_CMD_BASE + 9,
355 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_DECODER_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 10,
356 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR = VBSVGA_3D_CMD_BASE + 11,
357 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_INPUT_VIEW = VBSVGA_3D_CMD_BASE + 12,
358 VBSVGA_3D_CMD_DX_DESTROY_VIDEO_PROCESSOR_OUTPUT_VIEW = VBSVGA_3D_CMD_BASE + 13,
359 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_TARGET_RECT = VBSVGA_3D_CMD_BASE + 14,
360 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_BACKGROUND_COLOR = VBSVGA_3D_CMD_BASE + 15,
361 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_COLOR_SPACE = VBSVGA_3D_CMD_BASE + 16,
362 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_ALPHA_FILL_MODE = VBSVGA_3D_CMD_BASE + 17,
363 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_CONSTRICTION = VBSVGA_3D_CMD_BASE + 18,
364 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_OUTPUT_STEREO_MODE = VBSVGA_3D_CMD_BASE + 19,
365 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FRAME_FORMAT = VBSVGA_3D_CMD_BASE + 20,
366 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_COLOR_SPACE = VBSVGA_3D_CMD_BASE + 21,
367 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_OUTPUT_RATE = VBSVGA_3D_CMD_BASE + 22,
368 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_SOURCE_RECT = VBSVGA_3D_CMD_BASE + 23,
369 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_DEST_RECT = VBSVGA_3D_CMD_BASE + 24,
370 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ALPHA = VBSVGA_3D_CMD_BASE + 25,
371 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PALETTE = VBSVGA_3D_CMD_BASE + 26,
372 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_PIXEL_ASPECT_RATIO = VBSVGA_3D_CMD_BASE + 27,
373 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_LUMA_KEY = VBSVGA_3D_CMD_BASE + 28,
374 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_STEREO_FORMAT = VBSVGA_3D_CMD_BASE + 29,
375 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_AUTO_PROCESSING_MODE = VBSVGA_3D_CMD_BASE + 30,
376 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_FILTER = VBSVGA_3D_CMD_BASE + 31,
377 VBSVGA_3D_CMD_DX_VIDEO_PROCESSOR_SET_STREAM_ROTATION = VBSVGA_3D_CMD_BASE + 32,
378 VBSVGA_3D_CMD_DX_GET_VIDEO_CAPABILITY = VBSVGA_3D_CMD_BASE + 33,
379 VBSVGA_3D_CMD_DX_CLEAR_RTV = VBSVGA_3D_CMD_BASE + 34,
380 VBSVGA_3D_CMD_DX_CLEAR_UAV = VBSVGA_3D_CMD_BASE + 35,
381 VBSVGA_3D_CMD_DX_CLEAR_VDOV = VBSVGA_3D_CMD_BASE + 36,
382 VBSVGA_3D_CMD_DX_CLEAR_VPIV = VBSVGA_3D_CMD_BASE + 37,
383 VBSVGA_3D_CMD_DX_CLEAR_VPOV = VBSVGA_3D_CMD_BASE + 38,
384 VBSVGA_3D_CMD_MAX = VBSVGA_3D_CMD_BASE + 39
385#endif
386} SVGAFifo3dCmdId;
387
388#define SVGA_NUM_3D_CMD (SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)
389#ifdef VBOX
390#define VBSVGA_NUM_COMMANDS (SVGA_NUM_3D_CMD + (VBSVGA_3D_CMD_MAX - VBSVGA_3D_CMD_BASE))
391#endif
392
393/*
394 * FIFO command format definitions:
395 */
396
397/*
398 * The data size header following cmdNum for every 3d command
399 */
400typedef
401#include "vmware_pack_begin.h"
402struct {
403 uint32 id;
404 uint32 size;
405}
406#include "vmware_pack_end.h"
407SVGA3dCmdHeader;
408
409typedef
410#include "vmware_pack_begin.h"
411struct {
412 uint32 numMipLevels;
413}
414#include "vmware_pack_end.h"
415SVGA3dSurfaceFace;
416
417typedef
418#include "vmware_pack_begin.h"
419struct {
420 uint32 sid;
421 SVGA3dSurface1Flags surfaceFlags;
422 SVGA3dSurfaceFormat format;
423
424 /*
425 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
426 * structures must have the same value of numMipLevels field.
427 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
428 * numMipLevels set to 0.
429 */
430 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
431
432 /*
433 * Followed by an SVGA3dSize structure for each mip level in each face.
434 *
435 * A note on surface sizes: Sizes are always specified in pixels,
436 * even if the true surface size is not a multiple of the minimum
437 * block size of the surface's format. For example, a 3x3x1 DXT1
438 * compressed texture would actually be stored as a 4x4x1 image in
439 * memory.
440 */
441}
442#include "vmware_pack_end.h"
443SVGA3dCmdDefineSurface; /* SVGA_3D_CMD_SURFACE_DEFINE */
444
445typedef
446#include "vmware_pack_begin.h"
447struct {
448 uint32 sid;
449 SVGA3dSurface1Flags surfaceFlags;
450 SVGA3dSurfaceFormat format;
451
452 /*
453 * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
454 * structures must have the same value of numMipLevels field.
455 * Otherwise, all but the first SVGA3dSurfaceFace structures must have the
456 * numMipLevels set to 0.
457 */
458 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES];
459 uint32 multisampleCount;
460 SVGA3dTextureFilter autogenFilter;
461
462 /*
463 * Followed by an SVGA3dSize structure for each mip level in each face.
464 *
465 * A note on surface sizes: Sizes are always specified in pixels,
466 * even if the true surface size is not a multiple of the minimum
467 * block size of the surface's format. For example, a 3x3x1 DXT1
468 * compressed texture would actually be stored as a 4x4x1 image in
469 * memory.
470 */
471}
472#include "vmware_pack_end.h"
473SVGA3dCmdDefineSurface_v2; /* SVGA_3D_CMD_SURFACE_DEFINE_V2 */
474
475typedef
476#include "vmware_pack_begin.h"
477struct {
478 uint32 sid;
479}
480#include "vmware_pack_end.h"
481SVGA3dCmdDestroySurface; /* SVGA_3D_CMD_SURFACE_DESTROY */
482
483typedef
484#include "vmware_pack_begin.h"
485struct {
486 uint32 cid;
487}
488#include "vmware_pack_end.h"
489SVGA3dCmdDefineContext; /* SVGA_3D_CMD_CONTEXT_DEFINE */
490
491typedef
492#include "vmware_pack_begin.h"
493struct {
494 uint32 cid;
495}
496#include "vmware_pack_end.h"
497SVGA3dCmdDestroyContext; /* SVGA_3D_CMD_CONTEXT_DESTROY */
498
499typedef
500#include "vmware_pack_begin.h"
501struct {
502 uint32 cid;
503 SVGA3dClearFlag clearFlag;
504 uint32 color;
505 float depth;
506 uint32 stencil;
507 /* Followed by variable number of SVGA3dRect structures */
508}
509#include "vmware_pack_end.h"
510SVGA3dCmdClear; /* SVGA_3D_CMD_CLEAR */
511
512typedef
513#include "vmware_pack_begin.h"
514struct {
515 SVGA3dLightType type;
516 SVGA3dBool inWorldSpace;
517 float diffuse[4];
518 float specular[4];
519 float ambient[4];
520 float position[4];
521 float direction[4];
522 float range;
523 float falloff;
524 float attenuation0;
525 float attenuation1;
526 float attenuation2;
527 float theta;
528 float phi;
529}
530#include "vmware_pack_end.h"
531SVGA3dLightData;
532
533typedef
534#include "vmware_pack_begin.h"
535struct {
536 uint32 sid;
537 /* Followed by variable number of SVGA3dCopyRect structures */
538}
539#include "vmware_pack_end.h"
540SVGA3dCmdPresent; /* SVGA_3D_CMD_PRESENT */
541
542typedef
543#include "vmware_pack_begin.h"
544struct {
545 SVGA3dRenderStateName state;
546 union {
547 uint32 uintValue;
548 float floatValue;
549 };
550}
551#include "vmware_pack_end.h"
552SVGA3dRenderState;
553
554typedef
555#include "vmware_pack_begin.h"
556struct {
557 uint32 cid;
558 /* Followed by variable number of SVGA3dRenderState structures */
559}
560#include "vmware_pack_end.h"
561SVGA3dCmdSetRenderState; /* SVGA_3D_CMD_SETRENDERSTATE */
562
563typedef
564#include "vmware_pack_begin.h"
565struct {
566 uint32 cid;
567 SVGA3dRenderTargetType type;
568 SVGA3dSurfaceImageId target;
569}
570#include "vmware_pack_end.h"
571SVGA3dCmdSetRenderTarget; /* SVGA_3D_CMD_SETRENDERTARGET */
572
573typedef
574#include "vmware_pack_begin.h"
575struct {
576 SVGA3dSurfaceImageId src;
577 SVGA3dSurfaceImageId dest;
578 /* Followed by variable number of SVGA3dCopyBox structures */
579}
580#include "vmware_pack_end.h"
581SVGA3dCmdSurfaceCopy; /* SVGA_3D_CMD_SURFACE_COPY */
582
583/*
584 * Perform a surface copy within the same image.
585 * The src/dest boxes are allowed to overlap.
586 */
587typedef
588#include "vmware_pack_begin.h"
589struct {
590 SVGA3dSurfaceImageId surface;
591 SVGA3dCopyBox box;
592}
593#include "vmware_pack_end.h"
594SVGA3dCmdIntraSurfaceCopy; /* SVGA_3D_CMD_INTRA_SURFACE_COPY */
595
596typedef
597#include "vmware_pack_begin.h"
598struct {
599 uint32 srcSid;
600 uint32 destSid;
601}
602#include "vmware_pack_end.h"
603SVGA3dCmdWholeSurfaceCopy; /* SVGA_3D_CMD_WHOLE_SURFACE_COPY */
604
605typedef
606#include "vmware_pack_begin.h"
607struct {
608 SVGA3dSurfaceImageId src;
609 SVGA3dSurfaceImageId dest;
610 SVGA3dBox boxSrc;
611 SVGA3dBox boxDest;
612}
613#include "vmware_pack_end.h"
614SVGA3dCmdSurfaceStretchBltNonMSToMS;
615/* SVGA_3D_CMD_SURFACE_STRETCHBLT_NON_MS_TO_MS */
616
617typedef
618#include "vmware_pack_begin.h"
619struct {
620 SVGA3dSurfaceImageId src;
621 SVGA3dSurfaceImageId dest;
622 SVGA3dBox boxSrc;
623 SVGA3dBox boxDest;
624 SVGA3dStretchBltMode mode;
625}
626#include "vmware_pack_end.h"
627SVGA3dCmdSurfaceStretchBlt; /* SVGA_3D_CMD_SURFACE_STRETCHBLT */
628
629typedef
630#include "vmware_pack_begin.h"
631struct {
632 /*
633 * If the discard flag is present in a surface DMA operation, the host may
634 * discard the contents of the current mipmap level and face of the target
635 * surface before applying the surface DMA contents.
636 */
637 uint32 discard : 1;
638
639 /*
640 * If the unsynchronized flag is present, the host may perform this upload
641 * without syncing to pending reads on this surface.
642 */
643 uint32 unsynchronized : 1;
644
645 /*
646 * Guests *MUST* set the reserved bits to 0 before submitting the command
647 * suffix as future flags may occupy these bits.
648 */
649 uint32 reserved : 30;
650}
651#include "vmware_pack_end.h"
652SVGA3dSurfaceDMAFlags;
653
654typedef
655#include "vmware_pack_begin.h"
656struct {
657 SVGAGuestImage guest;
658 SVGA3dSurfaceImageId host;
659 SVGA3dTransferType transfer;
660
661 /*
662 * Followed by variable number of SVGA3dCopyBox structures. For consistency
663 * in all clipping logic and coordinate translation, we define the
664 * "source" in each copyBox as the guest image and the
665 * "destination" as the host image, regardless of transfer
666 * direction.
667 *
668 * For efficiency, the SVGA3D device is free to copy more data than
669 * specified. For example, it may round copy boxes outwards such
670 * that they lie on particular alignment boundaries.
671 */
672}
673#include "vmware_pack_end.h"
674SVGA3dCmdSurfaceDMA; /* SVGA_3D_CMD_SURFACE_DMA */
675
676/*
677 * SVGA3dCmdSurfaceDMASuffix --
678 *
679 * This is a command suffix that will appear after a SurfaceDMA command in
680 * the FIFO. It contains some extra information that hosts may use to
681 * optimize performance or protect the guest. This suffix exists to preserve
682 * backwards compatibility while also allowing for new functionality to be
683 * implemented.
684 */
685
686typedef
687#include "vmware_pack_begin.h"
688struct {
689 uint32 suffixSize;
690
691 /*
692 * The maximum offset is used to determine the maximum offset from the
693 * guestPtr base address that will be accessed or written to during this
694 * surfaceDMA. If the suffix is supported, the host will respect this
695 * boundary while performing surface DMAs.
696 *
697 * Defaults to MAX_UINT32
698 */
699 uint32 maximumOffset;
700
701 /*
702 * A set of flags that describes optimizations that the host may perform
703 * while performing this surface DMA operation. The guest should never rely
704 * on behaviour that is different when these flags are set for correctness.
705 *
706 * Defaults to 0
707 */
708 SVGA3dSurfaceDMAFlags flags;
709}
710#include "vmware_pack_end.h"
711SVGA3dCmdSurfaceDMASuffix;
712
713/*
714 * SVGA_3D_CMD_DRAW_PRIMITIVES --
715 *
716 * This command is the SVGA3D device's generic drawing entry point.
717 * It can draw multiple ranges of primitives, optionally using an
718 * index buffer, using an arbitrary collection of vertex buffers.
719 *
720 * Each SVGA3dVertexDecl defines a distinct vertex array to bind
721 * during this draw call. The declarations specify which surface
722 * the vertex data lives in, what that vertex data is used for,
723 * and how to interpret it.
724 *
725 * Each SVGA3dPrimitiveRange defines a collection of primitives
726 * to render using the same vertex arrays. An index buffer is
727 * optional.
728 */
729
730typedef
731#include "vmware_pack_begin.h"
732struct {
733 /*
734 * A range hint is an optional specification for the range of indices
735 * in an SVGA3dArray that will be used. If 'last' is zero, it is assumed
736 * that the entire array will be used.
737 *
738 * These are only hints. The SVGA3D device may use them for
739 * performance optimization if possible, but it's also allowed to
740 * ignore these values.
741 */
742 uint32 first;
743 uint32 last;
744}
745#include "vmware_pack_end.h"
746SVGA3dArrayRangeHint;
747
748typedef
749#include "vmware_pack_begin.h"
750struct {
751 /*
752 * Define the origin and shape of a vertex or index array. Both
753 * 'offset' and 'stride' are in bytes. The provided surface will be
754 * reinterpreted as a flat array of bytes in the same format used
755 * by surface DMA operations. To avoid unnecessary conversions, the
756 * surface should be created with the SVGA3D_BUFFER format.
757 *
758 * Index 0 in the array starts 'offset' bytes into the surface.
759 * Index 1 begins at byte 'offset + stride', etc. Array indices may
760 * not be negative.
761 */
762 uint32 surfaceId;
763 uint32 offset;
764 uint32 stride;
765}
766#include "vmware_pack_end.h"
767SVGA3dArray;
768
769typedef
770#include "vmware_pack_begin.h"
771struct {
772 /*
773 * Describe a vertex array's data type, and define how it is to be
774 * used by the fixed function pipeline or the vertex shader. It
775 * isn't useful to have two VertexDecls with the same
776 * VertexArrayIdentity in one draw call.
777 */
778 SVGA3dDeclType type;
779 SVGA3dDeclMethod method;
780 SVGA3dDeclUsage usage;
781 uint32 usageIndex;
782}
783#include "vmware_pack_end.h"
784SVGA3dVertexArrayIdentity;
785
786typedef
787#include "vmware_pack_begin.h"
788struct SVGA3dVertexDecl {
789 SVGA3dVertexArrayIdentity identity;
790 SVGA3dArray array;
791 SVGA3dArrayRangeHint rangeHint;
792}
793#include "vmware_pack_end.h"
794SVGA3dVertexDecl;
795
796typedef
797#include "vmware_pack_begin.h"
798struct SVGA3dPrimitiveRange {
799 /*
800 * Define a group of primitives to render, from sequential indices.
801 *
802 * The value of 'primitiveType' and 'primitiveCount' imply the
803 * total number of vertices that will be rendered.
804 */
805 SVGA3dPrimitiveType primType;
806 uint32 primitiveCount;
807
808 /*
809 * Optional index buffer. If indexArray.surfaceId is
810 * SVGA3D_INVALID_ID, we render without an index buffer. Rendering
811 * without an index buffer is identical to rendering with an index
812 * buffer containing the sequence [0, 1, 2, 3, ...].
813 *
814 * If an index buffer is in use, indexWidth specifies the width in
815 * bytes of each index value. It must be less than or equal to
816 * indexArray.stride.
817 *
818 * (Currently, the SVGA3D device requires index buffers to be tightly
819 * packed. In other words, indexWidth == indexArray.stride)
820 */
821 SVGA3dArray indexArray;
822 uint32 indexWidth;
823
824 /*
825 * Optional index bias. This number is added to all indices from
826 * indexArray before they are used as vertex array indices. This
827 * can be used in multiple ways:
828 *
829 * - When not using an indexArray, this bias can be used to
830 * specify where in the vertex arrays to begin rendering.
831 *
832 * - A positive number here is equivalent to increasing the
833 * offset in each vertex array.
834 *
835 * - A negative number can be used to render using a small
836 * vertex array and an index buffer that contains large
837 * values. This may be used by some applications that
838 * crop a vertex buffer without modifying their index
839 * buffer.
840 *
841 * Note that rendering with a negative bias value may be slower and
842 * use more memory than rendering with a positive or zero bias.
843 */
844 int32 indexBias;
845}
846#include "vmware_pack_end.h"
847SVGA3dPrimitiveRange;
848
849typedef
850#include "vmware_pack_begin.h"
851struct {
852 uint32 cid;
853 uint32 numVertexDecls;
854 uint32 numRanges;
855
856 /*
857 * There are two variable size arrays after the
858 * SVGA3dCmdDrawPrimitives structure. In order,
859 * they are:
860 *
861 * 1. SVGA3dVertexDecl, quantity 'numVertexDecls', but no more than
862 * SVGA3D_MAX_VERTEX_ARRAYS;
863 * 2. SVGA3dPrimitiveRange, quantity 'numRanges', but no more than
864 * SVGA3D_MAX_DRAW_PRIMITIVE_RANGES;
865 * 3. Optionally, SVGA3dVertexDivisor, quantity 'numVertexDecls' (contains
866 * the frequency divisor for the corresponding vertex decl).
867 */
868}
869#include "vmware_pack_end.h"
870SVGA3dCmdDrawPrimitives; /* SVGA_3D_CMD_DRAWPRIMITIVES */
871
872typedef
873#include "vmware_pack_begin.h"
874struct {
875 uint32 cid;
876
877 uint32 primitiveCount; /* How many primitives to render */
878 uint32 startVertexLocation; /* Which vertex do we start rendering at. */
879
880 uint8 primitiveType; /* SVGA3dPrimitiveType */
881 uint8 padding[3];
882}
883#include "vmware_pack_end.h"
884SVGA3dCmdDraw;
885
886typedef
887#include "vmware_pack_begin.h"
888struct {
889 uint32 cid;
890
891 uint8 primitiveType; /* SVGA3dPrimitiveType */
892
893 uint32 indexBufferSid; /* Valid index buffer sid. */
894 uint32 indexBufferOffset; /* Byte offset into the vertex buffer, almost */
895 /* always 0 for pre SM guests, non-zero for OpenGL */
896 /* guests. We can't represent non-multiple of */
897 /* stride offsets in D3D9Renderer... */
898 uint8 indexBufferStride; /* Allowable values = 1, 2, or 4 */
899
900 int32 baseVertexLocation; /* Bias applied to the index when selecting a */
901 /* vertex from the streams, may be negative */
902
903 uint32 primitiveCount; /* How many primitives to render */
904 uint32 pad0;
905 uint16 pad1;
906}
907#include "vmware_pack_end.h"
908SVGA3dCmdDrawIndexed;
909
910typedef
911#include "vmware_pack_begin.h"
912struct {
913 /*
914 * Describe a vertex array's data type, and define how it is to be
915 * used by the fixed function pipeline or the vertex shader. It
916 * isn't useful to have two VertexDecls with the same
917 * VertexArrayIdentity in one draw call.
918 */
919 uint16 streamOffset;
920 uint8 stream;
921 uint8 type; /* SVGA3dDeclType */
922 uint8 method; /* SVGA3dDeclMethod */
923 uint8 usage; /* SVGA3dDeclUsage */
924 uint8 usageIndex;
925 uint8 padding;
926
927}
928#include "vmware_pack_end.h"
929SVGA3dVertexElement;
930
931/*
932 * Should the vertex element respect the stream value? The high bit of the
933 * stream should be set to indicate that the stream should be respected. If
934 * the high bit is not set, the stream will be ignored and replaced by the index
935 * of the position of the currently considered vertex element.
936 *
937 * All guests should set this bit and correctly specify the stream going
938 * forward.
939 */
940#define SVGA3D_VERTEX_ELEMENT_RESPECT_STREAM (1 << 7)
941
942typedef
943#include "vmware_pack_begin.h"
944struct {
945 uint32 cid;
946
947 uint32 numElements;
948
949 /*
950 * Followed by numElements SVGA3dVertexElement structures.
951 *
952 * If numElements < SVGA3D_MAX_VERTEX_ARRAYS, the remaining elements
953 * are cleared and will not be used by following draws.
954 */
955}
956#include "vmware_pack_end.h"
957SVGA3dCmdSetVertexDecls;
958
959typedef
960#include "vmware_pack_begin.h"
961struct {
962 uint32 sid;
963 uint32 stride;
964 uint32 offset;
965}
966#include "vmware_pack_end.h"
967SVGA3dVertexStream;
968
969typedef
970#include "vmware_pack_begin.h"
971struct {
972 uint32 cid;
973
974 uint32 numStreams;
975 /*
976 * Followed by numStream SVGA3dVertexStream structures.
977 *
978 * If numStreams < SVGA3D_MAX_VERTEX_ARRAYS, the remaining streams
979 * are cleared and will not be used by following draws.
980 */
981}
982#include "vmware_pack_end.h"
983SVGA3dCmdSetVertexStreams;
984
985typedef
986#include "vmware_pack_begin.h"
987struct {
988 uint32 cid;
989 uint32 numDivisors;
990}
991#include "vmware_pack_end.h"
992SVGA3dCmdSetVertexDivisors;
993
994typedef
995#include "vmware_pack_begin.h"
996struct {
997 uint32 stage;
998 SVGA3dTextureStateName name;
999 union {
1000 uint32 value;
1001 float floatValue;
1002 };
1003}
1004#include "vmware_pack_end.h"
1005SVGA3dTextureState;
1006
1007typedef
1008#include "vmware_pack_begin.h"
1009struct {
1010 uint32 cid;
1011 /* Followed by variable number of SVGA3dTextureState structures */
1012}
1013#include "vmware_pack_end.h"
1014SVGA3dCmdSetTextureState; /* SVGA_3D_CMD_SETTEXTURESTATE */
1015
1016typedef
1017#include "vmware_pack_begin.h"
1018struct {
1019 uint32 cid;
1020 SVGA3dTransformType type;
1021 float matrix[16];
1022}
1023#include "vmware_pack_end.h"
1024SVGA3dCmdSetTransform; /* SVGA_3D_CMD_SETTRANSFORM */
1025
1026typedef
1027#include "vmware_pack_begin.h"
1028struct {
1029 float min;
1030 float max;
1031}
1032#include "vmware_pack_end.h"
1033SVGA3dZRange;
1034
1035typedef
1036#include "vmware_pack_begin.h"
1037struct {
1038 uint32 cid;
1039 SVGA3dZRange zRange;
1040}
1041#include "vmware_pack_end.h"
1042SVGA3dCmdSetZRange; /* SVGA_3D_CMD_SETZRANGE */
1043
1044typedef
1045#include "vmware_pack_begin.h"
1046struct {
1047 float diffuse[4];
1048 float ambient[4];
1049 float specular[4];
1050 float emissive[4];
1051 float shininess;
1052}
1053#include "vmware_pack_end.h"
1054SVGA3dMaterial;
1055
1056typedef
1057#include "vmware_pack_begin.h"
1058struct {
1059 uint32 cid;
1060 SVGA3dFace face;
1061 SVGA3dMaterial material;
1062}
1063#include "vmware_pack_end.h"
1064SVGA3dCmdSetMaterial; /* SVGA_3D_CMD_SETMATERIAL */
1065
1066typedef
1067#include "vmware_pack_begin.h"
1068struct {
1069 uint32 cid;
1070 uint32 index;
1071 SVGA3dLightData data;
1072}
1073#include "vmware_pack_end.h"
1074SVGA3dCmdSetLightData; /* SVGA_3D_CMD_SETLIGHTDATA */
1075
1076typedef
1077#include "vmware_pack_begin.h"
1078struct {
1079 uint32 cid;
1080 uint32 index;
1081 uint32 enabled;
1082}
1083#include "vmware_pack_end.h"
1084SVGA3dCmdSetLightEnabled; /* SVGA_3D_CMD_SETLIGHTENABLED */
1085
1086typedef
1087#include "vmware_pack_begin.h"
1088struct {
1089 uint32 cid;
1090 SVGA3dRect rect;
1091}
1092#include "vmware_pack_end.h"
1093SVGA3dCmdSetViewport; /* SVGA_3D_CMD_SETVIEWPORT */
1094
1095typedef
1096#include "vmware_pack_begin.h"
1097struct {
1098 uint32 cid;
1099 SVGA3dRect rect;
1100}
1101#include "vmware_pack_end.h"
1102SVGA3dCmdSetScissorRect; /* SVGA_3D_CMD_SETSCISSORRECT */
1103
1104typedef
1105#include "vmware_pack_begin.h"
1106struct {
1107 uint32 cid;
1108 uint32 index;
1109 float plane[4];
1110}
1111#include "vmware_pack_end.h"
1112SVGA3dCmdSetClipPlane; /* SVGA_3D_CMD_SETCLIPPLANE */
1113
1114typedef
1115#include "vmware_pack_begin.h"
1116struct {
1117 uint32 cid;
1118 uint32 shid;
1119 SVGA3dShaderType type;
1120 /* Followed by variable number of DWORDs for shader bycode */
1121}
1122#include "vmware_pack_end.h"
1123SVGA3dCmdDefineShader; /* SVGA_3D_CMD_SHADER_DEFINE */
1124
1125typedef
1126#include "vmware_pack_begin.h"
1127struct {
1128 uint32 cid;
1129 uint32 shid;
1130 SVGA3dShaderType type;
1131}
1132#include "vmware_pack_end.h"
1133SVGA3dCmdDestroyShader; /* SVGA_3D_CMD_SHADER_DESTROY */
1134
1135typedef
1136#include "vmware_pack_begin.h"
1137struct {
1138 uint32 cid;
1139 uint32 reg; /* register number */
1140 SVGA3dShaderType type;
1141 SVGA3dShaderConstType ctype;
1142 uint32 values[4];
1143
1144 /*
1145 * Followed by a variable number of additional values.
1146 */
1147}
1148#include "vmware_pack_end.h"
1149SVGA3dCmdSetShaderConst; /* SVGA_3D_CMD_SET_SHADER_CONST */
1150
1151typedef
1152#include "vmware_pack_begin.h"
1153struct {
1154 uint32 cid;
1155 SVGA3dShaderType type;
1156 uint32 shid;
1157}
1158#include "vmware_pack_end.h"
1159SVGA3dCmdSetShader; /* SVGA_3D_CMD_SET_SHADER */
1160
1161typedef
1162#include "vmware_pack_begin.h"
1163struct {
1164 uint32 cid;
1165 SVGA3dQueryType type;
1166}
1167#include "vmware_pack_end.h"
1168SVGA3dCmdBeginQuery; /* SVGA_3D_CMD_BEGIN_QUERY */
1169
1170typedef
1171#include "vmware_pack_begin.h"
1172struct {
1173 uint32 cid;
1174 SVGA3dQueryType type;
1175 SVGAGuestPtr guestResult; /* Points to an SVGA3dQueryResult structure */
1176}
1177#include "vmware_pack_end.h"
1178SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
1179
1180
1181/*
1182 * SVGA3D_CMD_WAIT_FOR_QUERY --
1183 *
1184 * Will read the SVGA3dQueryResult structure pointed to by guestResult,
1185 * and if the state member is set to anything else than
1186 * SVGA3D_QUERYSTATE_PENDING, this command will always be a no-op.
1187 *
1188 * Otherwise, in addition to the query explicitly waited for,
1189 * All queries with the same type and issued with the same cid, for which
1190 * an SVGA_3D_CMD_END_QUERY command has previously been sent, will
1191 * be finished after execution of this command.
1192 *
1193 * A query will be identified by the gmrId and offset of the guestResult
1194 * member. If the device can't find an SVGA_3D_CMD_END_QUERY that has
1195 * been sent previously with an indentical gmrId and offset, it will
1196 * effectively end all queries with an identical type issued with the
1197 * same cid, and the SVGA3dQueryResult structure pointed to by
1198 * guestResult will not be written to. This property can be used to
1199 * implement a query barrier for a given cid and query type.
1200 */
1201
1202typedef
1203#include "vmware_pack_begin.h"
1204struct {
1205 uint32 cid; /* Same parameters passed to END_QUERY */
1206 SVGA3dQueryType type;
1207 SVGAGuestPtr guestResult;
1208}
1209#include "vmware_pack_end.h"
1210SVGA3dCmdWaitForQuery; /* SVGA_3D_CMD_WAIT_FOR_QUERY */
1211
1212typedef
1213#include "vmware_pack_begin.h"
1214struct {
1215 uint32 totalSize; /* Set by guest before query is ended. */
1216 SVGA3dQueryState state; /* Set by host or guest. See SVGA3dQueryState. */
1217 union { /* Set by host on exit from PENDING state */
1218 uint32 result32;
1219 uint32 queryCookie; /* May be used to identify which QueryGetData this
1220 result corresponds to. */
1221 };
1222}
1223#include "vmware_pack_end.h"
1224SVGA3dQueryResult;
1225
1226
1227/*
1228 * SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN --
1229 *
1230 * This is a blit from an SVGA3D surface to a Screen Object.
1231 * This blit must be directed at a specific screen.
1232 *
1233 * The blit copies from a rectangular region of an SVGA3D surface
1234 * image to a rectangular region of a screen.
1235 *
1236 * This command takes an optional variable-length list of clipping
1237 * rectangles after the body of the command. If no rectangles are
1238 * specified, there is no clipping region. The entire destRect is
1239 * drawn to. If one or more rectangles are included, they describe
1240 * a clipping region. The clip rectangle coordinates are measured
1241 * relative to the top-left corner of destRect.
1242 *
1243 * The srcImage must be from mip=0 face=0.
1244 *
1245 * This supports scaling if the src and dest are of different sizes.
1246 *
1247 * Availability:
1248 * SVGA_FIFO_CAP_SCREEN_OBJECT
1249 */
1250
1251typedef
1252#include "vmware_pack_begin.h"
1253struct {
1254 SVGA3dSurfaceImageId srcImage;
1255 SVGASignedRect srcRect;
1256 uint32 destScreenId; /* Screen Object ID */
1257 SVGASignedRect destRect;
1258 /* Clipping: zero or more SVGASignedRects follow */
1259}
1260#include "vmware_pack_end.h"
1261SVGA3dCmdBlitSurfaceToScreen; /* SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN */
1262
1263typedef
1264#include "vmware_pack_begin.h"
1265struct {
1266 uint32 sid;
1267 SVGA3dTextureFilter filter;
1268}
1269#include "vmware_pack_end.h"
1270SVGA3dCmdGenerateMipmaps; /* SVGA_3D_CMD_GENERATE_MIPMAPS */
1271
1272typedef
1273#include "vmware_pack_begin.h"
1274struct {
1275 uint32 sid;
1276}
1277#include "vmware_pack_end.h"
1278SVGA3dCmdActivateSurface; /* SVGA_3D_CMD_ACTIVATE_SURFACE */
1279
1280typedef
1281#include "vmware_pack_begin.h"
1282struct {
1283 uint32 sid;
1284}
1285#include "vmware_pack_end.h"
1286SVGA3dCmdDeactivateSurface; /* SVGA_3D_CMD_DEACTIVATE_SURFACE */
1287
1288/*
1289 * Screen DMA command
1290 *
1291 * Available with SVGA_FIFO_CAP_SCREEN_OBJECT_2. The SVGA_CAP_3D device
1292 * cap bit is not required.
1293 *
1294 * - refBuffer and destBuffer are 32bit BGRX; refBuffer and destBuffer could
1295 * be different, but it is required that guest makes sure refBuffer has
1296 * exactly the same contents that were written to when last time screen DMA
1297 * command is received by host.
1298 *
1299 * - changemap is generated by lib/blit, and it has the changes from last
1300 * received screen DMA or more.
1301 */
1302
1303typedef
1304#include "vmware_pack_begin.h"
1305struct SVGA3dCmdScreenDMA {
1306 uint32 screenId;
1307 SVGAGuestImage refBuffer;
1308 SVGAGuestImage destBuffer;
1309 SVGAGuestImage changeMap;
1310}
1311#include "vmware_pack_end.h"
1312SVGA3dCmdScreenDMA; /* SVGA_3D_CMD_SCREEN_DMA */
1313
1314/*
1315 * Logic ops
1316 */
1317
1318#define SVGA3D_LOTRANSBLT_HONORALPHA (0x01)
1319#define SVGA3D_LOSTRETCHBLT_MIRRORX (0x01)
1320#define SVGA3D_LOSTRETCHBLT_MIRRORY (0x02)
1321#define SVGA3D_LOALPHABLEND_SRCHASALPHA (0x01)
1322
1323typedef
1324#include "vmware_pack_begin.h"
1325struct SVGA3dCmdLogicOpsBitBlt {
1326 /*
1327 * All LogicOps surfaces are one-level
1328 * surfaces so mipmap & face should always
1329 * be zero.
1330 */
1331 SVGA3dSurfaceImageId src;
1332 SVGA3dSurfaceImageId dst;
1333 SVGA3dLogicOp logicOp;
1334 SVGA3dLogicOpRop3 logicOpRop3;
1335 /* Followed by variable number of SVGA3dCopyBox structures */
1336}
1337#include "vmware_pack_end.h"
1338SVGA3dCmdLogicOpsBitBlt; /* SVGA_3D_CMD_LOGICOPS_BITBLT */
1339
1340
1341typedef
1342#include "vmware_pack_begin.h"
1343struct SVGA3dCmdLogicOpsTransBlt {
1344 /*
1345 * All LogicOps surfaces are one-level
1346 * surfaces so mipmap & face should always
1347 * be zero.
1348 */
1349 SVGA3dSurfaceImageId src;
1350 SVGA3dSurfaceImageId dst;
1351 uint32 color;
1352 uint32 flags;
1353 SVGA3dBox srcBox;
1354 SVGA3dSignedBox dstBox;
1355 SVGA3dBox clipBox;
1356}
1357#include "vmware_pack_end.h"
1358SVGA3dCmdLogicOpsTransBlt; /* SVGA_3D_CMD_LOGICOPS_TRANSBLT */
1359
1360
1361typedef
1362#include "vmware_pack_begin.h"
1363struct SVGA3dCmdLogicOpsStretchBlt {
1364 /*
1365 * All LogicOps surfaces are one-level
1366 * surfaces so mipmap & face should always
1367 * be zero.
1368 */
1369 SVGA3dSurfaceImageId src;
1370 SVGA3dSurfaceImageId dst;
1371 uint16 mode;
1372 uint16 flags;
1373 SVGA3dBox srcBox;
1374 SVGA3dSignedBox dstBox;
1375 SVGA3dBox clipBox;
1376}
1377#include "vmware_pack_end.h"
1378SVGA3dCmdLogicOpsStretchBlt; /* SVGA_3D_CMD_LOGICOPS_STRETCHBLT */
1379
1380
1381typedef
1382#include "vmware_pack_begin.h"
1383struct SVGA3dCmdLogicOpsColorFill {
1384 /*
1385 * All LogicOps surfaces are one-level
1386 * surfaces so mipmap & face should always
1387 * be zero.
1388 */
1389 SVGA3dSurfaceImageId dst;
1390 uint32 color;
1391 SVGA3dLogicOp logicOp;
1392 SVGA3dLogicOpRop3 logicOpRop3;
1393 /* Followed by variable number of SVGA3dRect structures. */
1394}
1395#include "vmware_pack_end.h"
1396SVGA3dCmdLogicOpsColorFill; /* SVGA_3D_CMD_LOGICOPS_COLORFILL */
1397
1398
1399typedef
1400#include "vmware_pack_begin.h"
1401struct SVGA3dCmdLogicOpsAlphaBlend {
1402 /*
1403 * All LogicOps surfaces are one-level
1404 * surfaces so mipmap & face should always
1405 * be zero.
1406 */
1407 SVGA3dSurfaceImageId src;
1408 SVGA3dSurfaceImageId dst;
1409 uint32 alphaVal;
1410 uint32 flags;
1411 SVGA3dBox srcBox;
1412 SVGA3dSignedBox dstBox;
1413 SVGA3dBox clipBox;
1414}
1415#include "vmware_pack_end.h"
1416SVGA3dCmdLogicOpsAlphaBlend; /* SVGA_3D_CMD_LOGICOPS_ALPHABLEND */
1417
1418#define SVGA3D_CLEARTYPE_INVALID_GAMMA_INDEX 0xFFFFFFFF
1419
1420#define SVGA3D_CLEARTYPE_GAMMA_WIDTH 512
1421#define SVGA3D_CLEARTYPE_GAMMA_HEIGHT 16
1422
1423typedef
1424#include "vmware_pack_begin.h"
1425struct SVGA3dCmdLogicOpsClearTypeBlend {
1426 /*
1427 * All LogicOps surfaces are one-level
1428 * surfaces so mipmap & face should always
1429 * be zero.
1430 */
1431 SVGA3dSurfaceImageId tmp;
1432 SVGA3dSurfaceImageId dst;
1433 SVGA3dSurfaceImageId gammaSurf;
1434 SVGA3dSurfaceImageId alphaSurf;
1435 uint32 gamma;
1436 uint32 color;
1437 uint32 color2;
1438 int32 alphaOffsetX;
1439 int32 alphaOffsetY;
1440 /* Followed by variable number of SVGA3dBox structures */
1441}
1442#include "vmware_pack_end.h"
1443SVGA3dCmdLogicOpsClearTypeBlend; /* SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND */
1444
1445
1446/*
1447 * Guest-backed objects definitions.
1448 */
1449
1450typedef
1451#include "vmware_pack_begin.h"
1452struct {
1453 SVGAMobFormat ptDepth;
1454 uint32 sizeInBytes;
1455 PPN64 base;
1456}
1457#include "vmware_pack_end.h"
1458SVGAOTableMobEntry;
1459#define SVGA3D_OTABLE_MOB_ENTRY_SIZE (sizeof(SVGAOTableMobEntry))
1460
1461typedef
1462#include "vmware_pack_begin.h"
1463struct {
1464 SVGA3dSurfaceFormat format;
1465 SVGA3dSurface1Flags surface1Flags;
1466 uint32 numMipLevels;
1467 uint32 multisampleCount;
1468 SVGA3dTextureFilter autogenFilter;
1469 SVGA3dSize size;
1470 SVGAMobId mobid;
1471 uint32 arraySize;
1472 uint32 mobPitch;
1473 SVGA3dSurface2Flags surface2Flags;
1474 uint8 multisamplePattern;
1475 uint8 qualityLevel;
1476 uint16 bufferByteStride;
1477 float minLOD;
1478 uint32 pad0[2];
1479}
1480#include "vmware_pack_end.h"
1481SVGAOTableSurfaceEntry;
1482#define SVGA3D_OTABLE_SURFACE_ENTRY_SIZE (sizeof(SVGAOTableSurfaceEntry))
1483
1484typedef
1485#include "vmware_pack_begin.h"
1486struct {
1487 uint32 cid;
1488 SVGAMobId mobid;
1489}
1490#include "vmware_pack_end.h"
1491SVGAOTableContextEntry;
1492#define SVGA3D_OTABLE_CONTEXT_ENTRY_SIZE (sizeof(SVGAOTableContextEntry))
1493
1494typedef
1495#include "vmware_pack_begin.h"
1496struct {
1497 SVGA3dShaderType type;
1498 uint32 sizeInBytes;
1499 uint32 offsetInBytes;
1500 SVGAMobId mobid;
1501}
1502#include "vmware_pack_end.h"
1503SVGAOTableShaderEntry;
1504#define SVGA3D_OTABLE_SHADER_ENTRY_SIZE (sizeof(SVGAOTableShaderEntry))
1505
1506#define SVGA_STFLAG_PRIMARY (1 << 0)
1507#define SVGA_STFLAG_RESERVED (1 << 1) /* Added with cap SVGA_CAP_HP_CMD_QUEUE */
1508typedef uint32 SVGAScreenTargetFlags;
1509
1510typedef
1511#include "vmware_pack_begin.h"
1512struct {
1513 SVGA3dSurfaceImageId image;
1514 uint32 width;
1515 uint32 height;
1516 int32 xRoot;
1517 int32 yRoot;
1518 SVGAScreenTargetFlags flags;
1519 uint32 dpi;
1520 uint32 pad[7];
1521}
1522#include "vmware_pack_end.h"
1523SVGAOTableScreenTargetEntry;
1524#define SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE \
1525 (sizeof(SVGAOTableScreenTargetEntry))
1526
1527typedef
1528#include "vmware_pack_begin.h"
1529struct {
1530 float value[4];
1531}
1532#include "vmware_pack_end.h"
1533SVGA3dShaderConstFloat;
1534
1535typedef
1536#include "vmware_pack_begin.h"
1537struct {
1538 int32 value[4];
1539}
1540#include "vmware_pack_end.h"
1541SVGA3dShaderConstInt;
1542
1543typedef
1544#include "vmware_pack_begin.h"
1545struct {
1546 uint32 value;
1547}
1548#include "vmware_pack_end.h"
1549SVGA3dShaderConstBool;
1550
1551typedef
1552#include "vmware_pack_begin.h"
1553struct {
1554 uint16 streamOffset;
1555 uint8 stream;
1556 uint8 type;
1557 uint8 methodUsage;
1558 uint8 usageIndex;
1559}
1560#include "vmware_pack_end.h"
1561SVGAGBVertexElement;
1562
1563typedef
1564#include "vmware_pack_begin.h"
1565struct {
1566 uint32 sid;
1567 uint16 stride;
1568 uint32 offset;
1569}
1570#include "vmware_pack_end.h"
1571SVGAGBVertexStream;
1572typedef
1573#include "vmware_pack_begin.h"
1574struct {
1575 SVGA3dRect viewport;
1576 SVGA3dRect scissorRect;
1577 SVGA3dZRange zRange;
1578
1579 SVGA3dSurfaceImageId renderTargets[SVGA3D_RT_MAX];
1580 SVGAGBVertexElement decl1[4];
1581
1582 uint32 renderStates[SVGA3D_RS_MAX];
1583 SVGAGBVertexElement decl2[18];
1584 uint32 pad0[2];
1585
1586 struct {
1587 SVGA3dFace face;
1588 SVGA3dMaterial material;
1589 } material;
1590
1591 float clipPlanes[SVGA3D_NUM_CLIPPLANES][4];
1592 float matrices[SVGA3D_TRANSFORM_MAX][16];
1593
1594 SVGA3dBool lightEnabled[SVGA3D_NUM_LIGHTS];
1595 SVGA3dLightData lightData[SVGA3D_NUM_LIGHTS];
1596
1597 /*
1598 * Shaders currently bound
1599 */
1600 uint32 shaders[SVGA3D_NUM_SHADERTYPE_PREDX];
1601 SVGAGBVertexElement decl3[10];
1602 uint32 pad1[3];
1603
1604 uint32 occQueryActive;
1605 uint32 occQueryValue;
1606
1607 /*
1608 * Int/Bool Shader constants
1609 */
1610 SVGA3dShaderConstInt pShaderIValues[SVGA3D_CONSTINTREG_MAX];
1611 SVGA3dShaderConstInt vShaderIValues[SVGA3D_CONSTINTREG_MAX];
1612 uint16 pShaderBValues;
1613 uint16 vShaderBValues;
1614
1615
1616 SVGAGBVertexStream streams[SVGA3D_MAX_VERTEX_ARRAYS];
1617 SVGA3dVertexDivisor divisors[SVGA3D_MAX_VERTEX_ARRAYS];
1618 uint32 numVertexDecls;
1619 uint32 numVertexStreams;
1620 uint32 numVertexDivisors;
1621 uint32 pad2[30];
1622
1623 /*
1624 * Texture Stages
1625 *
1626 * SVGA3D_TS_INVALID through SVGA3D_TS_CONSTANT are in the
1627 * textureStages array.
1628 * SVGA3D_TS_COLOR_KEY is in tsColorKey.
1629 */
1630 uint32 tsColorKey[SVGA3D_NUM_TEXTURE_UNITS];
1631 uint32 textureStages[SVGA3D_NUM_TEXTURE_UNITS][SVGA3D_TS_CONSTANT + 1];
1632 uint32 tsColorKeyEnable[SVGA3D_NUM_TEXTURE_UNITS];
1633
1634 /*
1635 * Float Shader constants.
1636 */
1637 SVGA3dShaderConstFloat pShaderFValues[SVGA3D_CONSTREG_MAX];
1638 SVGA3dShaderConstFloat vShaderFValues[SVGA3D_CONSTREG_MAX];
1639}
1640#include "vmware_pack_end.h"
1641SVGAGBContextData;
1642#define SVGA3D_CONTEXT_DATA_SIZE (sizeof(SVGAGBContextData))
1643
1644/*
1645 * SVGA3dCmdSetOTableBase --
1646 *
1647 * This command allows the guest to specify the base PPN of the
1648 * specified object table.
1649 */
1650
1651typedef
1652#include "vmware_pack_begin.h"
1653struct {
1654 SVGAOTableType type;
1655 PPN32 baseAddress;
1656 uint32 sizeInBytes;
1657 uint32 validSizeInBytes;
1658 SVGAMobFormat ptDepth;
1659}
1660#include "vmware_pack_end.h"
1661SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */
1662
1663typedef
1664#include "vmware_pack_begin.h"
1665struct {
1666 SVGAOTableType type;
1667 PPN64 baseAddress;
1668 uint32 sizeInBytes;
1669 uint32 validSizeInBytes;
1670 SVGAMobFormat ptDepth;
1671}
1672#include "vmware_pack_end.h"
1673SVGA3dCmdSetOTableBase64; /* SVGA_3D_CMD_SET_OTABLE_BASE64 */
1674
1675/*
1676 * Guests using SVGA_3D_CMD_GROW_OTABLE are promising that
1677 * the new OTable contains the same contents as the old one, except possibly
1678 * for some new invalid entries at the end.
1679 *
1680 * (Otherwise, guests should use one of the SetOTableBase commands.)
1681 */
1682typedef
1683#include "vmware_pack_begin.h"
1684struct {
1685 SVGAOTableType type;
1686 PPN64 baseAddress;
1687 uint32 sizeInBytes;
1688 uint32 validSizeInBytes;
1689 SVGAMobFormat ptDepth;
1690}
1691#include "vmware_pack_end.h"
1692SVGA3dCmdGrowOTable; /* SVGA_3D_CMD_GROW_OTABLE */
1693
1694typedef
1695#include "vmware_pack_begin.h"
1696struct {
1697 SVGAOTableType type;
1698}
1699#include "vmware_pack_end.h"
1700SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */
1701
1702/*
1703 * Define a memory object (Mob) in the OTable.
1704 */
1705
1706typedef
1707#include "vmware_pack_begin.h"
1708struct SVGA3dCmdDefineGBMob {
1709 SVGAMobId mobid;
1710 SVGAMobFormat ptDepth;
1711 PPN32 base;
1712 uint32 sizeInBytes;
1713}
1714#include "vmware_pack_end.h"
1715SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */
1716
1717
1718/*
1719 * Destroys an object in the OTable.
1720 */
1721
1722typedef
1723#include "vmware_pack_begin.h"
1724struct SVGA3dCmdDestroyGBMob {
1725 SVGAMobId mobid;
1726}
1727#include "vmware_pack_end.h"
1728SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */
1729
1730/*
1731 * Define a memory object (Mob) in the OTable with a PPN64 base.
1732 */
1733
1734typedef
1735#include "vmware_pack_begin.h"
1736struct SVGA3dCmdDefineGBMob64 {
1737 SVGAMobId mobid;
1738 SVGAMobFormat ptDepth;
1739 PPN64 base;
1740 uint32 sizeInBytes;
1741}
1742#include "vmware_pack_end.h"
1743SVGA3dCmdDefineGBMob64; /* SVGA_3D_CMD_DEFINE_GB_MOB64 */
1744
1745/*
1746 * Redefine an object in the OTable with PPN64 base.
1747 */
1748
1749typedef
1750#include "vmware_pack_begin.h"
1751struct SVGA3dCmdRedefineGBMob64 {
1752 SVGAMobId mobid;
1753 SVGAMobFormat ptDepth;
1754 PPN64 base;
1755 uint32 sizeInBytes;
1756}
1757#include "vmware_pack_end.h"
1758SVGA3dCmdRedefineGBMob64; /* SVGA_3D_CMD_REDEFINE_GB_MOB64 */
1759
1760/*
1761 * Notification that the page tables have been modified.
1762 */
1763
1764typedef
1765#include "vmware_pack_begin.h"
1766struct SVGA3dCmdUpdateGBMobMapping {
1767 SVGAMobId mobid;
1768}
1769#include "vmware_pack_end.h"
1770SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */
1771
1772/*
1773 * Define a guest-backed surface.
1774 */
1775
1776typedef
1777#include "vmware_pack_begin.h"
1778struct SVGA3dCmdDefineGBSurface {
1779 uint32 sid;
1780 SVGA3dSurface1Flags surfaceFlags;
1781 SVGA3dSurfaceFormat format;
1782 uint32 numMipLevels;
1783 uint32 multisampleCount;
1784 SVGA3dTextureFilter autogenFilter;
1785 SVGA3dSize size;
1786}
1787#include "vmware_pack_end.h"
1788SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */
1789
1790/*
1791 * Defines a guest-backed surface, adding the arraySize field.
1792 */
1793typedef
1794#include "vmware_pack_begin.h"
1795struct SVGA3dCmdDefineGBSurface_v2 {
1796 uint32 sid;
1797 SVGA3dSurface1Flags surfaceFlags;
1798 SVGA3dSurfaceFormat format;
1799 uint32 numMipLevels;
1800 uint32 multisampleCount;
1801 SVGA3dTextureFilter autogenFilter;
1802 SVGA3dSize size;
1803 uint32 arraySize;
1804 uint32 pad;
1805}
1806#include "vmware_pack_end.h"
1807SVGA3dCmdDefineGBSurface_v2; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 */
1808
1809/*
1810 * Defines a guest-backed surface, adding the larger flags.
1811 */
1812typedef
1813#include "vmware_pack_begin.h"
1814struct SVGA3dCmdDefineGBSurface_v3 {
1815 uint32 sid;
1816 SVGA3dSurfaceAllFlags surfaceFlags;
1817 SVGA3dSurfaceFormat format;
1818 uint32 numMipLevels;
1819 uint32 multisampleCount;
1820 SVGA3dMSPattern multisamplePattern;
1821 SVGA3dMSQualityLevel qualityLevel;
1822 SVGA3dTextureFilter autogenFilter;
1823 SVGA3dSize size;
1824 uint32 arraySize;
1825}
1826#include "vmware_pack_end.h"
1827SVGA3dCmdDefineGBSurface_v3; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 */
1828
1829/*
1830 * Defines a guest-backed surface, adding buffer byte stride.
1831 */
1832typedef
1833#include "vmware_pack_begin.h"
1834struct SVGA3dCmdDefineGBSurface_v4 {
1835 uint32 sid;
1836 SVGA3dSurfaceAllFlags surfaceFlags;
1837 SVGA3dSurfaceFormat format;
1838 uint32 numMipLevels;
1839 uint32 multisampleCount;
1840 SVGA3dMSPattern multisamplePattern;
1841 SVGA3dMSQualityLevel qualityLevel;
1842 SVGA3dTextureFilter autogenFilter;
1843 SVGA3dSize size;
1844 uint32 arraySize;
1845 uint32 bufferByteStride;
1846}
1847#include "vmware_pack_end.h"
1848SVGA3dCmdDefineGBSurface_v4; /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V4 */
1849
1850/*
1851 * Destroy a guest-backed surface.
1852 */
1853
1854typedef
1855#include "vmware_pack_begin.h"
1856struct SVGA3dCmdDestroyGBSurface {
1857 uint32 sid;
1858}
1859#include "vmware_pack_end.h"
1860SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */
1861
1862/*
1863 * Bind a guest-backed surface to a mob.
1864 */
1865
1866typedef
1867#include "vmware_pack_begin.h"
1868struct SVGA3dCmdBindGBSurface {
1869 uint32 sid;
1870 SVGAMobId mobid;
1871}
1872#include "vmware_pack_end.h"
1873SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */
1874
1875typedef
1876#include "vmware_pack_begin.h"
1877struct SVGA3dCmdBindGBSurfaceWithPitch {
1878 uint32 sid;
1879 SVGAMobId mobid;
1880 uint32 baseLevelPitch;
1881}
1882#include "vmware_pack_end.h"
1883SVGA3dCmdBindGBSurfaceWithPitch; /* SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH */
1884
1885/*
1886 * Conditionally bind a mob to a guest-backed surface if testMobid
1887 * matches the currently bound mob. Optionally issue a
1888 * readback/update on the surface while it is still bound to the old
1889 * mobid if the mobid is changed by this command.
1890 */
1891
1892#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0)
1893#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_UPDATE (1 << 1)
1894
1895typedef
1896#include "vmware_pack_begin.h"
1897struct SVGA3dCmdCondBindGBSurface {
1898 uint32 sid;
1899 SVGAMobId testMobid;
1900 SVGAMobId mobid;
1901 uint32 flags;
1902}
1903#include "vmware_pack_end.h"
1904SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */
1905
1906/*
1907 * Update an image in a guest-backed surface.
1908 * (Inform the device that the guest-contents have been updated.)
1909 */
1910
1911typedef
1912#include "vmware_pack_begin.h"
1913struct SVGA3dCmdUpdateGBImage {
1914 SVGA3dSurfaceImageId image;
1915 SVGA3dBox box;
1916}
1917#include "vmware_pack_end.h"
1918SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */
1919
1920/*
1921 * Update an entire guest-backed surface.
1922 * (Inform the device that the guest-contents have been updated.)
1923 */
1924
1925typedef
1926#include "vmware_pack_begin.h"
1927struct SVGA3dCmdUpdateGBSurface {
1928 uint32 sid;
1929}
1930#include "vmware_pack_end.h"
1931SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */
1932
1933/*
1934 * Readback an image in a guest-backed surface.
1935 * (Request the device to flush the dirty contents into the guest.)
1936 */
1937
1938typedef
1939#include "vmware_pack_begin.h"
1940struct SVGA3dCmdReadbackGBImage {
1941 SVGA3dSurfaceImageId image;
1942}
1943#include "vmware_pack_end.h"
1944SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE */
1945
1946/*
1947 * Readback an entire guest-backed surface.
1948 * (Request the device to flush the dirty contents into the guest.)
1949 */
1950
1951typedef
1952#include "vmware_pack_begin.h"
1953struct SVGA3dCmdReadbackGBSurface {
1954 uint32 sid;
1955}
1956#include "vmware_pack_end.h"
1957SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */
1958
1959/*
1960 * Readback a sub rect of an image in a guest-backed surface. After
1961 * issuing this command the driver is required to issue an update call
1962 * of the same region before issuing any other commands that reference
1963 * this surface or rendering is not guaranteed.
1964 */
1965
1966typedef
1967#include "vmware_pack_begin.h"
1968struct SVGA3dCmdReadbackGBImagePartial {
1969 SVGA3dSurfaceImageId image;
1970 SVGA3dBox box;
1971 uint32 invertBox;
1972}
1973#include "vmware_pack_end.h"
1974SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */
1975
1976
1977/*
1978 * Invalidate an image in a guest-backed surface.
1979 * (Notify the device that the contents can be lost.)
1980 */
1981
1982typedef
1983#include "vmware_pack_begin.h"
1984struct SVGA3dCmdInvalidateGBImage {
1985 SVGA3dSurfaceImageId image;
1986}
1987#include "vmware_pack_end.h"
1988SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */
1989
1990/*
1991 * Invalidate an entire guest-backed surface.
1992 * (Notify the device that the contents if all images can be lost.)
1993 */
1994
1995typedef
1996#include "vmware_pack_begin.h"
1997struct SVGA3dCmdInvalidateGBSurface {
1998 uint32 sid;
1999}
2000#include "vmware_pack_end.h"
2001SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */
2002
2003/*
2004 * Invalidate a sub rect of an image in a guest-backed surface. After
2005 * issuing this command the driver is required to issue an update call
2006 * of the same region before issuing any other commands that reference
2007 * this surface or rendering is not guaranteed.
2008 */
2009
2010typedef
2011#include "vmware_pack_begin.h"
2012struct SVGA3dCmdInvalidateGBImagePartial {
2013 SVGA3dSurfaceImageId image;
2014 SVGA3dBox box;
2015 uint32 invertBox;
2016}
2017#include "vmware_pack_end.h"
2018SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */
2019
2020
2021/*
2022 * Define a guest-backed context.
2023 */
2024
2025typedef
2026#include "vmware_pack_begin.h"
2027struct SVGA3dCmdDefineGBContext {
2028 uint32 cid;
2029}
2030#include "vmware_pack_end.h"
2031SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */
2032
2033/*
2034 * Destroy a guest-backed context.
2035 */
2036
2037typedef
2038#include "vmware_pack_begin.h"
2039struct SVGA3dCmdDestroyGBContext {
2040 uint32 cid;
2041}
2042#include "vmware_pack_end.h"
2043SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */
2044
2045/*
2046 * Bind a guest-backed context.
2047 *
2048 * validContents should be set to 0 for new contexts,
2049 * and 1 if this is an old context which is getting paged
2050 * back on to the device.
2051 *
2052 * For new contexts, it is recommended that the driver
2053 * issue commands to initialize all interesting state
2054 * prior to rendering.
2055 */
2056
2057typedef
2058#include "vmware_pack_begin.h"
2059struct SVGA3dCmdBindGBContext {
2060 uint32 cid;
2061 SVGAMobId mobid;
2062 uint32 validContents;
2063}
2064#include "vmware_pack_end.h"
2065SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */
2066
2067/*
2068 * Readback a guest-backed context.
2069 * (Request that the device flush the contents back into guest memory.)
2070 */
2071
2072typedef
2073#include "vmware_pack_begin.h"
2074struct SVGA3dCmdReadbackGBContext {
2075 uint32 cid;
2076}
2077#include "vmware_pack_end.h"
2078SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */
2079
2080/*
2081 * Invalidate a guest-backed context.
2082 */
2083typedef
2084#include "vmware_pack_begin.h"
2085struct SVGA3dCmdInvalidateGBContext {
2086 uint32 cid;
2087}
2088#include "vmware_pack_end.h"
2089SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */
2090
2091/*
2092 * Define a guest-backed shader.
2093 */
2094
2095typedef
2096#include "vmware_pack_begin.h"
2097struct SVGA3dCmdDefineGBShader {
2098 uint32 shid;
2099 SVGA3dShaderType type;
2100 uint32 sizeInBytes;
2101}
2102#include "vmware_pack_end.h"
2103SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */
2104
2105/*
2106 * Bind a guest-backed shader.
2107 */
2108
2109typedef
2110#include "vmware_pack_begin.h"
2111struct SVGA3dCmdBindGBShader {
2112 uint32 shid;
2113 SVGAMobId mobid;
2114 uint32 offsetInBytes;
2115}
2116#include "vmware_pack_end.h"
2117SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */
2118
2119/*
2120 * Destroy a guest-backed shader.
2121 */
2122
2123typedef
2124#include "vmware_pack_begin.h"
2125struct SVGA3dCmdDestroyGBShader {
2126 uint32 shid;
2127}
2128#include "vmware_pack_end.h"
2129SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */
2130
2131typedef
2132#include "vmware_pack_begin.h"
2133struct {
2134 uint32 cid;
2135 uint32 regStart;
2136 SVGA3dShaderType shaderType;
2137 SVGA3dShaderConstType constType;
2138
2139 /*
2140 * Followed by a variable number of shader constants.
2141 *
2142 * Note that FLOAT and INT constants are 4-dwords in length, while
2143 * BOOL constants are 1-dword in length.
2144 */
2145}
2146#include "vmware_pack_end.h"
2147SVGA3dCmdSetGBShaderConstInline; /* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */
2148
2149
2150typedef
2151#include "vmware_pack_begin.h"
2152struct {
2153 uint32 cid;
2154 SVGA3dQueryType type;
2155}
2156#include "vmware_pack_end.h"
2157SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */
2158
2159typedef
2160#include "vmware_pack_begin.h"
2161struct {
2162 uint32 cid;
2163 SVGA3dQueryType type;
2164 SVGAMobId mobid;
2165 uint32 offset;
2166}
2167#include "vmware_pack_end.h"
2168SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */
2169
2170
2171/*
2172 * SVGA_3D_CMD_WAIT_FOR_GB_QUERY --
2173 *
2174 * The semantics of this command are identical to the
2175 * SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written
2176 * to a Mob instead of a GMR.
2177 */
2178
2179typedef
2180#include "vmware_pack_begin.h"
2181struct {
2182 uint32 cid;
2183 SVGA3dQueryType type;
2184 SVGAMobId mobid;
2185 uint32 offset;
2186}
2187#include "vmware_pack_end.h"
2188SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */
2189
2190
2191typedef
2192#include "vmware_pack_begin.h"
2193struct {
2194 SVGAMobId mobid;
2195 uint32 mustBeZero;
2196 uint32 initialized;
2197}
2198#include "vmware_pack_end.h"
2199SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */
2200
2201typedef
2202#include "vmware_pack_begin.h"
2203struct {
2204 SVGAMobId mobid;
2205 uint32 gartOffset;
2206}
2207#include "vmware_pack_end.h"
2208SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */
2209
2210
2211typedef
2212#include "vmware_pack_begin.h"
2213struct {
2214 uint32 gartOffset;
2215 uint32 numPages;
2216}
2217#include "vmware_pack_end.h"
2218SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */
2219
2220
2221/*
2222 * Screen Targets
2223 */
2224
2225typedef
2226#include "vmware_pack_begin.h"
2227struct {
2228 uint32 stid;
2229 uint32 width;
2230 uint32 height;
2231 int32 xRoot;
2232 int32 yRoot;
2233 SVGAScreenTargetFlags flags;
2234
2235 /*
2236 * The physical DPI that the guest expects this screen displayed at.
2237 *
2238 * Guests which are not DPI-aware should set this to zero.
2239 */
2240 uint32 dpi;
2241}
2242#include "vmware_pack_end.h"
2243SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
2244
2245typedef
2246#include "vmware_pack_begin.h"
2247struct {
2248 uint32 stid;
2249}
2250#include "vmware_pack_end.h"
2251SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */
2252
2253typedef
2254#include "vmware_pack_begin.h"
2255struct {
2256 uint32 stid;
2257 SVGA3dSurfaceImageId image;
2258}
2259#include "vmware_pack_end.h"
2260SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */
2261
2262typedef
2263#include "vmware_pack_begin.h"
2264struct {
2265 uint32 stid;
2266 SVGA3dRect rect;
2267}
2268#include "vmware_pack_end.h"
2269SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
2270
2271typedef
2272#include "vmware_pack_begin.h"
2273struct SVGA3dCmdGBScreenDMA {
2274 uint32 screenId;
2275 uint32 dead;
2276 SVGAMobId destMobID;
2277 uint32 destPitch;
2278 SVGAMobId changeMapMobID;
2279}
2280#include "vmware_pack_end.h"
2281SVGA3dCmdGBScreenDMA; /* SVGA_3D_CMD_GB_SCREEN_DMA */
2282
2283typedef
2284#include "vmware_pack_begin.h"
2285struct {
2286 uint32 value;
2287 uint32 mobId;
2288 uint32 mobOffset;
2289}
2290#include "vmware_pack_end.h"
2291SVGA3dCmdGBMobFence; /* SVGA_3D_CMD_GB_MOB_FENCE */
2292
2293typedef
2294#include "vmware_pack_begin.h"
2295struct {
2296 uint32 stid;
2297 SVGA3dSurfaceImageId dest;
2298
2299 uint32 statusMobId;
2300 uint32 statusMobOffset;
2301
2302 /* Reserved fields */
2303 uint32 mustBeInvalidId;
2304 uint32 mustBeZero;
2305}
2306#include "vmware_pack_end.h"
2307SVGA3dCmdScreenCopy; /* SVGA_3D_CMD_SCREEN_COPY */
2308
2309#define SVGA_SCREEN_COPY_STATUS_FAILURE 0x00
2310#define SVGA_SCREEN_COPY_STATUS_SUCCESS 0x01
2311#define SVGA_SCREEN_COPY_STATUS_INVALID 0xFFFFFFFF
2312
2313typedef
2314#include "vmware_pack_begin.h"
2315struct {
2316 uint32 sid;
2317}
2318#include "vmware_pack_end.h"
2319SVGA3dCmdWriteZeroSurface; /* SVGA_3D_CMD_WRITE_ZERO_SURFACE */
2320
2321typedef
2322#include "vmware_pack_begin.h"
2323struct {
2324 uint32 sid;
2325}
2326#include "vmware_pack_end.h"
2327SVGA3dCmdHintZeroSurface; /* SVGA_3D_CMD_HINT_ZERO_SURFACE */
2328
2329#endif /* _SVGA3D_CMD_H_ */
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