1 | /* $Id: DevVGA.h 103457 2024-02-19 15:51:24Z vboxsync $ */
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2 | /** @file
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3 | * DevVGA - VBox VGA/VESA device, internal header.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | * --------------------------------------------------------------------
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27 | *
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28 | * This code is based on:
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29 | *
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30 | * QEMU internal VGA defines.
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31 | *
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32 | * Copyright (c) 2003-2004 Fabrice Bellard
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33 | *
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34 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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35 | * of this software and associated documentation files (the "Software"), to deal
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36 | * in the Software without restriction, including without limitation the rights
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37 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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38 | * copies of the Software, and to permit persons to whom the Software is
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39 | * furnished to do so, subject to the following conditions:
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40 | *
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41 | * The above copyright notice and this permission notice shall be included in
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42 | * all copies or substantial portions of the Software.
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43 | *
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44 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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45 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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46 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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47 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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48 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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49 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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50 | * THE SOFTWARE.
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51 | */
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52 |
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53 | #ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
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54 | #define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
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55 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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56 | # pragma once
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57 | #endif
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58 |
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59 | #include <VBoxVideoVBE.h>
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60 | #include <VBoxVideoVBEPrivate.h>
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61 |
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62 | #ifdef VBOX_WITH_HGSMI
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63 | # include "HGSMI/HGSMIHost.h"
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64 | #endif /* VBOX_WITH_HGSMI */
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65 | #include "DevVGASavedState.h"
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66 |
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67 | #ifdef VBOX_WITH_VMSVGA
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68 | # include "DevVGA-SVGA.h"
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69 | #endif
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70 |
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71 | #include <iprt/list.h>
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72 |
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73 |
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74 | /** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
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75 | #define VBE_BYTEWISE_IO
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76 |
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77 | #ifdef VBOX
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78 | /** The default amount of VRAM. */
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79 | # define VGA_VRAM_DEFAULT (_4M)
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80 | /** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
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81 | # define VGA_VRAM_MAX (256 * _1M)
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82 | /** The minimum amount of VRAM. */
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83 | # define VGA_VRAM_MIN (_1M)
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84 | #endif
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85 |
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86 |
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87 | /** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
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88 | * @{ */
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89 | /** The size of the VGA ring-0 and raw-mode mapping.
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90 | *
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91 | * This is supposed to be all the VGA memory accessible to the guest.
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92 | * The initial value was 256KB but NTAllInOne.iso appears to access more
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93 | * thus the limit was upped to 512KB.
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94 | *
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95 | * @todo Someone with some VGA knowhow should make a better guess at this value.
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96 | */
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97 | #define VGA_MAPPING_SIZE _512K
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98 | /** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
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99 | * The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
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100 | #define VGA_WITH_PARTIAL_RING0_MAPPING
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101 |
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102 | /**
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103 | * Check buffer if an VRAM offset is within the right range or not.
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104 | */
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105 | #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
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106 | # define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
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107 | do { \
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108 | if ((off) < VGA_MAPPING_SIZE) \
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109 | RT_UNTRUSTED_VALIDATED_FENCE(); \
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110 | else \
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111 | { \
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112 | AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
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113 | Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
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114 | return VINF_IOM_R3_MMIO_WRITE; \
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115 | } \
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116 | } while (0)
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117 | #else
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118 | # define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
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119 | do { \
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120 | AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
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121 | RT_UNTRUSTED_VALIDATED_FENCE(); \
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122 | } while (0)
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123 | #endif
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124 |
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125 | /**
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126 | * Check buffer if an VRAM offset is within the right range or not.
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127 | */
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128 | #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
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129 | # define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
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130 | do { \
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131 | if ((off) < VGA_MAPPING_SIZE) \
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132 | RT_UNTRUSTED_VALIDATED_FENCE(); \
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133 | else \
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134 | { \
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135 | AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
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136 | Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
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137 | (rcVar) = VINF_IOM_R3_MMIO_READ; \
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138 | return 0; \
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139 | } \
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140 | } while (0)
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141 | #else
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142 | # define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
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143 | do { \
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144 | AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
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145 | RT_UNTRUSTED_VALIDATED_FENCE(); \
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146 | NOREF(rcVar); \
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147 | } while (0)
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148 | #endif
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149 | /** @} */
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150 |
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151 |
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152 | #define MSR_COLOR_EMULATION 0x01
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153 | #define MSR_PAGE_SELECT 0x20
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154 |
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155 | #define ST01_V_RETRACE 0x08
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156 | #define ST01_DISP_ENABLE 0x01
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157 |
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158 | /* bochs VBE support */
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159 | #define CONFIG_BOCHS_VBE
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160 |
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161 | #ifdef CONFIG_BOCHS_VBE
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162 |
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163 | /* Cross reference with <VBoxVideoVBE.h> */
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164 | #define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
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165 | #define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
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166 |
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167 | #define VGA_STATE_COMMON_BOCHS_VBE \
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168 | uint16_t vbe_index; \
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169 | uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
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170 | uint16_t alignment[2]; /* pad to 64 bits */ \
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171 | uint32_t vbe_start_addr; \
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172 | uint32_t vbe_line_offset; \
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173 | uint32_t vbe_bank_max;
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174 |
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175 | #else
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176 |
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177 | #define VGA_STATE_COMMON_BOCHS_VBE
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178 |
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179 | #endif /* !CONFIG_BOCHS_VBE */
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180 |
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181 | #define CH_ATTR_SIZE (160 * 100)
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182 | #define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
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183 |
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184 | typedef struct vga_retrace_s {
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185 | unsigned frame_cclks; /* Character clocks per frame. */
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186 | unsigned frame_ns; /* Frame duration in ns. */
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187 | unsigned cclk_ns; /* Character clock duration in ns. */
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188 | unsigned vb_start; /* Vertical blanking start (scanline). */
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189 | unsigned vb_end; /* Vertical blanking end (scanline). */
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190 | unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
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191 | unsigned vs_start; /* Vertical sync start (scanline). */
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192 | unsigned vs_end; /* Vertical sync end (scanline). */
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193 | unsigned vs_start_ns; /* Vertical sync start time in ns. */
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194 | unsigned vs_end_ns; /* Vertical sync end time in ns. */
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195 | unsigned h_total; /* Horizontal total (cclks per scanline). */
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196 | unsigned h_total_ns; /* Scanline duration in ns. */
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197 | unsigned hb_start; /* Horizontal blanking start (cclk). */
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198 | unsigned hb_end; /* Horizontal blanking end (cclk). */
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199 | unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
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200 | unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
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201 | } vga_retrace_s;
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202 |
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203 | #ifndef VBOX
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204 | #define VGA_STATE_COMMON \
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205 | unsigned long vram_offset; \
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206 | unsigned int vram_size; \
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207 | uint32_t latch; \
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208 | uint8_t sr_index; \
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209 | uint8_t sr[256]; \
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210 | uint8_t gr_index; \
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211 | uint8_t gr[256]; \
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212 | uint8_t ar_index; \
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213 | uint8_t ar[21]; \
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214 | int ar_flip_flop; \
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215 | uint8_t cr_index; \
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216 | uint8_t cr[256]; /* CRT registers */ \
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217 | uint8_t msr; /* Misc Output Register */ \
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218 | uint8_t fcr; /* Feature Control Register */ \
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219 | uint8_t st00; /* status 0 */ \
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220 | uint8_t st01; /* status 1 */ \
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221 | uint8_t dac_state; \
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222 | uint8_t dac_sub_index; \
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223 | uint8_t dac_read_index; \
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224 | uint8_t dac_write_index; \
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225 | uint8_t dac_cache[3]; /* used when writing */ \
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226 | uint8_t palette[768]; \
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227 | int32_t bank_offset; \
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228 | int (*get_bpp)(struct VGAState *s); \
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229 | void (*get_offsets)(struct VGAState *s, \
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230 | uint32_t *pline_offset, \
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231 | uint32_t *pstart_addr, \
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232 | uint32_t *pline_compare); \
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233 | void (*get_resolution)(struct VGAState *s, \
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234 | int *pwidth, \
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235 | int *pheight); \
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236 | VGA_STATE_COMMON_BOCHS_VBE \
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237 | /* display refresh support */ \
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238 | DisplayState *ds; \
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239 | uint32_t font_offsets[2]; \
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240 | int graphic_mode; \
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241 | uint8_t shift_control; \
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242 | uint8_t double_scan; \
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243 | uint32_t line_offset; \
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244 | uint32_t line_compare; \
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245 | uint32_t start_addr; \
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246 | uint32_t plane_updated; \
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247 | uint8_t last_cw, last_ch; \
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248 | uint32_t last_width, last_height; /* in chars or pixels */ \
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249 | uint32_t last_scr_width, last_scr_height; /* in pixels */ \
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250 | uint8_t cursor_start, cursor_end; \
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251 | uint32_t cursor_offset; \
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252 | unsigned int (*rgb_to_pixel)(unsigned int r, \
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253 | unsigned int g, unsigned b); \
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254 | /* hardware mouse cursor support */ \
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255 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
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256 | void (*cursor_invalidate)(struct VGAState *s); \
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257 | void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
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258 | /* tell for each page if it has been updated since the last time */ \
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259 | uint32_t last_palette[256]; \
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260 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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261 |
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262 | #else /* VBOX */
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263 |
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264 | /* bird: Since we've changed types, reordered members, done alignment
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265 | paddings and more, VGA_STATE_COMMON was added directly to the
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266 | struct to make it more readable and easier to handle. */
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267 |
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268 | struct VGAState;
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269 | typedef int FNGETBPP(struct VGAState *s);
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270 | typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
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271 | typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
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272 | typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
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273 | typedef void FNCURSORINVALIDATE(struct VGAState *s);
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274 | typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
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275 |
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276 | #endif /* VBOX */
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277 |
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278 | #ifdef VBOX_WITH_VDMA
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279 | typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
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280 | #endif
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281 |
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282 | #ifdef VBOX_WITH_VIDEOHWACCEL
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283 | #define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
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284 |
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285 | typedef struct _VBOX_VHWA_PENDINGCMD
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286 | {
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287 | RTLISTNODE Node;
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288 | VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
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289 | } VBOX_VHWA_PENDINGCMD;
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290 | #endif
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291 |
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292 |
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293 | /**
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294 | * The shared VGA state data.
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295 | */
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296 | typedef struct VGAState
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297 | {
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298 | uint32_t vram_size;
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299 | uint32_t latch;
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300 | uint8_t sr_index;
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301 | uint8_t sr[256];
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302 | uint8_t gr_index;
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303 | uint8_t gr[256];
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304 | uint8_t ar_index;
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305 | uint8_t ar[21];
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306 | int32_t ar_flip_flop;
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307 | uint8_t cr_index;
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308 | uint8_t cr[256]; /* CRT registers */
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309 | uint8_t msr; /* Misc Output Register */
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310 | uint8_t fcr; /* Feature Control Register */
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311 | uint8_t st00; /* status 0 */
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312 | uint8_t st01; /* status 1 */
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313 | uint8_t dac_state;
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314 | uint8_t dac_sub_index;
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315 | uint8_t dac_read_index;
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316 | uint8_t dac_write_index;
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317 | uint8_t dac_cache[3]; /* used when writing */
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318 | uint8_t palette[768];
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319 | int32_t bank_offset;
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320 | VGA_STATE_COMMON_BOCHS_VBE
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321 | /* display refresh support */
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322 | uint32_t font_offsets[2];
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323 | int32_t graphic_mode;
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324 | uint8_t shift_control;
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325 | uint8_t double_scan;
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326 | uint8_t padding1[2];
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327 | uint32_t line_offset;
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328 | uint32_t vga_addr_mask;
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329 | uint32_t padding1a;
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330 | uint32_t line_compare;
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331 | uint32_t start_addr;
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332 | uint32_t plane_updated;
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333 | uint8_t last_cw, last_ch;
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334 | uint8_t last_uline; \
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335 | bool last_blink; \
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336 | uint32_t last_width, last_height; /* in chars or pixels */
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337 | uint32_t last_scr_width, last_scr_height; /* in pixels */
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338 | uint32_t last_bpp;
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339 | uint8_t cursor_start, cursor_end;
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340 | bool last_cur_blink, last_chr_blink;
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341 | uint32_t cursor_offset;
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342 | /** hardware mouse cursor support */
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343 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
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344 | /** tell for each page if it has been updated since the last time */
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345 | uint32_t last_palette[256];
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346 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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347 |
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348 | /** end-of-common-state-marker */
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349 | uint32_t u32Marker;
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350 |
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351 | /** Refresh timer handle - HC. */
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352 | TMTIMERHANDLE hRefreshTimer;
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353 |
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354 | #ifdef VBOX_WITH_VMSVGA
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355 | VMSVGASTATE svga;
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356 | #endif
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357 |
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358 | /** The number of monitors. */
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359 | uint32_t cMonitors;
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360 | /** Current refresh timer interval. */
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361 | uint32_t cMilliesRefreshInterval;
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362 | /** Bitmap tracking dirty pages. */
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363 | uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
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364 | /** Bitmap tracking which VGA memory pages in the 0xa0000-0xbffff region has
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365 | * been remapped to allow direct access.
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366 | * @note It's quite possible that mapping in the 0xb0000-0xbffff isn't possible,
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367 | * but we're playing safe and cover the whole VGA MMIO region here. */
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368 | uint32_t bmPageRemappedVGA;
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369 |
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370 | /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
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371 | bool fHasDirtyBits;
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372 | /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
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373 | bool fRenderVRAM;
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374 | /** Whether 3D is enabled for the VM. */
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375 | bool f3DEnabled;
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376 | /** Set if state has been restored. */
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377 | bool fStateLoaded;
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378 | /** Flag whether to expose the legacy VGA interface to the guest. */
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379 | bool fLegacyVgaEnabled;
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380 | #ifdef VBOX_WITH_VMSVGA
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381 | /* Whether the SVGA emulation is enabled or not. */
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382 | bool fVMSVGAEnabled;
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383 | bool fVMSVGA10;
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384 | bool fVMSVGAPciId;
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385 | bool fVMSVGAPciBarLayout;
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386 | /** Flag whether the SVGA3 interface is exposed to the guest. */
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387 | bool fVmSvga3;
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388 | #else
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389 | bool afPadding4[5];
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390 | #endif
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391 |
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392 | struct {
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393 | uint32_t u32Padding1;
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394 | uint32_t iVRAM;
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395 | #ifdef VBOX_WITH_VMSVGA
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396 | uint32_t iIO;
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397 | uint32_t iFIFO;
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398 | #endif
|
---|
399 | } pciRegions;
|
---|
400 |
|
---|
401 | /** The physical address the VRAM was assigned. */
|
---|
402 | RTGCPHYS GCPhysVRAM;
|
---|
403 | /** The critical section protect the instance data. */
|
---|
404 | PDMCRITSECT CritSect;
|
---|
405 |
|
---|
406 | /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
|
---|
407 | uint64_t u64LastLatchedAccess;
|
---|
408 | uint32_t cLatchAccesses;
|
---|
409 | uint16_t uMaskLatchAccess;
|
---|
410 | uint16_t iMask;
|
---|
411 |
|
---|
412 | #ifdef VBE_BYTEWISE_IO
|
---|
413 | /** VBE read/write data/index flags */
|
---|
414 | uint8_t fReadVBEData;
|
---|
415 | uint8_t fWriteVBEData;
|
---|
416 | uint8_t fReadVBEIndex;
|
---|
417 | uint8_t fWriteVBEIndex;
|
---|
418 | /** VBE write data/index one byte buffer */
|
---|
419 | uint8_t cbWriteVBEData;
|
---|
420 | uint8_t cbWriteVBEIndex;
|
---|
421 | /** VBE Extra Data write address one byte buffer */
|
---|
422 | uint8_t cbWriteVBEExtraAddress;
|
---|
423 | uint8_t Padding5;
|
---|
424 | #endif
|
---|
425 |
|
---|
426 | /** Retrace emulation state */
|
---|
427 | bool fRealRetrace;
|
---|
428 | bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
|
---|
429 | vga_retrace_s retrace_state;
|
---|
430 |
|
---|
431 | #ifdef VBOX_WITH_HGSMI
|
---|
432 | /** Base port in the assigned PCI I/O space. */
|
---|
433 | RTIOPORT IOPortBase;
|
---|
434 | # ifdef VBOX_WITH_WDDM
|
---|
435 | uint8_t Padding10[2];
|
---|
436 | /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
|
---|
437 | * adapter, the way it can handle async HGSMI command completion, etc. */
|
---|
438 | uint32_t fGuestCaps;
|
---|
439 | uint32_t fScanLineCfg;
|
---|
440 | uint32_t Padding11;
|
---|
441 | # else
|
---|
442 | uint8_t Padding11[14];
|
---|
443 | # endif
|
---|
444 |
|
---|
445 | /** The critical section serializes the HGSMI IRQ setting/clearing. */
|
---|
446 | PDMCRITSECT CritSectIRQ;
|
---|
447 | /** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
|
---|
448 | uint32_t fu32PendingGuestFlags;
|
---|
449 | uint32_t Padding12;
|
---|
450 | #endif /* VBOX_WITH_HGSMI */
|
---|
451 |
|
---|
452 | PDMLED Led3D;
|
---|
453 |
|
---|
454 | struct {
|
---|
455 | volatile uint32_t cPending;
|
---|
456 | uint32_t Padding1;
|
---|
457 | union
|
---|
458 | {
|
---|
459 | RTLISTNODE PendingList;
|
---|
460 | /* make sure the structure sized cross different contexts correctly */
|
---|
461 | struct
|
---|
462 | {
|
---|
463 | R3PTRTYPE(void *) dummy1;
|
---|
464 | R3PTRTYPE(void *) dummy2;
|
---|
465 | } dummy;
|
---|
466 | };
|
---|
467 | } pendingVhwaCommands;
|
---|
468 |
|
---|
469 | /** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
|
---|
470 | PGMMMIO2HANDLE hMmioLegacy;
|
---|
471 |
|
---|
472 | /** @name I/O ports for range 0x3c0-3cf.
|
---|
473 | * @{ */
|
---|
474 | IOMIOPORTHANDLE hIoPortAr;
|
---|
475 | IOMIOPORTHANDLE hIoPortMsrSt00;
|
---|
476 | IOMIOPORTHANDLE hIoPort3c3;
|
---|
477 | IOMIOPORTHANDLE hIoPortSr;
|
---|
478 | IOMIOPORTHANDLE hIoPortDac;
|
---|
479 | IOMIOPORTHANDLE hIoPortPos;
|
---|
480 | IOMIOPORTHANDLE hIoPortGr;
|
---|
481 | /** @} */
|
---|
482 |
|
---|
483 | /** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
|
---|
484 | * @{ */
|
---|
485 | IOMIOPORTHANDLE hIoPortMdaCrt;
|
---|
486 | IOMIOPORTHANDLE hIoPortMdaFcrSt;
|
---|
487 | /** @} */
|
---|
488 |
|
---|
489 | /** @name I/O ports for CGA 0x3d0-0x3df (sparse)
|
---|
490 | * @{ */
|
---|
491 | IOMIOPORTHANDLE hIoPortCgaCrt;
|
---|
492 | IOMIOPORTHANDLE hIoPortCgaFcrSt;
|
---|
493 | /** @} */
|
---|
494 |
|
---|
495 | #ifdef VBOX_WITH_HGSMI
|
---|
496 | /** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
|
---|
497 | * @{ */
|
---|
498 | IOMIOPORTHANDLE hIoPortHgsmiHost;
|
---|
499 | IOMIOPORTHANDLE hIoPortHgsmiGuest;
|
---|
500 | /** @} */
|
---|
501 | #endif
|
---|
502 |
|
---|
503 | /** @name I/O ports for Boch VBE 0x1ce-0x1cf
|
---|
504 | * @{ */
|
---|
505 | IOMIOPORTHANDLE hIoPortVbeIndex;
|
---|
506 | IOMIOPORTHANDLE hIoPortVbeData;
|
---|
507 | /** @} */
|
---|
508 |
|
---|
509 | /** The BIOS printf I/O port. */
|
---|
510 | IOMIOPORTHANDLE hIoPortBios;
|
---|
511 | /** The VBE extra data I/O port. */
|
---|
512 | IOMIOPORTHANDLE hIoPortVbeExtra;
|
---|
513 | /** The logo command I/O port. */
|
---|
514 | IOMIOPORTHANDLE hIoPortCmdLogo;
|
---|
515 |
|
---|
516 | #ifdef VBOX_WITH_VMSVGA
|
---|
517 | /** VMSVGA: I/O port PCI region. */
|
---|
518 | IOMIOPORTHANDLE hIoPortVmSvga;
|
---|
519 | /** VMSVGA3: MMIO PCI region for the registers. */
|
---|
520 | IOMMMIOHANDLE hMmioSvga3;
|
---|
521 | /** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
|
---|
522 | PGMMMIO2HANDLE hMmio2VmSvgaFifo;
|
---|
523 | #endif
|
---|
524 | /** The MMIO2 handle of the VRAM. */
|
---|
525 | PGMMMIO2HANDLE hMmio2VRam;
|
---|
526 |
|
---|
527 | STAMPROFILE StatRZMemoryRead;
|
---|
528 | STAMPROFILE StatR3MemoryRead;
|
---|
529 | STAMPROFILE StatRZMemoryWrite;
|
---|
530 | STAMPROFILE StatR3MemoryWrite;
|
---|
531 | STAMCOUNTER StatMapPage; /**< Counts IOMMmioMapMmio2Page calls. */
|
---|
532 | STAMCOUNTER StatMapReset; /**< Counts IOMMmioResetRegion calls. */
|
---|
533 | STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
|
---|
534 | #ifdef VBOX_WITH_HGSMI
|
---|
535 | STAMCOUNTER StatHgsmiMdaCgaAccesses;
|
---|
536 | #endif
|
---|
537 | } VGAState;
|
---|
538 | #ifdef VBOX
|
---|
539 | /** VGA state. */
|
---|
540 | typedef VGAState VGASTATE;
|
---|
541 | /** Pointer to the VGA state. */
|
---|
542 | typedef VGASTATE *PVGASTATE;
|
---|
543 | AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
|
---|
544 | AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
|
---|
545 | AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
|
---|
546 | AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
|
---|
547 | AssertCompile(sizeof(uint64_t)/*bmPageMapBitmap*/ >= (_64K / GUEST_PAGE_SIZE / 8));
|
---|
548 | #endif
|
---|
549 |
|
---|
550 |
|
---|
551 | /**
|
---|
552 | * The VGA state data for ring-3 context.
|
---|
553 | */
|
---|
554 | typedef struct VGASTATER3
|
---|
555 | {
|
---|
556 | R3PTRTYPE(uint8_t *) pbVRam;
|
---|
557 | R3PTRTYPE(FNGETBPP *) get_bpp;
|
---|
558 | R3PTRTYPE(FNGETOFFSETS *) get_offsets;
|
---|
559 | R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
|
---|
560 | R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
|
---|
561 | R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
|
---|
562 | R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
|
---|
563 |
|
---|
564 | /** Pointer to the device instance.
|
---|
565 | * @note Only for getting our bearings in interface methods. */
|
---|
566 | PPDMDEVINSR3 pDevIns;
|
---|
567 | #ifdef VBOX_WITH_HGSMI
|
---|
568 | R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
|
---|
569 | #endif
|
---|
570 | #ifdef VBOX_WITH_VDMA
|
---|
571 | R3PTRTYPE(PVBOXVDMAHOST) pVdma;
|
---|
572 | #endif
|
---|
573 |
|
---|
574 | /** LUN\#0: The display port base interface. */
|
---|
575 | PDMIBASE IBase;
|
---|
576 | /** LUN\#0: The display port interface. */
|
---|
577 | PDMIDISPLAYPORT IPort;
|
---|
578 | #ifdef VBOX_WITH_HGSMI
|
---|
579 | /** LUN\#0: VBVA callbacks interface */
|
---|
580 | PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
|
---|
581 | #endif
|
---|
582 | /** Status LUN: Leds interface. */
|
---|
583 | PDMILEDPORTS ILeds;
|
---|
584 |
|
---|
585 | /** Pointer to base interface of the driver. */
|
---|
586 | R3PTRTYPE(PPDMIBASE) pDrvBase;
|
---|
587 | /** Pointer to display connector interface of the driver. */
|
---|
588 | R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
|
---|
589 |
|
---|
590 | /** Status LUN: Partner of ILeds. */
|
---|
591 | R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
|
---|
592 |
|
---|
593 | #ifdef VBOX_WITH_VMSVGA
|
---|
594 | /** The VMSVGA ring-3 state. */
|
---|
595 | VMSVGASTATER3 svga;
|
---|
596 | #endif
|
---|
597 |
|
---|
598 | /** The VGA BIOS ROM data. */
|
---|
599 | R3PTRTYPE(uint8_t *) pbVgaBios;
|
---|
600 | /** The size of the VGA BIOS ROM. */
|
---|
601 | uint64_t cbVgaBios;
|
---|
602 | /** The name of the VGA BIOS ROM file. */
|
---|
603 | R3PTRTYPE(char *) pszVgaBiosFile;
|
---|
604 |
|
---|
605 | /** @name Logo data
|
---|
606 | * @{ */
|
---|
607 | /** Current logo data offset. */
|
---|
608 | uint32_t offLogoData;
|
---|
609 | /** The size of the BIOS logo data. */
|
---|
610 | uint32_t cbLogo;
|
---|
611 | /** Current logo command. */
|
---|
612 | uint16_t LogoCommand;
|
---|
613 | /** Bitmap width. */
|
---|
614 | uint16_t cxLogo;
|
---|
615 | /** Bitmap height. */
|
---|
616 | uint16_t cyLogo;
|
---|
617 | /** Bitmap planes. */
|
---|
618 | uint16_t cLogoPlanes;
|
---|
619 | /** Bitmap depth. */
|
---|
620 | uint16_t cLogoBits;
|
---|
621 | /** Bitmap compression. */
|
---|
622 | uint16_t LogoCompression;
|
---|
623 | /** Bitmap colors used. */
|
---|
624 | uint16_t cLogoUsedColors;
|
---|
625 | /** Palette size. */
|
---|
626 | uint16_t cLogoPalEntries;
|
---|
627 | /** Clear screen flag. */
|
---|
628 | uint8_t fLogoClearScreen;
|
---|
629 | bool fBootMenuInverse;
|
---|
630 | uint8_t Padding8[6];
|
---|
631 | /** Palette data. */
|
---|
632 | uint32_t au32LogoPalette[256];
|
---|
633 | /** The BIOS logo data. */
|
---|
634 | R3PTRTYPE(uint8_t *) pbLogo;
|
---|
635 | /** The name of the logo file. */
|
---|
636 | R3PTRTYPE(char *) pszLogoFile;
|
---|
637 | /** Bitmap image data. */
|
---|
638 | R3PTRTYPE(uint8_t *) pbLogoBitmap;
|
---|
639 | /** @} */
|
---|
640 |
|
---|
641 | /** @name VBE extra data (modes)
|
---|
642 | * @{ */
|
---|
643 | /** The VBE BIOS extra data. */
|
---|
644 | R3PTRTYPE(uint8_t *) pbVBEExtraData;
|
---|
645 | /** The size of the VBE BIOS extra data. */
|
---|
646 | uint16_t cbVBEExtraData;
|
---|
647 | /** The VBE BIOS current memory address. */
|
---|
648 | uint16_t u16VBEExtraAddress;
|
---|
649 | uint16_t Padding7[2];
|
---|
650 | /** @} */
|
---|
651 |
|
---|
652 | } VGASTATER3;
|
---|
653 | /** Pointer to the ring-3 VGA state. */
|
---|
654 | typedef VGASTATER3 *PVGASTATER3;
|
---|
655 |
|
---|
656 |
|
---|
657 | /**
|
---|
658 | * The VGA state data for ring-0 context.
|
---|
659 | */
|
---|
660 | typedef struct VGASTATER0
|
---|
661 | {
|
---|
662 | /** The R0 vram pointer. */
|
---|
663 | R0PTRTYPE(uint8_t *) pbVRam;
|
---|
664 | #ifdef VBOX_WITH_VMSVGA
|
---|
665 | /** The VMSVGA ring-0 state. */
|
---|
666 | VMSVGASTATER0 svga;
|
---|
667 | #endif
|
---|
668 | } VGASTATER0;
|
---|
669 | /** Pointer to the ring-0 VGA state. */
|
---|
670 | typedef VGASTATER0 *PVGASTATER0;
|
---|
671 |
|
---|
672 |
|
---|
673 | /**
|
---|
674 | * The VGA state data for raw-mode context.
|
---|
675 | */
|
---|
676 | typedef struct VGASTATERC
|
---|
677 | {
|
---|
678 | /** Pointer to the RC vram mapping. */
|
---|
679 | RCPTRTYPE(uint8_t *) pbVRam;
|
---|
680 | } VGASTATERC;
|
---|
681 | /** Pointer to the raw-mode VGA state. */
|
---|
682 | typedef VGASTATERC *PVGASTATERC;
|
---|
683 |
|
---|
684 |
|
---|
685 | /** The VGA state for the current context. */
|
---|
686 | typedef CTX_SUFF(VGASTATE) VGASTATECC;
|
---|
687 | /** Pointer to the VGA state for the current context. */
|
---|
688 | typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
|
---|
689 |
|
---|
690 |
|
---|
691 |
|
---|
692 | /** VBE Extra Data. */
|
---|
693 | typedef VBEHeader VBEHEADER;
|
---|
694 | /** Pointer to the VBE Extra Data. */
|
---|
695 | typedef VBEHEADER *PVBEHEADER;
|
---|
696 |
|
---|
697 | #if !defined(VBOX) || defined(IN_RING3)
|
---|
698 | static inline int c6_to_8(int v)
|
---|
699 | {
|
---|
700 | int b;
|
---|
701 | v &= 0x3f;
|
---|
702 | b = v & 1;
|
---|
703 | return (v << 2) | (b << 1) | b;
|
---|
704 | }
|
---|
705 | #endif /* !VBOX || IN_RING3 */
|
---|
706 |
|
---|
707 |
|
---|
708 | #ifdef VBOX_WITH_HGSMI
|
---|
709 | int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
710 | void VBVADestroy(PVGASTATECC pThisCC);
|
---|
711 | int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
712 | void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
713 | void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
714 | void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
715 |
|
---|
716 | bool VBVAIsPaused(PVGASTATECC pThisCC);
|
---|
717 | #ifdef UNUSED_FUNCTION
|
---|
718 | bool VBVAIsEnabled(PVGASTATECC pThisCC);
|
---|
719 | #endif
|
---|
720 |
|
---|
721 | void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
|
---|
722 |
|
---|
723 | int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
|
---|
724 | #ifdef UNUSED_FUNCTION
|
---|
725 | int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
|
---|
726 | VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
|
---|
727 | #endif
|
---|
728 |
|
---|
729 | # ifdef VBOX_WITH_VIDEOHWACCEL
|
---|
730 | DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
|
---|
731 | VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
|
---|
732 | int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
733 |
|
---|
734 | void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
|
---|
735 |
|
---|
736 | int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
|
---|
737 | int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
|
---|
738 | # endif
|
---|
739 |
|
---|
740 | int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
741 | int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
|
---|
742 | int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
|
---|
743 |
|
---|
744 | DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
|
---|
745 | uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
|
---|
746 |
|
---|
747 | # ifdef VBOX_WITH_VDMA
|
---|
748 | typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
|
---|
749 | int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
|
---|
750 | void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
|
---|
751 | void vboxVDMAReset(PVBOXVDMAHOST pVdma);
|
---|
752 | void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
|
---|
753 | void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
|
---|
754 | int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
|
---|
755 | int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
|
---|
756 | int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
|
---|
757 | int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
|
---|
758 | int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
|
---|
759 | # endif /* VBOX_WITH_VDMA */
|
---|
760 |
|
---|
761 | #endif /* VBOX_WITH_HGSMI */
|
---|
762 |
|
---|
763 | # ifdef VBOX_WITH_VMSVGA
|
---|
764 | int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
|
---|
765 | int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
|
---|
766 | int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
|
---|
767 | # endif
|
---|
768 |
|
---|
769 | #ifndef VBOX
|
---|
770 | void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
|
---|
771 | unsigned long vga_ram_offset, int vga_ram_size);
|
---|
772 | uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
|
---|
773 | void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
|
---|
774 | void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
|
---|
775 |
|
---|
776 | void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
|
---|
777 | int poffset, int w,
|
---|
778 | unsigned int color0, unsigned int color1,
|
---|
779 | unsigned int color_xor);
|
---|
780 | void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
|
---|
781 | int poffset, int w,
|
---|
782 | unsigned int color0, unsigned int color1,
|
---|
783 | unsigned int color_xor);
|
---|
784 | void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
|
---|
785 | int poffset, int w,
|
---|
786 | unsigned int color0, unsigned int color1,
|
---|
787 | unsigned int color_xor);
|
---|
788 |
|
---|
789 | extern const uint8_t sr_mask[8];
|
---|
790 | extern const uint8_t gr_mask[16];
|
---|
791 | #endif /* !VBOX */
|
---|
792 |
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793 | #endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
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794 |
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