VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 90778

Last change on this file since 90778 was 89163, checked in by vboxsync, 3 years ago

Devices/Graphics: Build new and old 3D backend. bugref:9830
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1/* $Id: DevVGA-SVGA3d.cpp 89163 2021-05-19 13:12:44Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/vmm/pdmdev.h>
25#include <iprt/errcore.h>
26#include <VBox/log.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
32#include <VBoxVideo.h> /* required by DevVGA.h */
33
34/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
35#include "DevVGA.h"
36
37#include "DevVGA-SVGA.h"
38#include "DevVGA-SVGA3d.h"
39#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
40#include "DevVGA-SVGA3d-internal.h"
41#include "DevVGA-SVGA-internal.h"
42
43
44
45/**
46 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
47 * commands (fifo).
48 *
49 * @returns VBox status code (currently ignored).
50 * @param pThisCC The VGA/VMSVGA state for ring-3.
51 * @param sid The ID of the surface to (re-)define.
52 * @param surfaceFlags .
53 * @param format .
54 * @param multisampleCount .
55 * @param autogenFilter .
56 * @param numMipLevels .
57 * @param pMipLevel0Size .
58 */
59int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, SVGA3dSurface1Flags surfaceFlags, SVGA3dSurfaceFormat format,
60 uint32_t multisampleCount, SVGA3dTextureFilter autogenFilter,
61 uint32_t numMipLevels, SVGA3dSize const *pMipLevel0Size)
62{
63 PVMSVGA3DSURFACE pSurface;
64 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
65 AssertReturn(pState, VERR_INVALID_STATE);
66
67 LogFunc(("sid=%u surfaceFlags=%#x format=%s (%#x) multiSampleCount=%d autogenFilter=%d, numMipLevels=%d size=(%dx%dx%d)\n",
68 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
69 numMipLevels, pMipLevel0Size->width, pMipLevel0Size->height, pMipLevel0Size->depth));
70
71 ASSERT_GUEST_RETURN(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
72 ASSERT_GUEST_RETURN(numMipLevels >= 1 && numMipLevels < SVGA3D_MAX_MIP_LEVELS, VERR_INVALID_PARAMETER);
73
74 if (sid >= pState->cSurfaces)
75 {
76 /* Grow the array. */
77 uint32_t cNew = RT_ALIGN(sid + 15, 16);
78 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
79 AssertReturn(pvNew, VERR_NO_MEMORY);
80 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
81 while (pState->cSurfaces < cNew)
82 {
83 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
84 AssertReturn(pSurface, VERR_NO_MEMORY);
85 pSurface->id = SVGA3D_INVALID_ID;
86 pState->papSurfaces[pState->cSurfaces++] = pSurface;
87 }
88 }
89 pSurface = pState->papSurfaces[sid];
90
91 /* If one already exists with this id, then destroy it now. */
92 if (pSurface->id != SVGA3D_INVALID_ID)
93 vmsvga3dSurfaceDestroy(pThisCC, sid);
94
95 RT_ZERO(*pSurface);
96 // pSurface->pBackendSurface = NULL;
97 pSurface->id = SVGA3D_INVALID_ID; /* Keep this value until the surface init completes */
98 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
99
100 /** @todo This 'switch' and the surfaceFlags tweaks should not be necessary.
101 * The actual surface type will be figured out when the surface is actually used later.
102 * The backends code must be reviewed for unnecessary dependencies on the surfaceFlags value.
103 */
104 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
105 * In some case we'll have to wait until the surface is used to create the D3D object.
106 */
107 switch (format)
108 {
109 case SVGA3D_Z_D32:
110 case SVGA3D_Z_D16:
111 case SVGA3D_Z_D24S8:
112 case SVGA3D_Z_D15S1:
113 case SVGA3D_Z_D24X8:
114 case SVGA3D_Z_DF16:
115 case SVGA3D_Z_DF24:
116 case SVGA3D_Z_D24S8_INT:
117 Assert(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL);
118 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
119 break;
120
121 /* Texture compression formats */
122 case SVGA3D_DXT1:
123 case SVGA3D_DXT2:
124 case SVGA3D_DXT3:
125 case SVGA3D_DXT4:
126 case SVGA3D_DXT5:
127 /* Bump-map formats */
128 case SVGA3D_BUMPU8V8:
129 case SVGA3D_BUMPL6V5U5:
130 case SVGA3D_BUMPX8L8V8U8:
131 case SVGA3D_V8U8:
132 case SVGA3D_Q8W8V8U8:
133 case SVGA3D_CxV8U8:
134 case SVGA3D_X8L8V8U8:
135 case SVGA3D_A2W10V10U10:
136 case SVGA3D_V16U16:
137 /* Typical render target formats; we should allow render target buffers to be used as textures. */
138 case SVGA3D_X8R8G8B8:
139 case SVGA3D_A8R8G8B8:
140 case SVGA3D_R5G6B5:
141 case SVGA3D_X1R5G5B5:
142 case SVGA3D_A1R5G5B5:
143 case SVGA3D_A4R4G4B4:
144 Assert(surfaceFlags & (SVGA3D_SURFACE_HINT_TEXTURE | SVGA3D_SURFACE_SCREENTARGET));
145 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
146 break;
147
148 case SVGA3D_LUMINANCE8:
149 case SVGA3D_LUMINANCE4_ALPHA4:
150 case SVGA3D_LUMINANCE16:
151 case SVGA3D_LUMINANCE8_ALPHA8:
152 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
153 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
154 case SVGA3D_A2R10G10B10:
155 case SVGA3D_ALPHA8:
156 case SVGA3D_R_S10E5:
157 case SVGA3D_R_S23E8:
158 case SVGA3D_RG_S10E5:
159 case SVGA3D_RG_S23E8:
160 case SVGA3D_G16R16:
161 case SVGA3D_A16B16G16R16:
162 case SVGA3D_UYVY:
163 case SVGA3D_YUY2:
164 case SVGA3D_NV12:
165 case SVGA3D_FORMAT_DEAD2: /* Old SVGA3D_AYUV */
166 case SVGA3D_ATI1:
167 case SVGA3D_ATI2:
168 break;
169
170 /*
171 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
172 * the most efficient format to use when creating new surfaces
173 * expressly for index or vertex data.
174 */
175 case SVGA3D_BUFFER:
176 break;
177
178 default:
179 break;
180 }
181
182 pSurface->surfaceFlags = surfaceFlags;
183 pSurface->format = format;
184 /* cFaces is 6 for a cubemaps and 1 otherwise. */
185 pSurface->cFaces = (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1);
186 pSurface->cLevels = numMipLevels;
187 pSurface->multiSampleCount = multisampleCount;
188 pSurface->autogenFilter = autogenFilter;
189 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
190 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
191 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(numMipLevels * pSurface->cFaces * sizeof(VMSVGA3DMIPMAPLEVEL));
192 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
193
194 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
195 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
196
197 /** @todo cbMemRemaining = value of SVGA_REG_MOB_MAX_SIZE */
198 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
199 SVGA3dSize mipmapSize = *pMipLevel0Size;
200 int rc = VINF_SUCCESS;
201
202 for (uint32_t i = 0; i < numMipLevels; ++i)
203 {
204 for (uint32_t iFace = 0; iFace < pSurface->cFaces; ++iFace)
205 {
206 uint32_t const iMipmap = iFace * numMipLevels + i;
207 LogFunc(("[%d] face %d mip level %d (%d,%d,%d) cbBlock=%#x block %dx%d\n",
208 iMipmap, iFace, i, mipmapSize.width, mipmapSize.height, mipmapSize.depth,
209 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
210
211 uint32_t cBlocksX;
212 uint32_t cBlocksY;
213 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
214 {
215 cBlocksX = mipmapSize.width;
216 cBlocksY = mipmapSize.height;
217 }
218 else
219 {
220 cBlocksX = mipmapSize.width / pSurface->cxBlock;
221 if (mipmapSize.width % pSurface->cxBlock)
222 ++cBlocksX;
223 cBlocksY = mipmapSize.height / pSurface->cyBlock;
224 if (mipmapSize.height % pSurface->cyBlock)
225 ++cBlocksY;
226 }
227
228 AssertBreakStmt(cBlocksX > 0 && cBlocksY > 0 && mipmapSize.depth > 0, rc = VERR_INVALID_PARAMETER);
229
230 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
231 AssertBreakStmt(cBlocksX < cMaxBlocksX, rc = VERR_INVALID_PARAMETER);
232
233 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
234 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
235
236 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
237 AssertBreakStmt(cBlocksY < cMaxBlocksY, rc = VERR_INVALID_PARAMETER);
238
239 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
240
241 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
242 AssertBreakStmt(mipmapSize.depth < cMaxDepth, rc = VERR_INVALID_PARAMETER);
243
244 const uint32_t cbSurface = cbSurfacePlane * mipmapSize.depth;
245
246 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iMipmap];
247 pMipmapLevel->mipmapSize = mipmapSize;
248 pMipmapLevel->cBlocksX = cBlocksX;
249 pMipmapLevel->cBlocksY = cBlocksY;
250 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * mipmapSize.depth;
251 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
252 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
253 pMipmapLevel->cbSurface = cbSurface;
254 pMipmapLevel->pSurfaceData = NULL;
255
256 cbMemRemaining -= cbSurface;
257 }
258
259 AssertRCBreak(rc);
260
261 mipmapSize.width >>= 1;
262 if (mipmapSize.width == 0) mipmapSize.width = 1;
263 mipmapSize.height >>= 1;
264 if (mipmapSize.height == 0) mipmapSize.height = 1;
265 mipmapSize.depth >>= 1;
266 if (mipmapSize.depth == 0) mipmapSize.depth = 1;
267 }
268
269 AssertLogRelRCReturnStmt(rc, RTMemFree(pSurface->paMipmapLevels), rc);
270
271 if (vmsvga3dIsLegacyBackend(pThisCC))
272 {
273#ifdef VMSVGA3D_DIRECT3D
274 /* pSurface->hSharedObject = NULL; */
275 /* pSurface->pSharedObjectTree = NULL; */
276 /* Translate the format and usage flags to D3D. */
277 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
278 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
279 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
280 pSurface->fUsageD3D = 0;
281 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
282 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
283 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
284 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
285 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
286 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
287 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
288 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
289 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
290 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
291 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
292 /* pSurface->u.pSurface = NULL; */
293 /* pSurface->bounce.pTexture = NULL; */
294 /* pSurface->emulated.pTexture = NULL; */
295#else
296 /* pSurface->oglId.buffer = OPENGL_INVALID_ID; */
297 /* pSurface->fEmulated = false; */
298 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
299 vmsvga3dSurfaceFormat2OGL(pSurface, format);
300#endif
301 }
302
303#ifdef LOG_ENABLED
304 SVGA3dSurfaceAllFlags const f = surfaceFlags;
305 LogFunc(("surface flags:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x%RX64\n",
306 (f & SVGA3D_SURFACE_CUBEMAP) ? " CUBEMAP" : "",
307 (f & SVGA3D_SURFACE_HINT_STATIC) ? " HINT_STATIC" : "",
308 (f & SVGA3D_SURFACE_HINT_DYNAMIC) ? " HINT_DYNAMIC" : "",
309 (f & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " HINT_INDEXBUFFER" : "",
310 (f & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " HINT_VERTEXBUFFER" : "",
311 (f & SVGA3D_SURFACE_HINT_TEXTURE) ? " HINT_TEXTURE" : "",
312 (f & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " HINT_RENDERTARGET" : "",
313 (f & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " HINT_DEPTHSTENCIL" : "",
314 (f & SVGA3D_SURFACE_HINT_WRITEONLY) ? " HINT_WRITEONLY" : "",
315 (f & SVGA3D_SURFACE_DEAD2) ? " DEAD2" : "",
316 (f & SVGA3D_SURFACE_AUTOGENMIPMAPS) ? " AUTOGENMIPMAPS" : "",
317 (f & SVGA3D_SURFACE_DEAD1) ? " DEAD1" : "",
318 (f & SVGA3D_SURFACE_MOB_PITCH) ? " MOB_PITCH" : "",
319 (f & SVGA3D_SURFACE_INACTIVE) ? " INACTIVE" : "",
320 (f & SVGA3D_SURFACE_HINT_RT_LOCKABLE) ? " HINT_RT_LOCKABLE" : "",
321 (f & SVGA3D_SURFACE_VOLUME) ? " VOLUME" : "",
322 (f & SVGA3D_SURFACE_SCREENTARGET) ? " SCREENTARGET" : "",
323 (f & SVGA3D_SURFACE_ALIGN16) ? " ALIGN16" : "",
324 (f & SVGA3D_SURFACE_1D) ? " 1D" : "",
325 (f & SVGA3D_SURFACE_ARRAY) ? " ARRAY" : "",
326 (f & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) ? " BIND_VERTEX_BUFFER" : "",
327 (f & SVGA3D_SURFACE_BIND_INDEX_BUFFER) ? " BIND_INDEX_BUFFER" : "",
328 (f & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) ? " BIND_CONSTANT_BUFFER" : "",
329 (f & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) ? " BIND_SHADER_RESOURCE" : "",
330 (f & SVGA3D_SURFACE_BIND_RENDER_TARGET) ? " BIND_RENDER_TARGET" : "",
331 (f & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) ? " BIND_DEPTH_STENCIL" : "",
332 (f & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) ? " BIND_STREAM_OUTPUT" : "",
333 (f & SVGA3D_SURFACE_STAGING_UPLOAD) ? " STAGING_UPLOAD" : "",
334 (f & SVGA3D_SURFACE_STAGING_DOWNLOAD) ? " STAGING_DOWNLOAD" : "",
335 (f & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE) ? " HINT_INDIRECT_UPDATE" : "",
336 (f & SVGA3D_SURFACE_TRANSFER_FROM_BUFFER) ? " TRANSFER_FROM_BUFFER" : "",
337 (f & SVGA3D_SURFACE_RESERVED1) ? " RESERVED1" : "",
338 (f & SVGA3D_SURFACE_MULTISAMPLE) ? " MULTISAMPLE" : "",
339 (f & SVGA3D_SURFACE_BIND_UAVIEW) ? " BIND_UAVIEW" : "",
340 (f & SVGA3D_SURFACE_TRANSFER_TO_BUFFER) ? " TRANSFER_TO_BUFFER" : "",
341 (f & SVGA3D_SURFACE_BIND_LOGICOPS) ? " BIND_LOGICOPS" : "",
342 (f & SVGA3D_SURFACE_BIND_RAW_VIEWS) ? " BIND_RAW_VIEWS" : "",
343 (f & SVGA3D_SURFACE_BUFFER_STRUCTURED) ? " BUFFER_STRUCTURED" : "",
344 (f & SVGA3D_SURFACE_DRAWINDIRECT_ARGS) ? " DRAWINDIRECT_ARGS" : "",
345 (f & SVGA3D_SURFACE_RESOURCE_CLAMP) ? " RESOURCE_CLAMP" : "",
346 (f & SVGA3D_SURFACE_FLAG_MAX) ? " FLAG_MAX" : "",
347 f & ~(SVGA3D_SURFACE_FLAG_MAX - 1ULL)
348 ));
349#endif
350
351 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
352
353 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
354 for (uint32_t i = 0; i < numMipLevels * pSurface->cFaces; ++i)
355 {
356 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
357 pMipmapLevel->pSurfaceData = RTMemAllocZ(pMipmapLevel->cbSurface);
358 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
359 }
360
361 pSurface->id = sid;
362 return VINF_SUCCESS;
363}
364
365
366/**
367 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
368 *
369 * @returns VBox status code (currently ignored).
370 * @param pThisCC The VGA/VMSVGA state for ring-3.
371 * @param sid The ID of the surface to destroy.
372 */
373int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
374{
375 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
376 AssertReturn(pState, VERR_NO_MEMORY);
377
378 PVMSVGA3DSURFACE pSurface;
379 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
380 AssertRCReturn(rc, rc);
381
382 LogFunc(("sid=%u\n", sid));
383
384 /* Check all contexts if this surface is used as a render target or active texture. */
385 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
386 {
387 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
388 if (pContext->id == cid)
389 {
390 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
391 if (pContext->aSidActiveTextures[i] == sid)
392 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
393 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
394 if (pContext->state.aRenderTargets[i] == sid)
395 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
396 }
397 }
398
399 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
400 if (pSvgaR3State->pFuncs3D)
401 pSvgaR3State->pFuncs3D->pfnSurfaceDestroy(pThisCC, pSurface);
402
403 if (pSurface->paMipmapLevels)
404 {
405 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
406 RTMemFreeZ(pSurface->paMipmapLevels[i].pSurfaceData, pSurface->paMipmapLevels[i].cbSurface);
407 RTMemFree(pSurface->paMipmapLevels);
408 }
409
410 memset(pSurface, 0, sizeof(*pSurface));
411 pSurface->id = SVGA3D_INVALID_ID;
412
413 return VINF_SUCCESS;
414}
415
416
417/**
418 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
419 *
420 * @returns VBox status code (currently ignored).
421 * @param pThis The shared VGA/VMSVGA state.
422 * @param pThisCC The VGA/VMSVGA state for ring-3.
423 * @param pDstSfcImg
424 * @param pDstBox
425 * @param pSrcSfcImg
426 * @param pSrcBox
427 * @param enmMode
428 */
429int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
430 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
431{
432 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
433 AssertReturn(pState, VERR_NO_MEMORY);
434
435 int rc;
436
437 uint32_t const sidSrc = pSrcSfcImg->sid;
438 PVMSVGA3DSURFACE pSrcSurface;
439 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
440 AssertRCReturn(rc, rc);
441
442 uint32_t const sidDst = pDstSfcImg->sid;
443 PVMSVGA3DSURFACE pDstSurface;
444 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
445 AssertRCReturn(rc, rc);
446
447 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
448 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->cLevels, VERR_INVALID_PARAMETER);
449 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
450 AssertReturn(pDstSfcImg->mipmap < pDstSurface->cLevels, VERR_INVALID_PARAMETER);
451
452 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
453 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
454
455 PVMSVGA3DCONTEXT pContext;
456#ifdef VMSVGA3D_OPENGL
457 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
458 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
459 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
460 pContext = &pState->SharedCtx;
461 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
462#else
463 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
464 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
465 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
466
467 uint32_t cid = pDstSurface->idAssociatedContext;
468 if (cid == SVGA3D_INVALID_ID)
469 cid = pSrcSurface->idAssociatedContext;
470
471 /* At least one of surfaces must be in hardware. */
472 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
473
474 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
475 AssertRCReturn(rc, rc);
476#endif
477
478 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
479 {
480 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
481 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
482 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pSrcSurface);
483 AssertRCReturn(rc, rc);
484 }
485
486 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
487 {
488 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
489 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
490 rc = pSvgaR3State->pFuncs3D->pfnCreateTexture(pThisCC, pContext, pContext->id, pDstSurface);
491 AssertRCReturn(rc, rc);
492 }
493
494 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
495 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
496 AssertRCReturn(rc, rc);
497
498 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
499 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
500 AssertRCReturn(rc, rc);
501
502 SVGA3dBox clipSrcBox = *pSrcBox;
503 SVGA3dBox clipDstBox = *pDstBox;
504 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
505 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
506
507 return pSvgaR3State->pFuncs3D->pfnSurfaceStretchBlt(pThis, pState,
508 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
509 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
510 enmMode, pContext);
511}
512
513/**
514 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
515 *
516 * @returns VBox status code (currently ignored).
517 * @param pThis The shared VGA/VMSVGA instance data.
518 * @param pThisCC The VGA/VMSVGA state for ring-3.
519 * @param guest .
520 * @param host .
521 * @param transfer .
522 * @param cCopyBoxes .
523 * @param paBoxes .
524 */
525int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
526 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
527{
528 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
529 AssertReturn(pState, VERR_NO_MEMORY);
530
531 PVMSVGA3DSURFACE pSurface;
532 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
533 AssertRCReturn(rc, rc);
534
535 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
536 (pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
537 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
538 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
539
540 PVMSVGA3DMIPMAPLEVEL pMipLevel;
541 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
542 AssertRCReturn(rc, rc);
543
544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
545 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
546
547 PVMSVGA3DCONTEXT pContext = NULL;
548 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
549 {
550 /*
551 * Not realized in host hardware/library yet, we have to work with
552 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
553 */
554 AssertReturn(pMipLevel->pSurfaceData, VERR_INTERNAL_ERROR);
555 }
556 else if (vmsvga3dIsLegacyBackend(pThisCC))
557 {
558#ifdef VMSVGA3D_DIRECT3D
559 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
560 vmsvga3dSurfaceFlush(pSurface);
561#else /* VMSVGA3D_OPENGL */
562 pContext = &pState->SharedCtx;
563 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
564#endif
565 }
566
567 /* SVGA_3D_CMD_SURFACE_DMA:
568 * "define the 'source' in each copyBox as the guest image and the
569 * 'destination' as the host image, regardless of transfer direction."
570 */
571 for (uint32_t i = 0; i < cCopyBoxes; ++i)
572 {
573 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
574 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
575 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
576
577 /* Apparently we're supposed to clip it (gmr test sample) */
578
579 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
580 SVGA3dBox hostBox;
581 hostBox.x = paBoxes[i].x;
582 hostBox.y = paBoxes[i].y;
583 hostBox.z = paBoxes[i].z;
584 hostBox.w = paBoxes[i].w;
585 hostBox.h = paBoxes[i].h;
586 hostBox.d = paBoxes[i].d;
587 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
588
589 if ( !hostBox.w
590 || !hostBox.h
591 || !hostBox.d)
592 {
593 Log(("Skip empty box\n"));
594 continue;
595 }
596 RT_UNTRUSTED_VALIDATED_FENCE();
597
598 /* Adjust the guest, i.e. "src", point.
599 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
600 */
601 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
602 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
603 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
604
605 /* Calculate offsets of the image blocks for the transfer. */
606 uint32_t u32HostBlockX;
607 uint32_t u32HostBlockY;
608 uint32_t u32GuestBlockX;
609 uint32_t u32GuestBlockY;
610 uint32_t cBlocksX;
611 uint32_t cBlocksY;
612 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
613 {
614 u32HostBlockX = hostBox.x;
615 u32HostBlockY = hostBox.y;
616
617 u32GuestBlockX = srcx;
618 u32GuestBlockY = srcy;
619
620 cBlocksX = hostBox.w;
621 cBlocksY = hostBox.h;
622 }
623 else
624 {
625 /* Pixels to blocks. */
626 u32HostBlockX = hostBox.x / pSurface->cxBlock;
627 u32HostBlockY = hostBox.y / pSurface->cyBlock;
628 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
629 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
630
631 u32GuestBlockX = srcx / pSurface->cxBlock;
632 u32GuestBlockY = srcy / pSurface->cyBlock;
633 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
634 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
635
636 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
637 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
638 }
639
640 uint32_t cbGuestPitch = guest.pitch;
641 if (cbGuestPitch == 0)
642 {
643 /* Host must "assume image is tightly packed". Our surfaces are. */
644 cbGuestPitch = pMipLevel->cbSurfacePitch;
645 }
646 else
647 {
648 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
649 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
650 RT_UNTRUSTED_VALIDATED_FENCE();
651 }
652
653 /* srcx, srcy and srcz values are used to calculate the guest offset.
654 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
655 */
656 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
657 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
658 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
659 RT_UNTRUSTED_VALIDATED_FENCE();
660
661 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
662 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
663 {
664 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
665 u32GuestBlockY * cbGuestPitch +
666 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
667 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
668
669 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
670 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
671 u32HostBlockY * pMipLevel->cbSurfacePitch +
672 hostBox.z * pMipLevel->cbSurfacePlane;
673 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
674
675 for (uint32_t z = 0; z < hostBox.d; ++z)
676 {
677 rc = vmsvgaR3GmrTransfer(pThis,
678 pThisCC,
679 transfer,
680 (uint8_t *)pMipLevel->pSurfaceData,
681 pMipLevel->cbSurface,
682 uHostOffset,
683 (int32_t)pMipLevel->cbSurfacePitch,
684 guest.ptr,
685 (uint32_t)uGuestOffset,
686 cbGuestPitch,
687 cBlocksX * pSurface->cbBlock,
688 cBlocksY);
689 AssertRC(rc);
690
691 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
692 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
693
694 uHostOffset += pMipLevel->cbSurfacePlane;
695 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
696 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
697 }
698 }
699
700 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
701 {
702 SVGA3dCopyBox clipBox;
703 clipBox.x = hostBox.x;
704 clipBox.y = hostBox.y;
705 clipBox.z = hostBox.z;
706 clipBox.w = hostBox.w;
707 clipBox.h = hostBox.h;
708 clipBox.d = hostBox.d;
709 clipBox.srcx = srcx;
710 clipBox.srcy = srcy;
711 clipBox.srcz = srcz;
712 rc = pSvgaR3State->pFuncs3D->pfnSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
713 guest.ptr, cbGuestPitch, transfer,
714 &clipBox, pContext, rc, i);
715 AssertRC(rc);
716 }
717 }
718
719 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
720 {
721 pMipLevel->fDirty = true;
722 pSurface->fDirty = true;
723 }
724
725 return rc;
726}
727
728static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr const *pGuestResult,
729 SVGA3dQueryState enmState, uint32_t u32Result)
730{
731 SVGA3dQueryResult queryResult;
732 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
733 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
734 queryResult.result32 = u32Result;
735
736 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
737 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
738 *pGuestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
739 AssertRC(rc);
740 return rc;
741}
742
743/* Used with saved state. */
744int vmsvga3dQueryCreate(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
745{
746 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
747 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
748
749 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
750 AssertReturn(pState, VERR_NO_MEMORY);
751
752 LogFunc(("cid=%u type=%d\n", cid, type));
753
754 PVMSVGA3DCONTEXT pContext;
755 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
756 AssertRCReturn(rc, rc);
757
758 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
759 {
760 VMSVGA3DQUERY *p = &pContext->occlusion;
761 if (!VMSVGA3DQUERY_EXISTS(p))
762 {
763 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
764 AssertRCReturn(rc, rc);
765 }
766
767 return VINF_SUCCESS;
768 }
769
770 /* Nothing else for VGPU9. */
771 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
772}
773
774int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
775{
776 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
777 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
778
779 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
780 AssertReturn(pState, VERR_NO_MEMORY);
781
782 LogFunc(("cid=%u type=%d\n", cid, type));
783
784 PVMSVGA3DCONTEXT pContext;
785 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
786 AssertRCReturn(rc, rc);
787
788 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
789 {
790 VMSVGA3DQUERY *p = &pContext->occlusion;
791 if (!VMSVGA3DQUERY_EXISTS(p))
792 {
793 /* Lazy creation of the query object. */
794 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryCreate(pThisCC, pContext);
795 AssertRCReturn(rc, rc);
796 }
797
798 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryBegin(pThisCC, pContext);
799 AssertRCReturn(rc, rc);
800
801 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
802 p->u32QueryResult = 0;
803
804 return VINF_SUCCESS;
805 }
806
807 /* Nothing else for VGPU9. */
808 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
809}
810
811int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
812{
813 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
814 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
815
816 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
817 AssertReturn(pState, VERR_NO_MEMORY);
818
819 LogFunc(("cid=%u type=%d\n", cid, type));
820
821 PVMSVGA3DCONTEXT pContext;
822 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
823 AssertRCReturn(rc, rc);
824
825 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
826 {
827 VMSVGA3DQUERY *p = &pContext->occlusion;
828 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
829 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
830
831 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryEnd(pThisCC, pContext);
832 AssertRCReturn(rc, rc);
833
834 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
835 return VINF_SUCCESS;
836 }
837
838 /* Nothing else for VGPU9. */
839 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
840}
841
842int vmsvga3dQueryWait(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, PVGASTATE pThis, SVGAGuestPtr const *pGuestResult)
843{
844 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
845 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
846
847 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
848 AssertReturn(pState, VERR_NO_MEMORY);
849
850 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, pGuestResult->gmrId, pGuestResult->offset));
851
852 PVMSVGA3DCONTEXT pContext;
853 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
854 AssertRCReturn(rc, rc);
855
856 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
857 {
858 VMSVGA3DQUERY *p = &pContext->occlusion;
859 if (VMSVGA3DQUERY_EXISTS(p))
860 {
861 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
862 {
863 /* Only if not already in SIGNALED state,
864 * i.e. not a second read from the guest or after restoring saved state.
865 */
866 uint32_t u32Pixels = 0;
867 rc = pSvgaR3State->pFuncsVGPU9->pfnOcclusionQueryGetData(pThisCC, pContext, &u32Pixels);
868 if (RT_SUCCESS(rc))
869 {
870 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
871 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
872 }
873 }
874
875 if (RT_SUCCESS(rc))
876 {
877 /* pGuestResult can be NULL when saving the state. */
878 if (pGuestResult)
879 {
880 /* Return data to the guest. */
881 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
882 }
883 return VINF_SUCCESS;
884 }
885 }
886 else
887 {
888 AssertMsgFailed(("GetData Query is NULL\n"));
889 }
890
891 rc = VERR_INTERNAL_ERROR;
892 }
893 else
894 {
895 rc = VERR_NOT_IMPLEMENTED;
896 }
897
898 if (pGuestResult)
899 vmsvga3dQueryWriteResult(pThis, pThisCC, pGuestResult, SVGA3D_QUERYSTATE_FAILED, 0);
900 AssertFailedReturn(rc);
901}
902
903int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
904 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
905{
906 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
907 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
908 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
909 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
910 for (uint32_t i = 0; i < cRects; i++)
911 {
912 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
913 }
914
915 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
916 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
917
918 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
919 SVGA3dSurfaceImageId src;
920 src.sid = srcImage.sid;
921 src.mipmap = 0;
922 src.face = 0;
923
924 if (pScreen->pHwScreen)
925 {
926 /* Use the backend accelerated method, if available. */
927 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
928 if (pSvgaR3State->pFuncs3D)
929 {
930 int rc = pSvgaR3State->pFuncs3D->pfnSurfaceBlitToScreen(pThisCC, pScreen, destRect, src, srcRect, cRects, pRect);
931 if (rc == VINF_SUCCESS)
932 {
933 return VINF_SUCCESS;
934 }
935 }
936 }
937
938 /** @todo scaling */
939 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
940
941 SVGA3dCopyBox box;
942 SVGAGuestImage dest;
943
944 box.srcz = 0;
945 box.z = 0;
946 box.d = 1;
947
948 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
949 dest.ptr.offset = pScreen->offVRAM;
950 dest.pitch = pScreen->cbPitch;
951
952 if (cRects == 0)
953 {
954 /* easy case; no clipping */
955
956 /* SVGA_3D_CMD_SURFACE_DMA:
957 * 'define the "source" in each copyBox as the guest image and the
958 * "destination" as the host image, regardless of transfer direction.'
959 *
960 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
961 * it must set the copyBox "source" to the guest destination coords and
962 * the copyBox "destination" to the host surface source coords.
963 */
964 /* Host image. */
965 box.x = srcRect.left;
966 box.y = srcRect.top;
967 box.w = srcRect.right - srcRect.left;
968 box.h = srcRect.bottom - srcRect.top;
969 /* Guest image. */
970 box.srcx = destRect.left;
971 box.srcy = destRect.top;
972
973 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
974 AssertRCReturn(rc, rc);
975
976 /* Update the guest image, which is at box.src. */
977 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
978 }
979 else
980 {
981 /** @todo merge into one SurfaceDMA call */
982 for (uint32_t i = 0; i < cRects; i++)
983 {
984 /* "The clip rectangle coordinates are measured
985 * relative to the top-left corner of destRect."
986 * Therefore they are relative to the top-left corner of srcRect as well.
987 */
988
989 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
990 box.x = srcRect.left + pRect[i].left;
991 box.y = srcRect.top + pRect[i].top;
992 box.w = pRect[i].right - pRect[i].left;
993 box.h = pRect[i].bottom - pRect[i].top;
994 /* Guest image. The target screen memory is currently in the guest VRAM. */
995 box.srcx = destRect.left + pRect[i].left;
996 box.srcy = destRect.top + pRect[i].top;
997
998 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
999 AssertRCReturn(rc, rc);
1000
1001 /* Update the guest image, which is at box.src. */
1002 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
1003 }
1004 }
1005
1006 return VINF_SUCCESS;
1007}
1008
1009int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
1010{
1011 /* Deprecated according to svga3d_reg.h. */
1012 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1013 AssertReturn(pState, VERR_NO_MEMORY);
1014
1015 PVMSVGA3DSURFACE pSurface;
1016 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1017 AssertRCReturn(rc, rc);
1018
1019 /** @todo Detect screen from coords? Or split rect to screens? */
1020 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
1021 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
1022
1023 /* If there are no recangles specified, just grab a screenful. */
1024 SVGA3dCopyRect DummyRect;
1025 if (cRects != 0)
1026 { /* likely */ }
1027 else
1028 {
1029 /** @todo Find the usecase for this or check what the original device does.
1030 * The original code was doing some scaling based on the surface
1031 * size... */
1032 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
1033 DummyRect.x = DummyRect.srcx = 0;
1034 DummyRect.y = DummyRect.srcy = 0;
1035 DummyRect.w = pScreen->cWidth;
1036 DummyRect.h = pScreen->cHeight;
1037 cRects = 1;
1038 pRect = &DummyRect;
1039 }
1040
1041 uint32_t i;
1042 for (i = 0; i < cRects; ++i)
1043 {
1044 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
1045 SVGASignedRect destRect;
1046 destRect.left = pRect[i].x;
1047 destRect.top = pRect[i].y;
1048 destRect.right = pRect[i].x + pRect[i].w;
1049 destRect.bottom = pRect[i].y + pRect[i].h;
1050
1051 SVGA3dSurfaceImageId src;
1052 src.sid = sid;
1053 src.face = 0;
1054 src.mipmap = 0;
1055
1056 SVGASignedRect srcRect;
1057 srcRect.left = pRect[i].srcx;
1058 srcRect.top = pRect[i].srcy;
1059 srcRect.right = pRect[i].srcx + pRect[i].w;
1060 srcRect.bottom = pRect[i].srcy + pRect[i].h;
1061
1062 /* Entire rect. */
1063 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
1064 AssertRCReturn(rc, rc);
1065 }
1066
1067 return VINF_SUCCESS;
1068}
1069
1070int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1071{
1072 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1073 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1074
1075 if (pScreen->pHwScreen)
1076 {
1077 pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1078 }
1079
1080 int rc = pSvgaR3State->pFuncs3D->pfnDefineScreen(pThis, pThisCC, pScreen);
1081 if (RT_SUCCESS(rc))
1082 {
1083 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
1084 }
1085 return rc;
1086}
1087
1088int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1089{
1090 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1091 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1092
1093 return pSvgaR3State->pFuncs3D->pfnDestroyScreen(pThisCC, pScreen);
1094}
1095
1096int vmsvga3dSurfaceInvalidate(PVGASTATECC pThisCC, uint32_t sid, uint32_t face, uint32_t mipmap)
1097{
1098 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1099 AssertReturn(pState, VERR_INVALID_STATE);
1100
1101 PVMSVGA3DSURFACE pSurface;
1102 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1103 AssertRCReturn(rc, rc);
1104
1105 if (face == SVGA_ID_INVALID && mipmap == SVGA_ID_INVALID)
1106 {
1107 for (uint32_t i = 0; i < pSurface->cLevels * pSurface->cFaces; ++i)
1108 {
1109 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1110 pMipmapLevel->fDirty = true;
1111 }
1112 }
1113 else
1114 {
1115 PVMSVGA3DMIPMAPLEVEL pMipmapLevel;
1116 rc = vmsvga3dMipmapLevel(pSurface, face, mipmap, &pMipmapLevel);
1117 AssertRCReturn(rc, rc);
1118
1119 pMipmapLevel->fDirty = true;
1120 }
1121 pSurface->fDirty = true;
1122
1123 return rc;
1124}
1125
1126
1127/*
1128 *
1129 * 3D
1130 *
1131 */
1132
1133int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1134{
1135 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1136 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1137 return pSvgaR3State->pFuncs3D->pfnQueryCaps(pThisCC, idx3dCaps, pu32Val);
1138}
1139
1140int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1141{
1142 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1143 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1144 return pSvgaR3State->pFuncs3D->pfnChangeMode(pThisCC);
1145}
1146
1147int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src, uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1148{
1149 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1150 AssertReturn(pSvgaR3State->pFuncs3D, VERR_NOT_IMPLEMENTED);
1151 return pSvgaR3State->pFuncs3D->pfnSurfaceCopy(pThisCC, dest, src, cCopyBoxes, pBox);
1152}
1153
1154void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1155{
1156 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1157 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1158 pSvgaR3State->pFuncs3D->pfnUpdateHostScreenViewport(pThisCC, idScreen, pOldViewport);
1159}
1160
1161/**
1162 * Updates the heap buffers for all surfaces or one specific one.
1163 *
1164 * @param pThisCC The VGA/VMSVGA state for ring-3.
1165 * @param sid The surface ID, UINT32_MAX if all.
1166 * @thread VMSVGAFIFO
1167 */
1168void vmsvga3dUpdateHeapBuffersForSurfaces(PVGASTATECC pThisCC, uint32_t sid)
1169{
1170 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1171 AssertReturnVoid(pSvgaR3State->pFuncs3D);
1172
1173 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1174 AssertReturnVoid(pState);
1175
1176 if (sid == UINT32_MAX)
1177 {
1178 uint32_t cSurfaces = pState->cSurfaces;
1179 for (sid = 0; sid < cSurfaces; sid++)
1180 {
1181 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1182 if (pSurface && pSurface->id == sid)
1183 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1184 }
1185 }
1186 else if (sid < pState->cSurfaces)
1187 {
1188 PVMSVGA3DSURFACE pSurface = pState->papSurfaces[sid];
1189 if (pSurface && pSurface->id == sid)
1190 pSvgaR3State->pFuncs3D->pfnSurfaceUpdateHeapBuffers(pThisCC, pSurface);
1191 }
1192}
1193
1194
1195/*
1196 *
1197 * VGPU9
1198 *
1199 */
1200
1201int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1202{
1203 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1204 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1205 return pSvgaR3State->pFuncsVGPU9->pfnContextDefine(pThisCC, cid);
1206}
1207
1208int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1209{
1210 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1211 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1212 return pSvgaR3State->pFuncsVGPU9->pfnContextDestroy(pThisCC, cid);
1213}
1214
1215int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1216{
1217 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1218 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1219 return pSvgaR3State->pFuncsVGPU9->pfnSetTransform(pThisCC, cid, type, matrix);
1220}
1221
1222int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1223{
1224 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1225 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1226 return pSvgaR3State->pFuncsVGPU9->pfnSetZRange(pThisCC, cid, zRange);
1227}
1228
1229int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1230{
1231 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1232 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1233 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderState(pThisCC, cid, cRenderStates, pRenderState);
1234}
1235
1236int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1237{
1238 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1239 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1240 return pSvgaR3State->pFuncsVGPU9->pfnSetRenderTarget(pThisCC, cid, type, target);
1241}
1242
1243int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1244{
1245 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1246 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1247 return pSvgaR3State->pFuncsVGPU9->pfnSetTextureState(pThisCC, cid, cTextureStates, pTextureState);
1248}
1249
1250int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1251{
1252 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1253 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1254 return pSvgaR3State->pFuncsVGPU9->pfnSetMaterial(pThisCC, cid, face, pMaterial);
1255}
1256
1257int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1258{
1259 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1260 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1261 return pSvgaR3State->pFuncsVGPU9->pfnSetLightData(pThisCC, cid, index, pData);
1262}
1263
1264int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1265{
1266 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1267 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1268 return pSvgaR3State->pFuncsVGPU9->pfnSetLightEnabled(pThisCC, cid, index, enabled);
1269}
1270
1271int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1272{
1273 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1274 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1275 return pSvgaR3State->pFuncsVGPU9->pfnSetViewPort(pThisCC, cid, pRect);
1276}
1277
1278int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1279{
1280 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1281 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1282 return pSvgaR3State->pFuncsVGPU9->pfnSetClipPlane(pThisCC, cid, index, plane);
1283}
1284
1285int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth, uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1286{
1287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1288 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1289 return pSvgaR3State->pFuncsVGPU9->pfnCommandClear(pThisCC, cid, clearFlag, color, depth, stencil, cRects, pRect);
1290}
1291
1292int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl, uint32_t numRanges, SVGA3dPrimitiveRange *pNumRange, uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1293{
1294 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1295 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1296 return pSvgaR3State->pFuncsVGPU9->pfnDrawPrimitives(pThisCC, cid, numVertexDecls, pVertexDecl, numRanges, pNumRange, cVertexDivisor, pVertexDivisor);
1297}
1298
1299int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1300{
1301 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1302 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1303 return pSvgaR3State->pFuncsVGPU9->pfnSetScissorRect(pThisCC, cid, pRect);
1304}
1305
1306int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1307{
1308 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1309 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1310 return pSvgaR3State->pFuncsVGPU9->pfnGenerateMipmaps(pThisCC, sid, filter);
1311}
1312
1313int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type, uint32_t cbData, uint32_t *pShaderData)
1314{
1315 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1316 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1317 return pSvgaR3State->pFuncsVGPU9->pfnShaderDefine(pThisCC, cid, shid, type, cbData, pShaderData);
1318}
1319
1320int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
1321{
1322 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1323 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1324 return pSvgaR3State->pFuncsVGPU9->pfnShaderDestroy(pThisCC, cid, shid, type);
1325}
1326
1327int vmsvga3dShaderSet(PVGASTATECC pThisCC, struct VMSVGA3DCONTEXT *pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
1328{
1329 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1330 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1331 return pSvgaR3State->pFuncsVGPU9->pfnShaderSet(pThisCC, pContext, cid, type, shid);
1332}
1333
1334int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type, SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
1335{
1336 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1337 AssertReturn(pSvgaR3State->pFuncsVGPU9, VERR_NOT_IMPLEMENTED);
1338 return pSvgaR3State->pFuncsVGPU9->pfnShaderSetConst(pThisCC, cid, reg, type, ctype, cRegisters, pValues);
1339}
1340
1341/*
1342 * Whether a legacy 3D backend is used.
1343 * The new DX context can be built together with the legacy D3D9 or OpenGL backend.
1344 * The actual backend is selected at the VM startup.
1345 */
1346bool vmsvga3dIsLegacyBackend(PVGASTATECC pThisCC)
1347{
1348 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1349 return pSvgaR3State->pFuncsDX == NULL;
1350}
1351
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