VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 95149

Last change on this file since 95149 was 95149, checked in by vboxsync, 3 years ago

Devices/Graphics: PresentBlt. bugref:9830
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1/* $Id: DevVGA-SVGA3d-dx.cpp 95149 2022-05-31 17:01:25Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42/*
43 * Helpers.
44 */
45
46static int dxMobWrite(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid, uint32_t off, void const *pvData, uint32_t cbData)
47{
48 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, mobid);
49 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_STATE);
50
51 return vmsvgaR3MobWrite(pSvgaR3State, pMob, off, pvData, cbData);
52}
53
54
55/*
56 *
57 * Command handlers.
58 *
59 */
60
61int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
62{
63 int rc;
64 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
65 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
66 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
67 AssertReturn(p3dState, VERR_INVALID_STATE);
68
69 PVMSVGA3DDXCONTEXT pDXContext;
70 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
71 AssertRCReturn(rc, rc);
72
73 /* Copy the host structure back to the guest memory. */
74 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
75
76 return rc;
77}
78
79
80int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
81{
82 int rc;
83 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
84 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
85 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
86 AssertReturn(p3dState, VERR_INVALID_STATE);
87
88 PVMSVGA3DDXCONTEXT pDXContext;
89 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
90 AssertRCReturn(rc, rc);
91
92 /* Notify the host backend that context is about to be switched. */
93 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
94 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
95 return rc;
96
97 /** @todo Keep track of changes in the pipeline and apply only modified state. */
98 /* It is not necessary to restore SVGADXContextMobFormat::shaderState::shaderResources
99 * because they are applied by the backend before each Draw call.
100 */
101 #define DX_STATE_VS 0x00000001
102 #define DX_STATE_PS 0x00000002
103 #define DX_STATE_SAMPLERS 0x00000004
104 #define DX_STATE_INPUTLAYOUT 0x00000008
105 #define DX_STATE_TOPOLOGY 0x00000010
106 #define DX_STATE_VERTEXBUFFER 0x00000020
107 #define DX_STATE_INDEXBUFFER 0x00000040
108 #define DX_STATE_BLENDSTATE 0x00000080
109 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
110 #define DX_STATE_SOTARGETS 0x00000200
111 #define DX_STATE_VIEWPORTS 0x00000400
112 #define DX_STATE_SCISSORRECTS 0x00000800
113 #define DX_STATE_RASTERIZERSTATE 0x00001000
114 #define DX_STATE_RENDERTARGETS 0x00002000
115 #define DX_STATE_GS 0x00004000
116 #define DX_STATE_CONSTANTBUFFERS 0x00008000
117 uint32_t u32TrackedState = 0
118 | DX_STATE_VS
119 | DX_STATE_PS
120 | DX_STATE_SAMPLERS
121 | DX_STATE_INPUTLAYOUT
122 | DX_STATE_TOPOLOGY
123 | DX_STATE_VERTEXBUFFER
124 | DX_STATE_INDEXBUFFER
125 | DX_STATE_BLENDSTATE
126 | DX_STATE_DEPTHSTENCILSTATE
127 | DX_STATE_SOTARGETS
128 | DX_STATE_VIEWPORTS
129 | DX_STATE_SCISSORRECTS
130 | DX_STATE_RASTERIZERSTATE
131 | DX_STATE_RENDERTARGETS
132 | DX_STATE_GS
133 | DX_STATE_CONSTANTBUFFERS
134 ;
135
136 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState));
137
138 if (u32TrackedState & DX_STATE_VS)
139 {
140 u32TrackedState &= ~DX_STATE_VS;
141
142 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
143
144 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
145 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
146
147 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
148 AssertRC(rc);
149 }
150
151
152 if (u32TrackedState & DX_STATE_PS)
153 {
154 u32TrackedState &= ~DX_STATE_PS;
155
156 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
157
158 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
159 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
160
161 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
162 AssertRC(rc);
163 }
164
165
166 if (u32TrackedState & DX_STATE_GS)
167 {
168 u32TrackedState &= ~DX_STATE_GS;
169
170 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_GS;
171
172 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
173 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
174
175 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
176 AssertRC(rc);
177 }
178
179
180 if (u32TrackedState & DX_STATE_SAMPLERS)
181 {
182 u32TrackedState &= ~DX_STATE_SAMPLERS;
183
184 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_MAX; ++i)
185 {
186 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
187 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
188
189 uint32_t startSampler = 0;
190 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
191 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
192
193 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
194 AssertRC(rc);
195 }
196 }
197
198
199 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
200 {
201 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
202
203 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
204
205 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
206 AssertRC(rc);
207 }
208
209
210 if (u32TrackedState & DX_STATE_TOPOLOGY)
211 {
212 u32TrackedState &= ~DX_STATE_TOPOLOGY;
213
214 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
215
216 if (topology != SVGA3D_PRIMITIVE_INVALID)
217 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
218 AssertRC(rc);
219 }
220
221
222 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
223 {
224 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
225
226 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
227 * 32 bits mask is enough.
228 */
229 uint32_t startBuffer = 0;
230 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
231 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
232 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
233 {
234 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
235 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
236 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
237 }
238
239 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
240 AssertRC(rc);
241 }
242
243
244 if (u32TrackedState & DX_STATE_INDEXBUFFER)
245 {
246 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
247
248 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
249 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
250 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
251
252 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
253 AssertRC(rc);
254 }
255
256
257 if (u32TrackedState & DX_STATE_BLENDSTATE)
258 {
259 u32TrackedState &= ~DX_STATE_BLENDSTATE;
260
261 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
262 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
263 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
264 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
265
266 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
267 AssertRC(rc);
268 }
269
270
271 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
272 {
273 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
274
275 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
276 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
277
278 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
279 AssertRC(rc);
280 }
281
282
283 if (u32TrackedState & DX_STATE_SOTARGETS)
284 {
285 u32TrackedState &= ~DX_STATE_SOTARGETS;
286
287 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
288 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
289 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
290 {
291 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
292 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
293 aSoTarget[i].offset = 0;
294 aSoTarget[i].sizeInBytes = 0;
295 }
296
297 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
298 AssertRC(rc);
299 }
300
301
302 if (u32TrackedState & DX_STATE_VIEWPORTS)
303 {
304 u32TrackedState &= ~DX_STATE_VIEWPORTS;
305
306 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
307 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
308
309 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
310 AssertRC(rc);
311 }
312
313
314 if (u32TrackedState & DX_STATE_SCISSORRECTS)
315 {
316 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
317
318 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
319 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
320
321 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
322 AssertRC(rc);
323 }
324
325
326 if (u32TrackedState & DX_STATE_RASTERIZERSTATE)
327 {
328 u32TrackedState &= ~DX_STATE_RASTERIZERSTATE;
329
330 SVGA3dRasterizerStateId const rasterizerId = pDXContext->svgaDXContext.renderState.rasterizerStateId;
331
332 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
333 AssertRC(rc);
334 }
335
336
337 if (u32TrackedState & DX_STATE_RENDERTARGETS)
338 {
339 u32TrackedState &= ~DX_STATE_RENDERTARGETS;
340
341 SVGA3dDepthStencilViewId const depthStencilViewId = (SVGA3dDepthStencilViewId)pDXContext->svgaDXContext.renderState.depthStencilViewId;
342 uint32_t const cRenderTargetViewId = SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS;
343 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pDXContext->svgaDXContext.renderState.renderTargetViewIds[0];
344
345 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
346 AssertRC(rc);
347 }
348
349
350 if (u32TrackedState & DX_STATE_CONSTANTBUFFERS)
351 {
352 u32TrackedState &= ~DX_STATE_CONSTANTBUFFERS;
353
354 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_MAX; ++i)
355 {
356 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
357 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
358
359 /** @todo Track which constant buffers were modified and update only the corresponding slots.
360 * 32 bit mask is enough.
361 */
362 for (int iSlot = 0; iSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++iSlot)
363 {
364 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[iSlot];
365 if (pCBB->sid == SVGA3D_INVALID_ID) // This will not be necessary when constant buffers slots will be tracked.
366 continue;
367
368 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, iSlot, shaderType, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
369 AssertRC(rc);
370 }
371 }
372 }
373
374 Assert(u32TrackedState == 0);
375
376 return rc;
377}
378
379
380/**
381 * Create a new 3D DX context.
382 *
383 * @returns VBox status code.
384 * @param pThisCC The VGA/VMSVGA state for ring-3.
385 * @param cid Context id to be created.
386 */
387int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
388{
389 int rc;
390 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
391 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
392 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
393 AssertReturn(p3dState, VERR_INVALID_STATE);
394
395 PVMSVGA3DDXCONTEXT pDXContext;
396
397 LogFunc(("cid %d\n", cid));
398
399 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
400
401 if (cid >= p3dState->cDXContexts)
402 {
403 /* Grow the array. */
404 uint32_t cNew = RT_ALIGN(cid + 15, 16);
405 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
406 AssertReturn(pvNew, VERR_NO_MEMORY);
407 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
408 while (p3dState->cDXContexts < cNew)
409 {
410 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
411 AssertReturn(pDXContext, VERR_NO_MEMORY);
412 pDXContext->cid = SVGA3D_INVALID_ID;
413 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
414 }
415 }
416 /* If one already exists with this id, then destroy it now. */
417 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
418 vmsvga3dDXDestroyContext(pThisCC, cid);
419
420 pDXContext = p3dState->papDXContexts[cid];
421 memset(pDXContext, 0, sizeof(*pDXContext));
422
423 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
424 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
425 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
426 pDXContext->svgaDXContext.numViewports = 0;
427 pDXContext->svgaDXContext.numScissorRects = 0;
428 pDXContext->cid = cid;
429
430 /* Init the backend specific data. */
431 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
432
433 /* Cleanup on failure. */
434 if (RT_FAILURE(rc))
435 vmsvga3dDXDestroyContext(pThisCC, cid);
436
437 return rc;
438}
439
440
441int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
442{
443 int rc;
444 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
445 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
446 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
447 AssertReturn(p3dState, VERR_INVALID_STATE);
448
449 PVMSVGA3DDXCONTEXT pDXContext;
450 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
451 AssertRCReturn(rc, rc);
452
453 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
454
455 RT_ZERO(*pDXContext);
456 pDXContext->cid = SVGA3D_INVALID_ID;
457
458 return rc;
459}
460
461
462int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
463{
464 int rc;
465 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
466 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
467 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
468 AssertReturn(p3dState, VERR_INVALID_STATE);
469
470 PVMSVGA3DDXCONTEXT pDXContext;
471 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
472 AssertRCReturn(rc, rc);
473
474 if (pSvgaDXContext)
475 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
476
477 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
478 return rc;
479}
480
481
482int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
483{
484 int rc;
485 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
486 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
487 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
488 AssertReturn(p3dState, VERR_INVALID_STATE);
489
490 PVMSVGA3DDXCONTEXT pDXContext;
491 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
492 AssertRCReturn(rc, rc);
493
494 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
495 if (RT_SUCCESS(rc))
496 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
497 return rc;
498}
499
500
501int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
502{
503 int rc;
504 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
505 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
506 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
507 AssertReturn(p3dState, VERR_INVALID_STATE);
508
509 PVMSVGA3DDXCONTEXT pDXContext;
510 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
511 AssertRCReturn(rc, rc);
512
513 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
514 return rc;
515}
516
517
518int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
519{
520 int rc;
521 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
522 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
523 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
524 AssertReturn(p3dState, VERR_INVALID_STATE);
525
526 PVMSVGA3DDXCONTEXT pDXContext;
527 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
528 AssertRCReturn(rc, rc);
529
530 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
531 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
532 RT_UNTRUSTED_VALIDATED_FENCE();
533
534 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
535 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
536 pCBB->sid = pCmd->sid;
537 pCBB->offsetInBytes = pCmd->offsetInBytes;
538 pCBB->sizeInBytes = pCmd->sizeInBytes;
539
540 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
541 return rc;
542}
543
544
545int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
546{
547 int rc;
548 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
549 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
550 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
551 AssertReturn(p3dState, VERR_INVALID_STATE);
552
553 PVMSVGA3DDXCONTEXT pDXContext;
554 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
555 AssertRCReturn(rc, rc);
556
557 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
558 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
559 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
560 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
561 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
562 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
563 RT_UNTRUSTED_VALIDATED_FENCE();
564
565 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
566 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
567 {
568 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
569 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
570 }
571
572 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
573 return rc;
574}
575
576
577int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
578{
579 int rc;
580 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
581 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
582 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
583 AssertReturn(p3dState, VERR_INVALID_STATE);
584
585 PVMSVGA3DDXCONTEXT pDXContext;
586 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
587 AssertRCReturn(rc, rc);
588
589 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
590 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
591 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
592 RT_UNTRUSTED_VALIDATED_FENCE();
593
594 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
595 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
596
597 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->shaderId, pCmd->type);
598 return rc;
599}
600
601
602int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
603{
604 int rc;
605 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
606 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
607 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
608 AssertReturn(p3dState, VERR_INVALID_STATE);
609
610 PVMSVGA3DDXCONTEXT pDXContext;
611 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
612 AssertRCReturn(rc, rc);
613
614 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
615 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
616 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
617 RT_UNTRUSTED_VALIDATED_FENCE();
618
619 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
620 for (uint32_t i = 0; i < cSamplerId; ++i)
621 {
622 SVGA3dSamplerId const samplerId = paSamplerId[i];
623 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
624 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
625 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
626 }
627 RT_UNTRUSTED_VALIDATED_FENCE();
628
629 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
630 return rc;
631}
632
633
634#ifdef DUMP_BITMAPS
635static void vmsvga3dDXDrawDumpRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
636{
637 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
638 {
639 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
640 {
641 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]];
642 Log(("Dump RT[%u] sid = %u rtvid = %u\n", i, pRTViewEntry->sid, pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]));
643
644 SVGA3dSurfaceImageId image;
645 image.sid = pRTViewEntry->sid;
646 image.face = 0;
647 image.mipmap = 0;
648 VMSVGA3D_MAPPED_SURFACE map;
649 int rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
650 if (RT_SUCCESS(rc))
651 {
652 vmsvga3dMapWriteBmpFile(&map, "rt-");
653 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
654 }
655 else
656 Log(("Map failed %Rrc\n", rc));
657 }
658 }
659}
660#endif
661
662int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
663{
664 int rc;
665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
666 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
667 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
668 AssertReturn(p3dState, VERR_INVALID_STATE);
669
670 PVMSVGA3DDXCONTEXT pDXContext;
671 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
672 AssertRCReturn(rc, rc);
673
674 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
675#ifdef DUMP_BITMAPS
676 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
677#endif
678 return rc;
679}
680
681
682int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
683{
684 int rc;
685 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
686 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
687 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
688 AssertReturn(p3dState, VERR_INVALID_STATE);
689
690 PVMSVGA3DDXCONTEXT pDXContext;
691 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
692 AssertRCReturn(rc, rc);
693
694 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
695#ifdef DUMP_BITMAPS
696 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
697#endif
698 return rc;
699}
700
701
702int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
703{
704 int rc;
705 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
706 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
707 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
708 AssertReturn(p3dState, VERR_INVALID_STATE);
709
710 PVMSVGA3DDXCONTEXT pDXContext;
711 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
712 AssertRCReturn(rc, rc);
713
714 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
715 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
716#ifdef DUMP_BITMAPS
717 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
718#endif
719 return rc;
720}
721
722
723int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
724{
725 int rc;
726 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
727 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
728 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
729 AssertReturn(p3dState, VERR_INVALID_STATE);
730
731 PVMSVGA3DDXCONTEXT pDXContext;
732 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
733 AssertRCReturn(rc, rc);
734
735 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
736 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
737#ifdef DUMP_BITMAPS
738 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
739#endif
740 return rc;
741}
742
743
744int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
745{
746 int rc;
747 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
748 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
749 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
750 AssertReturn(p3dState, VERR_INVALID_STATE);
751
752 PVMSVGA3DDXCONTEXT pDXContext;
753 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
754 AssertRCReturn(rc, rc);
755
756 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
757#ifdef DUMP_BITMAPS
758 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
759#endif
760 return rc;
761}
762
763
764int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
765{
766 int rc;
767 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
768 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
769 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
770 AssertReturn(p3dState, VERR_INVALID_STATE);
771
772 PVMSVGA3DDXCONTEXT pDXContext;
773 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
774 AssertRCReturn(rc, rc);
775
776 ASSERT_GUEST_RETURN( elementLayoutId == SVGA3D_INVALID_ID
777 || elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
778 RT_UNTRUSTED_VALIDATED_FENCE();
779
780 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
781
782 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
783 return rc;
784}
785
786
787int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
788{
789 int rc;
790 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
791 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
792 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
793 AssertReturn(p3dState, VERR_INVALID_STATE);
794
795 PVMSVGA3DDXCONTEXT pDXContext;
796 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
797 AssertRCReturn(rc, rc);
798
799 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
800 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
801 RT_UNTRUSTED_VALIDATED_FENCE();
802
803 for (uint32_t i = 0; i < cVertexBuffer; ++i)
804 {
805 uint32_t const idxVertexBuffer = startBuffer + i;
806
807 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
808 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
809 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
810 }
811
812 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
813 return rc;
814}
815
816
817int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
818{
819 int rc;
820 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
821 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
822 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
823 AssertReturn(p3dState, VERR_INVALID_STATE);
824
825 PVMSVGA3DDXCONTEXT pDXContext;
826 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
827 AssertRCReturn(rc, rc);
828
829 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
830 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
831 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
832
833 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
834 return rc;
835}
836
837
838int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
839{
840 int rc;
841 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
842 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
843 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
844 AssertReturn(p3dState, VERR_INVALID_STATE);
845
846 PVMSVGA3DDXCONTEXT pDXContext;
847 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
848 AssertRCReturn(rc, rc);
849
850 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
851
852 pDXContext->svgaDXContext.inputAssembly.topology = topology;
853
854 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
855 return rc;
856}
857
858
859int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
860{
861 int rc;
862 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
863 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
864 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
865 AssertReturn(p3dState, VERR_INVALID_STATE);
866
867 PVMSVGA3DDXCONTEXT pDXContext;
868 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
869 AssertRCReturn(rc, rc);
870
871 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
872 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
873 ASSERT_GUEST_RETURN(cRenderTargetViewId <= SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
874 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
875 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
876 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
877 RT_UNTRUSTED_VALIDATED_FENCE();
878
879 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
880 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
881 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
882
883 /* Remember how many render target slots must be set. */
884 pDXContext->cRenderTargets = RT_MAX(pDXContext->cRenderTargets, cRenderTargetViewId);
885
886 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
887 return rc;
888}
889
890
891int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
892{
893 int rc;
894 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
895 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
896 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
897 AssertReturn(p3dState, VERR_INVALID_STATE);
898
899 PVMSVGA3DDXCONTEXT pDXContext;
900 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
901 AssertRCReturn(rc, rc);
902
903 SVGA3dBlendStateId const blendId = pCmd->blendId;
904
905 ASSERT_GUEST_RETURN( blendId == SVGA3D_INVALID_ID
906 || blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
907 RT_UNTRUSTED_VALIDATED_FENCE();
908
909 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
910 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
911 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
912 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
913
914 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
915 return rc;
916}
917
918
919int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
920{
921 int rc;
922 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
923 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
924 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
925 AssertReturn(p3dState, VERR_INVALID_STATE);
926
927 PVMSVGA3DDXCONTEXT pDXContext;
928 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
929 AssertRCReturn(rc, rc);
930
931 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
932
933 ASSERT_GUEST_RETURN( depthStencilId == SVGA3D_INVALID_ID
934 || depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
935 RT_UNTRUSTED_VALIDATED_FENCE();
936
937 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
938 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
939
940 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
941 return rc;
942}
943
944
945int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
946{
947 int rc;
948 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
949 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
950 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
951 AssertReturn(p3dState, VERR_INVALID_STATE);
952
953 PVMSVGA3DDXCONTEXT pDXContext;
954 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
955 AssertRCReturn(rc, rc);
956
957 ASSERT_GUEST_RETURN( rasterizerId == SVGA3D_INVALID_ID
958 || rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
959 RT_UNTRUSTED_VALIDATED_FENCE();
960
961 pDXContext->svgaDXContext.renderState.rasterizerStateId = rasterizerId;
962
963 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
964 return rc;
965}
966
967
968int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd)
969{
970 int rc;
971 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
972 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
973 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
974 AssertReturn(p3dState, VERR_INVALID_STATE);
975
976 PVMSVGA3DDXCONTEXT pDXContext;
977 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
978 AssertRCReturn(rc, rc);
979
980 SVGA3dQueryId const queryId = pCmd->queryId;
981
982 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
983 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
984 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_QUERYTYPE_MIN && pCmd->type < SVGA3D_QUERYTYPE_MAX, VERR_INVALID_PARAMETER);
985 RT_UNTRUSTED_VALIDATED_FENCE();
986
987 /* Cleanup the current query. */
988 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
989
990 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
991 pEntry->type = pCmd->type;
992 pEntry->state = SVGADX_QDSTATE_IDLE;
993 pEntry->flags = pCmd->flags;
994 pEntry->mobid = SVGA_ID_INVALID;
995 pEntry->offset = 0;
996
997 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext, queryId, pEntry);
998 return rc;
999}
1000
1001
1002int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd)
1003{
1004 int rc;
1005 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1006 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
1007 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1008 AssertReturn(p3dState, VERR_INVALID_STATE);
1009
1010 PVMSVGA3DDXCONTEXT pDXContext;
1011 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1012 AssertRCReturn(rc, rc);
1013
1014 SVGA3dQueryId const queryId = pCmd->queryId;
1015
1016 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1017 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1018 RT_UNTRUSTED_VALIDATED_FENCE();
1019
1020 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
1021
1022 /* Cleanup COTable entry.*/
1023 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1024 pEntry->type = SVGA3D_QUERYTYPE_INVALID;
1025 pEntry->state = SVGADX_QDSTATE_INVALID;
1026 pEntry->flags = 0;
1027 pEntry->mobid = SVGA_ID_INVALID;
1028 pEntry->offset = 0;
1029
1030 return rc;
1031}
1032
1033
1034int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, PVMSVGAMOB pMob)
1035{
1036 int rc;
1037 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1038 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1039 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1040 AssertReturn(p3dState, VERR_INVALID_STATE);
1041
1042 PVMSVGA3DDXCONTEXT pDXContext;
1043 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1044 AssertRCReturn(rc, rc);
1045
1046 SVGA3dQueryId const queryId = pCmd->queryId;
1047
1048 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1049 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1050 RT_UNTRUSTED_VALIDATED_FENCE();
1051
1052 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1053 pEntry->mobid = vmsvgaR3MobId(pMob);
1054
1055 return rc;
1056}
1057
1058
1059int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd)
1060{
1061 int rc;
1062 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1063 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1064 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1065 AssertReturn(p3dState, VERR_INVALID_STATE);
1066
1067 PVMSVGA3DDXCONTEXT pDXContext;
1068 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1069 AssertRCReturn(rc, rc);
1070
1071 SVGA3dQueryId const queryId = pCmd->queryId;
1072
1073 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1074 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1075 RT_UNTRUSTED_VALIDATED_FENCE();
1076
1077 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1078 pEntry->offset = pCmd->mobOffset;
1079
1080 return rc;
1081}
1082
1083
1084int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd)
1085{
1086 int rc;
1087 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1088 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
1089 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1090 AssertReturn(p3dState, VERR_INVALID_STATE);
1091
1092 PVMSVGA3DDXCONTEXT pDXContext;
1093 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1094 AssertRCReturn(rc, rc);
1095
1096 SVGA3dQueryId const queryId = pCmd->queryId;
1097
1098 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1099 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1100 RT_UNTRUSTED_VALIDATED_FENCE();
1101
1102 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1103 Assert(pEntry->state == SVGADX_QDSTATE_IDLE || pEntry->state == SVGADX_QDSTATE_PENDING || pEntry->state == SVGADX_QDSTATE_FINISHED);
1104 if (pEntry->state != SVGADX_QDSTATE_ACTIVE)
1105 {
1106 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext, queryId);
1107 if (RT_SUCCESS(rc))
1108 {
1109 pEntry->state = SVGADX_QDSTATE_ACTIVE;
1110
1111 /* Update the guest status of the query. */
1112 uint32_t const u32 = SVGA3D_QUERYSTATE_PENDING;
1113 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1114 }
1115 else
1116 {
1117 uint32_t const u32 = SVGA3D_QUERYSTATE_FAILED;
1118 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1119 }
1120 }
1121 return rc;
1122}
1123
1124
1125static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry *pEntry)
1126{
1127 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1128
1129 int rc;
1130 Assert(pEntry->state == SVGADX_QDSTATE_ACTIVE);
1131 if (pEntry->state == SVGADX_QDSTATE_ACTIVE)
1132 {
1133 pEntry->state = SVGADX_QDSTATE_PENDING;
1134
1135 uint32_t u32QueryState;
1136 SVGADXQueryResultUnion queryResult;
1137 uint32_t cbQuery = 0; /* Actual size of query data returned by backend. */
1138 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext, queryId, &queryResult, &cbQuery);
1139 if (RT_SUCCESS(rc))
1140 {
1141 /* Write the result after SVGA3dQueryState. */
1142 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset + sizeof(uint32_t), &queryResult, cbQuery);
1143
1144 u32QueryState = SVGA3D_QUERYSTATE_SUCCEEDED;
1145 }
1146 else
1147 u32QueryState = SVGA3D_QUERYSTATE_FAILED;
1148
1149 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32QueryState, sizeof(u32QueryState));
1150
1151 if (RT_SUCCESS(rc))
1152 pEntry->state = SVGADX_QDSTATE_FINISHED;
1153 }
1154 else
1155 rc = VERR_INVALID_STATE;
1156
1157 return rc;
1158}
1159
1160
1161int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd)
1162{
1163 int rc;
1164 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1165 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1166 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1167 AssertReturn(p3dState, VERR_INVALID_STATE);
1168
1169 PVMSVGA3DDXCONTEXT pDXContext;
1170 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1171 AssertRCReturn(rc, rc);
1172
1173 SVGA3dQueryId const queryId = pCmd->queryId;
1174
1175 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1176 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1177 RT_UNTRUSTED_VALIDATED_FENCE();
1178
1179 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1180 rc = dxEndQuery(pThisCC, pDXContext, queryId, pEntry);
1181 return rc;
1182}
1183
1184
1185int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd)
1186{
1187 int rc;
1188 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1189 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1190 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1191 AssertReturn(p3dState, VERR_INVALID_STATE);
1192
1193 PVMSVGA3DDXCONTEXT pDXContext;
1194 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1195 AssertRCReturn(rc, rc);
1196
1197 SVGA3dQueryId const queryId = pCmd->queryId;
1198
1199 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1200 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1201 RT_UNTRUSTED_VALIDATED_FENCE();
1202
1203 /* The device does not cache queries. So this is a NOP. */
1204
1205 return rc;
1206}
1207
1208
1209int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPredication const *pCmd)
1210{
1211 int rc;
1212 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1213 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1214 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1215 AssertReturn(p3dState, VERR_INVALID_STATE);
1216
1217 PVMSVGA3DDXCONTEXT pDXContext;
1218 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1219 AssertRCReturn(rc, rc);
1220
1221 SVGA3dQueryId const queryId = pCmd->queryId;
1222
1223 ASSERT_GUEST_RETURN( queryId == SVGA3D_INVALID_ID
1224 || queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1225 RT_UNTRUSTED_VALIDATED_FENCE();
1226
1227 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext, queryId, pCmd->predicateValue);
1228 return rc;
1229}
1230
1231
1232int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1233{
1234 int rc;
1235 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1236 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1237 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1238 AssertReturn(p3dState, VERR_INVALID_STATE);
1239
1240 PVMSVGA3DDXCONTEXT pDXContext;
1241 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1242 AssertRCReturn(rc, rc);
1243
1244 ASSERT_GUEST_RETURN(cSoTarget <= SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1245 RT_UNTRUSTED_VALIDATED_FENCE();
1246
1247 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1248 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1249 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1250
1251 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1252 return rc;
1253}
1254
1255
1256int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1257{
1258 int rc;
1259 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1260 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1261 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1262 AssertReturn(p3dState, VERR_INVALID_STATE);
1263
1264 PVMSVGA3DDXCONTEXT pDXContext;
1265 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1266 AssertRCReturn(rc, rc);
1267
1268 ASSERT_GUEST_RETURN(cViewport <= SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1269 RT_UNTRUSTED_VALIDATED_FENCE();
1270
1271 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1272 for (uint32_t i = 0; i < cViewport; ++i)
1273 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1274
1275 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1276 return rc;
1277}
1278
1279
1280int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1281{
1282 int rc;
1283 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1284 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1285 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1286 AssertReturn(p3dState, VERR_INVALID_STATE);
1287
1288 PVMSVGA3DDXCONTEXT pDXContext;
1289 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1290 AssertRCReturn(rc, rc);
1291
1292 ASSERT_GUEST_RETURN(cRect <= SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1293 RT_UNTRUSTED_VALIDATED_FENCE();
1294
1295 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1296 for (uint32_t i = 0; i < cRect; ++i)
1297 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1298
1299 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1300 return rc;
1301}
1302
1303
1304int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1305{
1306 int rc;
1307 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1308 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1309 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1310 AssertReturn(p3dState, VERR_INVALID_STATE);
1311
1312 PVMSVGA3DDXCONTEXT pDXContext;
1313 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1314 AssertRCReturn(rc, rc);
1315
1316 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1317
1318 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1319 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1320 RT_UNTRUSTED_VALIDATED_FENCE();
1321
1322 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1323 return rc;
1324}
1325
1326
1327int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1328{
1329 int rc;
1330 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1331 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1332 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1333 AssertReturn(p3dState, VERR_INVALID_STATE);
1334
1335 PVMSVGA3DDXCONTEXT pDXContext;
1336 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1337 AssertRCReturn(rc, rc);
1338
1339 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1340
1341 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1342 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1343 RT_UNTRUSTED_VALIDATED_FENCE();
1344
1345 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1346 return rc;
1347}
1348
1349
1350int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1351{
1352 int rc;
1353 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1354 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1355 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1356 AssertReturn(p3dState, VERR_INVALID_STATE);
1357
1358 PVMSVGA3DDXCONTEXT pDXContext;
1359 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1360 AssertRCReturn(rc, rc);
1361
1362 /** @todo Memcpy if both resources do not have the hardware resource. */
1363
1364 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1365 return rc;
1366}
1367
1368
1369int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopy const *pCmd)
1370{
1371 int rc;
1372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1375 AssertReturn(p3dState, VERR_INVALID_STATE);
1376
1377 PVMSVGA3DDXCONTEXT pDXContext;
1378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1379 AssertRCReturn(rc, rc);
1380
1381 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext, pCmd->dstSid, pCmd->srcSid);
1382 return rc;
1383}
1384
1385
1386int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPresentBlt const *pCmd)
1387{
1388 int rc;
1389 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1390 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1391 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1392 AssertReturn(p3dState, VERR_INVALID_STATE);
1393
1394 PVMSVGA3DDXCONTEXT pDXContext;
1395 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1396 AssertRCReturn(rc, rc);
1397
1398 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext,
1399 pCmd->dstSid, pCmd->destSubResource, &pCmd->boxDest,
1400 pCmd->srcSid, pCmd->srcSubResource, &pCmd->boxSrc, pCmd->mode);
1401 return rc;
1402}
1403
1404
1405int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1406{
1407 int rc;
1408 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1409 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1410 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1411 AssertReturn(p3dState, VERR_INVALID_STATE);
1412
1413 PVMSVGA3DDXCONTEXT pDXContext;
1414 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1415 AssertRCReturn(rc, rc);
1416
1417 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1418
1419 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1420 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1421 RT_UNTRUSTED_VALIDATED_FENCE();
1422
1423 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1424 return rc;
1425}
1426
1427
1428int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1429{
1430 int rc;
1431 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1432 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1433 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1434 AssertReturn(p3dState, VERR_INVALID_STATE);
1435
1436 PVMSVGA3DDXCONTEXT pDXContext;
1437 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1438 AssertRCReturn(rc, rc);
1439
1440 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1441
1442 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1443 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1444 RT_UNTRUSTED_VALIDATED_FENCE();
1445
1446 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1447 pEntry->sid = pCmd->sid;
1448 pEntry->format = pCmd->format;
1449 pEntry->resourceDimension = pCmd->resourceDimension;
1450 pEntry->desc = pCmd->desc;
1451
1452 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1453 return rc;
1454}
1455
1456
1457int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1458{
1459 int rc;
1460 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1461 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1462 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1463 AssertReturn(p3dState, VERR_INVALID_STATE);
1464
1465 PVMSVGA3DDXCONTEXT pDXContext;
1466 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1467 AssertRCReturn(rc, rc);
1468
1469 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1470
1471 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1472 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1473 RT_UNTRUSTED_VALIDATED_FENCE();
1474
1475 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1476 RT_ZERO(*pEntry);
1477
1478 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1479 return rc;
1480}
1481
1482
1483int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1484{
1485 int rc;
1486 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1487 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1488 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1489 AssertReturn(p3dState, VERR_INVALID_STATE);
1490
1491 PVMSVGA3DDXCONTEXT pDXContext;
1492 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1493 AssertRCReturn(rc, rc);
1494
1495 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1496
1497 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1498 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1499 RT_UNTRUSTED_VALIDATED_FENCE();
1500
1501 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1502 pEntry->sid = pCmd->sid;
1503 pEntry->format = pCmd->format;
1504 pEntry->resourceDimension = pCmd->resourceDimension;
1505 pEntry->desc = pCmd->desc;
1506
1507 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1508 return rc;
1509}
1510
1511
1512int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1513{
1514 int rc;
1515 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1516 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1517 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1518 AssertReturn(p3dState, VERR_INVALID_STATE);
1519
1520 PVMSVGA3DDXCONTEXT pDXContext;
1521 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1522 AssertRCReturn(rc, rc);
1523
1524 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1525
1526 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1527 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1528 RT_UNTRUSTED_VALIDATED_FENCE();
1529
1530 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1531 RT_ZERO(*pEntry);
1532
1533 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1534 {
1535 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1536 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1537 }
1538
1539 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1540 return rc;
1541}
1542
1543
1544int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1545{
1546 int rc;
1547 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1548 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1549 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1550 AssertReturn(p3dState, VERR_INVALID_STATE);
1551
1552 PVMSVGA3DDXCONTEXT pDXContext;
1553 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1554 AssertRCReturn(rc, rc);
1555
1556 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1557
1558 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1559 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1560 RT_UNTRUSTED_VALIDATED_FENCE();
1561
1562 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1563 pEntry->sid = pCmd->sid;
1564 pEntry->format = pCmd->format;
1565 pEntry->resourceDimension = pCmd->resourceDimension;
1566 pEntry->mipSlice = pCmd->mipSlice;
1567 pEntry->firstArraySlice = pCmd->firstArraySlice;
1568 pEntry->arraySize = pCmd->arraySize;
1569 pEntry->flags = pCmd->flags;
1570
1571 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1572 return rc;
1573}
1574
1575
1576int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1577{
1578 int rc;
1579 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1580 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1581 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1582 AssertReturn(p3dState, VERR_INVALID_STATE);
1583
1584 PVMSVGA3DDXCONTEXT pDXContext;
1585 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1586 AssertRCReturn(rc, rc);
1587
1588 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1589
1590 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1591 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1592 RT_UNTRUSTED_VALIDATED_FENCE();
1593
1594 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1595 RT_ZERO(*pEntry);
1596
1597 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1598 return rc;
1599}
1600
1601
1602int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1603{
1604 int rc;
1605 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1606 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1607 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1608 AssertReturn(p3dState, VERR_INVALID_STATE);
1609
1610 PVMSVGA3DDXCONTEXT pDXContext;
1611 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1612 AssertRCReturn(rc, rc);
1613
1614 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1615 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1616 RT_UNTRUSTED_VALIDATED_FENCE();
1617
1618 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1619 pEntry->elid = elementLayoutId;
1620 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1621 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1622
1623#ifdef LOG_ENABLED
1624 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1625 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1626 {
1627 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1628 i,
1629 pEntry->descs[i].inputSlot,
1630 pEntry->descs[i].alignedByteOffset,
1631 pEntry->descs[i].format,
1632 pEntry->descs[i].inputSlotClass,
1633 pEntry->descs[i].instanceDataStepRate,
1634 pEntry->descs[i].inputRegister
1635 ));
1636 }
1637#endif
1638
1639 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1640 return rc;
1641}
1642
1643
1644int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd)
1645{
1646 int rc;
1647 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1648 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1649 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1650 AssertReturn(p3dState, VERR_INVALID_STATE);
1651
1652 PVMSVGA3DDXCONTEXT pDXContext;
1653 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1654 AssertRCReturn(rc, rc);
1655
1656 SVGA3dElementLayoutId const elementLayoutId = pCmd->elementLayoutId;
1657
1658 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1659 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1660 RT_UNTRUSTED_VALIDATED_FENCE();
1661
1662 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext, elementLayoutId);
1663
1664 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1665 RT_ZERO(*pEntry);
1666 pEntry->elid = SVGA3D_INVALID_ID;
1667
1668 return rc;
1669}
1670
1671
1672int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1673{
1674 int rc;
1675 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1676 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1677 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1678 AssertReturn(p3dState, VERR_INVALID_STATE);
1679
1680 PVMSVGA3DDXCONTEXT pDXContext;
1681 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1682 AssertRCReturn(rc, rc);
1683
1684 SVGA3dBlendStateId const blendId = pCmd->blendId;
1685
1686 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1687 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1688 RT_UNTRUSTED_VALIDATED_FENCE();
1689
1690 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1691 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1692 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1693 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1694
1695 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1696 return rc;
1697}
1698
1699
1700int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd)
1701{
1702 int rc;
1703 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1704 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1705 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1706 AssertReturn(p3dState, VERR_INVALID_STATE);
1707
1708 PVMSVGA3DDXCONTEXT pDXContext;
1709 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1710 AssertRCReturn(rc, rc);
1711
1712 SVGA3dBlendStateId const blendId = pCmd->blendId;
1713
1714 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1715 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1716 RT_UNTRUSTED_VALIDATED_FENCE();
1717
1718 pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext, blendId);
1719
1720 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1721 RT_ZERO(*pEntry);
1722
1723 return rc;
1724}
1725
1726
1727int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1728{
1729 int rc;
1730 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1731 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1732 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1733 AssertReturn(p3dState, VERR_INVALID_STATE);
1734
1735 PVMSVGA3DDXCONTEXT pDXContext;
1736 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1737 AssertRCReturn(rc, rc);
1738
1739 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1740
1741 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1742 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1743 RT_UNTRUSTED_VALIDATED_FENCE();
1744
1745 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1746 pEntry->depthEnable = pCmd->depthEnable;
1747 pEntry->depthWriteMask = pCmd->depthWriteMask;
1748 pEntry->depthFunc = pCmd->depthFunc;
1749 pEntry->stencilEnable = pCmd->stencilEnable;
1750 pEntry->frontEnable = pCmd->frontEnable;
1751 pEntry->backEnable = pCmd->backEnable;
1752 pEntry->stencilReadMask = pCmd->stencilReadMask;
1753 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1754
1755 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1756 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1757 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1758 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1759
1760 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1761 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1762 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1763 pEntry->backStencilFunc = pCmd->backStencilFunc;
1764
1765 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1766 return rc;
1767}
1768
1769
1770int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd)
1771{
1772 int rc;
1773 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1774 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1775 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1776 AssertReturn(p3dState, VERR_INVALID_STATE);
1777
1778 PVMSVGA3DDXCONTEXT pDXContext;
1779 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1780 AssertRCReturn(rc, rc);
1781
1782 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1783
1784 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1785 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1786 RT_UNTRUSTED_VALIDATED_FENCE();
1787
1788 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext, depthStencilId);
1789
1790 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1791 RT_ZERO(*pEntry);
1792
1793 return rc;
1794}
1795
1796
1797int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1798{
1799 int rc;
1800 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1801 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1802 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1803 AssertReturn(p3dState, VERR_INVALID_STATE);
1804
1805 PVMSVGA3DDXCONTEXT pDXContext;
1806 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1807 AssertRCReturn(rc, rc);
1808
1809 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1810
1811 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1812 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1813 RT_UNTRUSTED_VALIDATED_FENCE();
1814
1815 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1816 pEntry->fillMode = pCmd->fillMode;
1817 pEntry->cullMode = pCmd->cullMode;
1818 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1819 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1820 pEntry->depthBias = pCmd->depthBias;
1821 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1822 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1823 pEntry->depthClipEnable = pCmd->depthClipEnable;
1824 pEntry->scissorEnable = pCmd->scissorEnable;
1825 pEntry->multisampleEnable = pCmd->multisampleEnable;
1826 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1827 pEntry->lineWidth = pCmd->lineWidth;
1828 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1829 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1830 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1831 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1832 RT_ZERO(pEntry->mustBeZero);
1833
1834 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1835 return rc;
1836}
1837
1838
1839int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd)
1840{
1841 int rc;
1842 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1843 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1844 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1845 AssertReturn(p3dState, VERR_INVALID_STATE);
1846
1847 PVMSVGA3DDXCONTEXT pDXContext;
1848 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1849 AssertRCReturn(rc, rc);
1850
1851 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1852
1853 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1854 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1855 RT_UNTRUSTED_VALIDATED_FENCE();
1856
1857 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext, rasterizerId);
1858
1859 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1860 RT_ZERO(*pEntry);
1861
1862 return rc;
1863}
1864
1865
1866int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1867{
1868 int rc;
1869 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1870 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1871 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1872 AssertReturn(p3dState, VERR_INVALID_STATE);
1873
1874 PVMSVGA3DDXCONTEXT pDXContext;
1875 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1876 AssertRCReturn(rc, rc);
1877
1878 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1879
1880 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1881 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1882 RT_UNTRUSTED_VALIDATED_FENCE();
1883
1884 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1885 pEntry->filter = pCmd->filter;
1886 pEntry->addressU = pCmd->addressU;
1887 pEntry->addressV = pCmd->addressV;
1888 pEntry->addressW = pCmd->addressW;
1889 pEntry->mipLODBias = pCmd->mipLODBias;
1890 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1891 pEntry->comparisonFunc = pCmd->comparisonFunc;
1892 pEntry->borderColor = pCmd->borderColor;
1893 pEntry->minLOD = pCmd->minLOD;
1894 pEntry->maxLOD = pCmd->maxLOD;
1895
1896 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1897 return rc;
1898}
1899
1900
1901int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd)
1902{
1903 int rc;
1904 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1905 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1906 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1907 AssertReturn(p3dState, VERR_INVALID_STATE);
1908
1909 PVMSVGA3DDXCONTEXT pDXContext;
1910 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1911 AssertRCReturn(rc, rc);
1912
1913 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1914
1915 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1916 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1917 RT_UNTRUSTED_VALIDATED_FENCE();
1918
1919 pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext, samplerId);
1920
1921 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1922 RT_ZERO(*pEntry);
1923
1924 return rc;
1925}
1926
1927
1928int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1929{
1930 int rc;
1931 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1932 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1933 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1934 AssertReturn(p3dState, VERR_INVALID_STATE);
1935
1936 PVMSVGA3DDXCONTEXT pDXContext;
1937 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1938 AssertRCReturn(rc, rc);
1939
1940 SVGA3dShaderId const shaderId = pCmd->shaderId;
1941
1942 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1943 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1944 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1945 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1946 RT_UNTRUSTED_VALIDATED_FENCE();
1947
1948 /* Cleanup the current shader. */
1949 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1950
1951 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1952 pEntry->type = pCmd->type;
1953 pEntry->sizeInBytes = pCmd->sizeInBytes;
1954 pEntry->offsetInBytes = 0;
1955 pEntry->mobid = SVGA_ID_INVALID;
1956
1957 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1958 return rc;
1959}
1960
1961
1962int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1963{
1964 int rc;
1965 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1966 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1967 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1968 AssertReturn(p3dState, VERR_INVALID_STATE);
1969
1970 PVMSVGA3DDXCONTEXT pDXContext;
1971 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1972 AssertRCReturn(rc, rc);
1973
1974 SVGA3dShaderId const shaderId = pCmd->shaderId;
1975
1976 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1977 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1978 RT_UNTRUSTED_VALIDATED_FENCE();
1979
1980 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1981
1982 /* Cleanup COTable entries.*/
1983 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1984 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1985 pEntry->sizeInBytes = 0;
1986 pEntry->offsetInBytes = 0;
1987 pEntry->mobid = SVGA_ID_INVALID;
1988
1989 /** @todo Destroy shaders on context and backend deletion. */
1990 return rc;
1991}
1992
1993
1994static int dxBindShader(DXShaderInfo *pShaderInfo, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1995{
1996 /* How many bytes the MOB can hold. */
1997 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1998 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1999 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
2000
2001 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, pShaderInfo);
2002 if (RT_SUCCESS(rc))
2003 {
2004 /* Get the length of the shader bytecode. */
2005 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
2006 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
2007 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
2008
2009 /* Check if the shader contains SVGA3dDXSignatureHeader and signature entries after the bytecode.
2010 * If they are not there (Linux guest driver does not provide them), then it is fine
2011 * and the signatures generated by DXShaderParse will be used.
2012 */
2013 uint32_t cbSignaturesAvail = pEntry->sizeInBytes - cToken * 4; /* How many bytes for signatures are available. */
2014 if (cbSignaturesAvail >= sizeof(SVGA3dDXSignatureHeader))
2015 {
2016 cbSignaturesAvail -= sizeof(SVGA3dDXSignatureHeader);
2017
2018 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + cToken * 4);
2019 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
2020 {
2021 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShaderInfo->aInputSignature)
2022 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShaderInfo->aOutputSignature)
2023 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShaderInfo->aPatchConstantSignature),
2024 VERR_INVALID_PARAMETER);
2025
2026 uint32_t const cSignature = pSignatureHeader->numInputSignatures
2027 + pSignatureHeader->numOutputSignatures
2028 + pSignatureHeader->numPatchConstantSignatures;
2029 uint32_t const cbSignature = cSignature * sizeof(SVGA3dDXSignatureEntry);
2030 ASSERT_GUEST_RETURN(cbSignaturesAvail >= cbSignature, VERR_INVALID_PARAMETER);
2031
2032 /* The shader does not need guesswork. */
2033 pShaderInfo->fGuestSignatures = true;
2034
2035 /* Copy to DXShaderInfo. */
2036 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
2037 pShaderInfo->cInputSignature = pSignatureHeader->numInputSignatures;
2038 memcpy(pShaderInfo->aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
2039
2040 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
2041 pShaderInfo->cOutputSignature = pSignatureHeader->numOutputSignatures;
2042 memcpy(pShaderInfo->aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
2043
2044 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
2045 pShaderInfo->cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
2046 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
2047
2048 DXShaderGenerateSemantics(pShaderInfo);
2049 }
2050 }
2051 }
2052
2053 return rc;
2054}
2055
2056
2057int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
2058{
2059 int rc;
2060 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2061 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
2062 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2063 AssertReturn(p3dState, VERR_INVALID_STATE);
2064
2065 PVMSVGA3DDXCONTEXT pDXContext;
2066 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2067 AssertRCReturn(rc, rc);
2068
2069 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
2070 RT_UNTRUSTED_VALIDATED_FENCE();
2071
2072 /* 'type' and 'sizeInBytes' has been already initialized by DefineShader. */
2073 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
2074 //pEntry->type;
2075 //pEntry->sizeInBytes;
2076 pEntry->offsetInBytes = pCmd->offsetInBytes;
2077 pEntry->mobid = vmsvgaR3MobId(pMob);
2078
2079 if (pMob)
2080 {
2081 /* Bind a mob to the shader. */
2082
2083 /* Create a memory pointer for the MOB, which is accessible by host. */
2084 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
2085 if (RT_SUCCESS(rc))
2086 {
2087 /* Get pointer to the shader bytecode. This will also verify the offset. */
2088 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
2089 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
2090
2091 /* Get the shader and optional signatures from the MOB. */
2092 DXShaderInfo shaderInfo;
2093 RT_ZERO(shaderInfo);
2094 rc = dxBindShader(&shaderInfo, pMob, pEntry, pvShaderBytecode);
2095 if (RT_SUCCESS(rc))
2096 {
2097 /* pfnDXBindShader makes a copy of shaderInfo on success. */
2098 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pCmd->shid, &shaderInfo);
2099 }
2100 AssertRC(rc);
2101
2102 /** @todo Backing store is not needed anymore in any case? */
2103 if (RT_FAILURE(rc))
2104 {
2105 DXShaderFree(&shaderInfo);
2106
2107 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2108 }
2109 }
2110 }
2111 else
2112 {
2113 /* Unbind. */
2114 /** @todo Nothing to do here but release the MOB? */
2115 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2116 }
2117
2118 return rc;
2119}
2120
2121
2122int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
2123{
2124 int rc;
2125 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2126 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
2127 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2128 AssertReturn(p3dState, VERR_INVALID_STATE);
2129
2130 PVMSVGA3DDXCONTEXT pDXContext;
2131 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2132 AssertRCReturn(rc, rc);
2133
2134 SVGA3dStreamOutputId const soid = pCmd->soid;
2135
2136 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2137 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2138 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
2139 RT_UNTRUSTED_VALIDATED_FENCE();
2140
2141 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2142 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
2143 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
2144 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
2145 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
2146 pEntry->numOutputStreamStrides = 0;
2147 pEntry->mobid = SVGA_ID_INVALID;
2148 pEntry->offsetInBytes = 0;
2149 pEntry->usesMob = 0;
2150 pEntry->pad0 = 0;
2151 pEntry->pad1 = 0;
2152 RT_ZERO(pEntry->pad2);
2153
2154 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
2155 return rc;
2156}
2157
2158
2159int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
2160{
2161 int rc;
2162 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2163 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
2164 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2165 AssertReturn(p3dState, VERR_INVALID_STATE);
2166
2167 PVMSVGA3DDXCONTEXT pDXContext;
2168 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2169 AssertRCReturn(rc, rc);
2170
2171 SVGA3dStreamOutputId const soid = pCmd->soid;
2172
2173 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2174 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2175 RT_UNTRUSTED_VALIDATED_FENCE();
2176
2177 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
2178
2179 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2180 RT_ZERO(*pEntry);
2181 pEntry->mobid = SVGA_ID_INVALID;
2182
2183 return rc;
2184}
2185
2186
2187int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
2188{
2189 int rc;
2190 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2191 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
2192 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2193 AssertReturn(p3dState, VERR_INVALID_STATE);
2194
2195 PVMSVGA3DDXCONTEXT pDXContext;
2196 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2197 AssertRCReturn(rc, rc);
2198
2199 SVGA3dStreamOutputId const soid = pCmd->soid;
2200
2201 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
2202 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2203 RT_UNTRUSTED_VALIDATED_FENCE();
2204
2205 pDXContext->svgaDXContext.streamOut.soid = soid;
2206
2207 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2208 return rc;
2209}
2210
2211
2212static int dxSetOrGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGAMOB pMob,
2213 SVGACOTableType type, uint32_t validSizeInBytes, bool fGrow)
2214{
2215 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2216 int rc = VINF_SUCCESS;
2217
2218 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2219 RT_UNTRUSTED_VALIDATED_FENCE();
2220
2221 uint32_t cbCOT;
2222 if (pMob)
2223 {
2224 /* Bind a new mob to the COTable. */
2225 cbCOT = vmsvgaR3MobSize(pMob);
2226
2227 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2228 RT_UNTRUSTED_VALIDATED_FENCE();
2229
2230 /* Create a memory pointer, which is accessible by host. */
2231 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2232 }
2233 else
2234 {
2235 /* Unbind. */
2236 validSizeInBytes = 0;
2237 cbCOT = 0;
2238 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[type]);
2239 }
2240
2241 uint32_t cEntries = 0;
2242 uint32_t cValidEntries = 0;
2243 if (RT_SUCCESS(rc))
2244 {
2245 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2246 {
2247 sizeof(SVGACOTableDXRTViewEntry),
2248 sizeof(SVGACOTableDXDSViewEntry),
2249 sizeof(SVGACOTableDXSRViewEntry),
2250 sizeof(SVGACOTableDXElementLayoutEntry),
2251 sizeof(SVGACOTableDXBlendStateEntry),
2252 sizeof(SVGACOTableDXDepthStencilEntry),
2253 sizeof(SVGACOTableDXRasterizerStateEntry),
2254 sizeof(SVGACOTableDXSamplerEntry),
2255 sizeof(SVGACOTableDXStreamOutputEntry),
2256 sizeof(SVGACOTableDXQueryEntry),
2257 sizeof(SVGACOTableDXShaderEntry),
2258 sizeof(SVGACOTableDXUAViewEntry),
2259 };
2260
2261 cEntries = cbCOT / s_acbEntry[type];
2262 cValidEntries = validSizeInBytes / s_acbEntry[type];
2263 }
2264
2265 if (RT_SUCCESS(rc))
2266 {
2267 if ( fGrow
2268 && pDXContext->aCOTMobs[type]
2269 && cValidEntries)
2270 {
2271 /* Copy entries from the current mob to the new mob. */
2272 void const *pvSrc = vmsvgaR3MobBackingStorePtr(pDXContext->aCOTMobs[type], 0);
2273 void *pvDst = vmsvgaR3MobBackingStorePtr(pMob, 0);
2274 if (pvSrc && pvDst)
2275 memcpy(pvDst, pvSrc, validSizeInBytes);
2276 else
2277 AssertFailedStmt(rc = VERR_INVALID_STATE);
2278 }
2279 }
2280
2281 if (RT_SUCCESS(rc))
2282 {
2283 pDXContext->aCOTMobs[type] = pMob;
2284
2285 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2286 switch (type)
2287 {
2288 case SVGA_COTABLE_RTVIEW:
2289 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2290 pDXContext->cot.cRTView = cEntries;
2291 break;
2292 case SVGA_COTABLE_DSVIEW:
2293 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2294 pDXContext->cot.cDSView = cEntries;
2295 break;
2296 case SVGA_COTABLE_SRVIEW:
2297 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2298 pDXContext->cot.cSRView = cEntries;
2299 break;
2300 case SVGA_COTABLE_ELEMENTLAYOUT:
2301 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2302 pDXContext->cot.cElementLayout = cEntries;
2303 break;
2304 case SVGA_COTABLE_BLENDSTATE:
2305 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2306 pDXContext->cot.cBlendState = cEntries;
2307 break;
2308 case SVGA_COTABLE_DEPTHSTENCIL:
2309 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2310 pDXContext->cot.cDepthStencil = cEntries;
2311 break;
2312 case SVGA_COTABLE_RASTERIZERSTATE:
2313 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2314 pDXContext->cot.cRasterizerState = cEntries;
2315 break;
2316 case SVGA_COTABLE_SAMPLER:
2317 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2318 pDXContext->cot.cSampler = cEntries;
2319 break;
2320 case SVGA_COTABLE_STREAMOUTPUT:
2321 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2322 pDXContext->cot.cStreamOutput = cEntries;
2323 break;
2324 case SVGA_COTABLE_DXQUERY:
2325 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2326 pDXContext->cot.cQuery = cEntries;
2327 break;
2328 case SVGA_COTABLE_DXSHADER:
2329 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2330 pDXContext->cot.cShader = cEntries;
2331 break;
2332 case SVGA_COTABLE_UAVIEW:
2333 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2334 pDXContext->cot.cUAView = cEntries;
2335 break;
2336 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2337 }
2338 }
2339 else
2340 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2341
2342 /* Notify the backend. */
2343 if (RT_SUCCESS(rc))
2344 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, type, cValidEntries);
2345
2346 return rc;
2347}
2348
2349
2350int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2351{
2352 int rc;
2353 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2354 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2355 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2356 AssertReturn(p3dState, VERR_INVALID_STATE);
2357
2358 PVMSVGA3DDXCONTEXT pDXContext;
2359 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2360 AssertRCReturn(rc, rc);
2361 RT_UNTRUSTED_VALIDATED_FENCE();
2362
2363 return dxSetOrGrowCOTable(pThisCC, pDXContext, pMob, pCmd->type, pCmd->validSizeInBytes, false);
2364}
2365
2366
2367int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2368{
2369 int rc;
2370 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2371 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2372 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2373 AssertReturn(p3dState, VERR_INVALID_STATE);
2374
2375 PVMSVGA3DDXCONTEXT pDXContext;
2376 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2377 AssertRCReturn(rc, rc);
2378 RT_UNTRUSTED_VALIDATED_FENCE();
2379
2380 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2381 RT_UNTRUSTED_VALIDATED_FENCE();
2382
2383 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2384 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2385 return rc;
2386}
2387
2388
2389int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2390{
2391 int rc;
2392 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2393 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2394 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2395 AssertReturn(p3dState, VERR_INVALID_STATE);
2396
2397 PVMSVGA3DDXCONTEXT pDXContext;
2398 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2399 AssertRCReturn(rc, rc);
2400
2401 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2402 return rc;
2403}
2404
2405
2406int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2407{
2408 int rc;
2409 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2410 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2411 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2412 AssertReturn(p3dState, VERR_INVALID_STATE);
2413
2414 PVMSVGA3DDXCONTEXT pDXContext;
2415 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2416 AssertRCReturn(rc, rc);
2417
2418 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2419 return rc;
2420}
2421
2422
2423int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2424{
2425 int rc;
2426 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2427 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2428 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2429 AssertReturn(p3dState, VERR_INVALID_STATE);
2430
2431 PVMSVGA3DDXCONTEXT pDXContext;
2432 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2433 AssertRCReturn(rc, rc);
2434
2435 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2436 return rc;
2437}
2438
2439
2440int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd)
2441{
2442 int rc;
2443 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2444 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2445 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2446 AssertReturn(p3dState, VERR_INVALID_STATE);
2447
2448 RT_NOREF(idDXContext);
2449
2450 PVMSVGA3DDXCONTEXT pDXContext;
2451 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2452 AssertRCReturn(rc, rc);
2453
2454 for (uint32_t i = 0; i < pDXContext->cot.cQuery; ++i)
2455 {
2456 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[i];
2457 if (pEntry->type != SVGA3D_QUERYTYPE_INVALID)
2458 pEntry->mobid = pCmd->mobid;
2459 }
2460
2461 return rc;
2462}
2463
2464
2465int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd)
2466{
2467 int rc;
2468 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2469 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2470 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2471 AssertReturn(p3dState, VERR_INVALID_STATE);
2472
2473 RT_NOREF(idDXContext);
2474
2475 PVMSVGA3DDXCONTEXT pDXContext;
2476 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2477 AssertRCReturn(rc, rc);
2478
2479 /* "Read back cached states from the device if they exist."
2480 * The device does not cache queries. So this is a NOP.
2481 */
2482 RT_NOREF(pDXContext);
2483
2484 return rc;
2485}
2486
2487
2488int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2489{
2490 int rc;
2491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2492 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2493 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2494 AssertReturn(p3dState, VERR_INVALID_STATE);
2495
2496 PVMSVGA3DDXCONTEXT pDXContext;
2497 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2498 AssertRCReturn(rc, rc);
2499
2500 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2501 return rc;
2502}
2503
2504
2505int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2506{
2507 int rc;
2508 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2509 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2510 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2511 AssertReturn(p3dState, VERR_INVALID_STATE);
2512
2513 PVMSVGA3DDXCONTEXT pDXContext;
2514 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2515 AssertRCReturn(rc, rc);
2516
2517 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2518 return rc;
2519}
2520
2521
2522int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2523{
2524 int rc;
2525 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2526 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2527 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2528 AssertReturn(p3dState, VERR_INVALID_STATE);
2529
2530 PVMSVGA3DDXCONTEXT pDXContext;
2531 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2532 AssertRCReturn(rc, rc);
2533
2534 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2535 return rc;
2536}
2537
2538
2539int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2540{
2541 int rc;
2542 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2543 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2544 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2545 AssertReturn(p3dState, VERR_INVALID_STATE);
2546
2547 PVMSVGA3DDXCONTEXT pDXContext;
2548 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2549 AssertRCReturn(rc, rc);
2550
2551 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2552 return rc;
2553}
2554
2555
2556int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2557{
2558 int rc;
2559 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2560 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2561 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2562 AssertReturn(p3dState, VERR_INVALID_STATE);
2563
2564 PVMSVGA3DDXCONTEXT pDXContext;
2565 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2566 AssertRCReturn(rc, rc);
2567
2568 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2569 return rc;
2570}
2571
2572
2573int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2574{
2575 int rc;
2576 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2577 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2578 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2579 AssertReturn(p3dState, VERR_INVALID_STATE);
2580
2581 PVMSVGA3DDXCONTEXT pDXContext;
2582 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2583 AssertRCReturn(rc, rc);
2584
2585 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2586 return rc;
2587}
2588
2589
2590int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2591{
2592 int rc;
2593 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2594 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2595 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2596 AssertReturn(p3dState, VERR_INVALID_STATE);
2597
2598 PVMSVGA3DDXCONTEXT pDXContext;
2599 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2600 AssertRCReturn(rc, rc);
2601
2602 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2603 return rc;
2604}
2605
2606
2607int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2608{
2609 int rc;
2610 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2611 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2612 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2613 AssertReturn(p3dState, VERR_INVALID_STATE);
2614
2615 PVMSVGA3DDXCONTEXT pDXContext;
2616 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2617 AssertRCReturn(rc, rc);
2618
2619 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2620 return rc;
2621}
2622
2623
2624int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2625{
2626 int rc;
2627 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2628 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2629 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2630 AssertReturn(p3dState, VERR_INVALID_STATE);
2631
2632 PVMSVGA3DDXCONTEXT pDXContext;
2633 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2634 AssertRCReturn(rc, rc);
2635
2636 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2637 return rc;
2638}
2639
2640
2641int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2642{
2643 int rc;
2644 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2645 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2646 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2647 AssertReturn(p3dState, VERR_INVALID_STATE);
2648
2649 PVMSVGA3DDXCONTEXT pDXContext;
2650 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2651 AssertRCReturn(rc, rc);
2652
2653 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2654 return rc;
2655}
2656
2657
2658int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2659{
2660 int rc;
2661 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2662 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2663 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2664 AssertReturn(p3dState, VERR_INVALID_STATE);
2665
2666 PVMSVGA3DDXCONTEXT pDXContext;
2667 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2668 AssertRCReturn(rc, rc);
2669
2670 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2671 return rc;
2672}
2673
2674
2675int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXGrowCOTable const *pCmd)
2676{
2677 int rc;
2678 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2679 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2680 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2681 AssertReturn(p3dState, VERR_INVALID_STATE);
2682
2683 PVMSVGA3DDXCONTEXT pDXContext;
2684 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2685 AssertRCReturn(rc, rc);
2686
2687 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
2688 return dxSetOrGrowCOTable(pThisCC, pDXContext, pMob, pCmd->type, pCmd->validSizeInBytes, true);
2689}
2690
2691
2692int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2693{
2694 int rc;
2695 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2696 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2697 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2698 AssertReturn(p3dState, VERR_INVALID_STATE);
2699
2700 PVMSVGA3DDXCONTEXT pDXContext;
2701 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2702 AssertRCReturn(rc, rc);
2703
2704 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2705 return rc;
2706}
2707
2708
2709int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2710{
2711 int rc;
2712 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2713 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2714 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2715 AssertReturn(p3dState, VERR_INVALID_STATE);
2716
2717 PVMSVGA3DDXCONTEXT pDXContext;
2718 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2719 AssertRCReturn(rc, rc);
2720
2721 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2722 return rc;
2723}
2724
2725
2726int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2727{
2728 int rc;
2729 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2730 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2731 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2732 AssertReturn(p3dState, VERR_INVALID_STATE);
2733
2734 PVMSVGA3DDXCONTEXT pDXContext;
2735 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2736 AssertRCReturn(rc, rc);
2737
2738 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2739 return rc;
2740}
2741
2742
2743int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2744{
2745 int rc;
2746 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2747 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2748 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2749 AssertReturn(p3dState, VERR_INVALID_STATE);
2750
2751 PVMSVGA3DDXCONTEXT pDXContext;
2752 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2753 AssertRCReturn(rc, rc);
2754
2755 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2756 return rc;
2757}
2758
2759
2760int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2761{
2762 int rc;
2763 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2764 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2765 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2766 AssertReturn(p3dState, VERR_INVALID_STATE);
2767
2768 PVMSVGA3DDXCONTEXT pDXContext;
2769 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2770 AssertRCReturn(rc, rc);
2771
2772 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2773 return rc;
2774}
2775
2776
2777int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2778{
2779 int rc;
2780 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2781 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2782 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2783 AssertReturn(p3dState, VERR_INVALID_STATE);
2784
2785 PVMSVGA3DDXCONTEXT pDXContext;
2786 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2787 AssertRCReturn(rc, rc);
2788
2789 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2790 return rc;
2791}
2792
2793
2794int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineUAView const *pCmd)
2795{
2796 int rc;
2797 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2798 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2799 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2800 AssertReturn(p3dState, VERR_INVALID_STATE);
2801
2802 PVMSVGA3DDXCONTEXT pDXContext;
2803 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2804 AssertRCReturn(rc, rc);
2805
2806 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2807
2808 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2809 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2810 RT_UNTRUSTED_VALIDATED_FENCE();
2811
2812 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
2813 pEntry->sid = pCmd->sid;
2814 pEntry->format = pCmd->format;
2815 pEntry->resourceDimension = pCmd->resourceDimension;
2816 pEntry->desc = pCmd->desc;
2817 pEntry->structureCount = 0;
2818
2819 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext, uaViewId, pEntry);
2820 return rc;
2821}
2822
2823
2824int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyUAView const *pCmd)
2825{
2826 int rc;
2827 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2828 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2829 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2830 AssertReturn(p3dState, VERR_INVALID_STATE);
2831
2832 PVMSVGA3DDXCONTEXT pDXContext;
2833 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2834 AssertRCReturn(rc, rc);
2835
2836 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2837
2838 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2839 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2840 RT_UNTRUSTED_VALIDATED_FENCE();
2841
2842 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
2843 RT_ZERO(*pEntry);
2844
2845 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext, uaViewId);
2846 return rc;
2847}
2848
2849
2850int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewUint const *pCmd)
2851{
2852 int rc;
2853 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2854 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2855 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2856 AssertReturn(p3dState, VERR_INVALID_STATE);
2857
2858 PVMSVGA3DDXCONTEXT pDXContext;
2859 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2860 AssertRCReturn(rc, rc);
2861
2862 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2863
2864 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2865 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2866 RT_UNTRUSTED_VALIDATED_FENCE();
2867
2868 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext, uaViewId, pCmd->value.value);
2869 return rc;
2870}
2871
2872
2873int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewFloat const *pCmd)
2874{
2875 int rc;
2876 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2877 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2878 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2879 AssertReturn(p3dState, VERR_INVALID_STATE);
2880
2881 PVMSVGA3DDXCONTEXT pDXContext;
2882 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2883 AssertRCReturn(rc, rc);
2884
2885 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2886
2887 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2888 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2889 RT_UNTRUSTED_VALIDATED_FENCE();
2890
2891 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext, uaViewId, pCmd->value.value);
2892 return rc;
2893}
2894
2895
2896int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCopyStructureCount const *pCmd)
2897{
2898 int rc;
2899 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2900 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2901 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2902 AssertReturn(p3dState, VERR_INVALID_STATE);
2903
2904 PVMSVGA3DDXCONTEXT pDXContext;
2905 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2906 AssertRCReturn(rc, rc);
2907
2908 SVGA3dUAViewId const uaViewId = pCmd->srcUAViewId;
2909
2910 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2911 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2912 RT_UNTRUSTED_VALIDATED_FENCE();
2913
2914 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext, uaViewId, pCmd->destSid, pCmd->destByteOffset);
2915 return rc;
2916}
2917
2918
2919int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetUAViews const *pCmd, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
2920{
2921 int rc;
2922 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2923 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2924 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2925 AssertReturn(p3dState, VERR_INVALID_STATE);
2926
2927 PVMSVGA3DDXCONTEXT pDXContext;
2928 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2929 AssertRCReturn(rc, rc);
2930
2931 ASSERT_GUEST_RETURN(pCmd->uavSpliceIndex <= SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS, VERR_INVALID_PARAMETER);
2932 ASSERT_GUEST_RETURN(cUAViewId <= SVGA3D_DX11_1_MAX_UAVIEWS, VERR_INVALID_PARAMETER);
2933 for (uint32_t i = 0; i < cUAViewId; ++i)
2934 ASSERT_GUEST_RETURN( paUAViewId[i] < pDXContext->cot.cUAView
2935 || paUAViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
2936 RT_UNTRUSTED_VALIDATED_FENCE();
2937
2938 for (uint32_t i = 0; i < cUAViewId; ++i)
2939 {
2940 SVGA3dUAViewId const uaViewId = paUAViewId[i];
2941 pDXContext->svgaDXContext.uaViewIds[i] = uaViewId;
2942 }
2943 pDXContext->svgaDXContext.uavSpliceIndex = pCmd->uavSpliceIndex;
2944
2945 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext, pCmd->uavSpliceIndex, cUAViewId, paUAViewId);
2946 return rc;
2947}
2948
2949
2950int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd)
2951{
2952 int rc;
2953 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2954 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2955 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2956 AssertReturn(p3dState, VERR_INVALID_STATE);
2957
2958 PVMSVGA3DDXCONTEXT pDXContext;
2959 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2960 AssertRCReturn(rc, rc);
2961
2962 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext, pCmd->argsBufferSid, pCmd->byteOffsetForArgs);
2963 return rc;
2964}
2965
2966
2967int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstancedIndirect const *pCmd)
2968{
2969 int rc;
2970 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2971 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2972 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2973 AssertReturn(p3dState, VERR_INVALID_STATE);
2974
2975 PVMSVGA3DDXCONTEXT pDXContext;
2976 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2977 AssertRCReturn(rc, rc);
2978
2979 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext, pCmd->argsBufferSid, pCmd->byteOffsetForArgs);
2980 return rc;
2981}
2982
2983
2984int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatch const *pCmd)
2985{
2986 int rc;
2987 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2988 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2989 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2990 AssertReturn(p3dState, VERR_INVALID_STATE);
2991
2992 PVMSVGA3DDXCONTEXT pDXContext;
2993 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2994 AssertRCReturn(rc, rc);
2995
2996 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext, pCmd->threadGroupCountX, pCmd->threadGroupCountY, pCmd->threadGroupCountZ);
2997 return rc;
2998}
2999
3000
3001int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
3002{
3003 int rc;
3004 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3005 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
3006 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3007 AssertReturn(p3dState, VERR_INVALID_STATE);
3008
3009 PVMSVGA3DDXCONTEXT pDXContext;
3010 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3011 AssertRCReturn(rc, rc);
3012
3013 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
3014 return rc;
3015}
3016
3017
3018int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
3019{
3020 int rc;
3021 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3022 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
3023 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3024 AssertReturn(p3dState, VERR_INVALID_STATE);
3025
3026 PVMSVGA3DDXCONTEXT pDXContext;
3027 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3028 AssertRCReturn(rc, rc);
3029
3030 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
3031 return rc;
3032}
3033
3034
3035int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
3036{
3037 int rc;
3038 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3039 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
3040 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3041 AssertReturn(p3dState, VERR_INVALID_STATE);
3042
3043 PVMSVGA3DDXCONTEXT pDXContext;
3044 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3045 AssertRCReturn(rc, rc);
3046
3047 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
3048 return rc;
3049}
3050
3051
3052int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
3053{
3054 int rc;
3055 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3056 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
3057 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3058 AssertReturn(p3dState, VERR_INVALID_STATE);
3059
3060 PVMSVGA3DDXCONTEXT pDXContext;
3061 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3062 AssertRCReturn(rc, rc);
3063
3064 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
3065 return rc;
3066}
3067
3068
3069int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStructureCount const *pCmd)
3070{
3071 int rc;
3072 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3073 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3074 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3075 AssertReturn(p3dState, VERR_INVALID_STATE);
3076
3077 PVMSVGA3DDXCONTEXT pDXContext;
3078 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3079 AssertRCReturn(rc, rc);
3080
3081 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
3082
3083 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
3084 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
3085 RT_UNTRUSTED_VALIDATED_FENCE();
3086
3087 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
3088 pEntry->structureCount = pCmd->structureCount;
3089
3090 return VINF_SUCCESS;
3091}
3092
3093
3094int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3095{
3096 int rc;
3097 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3098 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
3099 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3100 AssertReturn(p3dState, VERR_INVALID_STATE);
3101
3102 PVMSVGA3DDXCONTEXT pDXContext;
3103 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3104 AssertRCReturn(rc, rc);
3105
3106 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
3107 return rc;
3108}
3109
3110
3111int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3112{
3113 int rc;
3114 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3115 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
3116 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3117 AssertReturn(p3dState, VERR_INVALID_STATE);
3118
3119 PVMSVGA3DDXCONTEXT pDXContext;
3120 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3121 AssertRCReturn(rc, rc);
3122
3123 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
3124 return rc;
3125}
3126
3127
3128int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3129{
3130 int rc;
3131 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3132 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
3133 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3134 AssertReturn(p3dState, VERR_INVALID_STATE);
3135
3136 PVMSVGA3DDXCONTEXT pDXContext;
3137 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3138 AssertRCReturn(rc, rc);
3139
3140 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
3141 return rc;
3142}
3143
3144
3145int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
3146{
3147 int rc;
3148 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3149 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
3150 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3151 AssertReturn(p3dState, VERR_INVALID_STATE);
3152
3153 PVMSVGA3DDXCONTEXT pDXContext;
3154 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3155 AssertRCReturn(rc, rc);
3156
3157 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
3158 return rc;
3159}
3160
3161
3162int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3163{
3164 int rc;
3165 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3166 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
3167 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3168 AssertReturn(p3dState, VERR_INVALID_STATE);
3169
3170 PVMSVGA3DDXCONTEXT pDXContext;
3171 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3172 AssertRCReturn(rc, rc);
3173
3174 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
3175 return rc;
3176}
3177
3178
3179int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3180{
3181 int rc;
3182 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3183 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
3184 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3185 AssertReturn(p3dState, VERR_INVALID_STATE);
3186
3187 PVMSVGA3DDXCONTEXT pDXContext;
3188 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3189 AssertRCReturn(rc, rc);
3190
3191 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
3192 return rc;
3193}
3194
3195
3196int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSUAViews const *pCmd, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
3197{
3198 int rc;
3199 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3200 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
3201 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3202 AssertReturn(p3dState, VERR_INVALID_STATE);
3203
3204 PVMSVGA3DDXCONTEXT pDXContext;
3205 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3206 AssertRCReturn(rc, rc);
3207
3208 ASSERT_GUEST_RETURN(pCmd->startIndex < SVGA3D_DX11_1_MAX_UAVIEWS, VERR_INVALID_PARAMETER);
3209 ASSERT_GUEST_RETURN(cUAViewId <= SVGA3D_DX11_1_MAX_UAVIEWS - pCmd->startIndex, VERR_INVALID_PARAMETER);
3210 for (uint32_t i = 0; i < cUAViewId; ++i)
3211 ASSERT_GUEST_RETURN( paUAViewId[i] < pDXContext->cot.cUAView
3212 || paUAViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
3213 RT_UNTRUSTED_VALIDATED_FENCE();
3214
3215 for (uint32_t i = 0; i < cUAViewId; ++i)
3216 {
3217 SVGA3dUAViewId const uaViewId = paUAViewId[i];
3218 pDXContext->svgaDXContext.csuaViewIds[pCmd->startIndex + i] = uaViewId;
3219 }
3220
3221 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext, pCmd->startIndex, cUAViewId, paUAViewId);
3222 return rc;
3223}
3224
3225
3226int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
3227{
3228 int rc;
3229 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3230 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
3231 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3232 AssertReturn(p3dState, VERR_INVALID_STATE);
3233
3234 PVMSVGA3DDXCONTEXT pDXContext;
3235 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3236 AssertRCReturn(rc, rc);
3237
3238 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
3239 return rc;
3240}
3241
3242
3243int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd)
3244{
3245 int rc;
3246 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3247 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3248 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3249 AssertReturn(p3dState, VERR_INVALID_STATE);
3250
3251 PVMSVGA3DDXCONTEXT pDXContext;
3252 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3253 AssertRCReturn(rc, rc);
3254
3255 SVGA3dStreamOutputId const soid = pCmd->soid;
3256
3257 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
3258 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
3259 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
3260 RT_UNTRUSTED_VALIDATED_FENCE();
3261
3262 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
3263 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
3264 RT_ZERO(pEntry->decl);
3265 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
3266 pEntry->rasterizedStream = pCmd->rasterizedStream;
3267 pEntry->numOutputStreamStrides = pCmd->numOutputStreamStrides;
3268 pEntry->mobid = SVGA_ID_INVALID;
3269 pEntry->offsetInBytes = 0;
3270 pEntry->usesMob = 1;
3271 pEntry->pad0 = 0;
3272 pEntry->pad1 = 0;
3273 RT_ZERO(pEntry->pad2);
3274
3275 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
3276 return rc;
3277}
3278
3279
3280int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3281{
3282 int rc;
3283 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3284 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3285 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3286 AssertReturn(p3dState, VERR_INVALID_STATE);
3287
3288 PVMSVGA3DDXCONTEXT pDXContext;
3289 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3290 AssertRCReturn(rc, rc);
3291
3292 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3293 return rc;
3294}
3295
3296
3297int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindStreamOutput const *pCmd)
3298{
3299 int rc;
3300 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3301 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3302 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3303 AssertReturn(p3dState, VERR_INVALID_STATE);
3304
3305 PVMSVGA3DDXCONTEXT pDXContext;
3306 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3307 AssertRCReturn(rc, rc);
3308 SVGA3dStreamOutputId const soid = pCmd->soid;
3309
3310 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
3311 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
3312 RT_UNTRUSTED_VALIDATED_FENCE();
3313
3314 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
3315
3316 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= pEntry->numOutputStreamEntries * sizeof(SVGA3dStreamOutputDeclarationEntry), VERR_INVALID_PARAMETER);
3317 ASSERT_GUEST(pEntry->usesMob);
3318
3319 pEntry->mobid = pCmd->mobid;
3320 pEntry->offsetInBytes = pCmd->offsetInBytes;
3321 pEntry->usesMob = 1;
3322
3323 return VINF_SUCCESS;
3324}
3325
3326
3327int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3328{
3329 int rc;
3330 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3331 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3332 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3333 AssertReturn(p3dState, VERR_INVALID_STATE);
3334
3335 PVMSVGA3DDXCONTEXT pDXContext;
3336 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3337 AssertRCReturn(rc, rc);
3338
3339 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3340 return rc;
3341}
3342
3343
3344int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3345{
3346 int rc;
3347 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3348 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3349 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3350 AssertReturn(p3dState, VERR_INVALID_STATE);
3351
3352 PVMSVGA3DDXCONTEXT pDXContext;
3353 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3354 AssertRCReturn(rc, rc);
3355
3356 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3357 return rc;
3358}
3359
3360
3361int vmsvga3dVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdVBDXClearRenderTargetViewRegion const *pCmd, uint32_t cRect, SVGASignedRect const *paRect)
3362{
3363 int rc;
3364 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3365 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnVBDXClearRenderTargetViewRegion, VERR_INVALID_STATE);
3366 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3367 AssertReturn(p3dState, VERR_INVALID_STATE);
3368
3369 PVMSVGA3DDXCONTEXT pDXContext;
3370 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3371 AssertRCReturn(rc, rc);
3372
3373 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->viewId;
3374
3375 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
3376 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
3377 ASSERT_GUEST_RETURN(cRect <= 65536, VERR_INVALID_PARAMETER); /* Arbitrary limit. */
3378 RT_UNTRUSTED_VALIDATED_FENCE();
3379
3380 rc = pSvgaR3State->pFuncsDX->pfnVBDXClearRenderTargetViewRegion(pThisCC, pDXContext, renderTargetViewId, &pCmd->color, cRect, paRect);
3381 return rc;
3382}
3383
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