VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 95136

Last change on this file since 95136 was 95136, checked in by vboxsync, 3 years ago

Devices/Graphics: remove incorrect asserts: bugref:9830

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1/* $Id: DevVGA-SVGA3d-dx.cpp 95136 2022-05-30 11:47:27Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42/*
43 * Helpers.
44 */
45
46static int dxMobWrite(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid, uint32_t off, void const *pvData, uint32_t cbData)
47{
48 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, mobid);
49 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_STATE);
50
51 return vmsvgaR3MobWrite(pSvgaR3State, pMob, off, pvData, cbData);
52}
53
54
55/*
56 *
57 * Command handlers.
58 *
59 */
60
61int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
62{
63 int rc;
64 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
65 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
66 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
67 AssertReturn(p3dState, VERR_INVALID_STATE);
68
69 PVMSVGA3DDXCONTEXT pDXContext;
70 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
71 AssertRCReturn(rc, rc);
72
73 /* Copy the host structure back to the guest memory. */
74 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
75
76 return rc;
77}
78
79
80int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
81{
82 int rc;
83 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
84 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
85 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
86 AssertReturn(p3dState, VERR_INVALID_STATE);
87
88 PVMSVGA3DDXCONTEXT pDXContext;
89 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
90 AssertRCReturn(rc, rc);
91
92 /* Notify the host backend that context is about to be switched. */
93 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
94 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
95 return rc;
96
97 /** @todo Keep track of changes in the pipeline and apply only modified state. */
98 /* It is not necessary to restore SVGADXContextMobFormat::shaderState::shaderResources
99 * because they are applied by the backend before each Draw call.
100 */
101 #define DX_STATE_VS 0x00000001
102 #define DX_STATE_PS 0x00000002
103 #define DX_STATE_SAMPLERS 0x00000004
104 #define DX_STATE_INPUTLAYOUT 0x00000008
105 #define DX_STATE_TOPOLOGY 0x00000010
106 #define DX_STATE_VERTEXBUFFER 0x00000020
107 #define DX_STATE_INDEXBUFFER 0x00000040
108 #define DX_STATE_BLENDSTATE 0x00000080
109 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
110 #define DX_STATE_SOTARGETS 0x00000200
111 #define DX_STATE_VIEWPORTS 0x00000400
112 #define DX_STATE_SCISSORRECTS 0x00000800
113 #define DX_STATE_RASTERIZERSTATE 0x00001000
114 #define DX_STATE_RENDERTARGETS 0x00002000
115 #define DX_STATE_GS 0x00004000
116 #define DX_STATE_CONSTANTBUFFERS 0x00008000
117 uint32_t u32TrackedState = 0
118 | DX_STATE_VS
119 | DX_STATE_PS
120 | DX_STATE_SAMPLERS
121 | DX_STATE_INPUTLAYOUT
122 | DX_STATE_TOPOLOGY
123 | DX_STATE_VERTEXBUFFER
124 | DX_STATE_INDEXBUFFER
125 | DX_STATE_BLENDSTATE
126 | DX_STATE_DEPTHSTENCILSTATE
127 | DX_STATE_SOTARGETS
128 | DX_STATE_VIEWPORTS
129 | DX_STATE_SCISSORRECTS
130 | DX_STATE_RASTERIZERSTATE
131 | DX_STATE_RENDERTARGETS
132 | DX_STATE_GS
133 | DX_STATE_CONSTANTBUFFERS
134 ;
135
136 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState));
137
138 if (u32TrackedState & DX_STATE_VS)
139 {
140 u32TrackedState &= ~DX_STATE_VS;
141
142 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
143
144 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
145 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
146
147 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
148 AssertRC(rc);
149 }
150
151
152 if (u32TrackedState & DX_STATE_PS)
153 {
154 u32TrackedState &= ~DX_STATE_PS;
155
156 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
157
158 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
159 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
160
161 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
162 AssertRC(rc);
163 }
164
165
166 if (u32TrackedState & DX_STATE_GS)
167 {
168 u32TrackedState &= ~DX_STATE_GS;
169
170 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_GS;
171
172 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
173 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
174
175 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
176 AssertRC(rc);
177 }
178
179
180 if (u32TrackedState & DX_STATE_SAMPLERS)
181 {
182 u32TrackedState &= ~DX_STATE_SAMPLERS;
183
184 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_MAX; ++i)
185 {
186 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
187 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
188
189 uint32_t startSampler = 0;
190 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
191 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
192
193 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
194 AssertRC(rc);
195 }
196 }
197
198
199 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
200 {
201 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
202
203 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
204
205 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
206 AssertRC(rc);
207 }
208
209
210 if (u32TrackedState & DX_STATE_TOPOLOGY)
211 {
212 u32TrackedState &= ~DX_STATE_TOPOLOGY;
213
214 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
215
216 if (topology != SVGA3D_PRIMITIVE_INVALID)
217 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
218 AssertRC(rc);
219 }
220
221
222 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
223 {
224 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
225
226 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
227 * 32 bits mask is enough.
228 */
229 uint32_t startBuffer = 0;
230 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
231 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
232 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
233 {
234 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
235 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
236 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
237 }
238
239 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
240 AssertRC(rc);
241 }
242
243
244 if (u32TrackedState & DX_STATE_INDEXBUFFER)
245 {
246 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
247
248 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
249 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
250 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
251
252 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
253 AssertRC(rc);
254 }
255
256
257 if (u32TrackedState & DX_STATE_BLENDSTATE)
258 {
259 u32TrackedState &= ~DX_STATE_BLENDSTATE;
260
261 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
262 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
263 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
264 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
265
266 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
267 AssertRC(rc);
268 }
269
270
271 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
272 {
273 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
274
275 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
276 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
277
278 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
279 AssertRC(rc);
280 }
281
282
283 if (u32TrackedState & DX_STATE_SOTARGETS)
284 {
285 u32TrackedState &= ~DX_STATE_SOTARGETS;
286
287 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
288 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
289 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
290 {
291 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
292 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
293 aSoTarget[i].offset = 0;
294 aSoTarget[i].sizeInBytes = 0;
295 }
296
297 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
298 AssertRC(rc);
299 }
300
301
302 if (u32TrackedState & DX_STATE_VIEWPORTS)
303 {
304 u32TrackedState &= ~DX_STATE_VIEWPORTS;
305
306 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
307 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
308
309 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
310 AssertRC(rc);
311 }
312
313
314 if (u32TrackedState & DX_STATE_SCISSORRECTS)
315 {
316 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
317
318 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
319 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
320
321 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
322 AssertRC(rc);
323 }
324
325
326 if (u32TrackedState & DX_STATE_RASTERIZERSTATE)
327 {
328 u32TrackedState &= ~DX_STATE_RASTERIZERSTATE;
329
330 SVGA3dRasterizerStateId const rasterizerId = pDXContext->svgaDXContext.renderState.rasterizerStateId;
331
332 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
333 AssertRC(rc);
334 }
335
336
337 if (u32TrackedState & DX_STATE_RENDERTARGETS)
338 {
339 u32TrackedState &= ~DX_STATE_RENDERTARGETS;
340
341 SVGA3dDepthStencilViewId const depthStencilViewId = (SVGA3dDepthStencilViewId)pDXContext->svgaDXContext.renderState.depthStencilViewId;
342 uint32_t const cRenderTargetViewId = SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS;
343 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pDXContext->svgaDXContext.renderState.renderTargetViewIds[0];
344
345 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
346 AssertRC(rc);
347 }
348
349
350 if (u32TrackedState & DX_STATE_CONSTANTBUFFERS)
351 {
352 u32TrackedState &= ~DX_STATE_CONSTANTBUFFERS;
353
354 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_MAX; ++i)
355 {
356 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
357 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
358
359 /** @todo Track which constant buffers were modified and update only the corresponding slots.
360 * 32 bit mask is enough.
361 */
362 for (int iSlot = 0; iSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++iSlot)
363 {
364 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[iSlot];
365 if (pCBB->sid == SVGA3D_INVALID_ID) // This will not be necessary when constant buffers slots will be tracked.
366 continue;
367
368 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, iSlot, shaderType, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
369 AssertRC(rc);
370 }
371 }
372 }
373
374 Assert(u32TrackedState == 0);
375
376 return rc;
377}
378
379
380/**
381 * Create a new 3D DX context.
382 *
383 * @returns VBox status code.
384 * @param pThisCC The VGA/VMSVGA state for ring-3.
385 * @param cid Context id to be created.
386 */
387int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
388{
389 int rc;
390 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
391 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
392 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
393 AssertReturn(p3dState, VERR_INVALID_STATE);
394
395 PVMSVGA3DDXCONTEXT pDXContext;
396
397 LogFunc(("cid %d\n", cid));
398
399 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
400
401 if (cid >= p3dState->cDXContexts)
402 {
403 /* Grow the array. */
404 uint32_t cNew = RT_ALIGN(cid + 15, 16);
405 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
406 AssertReturn(pvNew, VERR_NO_MEMORY);
407 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
408 while (p3dState->cDXContexts < cNew)
409 {
410 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
411 AssertReturn(pDXContext, VERR_NO_MEMORY);
412 pDXContext->cid = SVGA3D_INVALID_ID;
413 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
414 }
415 }
416 /* If one already exists with this id, then destroy it now. */
417 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
418 vmsvga3dDXDestroyContext(pThisCC, cid);
419
420 pDXContext = p3dState->papDXContexts[cid];
421 memset(pDXContext, 0, sizeof(*pDXContext));
422
423 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
424 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
425 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
426 pDXContext->svgaDXContext.numViewports = 0;
427 pDXContext->svgaDXContext.numScissorRects = 0;
428 pDXContext->cid = cid;
429
430 /* Init the backend specific data. */
431 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
432
433 /* Cleanup on failure. */
434 if (RT_FAILURE(rc))
435 vmsvga3dDXDestroyContext(pThisCC, cid);
436
437 return rc;
438}
439
440
441int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
442{
443 int rc;
444 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
445 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
446 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
447 AssertReturn(p3dState, VERR_INVALID_STATE);
448
449 PVMSVGA3DDXCONTEXT pDXContext;
450 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
451 AssertRCReturn(rc, rc);
452
453 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
454
455 RT_ZERO(*pDXContext);
456 pDXContext->cid = SVGA3D_INVALID_ID;
457
458 return rc;
459}
460
461
462int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
463{
464 int rc;
465 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
466 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
467 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
468 AssertReturn(p3dState, VERR_INVALID_STATE);
469
470 PVMSVGA3DDXCONTEXT pDXContext;
471 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
472 AssertRCReturn(rc, rc);
473
474 if (pSvgaDXContext)
475 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
476
477 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
478 return rc;
479}
480
481
482int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
483{
484 int rc;
485 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
486 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
487 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
488 AssertReturn(p3dState, VERR_INVALID_STATE);
489
490 PVMSVGA3DDXCONTEXT pDXContext;
491 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
492 AssertRCReturn(rc, rc);
493
494 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
495 if (RT_SUCCESS(rc))
496 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
497 return rc;
498}
499
500
501int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
502{
503 int rc;
504 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
505 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
506 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
507 AssertReturn(p3dState, VERR_INVALID_STATE);
508
509 PVMSVGA3DDXCONTEXT pDXContext;
510 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
511 AssertRCReturn(rc, rc);
512
513 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
514 return rc;
515}
516
517
518int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
519{
520 int rc;
521 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
522 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
523 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
524 AssertReturn(p3dState, VERR_INVALID_STATE);
525
526 PVMSVGA3DDXCONTEXT pDXContext;
527 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
528 AssertRCReturn(rc, rc);
529
530 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
531 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
532 RT_UNTRUSTED_VALIDATED_FENCE();
533
534 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
535 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
536 pCBB->sid = pCmd->sid;
537 pCBB->offsetInBytes = pCmd->offsetInBytes;
538 pCBB->sizeInBytes = pCmd->sizeInBytes;
539
540 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
541 return rc;
542}
543
544
545int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
546{
547 int rc;
548 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
549 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
550 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
551 AssertReturn(p3dState, VERR_INVALID_STATE);
552
553 PVMSVGA3DDXCONTEXT pDXContext;
554 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
555 AssertRCReturn(rc, rc);
556
557 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
558 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
559 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
560 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
561 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
562 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
563 RT_UNTRUSTED_VALIDATED_FENCE();
564
565 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
566 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
567 {
568 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
569 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
570 }
571
572 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
573 return rc;
574}
575
576
577int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
578{
579 int rc;
580 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
581 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
582 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
583 AssertReturn(p3dState, VERR_INVALID_STATE);
584
585 PVMSVGA3DDXCONTEXT pDXContext;
586 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
587 AssertRCReturn(rc, rc);
588
589 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
590 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
591 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
592 RT_UNTRUSTED_VALIDATED_FENCE();
593
594 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
595 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
596
597 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->shaderId, pCmd->type);
598 return rc;
599}
600
601
602int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
603{
604 int rc;
605 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
606 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
607 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
608 AssertReturn(p3dState, VERR_INVALID_STATE);
609
610 PVMSVGA3DDXCONTEXT pDXContext;
611 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
612 AssertRCReturn(rc, rc);
613
614 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
615 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
616 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
617 RT_UNTRUSTED_VALIDATED_FENCE();
618
619 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
620 for (uint32_t i = 0; i < cSamplerId; ++i)
621 {
622 SVGA3dSamplerId const samplerId = paSamplerId[i];
623 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
624 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
625 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
626 }
627 RT_UNTRUSTED_VALIDATED_FENCE();
628
629 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
630 return rc;
631}
632
633
634#ifdef DUMP_BITMAPS
635static void vmsvga3dDXDrawDumpRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
636{
637 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
638 {
639 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
640 {
641 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]];
642 Log(("Dump RT[%u] sid = %u rtvid = %u\n", i, pRTViewEntry->sid, pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]));
643
644 SVGA3dSurfaceImageId image;
645 image.sid = pRTViewEntry->sid;
646 image.face = 0;
647 image.mipmap = 0;
648 VMSVGA3D_MAPPED_SURFACE map;
649 int rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
650 if (RT_SUCCESS(rc))
651 {
652 vmsvga3dMapWriteBmpFile(&map, "rt-");
653 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
654 }
655 else
656 Log(("Map failed %Rrc\n", rc));
657 }
658 }
659}
660#endif
661
662int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
663{
664 int rc;
665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
666 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
667 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
668 AssertReturn(p3dState, VERR_INVALID_STATE);
669
670 PVMSVGA3DDXCONTEXT pDXContext;
671 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
672 AssertRCReturn(rc, rc);
673
674 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
675#ifdef DUMP_BITMAPS
676 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
677#endif
678 return rc;
679}
680
681
682int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
683{
684 int rc;
685 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
686 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
687 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
688 AssertReturn(p3dState, VERR_INVALID_STATE);
689
690 PVMSVGA3DDXCONTEXT pDXContext;
691 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
692 AssertRCReturn(rc, rc);
693
694 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
695#ifdef DUMP_BITMAPS
696 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
697#endif
698 return rc;
699}
700
701
702int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
703{
704 int rc;
705 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
706 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
707 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
708 AssertReturn(p3dState, VERR_INVALID_STATE);
709
710 PVMSVGA3DDXCONTEXT pDXContext;
711 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
712 AssertRCReturn(rc, rc);
713
714 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
715 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
716#ifdef DUMP_BITMAPS
717 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
718#endif
719 return rc;
720}
721
722
723int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
724{
725 int rc;
726 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
727 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
728 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
729 AssertReturn(p3dState, VERR_INVALID_STATE);
730
731 PVMSVGA3DDXCONTEXT pDXContext;
732 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
733 AssertRCReturn(rc, rc);
734
735 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
736 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
737#ifdef DUMP_BITMAPS
738 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
739#endif
740 return rc;
741}
742
743
744int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
745{
746 int rc;
747 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
748 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
749 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
750 AssertReturn(p3dState, VERR_INVALID_STATE);
751
752 PVMSVGA3DDXCONTEXT pDXContext;
753 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
754 AssertRCReturn(rc, rc);
755
756 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
757#ifdef DUMP_BITMAPS
758 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
759#endif
760 return rc;
761}
762
763
764int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
765{
766 int rc;
767 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
768 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
769 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
770 AssertReturn(p3dState, VERR_INVALID_STATE);
771
772 PVMSVGA3DDXCONTEXT pDXContext;
773 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
774 AssertRCReturn(rc, rc);
775
776 ASSERT_GUEST_RETURN( elementLayoutId == SVGA3D_INVALID_ID
777 || elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
778 RT_UNTRUSTED_VALIDATED_FENCE();
779
780 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
781
782 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
783 return rc;
784}
785
786
787int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
788{
789 int rc;
790 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
791 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
792 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
793 AssertReturn(p3dState, VERR_INVALID_STATE);
794
795 PVMSVGA3DDXCONTEXT pDXContext;
796 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
797 AssertRCReturn(rc, rc);
798
799 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
800 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
801 RT_UNTRUSTED_VALIDATED_FENCE();
802
803 for (uint32_t i = 0; i < cVertexBuffer; ++i)
804 {
805 uint32_t const idxVertexBuffer = startBuffer + i;
806
807 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
808 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
809 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
810 }
811
812 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
813 return rc;
814}
815
816
817int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
818{
819 int rc;
820 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
821 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
822 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
823 AssertReturn(p3dState, VERR_INVALID_STATE);
824
825 PVMSVGA3DDXCONTEXT pDXContext;
826 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
827 AssertRCReturn(rc, rc);
828
829 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
830 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
831 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
832
833 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
834 return rc;
835}
836
837
838int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
839{
840 int rc;
841 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
842 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
843 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
844 AssertReturn(p3dState, VERR_INVALID_STATE);
845
846 PVMSVGA3DDXCONTEXT pDXContext;
847 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
848 AssertRCReturn(rc, rc);
849
850 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
851
852 pDXContext->svgaDXContext.inputAssembly.topology = topology;
853
854 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
855 return rc;
856}
857
858
859int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
860{
861 int rc;
862 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
863 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
864 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
865 AssertReturn(p3dState, VERR_INVALID_STATE);
866
867 PVMSVGA3DDXCONTEXT pDXContext;
868 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
869 AssertRCReturn(rc, rc);
870
871 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
872 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
873 ASSERT_GUEST_RETURN(cRenderTargetViewId <= SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
874 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
875 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
876 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
877 RT_UNTRUSTED_VALIDATED_FENCE();
878
879 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
880 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
881 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
882
883 /* Remember how many render target slots must be set. */
884 pDXContext->cRenderTargets = RT_MAX(pDXContext->cRenderTargets, cRenderTargetViewId);
885
886 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
887 return rc;
888}
889
890
891int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
892{
893 int rc;
894 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
895 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
896 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
897 AssertReturn(p3dState, VERR_INVALID_STATE);
898
899 PVMSVGA3DDXCONTEXT pDXContext;
900 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
901 AssertRCReturn(rc, rc);
902
903 SVGA3dBlendStateId const blendId = pCmd->blendId;
904
905 ASSERT_GUEST_RETURN( blendId == SVGA3D_INVALID_ID
906 || blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
907 RT_UNTRUSTED_VALIDATED_FENCE();
908
909 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
910 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
911 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
912 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
913
914 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
915 return rc;
916}
917
918
919int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
920{
921 int rc;
922 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
923 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
924 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
925 AssertReturn(p3dState, VERR_INVALID_STATE);
926
927 PVMSVGA3DDXCONTEXT pDXContext;
928 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
929 AssertRCReturn(rc, rc);
930
931 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
932
933 ASSERT_GUEST_RETURN( depthStencilId == SVGA3D_INVALID_ID
934 || depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
935 RT_UNTRUSTED_VALIDATED_FENCE();
936
937 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
938 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
939
940 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
941 return rc;
942}
943
944
945int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
946{
947 int rc;
948 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
949 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
950 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
951 AssertReturn(p3dState, VERR_INVALID_STATE);
952
953 PVMSVGA3DDXCONTEXT pDXContext;
954 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
955 AssertRCReturn(rc, rc);
956
957 ASSERT_GUEST_RETURN( rasterizerId == SVGA3D_INVALID_ID
958 || rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
959 RT_UNTRUSTED_VALIDATED_FENCE();
960
961 pDXContext->svgaDXContext.renderState.rasterizerStateId = rasterizerId;
962
963 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
964 return rc;
965}
966
967
968int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd)
969{
970 int rc;
971 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
972 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
973 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
974 AssertReturn(p3dState, VERR_INVALID_STATE);
975
976 PVMSVGA3DDXCONTEXT pDXContext;
977 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
978 AssertRCReturn(rc, rc);
979
980 SVGA3dQueryId const queryId = pCmd->queryId;
981
982 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
983 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
984 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_QUERYTYPE_MIN && pCmd->type < SVGA3D_QUERYTYPE_MAX, VERR_INVALID_PARAMETER);
985 RT_UNTRUSTED_VALIDATED_FENCE();
986
987 /* Cleanup the current query. */
988 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
989
990 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
991 pEntry->type = pCmd->type;
992 pEntry->state = SVGADX_QDSTATE_IDLE;
993 pEntry->flags = pCmd->flags;
994 pEntry->mobid = SVGA_ID_INVALID;
995 pEntry->offset = 0;
996
997 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext, queryId, pEntry);
998 return rc;
999}
1000
1001
1002int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd)
1003{
1004 int rc;
1005 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1006 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
1007 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1008 AssertReturn(p3dState, VERR_INVALID_STATE);
1009
1010 PVMSVGA3DDXCONTEXT pDXContext;
1011 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1012 AssertRCReturn(rc, rc);
1013
1014 SVGA3dQueryId const queryId = pCmd->queryId;
1015
1016 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1017 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1018 RT_UNTRUSTED_VALIDATED_FENCE();
1019
1020 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
1021
1022 /* Cleanup COTable entry.*/
1023 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1024 pEntry->type = SVGA3D_QUERYTYPE_INVALID;
1025 pEntry->state = SVGADX_QDSTATE_INVALID;
1026 pEntry->flags = 0;
1027 pEntry->mobid = SVGA_ID_INVALID;
1028 pEntry->offset = 0;
1029
1030 return rc;
1031}
1032
1033
1034int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, PVMSVGAMOB pMob)
1035{
1036 int rc;
1037 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1038 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1039 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1040 AssertReturn(p3dState, VERR_INVALID_STATE);
1041
1042 PVMSVGA3DDXCONTEXT pDXContext;
1043 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1044 AssertRCReturn(rc, rc);
1045
1046 SVGA3dQueryId const queryId = pCmd->queryId;
1047
1048 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1049 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1050 RT_UNTRUSTED_VALIDATED_FENCE();
1051
1052 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1053 pEntry->mobid = vmsvgaR3MobId(pMob);
1054
1055 return rc;
1056}
1057
1058
1059int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd)
1060{
1061 int rc;
1062 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1063 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1064 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1065 AssertReturn(p3dState, VERR_INVALID_STATE);
1066
1067 PVMSVGA3DDXCONTEXT pDXContext;
1068 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1069 AssertRCReturn(rc, rc);
1070
1071 SVGA3dQueryId const queryId = pCmd->queryId;
1072
1073 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1074 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1075 RT_UNTRUSTED_VALIDATED_FENCE();
1076
1077 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1078 pEntry->offset = pCmd->mobOffset;
1079
1080 return rc;
1081}
1082
1083
1084int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd)
1085{
1086 int rc;
1087 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1088 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
1089 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1090 AssertReturn(p3dState, VERR_INVALID_STATE);
1091
1092 PVMSVGA3DDXCONTEXT pDXContext;
1093 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1094 AssertRCReturn(rc, rc);
1095
1096 SVGA3dQueryId const queryId = pCmd->queryId;
1097
1098 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1099 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1100 RT_UNTRUSTED_VALIDATED_FENCE();
1101
1102 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1103 Assert(pEntry->state == SVGADX_QDSTATE_IDLE || pEntry->state == SVGADX_QDSTATE_PENDING || pEntry->state == SVGADX_QDSTATE_FINISHED);
1104 if (pEntry->state != SVGADX_QDSTATE_ACTIVE)
1105 {
1106 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext, queryId);
1107 if (RT_SUCCESS(rc))
1108 {
1109 pEntry->state = SVGADX_QDSTATE_ACTIVE;
1110
1111 /* Update the guest status of the query. */
1112 uint32_t const u32 = SVGA3D_QUERYSTATE_PENDING;
1113 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1114 }
1115 else
1116 {
1117 uint32_t const u32 = SVGA3D_QUERYSTATE_FAILED;
1118 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1119 }
1120 }
1121 return rc;
1122}
1123
1124
1125static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry *pEntry)
1126{
1127 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1128
1129 int rc;
1130 Assert(pEntry->state == SVGADX_QDSTATE_ACTIVE);
1131 if (pEntry->state == SVGADX_QDSTATE_ACTIVE)
1132 {
1133 pEntry->state = SVGADX_QDSTATE_PENDING;
1134
1135 uint32_t u32QueryState;
1136 SVGADXQueryResultUnion queryResult;
1137 uint32_t cbQuery = 0; /* Actual size of query data returned by backend. */
1138 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext, queryId, &queryResult, &cbQuery);
1139 if (RT_SUCCESS(rc))
1140 {
1141 /* Write the result after SVGA3dQueryState. */
1142 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset + sizeof(uint32_t), &queryResult, cbQuery);
1143
1144 u32QueryState = SVGA3D_QUERYSTATE_SUCCEEDED;
1145 }
1146 else
1147 u32QueryState = SVGA3D_QUERYSTATE_FAILED;
1148
1149 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32QueryState, sizeof(u32QueryState));
1150
1151 if (RT_SUCCESS(rc))
1152 pEntry->state = SVGADX_QDSTATE_FINISHED;
1153 }
1154 else
1155 rc = VERR_INVALID_STATE;
1156
1157 return rc;
1158}
1159
1160
1161int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd)
1162{
1163 int rc;
1164 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1165 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1166 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1167 AssertReturn(p3dState, VERR_INVALID_STATE);
1168
1169 PVMSVGA3DDXCONTEXT pDXContext;
1170 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1171 AssertRCReturn(rc, rc);
1172
1173 SVGA3dQueryId const queryId = pCmd->queryId;
1174
1175 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1176 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1177 RT_UNTRUSTED_VALIDATED_FENCE();
1178
1179 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1180 rc = dxEndQuery(pThisCC, pDXContext, queryId, pEntry);
1181 return rc;
1182}
1183
1184
1185int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd)
1186{
1187 int rc;
1188 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1189 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1190 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1191 AssertReturn(p3dState, VERR_INVALID_STATE);
1192
1193 PVMSVGA3DDXCONTEXT pDXContext;
1194 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1195 AssertRCReturn(rc, rc);
1196
1197 SVGA3dQueryId const queryId = pCmd->queryId;
1198
1199 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1200 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1201 RT_UNTRUSTED_VALIDATED_FENCE();
1202
1203 /* The device does not cache queries. So this is a NOP. */
1204
1205 return rc;
1206}
1207
1208
1209int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetPredication const *pCmd)
1210{
1211 int rc;
1212 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1213 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1214 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1215 AssertReturn(p3dState, VERR_INVALID_STATE);
1216
1217 PVMSVGA3DDXCONTEXT pDXContext;
1218 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1219 AssertRCReturn(rc, rc);
1220
1221 SVGA3dQueryId const queryId = pCmd->queryId;
1222
1223 ASSERT_GUEST_RETURN( queryId == SVGA3D_INVALID_ID
1224 || queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1225 RT_UNTRUSTED_VALIDATED_FENCE();
1226
1227 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext, queryId, pCmd->predicateValue);
1228 return rc;
1229}
1230
1231
1232int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1233{
1234 int rc;
1235 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1236 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1237 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1238 AssertReturn(p3dState, VERR_INVALID_STATE);
1239
1240 PVMSVGA3DDXCONTEXT pDXContext;
1241 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1242 AssertRCReturn(rc, rc);
1243
1244 ASSERT_GUEST_RETURN(cSoTarget <= SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1245 RT_UNTRUSTED_VALIDATED_FENCE();
1246
1247 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1248 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1249 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1250
1251 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1252 return rc;
1253}
1254
1255
1256int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1257{
1258 int rc;
1259 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1260 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1261 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1262 AssertReturn(p3dState, VERR_INVALID_STATE);
1263
1264 PVMSVGA3DDXCONTEXT pDXContext;
1265 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1266 AssertRCReturn(rc, rc);
1267
1268 ASSERT_GUEST_RETURN(cViewport <= SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1269 RT_UNTRUSTED_VALIDATED_FENCE();
1270
1271 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1272 for (uint32_t i = 0; i < cViewport; ++i)
1273 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1274
1275 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1276 return rc;
1277}
1278
1279
1280int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1281{
1282 int rc;
1283 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1284 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1285 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1286 AssertReturn(p3dState, VERR_INVALID_STATE);
1287
1288 PVMSVGA3DDXCONTEXT pDXContext;
1289 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1290 AssertRCReturn(rc, rc);
1291
1292 ASSERT_GUEST_RETURN(cRect <= SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1293 RT_UNTRUSTED_VALIDATED_FENCE();
1294
1295 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1296 for (uint32_t i = 0; i < cRect; ++i)
1297 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1298
1299 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1300 return rc;
1301}
1302
1303
1304int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1305{
1306 int rc;
1307 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1308 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1309 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1310 AssertReturn(p3dState, VERR_INVALID_STATE);
1311
1312 PVMSVGA3DDXCONTEXT pDXContext;
1313 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1314 AssertRCReturn(rc, rc);
1315
1316 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1317
1318 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1319 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1320 RT_UNTRUSTED_VALIDATED_FENCE();
1321
1322 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1323 return rc;
1324}
1325
1326
1327int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1328{
1329 int rc;
1330 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1331 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1332 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1333 AssertReturn(p3dState, VERR_INVALID_STATE);
1334
1335 PVMSVGA3DDXCONTEXT pDXContext;
1336 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1337 AssertRCReturn(rc, rc);
1338
1339 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1340
1341 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1342 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1343 RT_UNTRUSTED_VALIDATED_FENCE();
1344
1345 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1346 return rc;
1347}
1348
1349
1350int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1351{
1352 int rc;
1353 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1354 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1355 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1356 AssertReturn(p3dState, VERR_INVALID_STATE);
1357
1358 PVMSVGA3DDXCONTEXT pDXContext;
1359 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1360 AssertRCReturn(rc, rc);
1361
1362 /** @todo Memcpy if both resources do not have the hardware resource. */
1363
1364 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1365 return rc;
1366}
1367
1368
1369int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopy const *pCmd)
1370{
1371 int rc;
1372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1375 AssertReturn(p3dState, VERR_INVALID_STATE);
1376
1377 PVMSVGA3DDXCONTEXT pDXContext;
1378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1379 AssertRCReturn(rc, rc);
1380
1381 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext, pCmd->dstSid, pCmd->srcSid);
1382 return rc;
1383}
1384
1385
1386int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
1387{
1388 int rc;
1389 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1390 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1391 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1392 AssertReturn(p3dState, VERR_INVALID_STATE);
1393
1394 PVMSVGA3DDXCONTEXT pDXContext;
1395 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1396 AssertRCReturn(rc, rc);
1397
1398 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
1399 return rc;
1400}
1401
1402
1403int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1404{
1405 int rc;
1406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1407 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1408 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1409 AssertReturn(p3dState, VERR_INVALID_STATE);
1410
1411 PVMSVGA3DDXCONTEXT pDXContext;
1412 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1413 AssertRCReturn(rc, rc);
1414
1415 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1416
1417 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1418 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1419 RT_UNTRUSTED_VALIDATED_FENCE();
1420
1421 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1422 return rc;
1423}
1424
1425
1426int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1427{
1428 int rc;
1429 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1430 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1431 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1432 AssertReturn(p3dState, VERR_INVALID_STATE);
1433
1434 PVMSVGA3DDXCONTEXT pDXContext;
1435 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1436 AssertRCReturn(rc, rc);
1437
1438 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1439
1440 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1441 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1442 RT_UNTRUSTED_VALIDATED_FENCE();
1443
1444 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1445 pEntry->sid = pCmd->sid;
1446 pEntry->format = pCmd->format;
1447 pEntry->resourceDimension = pCmd->resourceDimension;
1448 pEntry->desc = pCmd->desc;
1449
1450 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1451 return rc;
1452}
1453
1454
1455int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1456{
1457 int rc;
1458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1461 AssertReturn(p3dState, VERR_INVALID_STATE);
1462
1463 PVMSVGA3DDXCONTEXT pDXContext;
1464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1465 AssertRCReturn(rc, rc);
1466
1467 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1468
1469 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1470 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1471 RT_UNTRUSTED_VALIDATED_FENCE();
1472
1473 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1474 RT_ZERO(*pEntry);
1475
1476 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1477 return rc;
1478}
1479
1480
1481int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1482{
1483 int rc;
1484 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1485 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1486 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1487 AssertReturn(p3dState, VERR_INVALID_STATE);
1488
1489 PVMSVGA3DDXCONTEXT pDXContext;
1490 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1491 AssertRCReturn(rc, rc);
1492
1493 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1494
1495 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1496 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1497 RT_UNTRUSTED_VALIDATED_FENCE();
1498
1499 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1500 pEntry->sid = pCmd->sid;
1501 pEntry->format = pCmd->format;
1502 pEntry->resourceDimension = pCmd->resourceDimension;
1503 pEntry->desc = pCmd->desc;
1504
1505 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1506 return rc;
1507}
1508
1509
1510int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1511{
1512 int rc;
1513 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1514 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1515 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1516 AssertReturn(p3dState, VERR_INVALID_STATE);
1517
1518 PVMSVGA3DDXCONTEXT pDXContext;
1519 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1520 AssertRCReturn(rc, rc);
1521
1522 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1523
1524 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1525 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1526 RT_UNTRUSTED_VALIDATED_FENCE();
1527
1528 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1529 RT_ZERO(*pEntry);
1530
1531 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1532 {
1533 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1534 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1535 }
1536
1537 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1538 return rc;
1539}
1540
1541
1542int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1543{
1544 int rc;
1545 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1546 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1547 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1548 AssertReturn(p3dState, VERR_INVALID_STATE);
1549
1550 PVMSVGA3DDXCONTEXT pDXContext;
1551 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1552 AssertRCReturn(rc, rc);
1553
1554 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1555
1556 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1557 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1558 RT_UNTRUSTED_VALIDATED_FENCE();
1559
1560 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1561 pEntry->sid = pCmd->sid;
1562 pEntry->format = pCmd->format;
1563 pEntry->resourceDimension = pCmd->resourceDimension;
1564 pEntry->mipSlice = pCmd->mipSlice;
1565 pEntry->firstArraySlice = pCmd->firstArraySlice;
1566 pEntry->arraySize = pCmd->arraySize;
1567 pEntry->flags = pCmd->flags;
1568
1569 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1570 return rc;
1571}
1572
1573
1574int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1575{
1576 int rc;
1577 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1578 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1579 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1580 AssertReturn(p3dState, VERR_INVALID_STATE);
1581
1582 PVMSVGA3DDXCONTEXT pDXContext;
1583 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1584 AssertRCReturn(rc, rc);
1585
1586 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1587
1588 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1589 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1590 RT_UNTRUSTED_VALIDATED_FENCE();
1591
1592 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1593 RT_ZERO(*pEntry);
1594
1595 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1596 return rc;
1597}
1598
1599
1600int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1601{
1602 int rc;
1603 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1604 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1605 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1606 AssertReturn(p3dState, VERR_INVALID_STATE);
1607
1608 PVMSVGA3DDXCONTEXT pDXContext;
1609 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1610 AssertRCReturn(rc, rc);
1611
1612 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1613 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1614 RT_UNTRUSTED_VALIDATED_FENCE();
1615
1616 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1617 pEntry->elid = elementLayoutId;
1618 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1619 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1620
1621#ifdef LOG_ENABLED
1622 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1623 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1624 {
1625 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1626 i,
1627 pEntry->descs[i].inputSlot,
1628 pEntry->descs[i].alignedByteOffset,
1629 pEntry->descs[i].format,
1630 pEntry->descs[i].inputSlotClass,
1631 pEntry->descs[i].instanceDataStepRate,
1632 pEntry->descs[i].inputRegister
1633 ));
1634 }
1635#endif
1636
1637 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1638 return rc;
1639}
1640
1641
1642int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd)
1643{
1644 int rc;
1645 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1646 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1647 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1648 AssertReturn(p3dState, VERR_INVALID_STATE);
1649
1650 PVMSVGA3DDXCONTEXT pDXContext;
1651 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1652 AssertRCReturn(rc, rc);
1653
1654 SVGA3dElementLayoutId const elementLayoutId = pCmd->elementLayoutId;
1655
1656 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1657 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1658 RT_UNTRUSTED_VALIDATED_FENCE();
1659
1660 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext, elementLayoutId);
1661
1662 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1663 RT_ZERO(*pEntry);
1664 pEntry->elid = SVGA3D_INVALID_ID;
1665
1666 return rc;
1667}
1668
1669
1670int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1671{
1672 int rc;
1673 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1674 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1675 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1676 AssertReturn(p3dState, VERR_INVALID_STATE);
1677
1678 PVMSVGA3DDXCONTEXT pDXContext;
1679 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1680 AssertRCReturn(rc, rc);
1681
1682 SVGA3dBlendStateId const blendId = pCmd->blendId;
1683
1684 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1685 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1686 RT_UNTRUSTED_VALIDATED_FENCE();
1687
1688 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1689 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1690 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1691 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1692
1693 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1694 return rc;
1695}
1696
1697
1698int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd)
1699{
1700 int rc;
1701 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1702 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1703 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1704 AssertReturn(p3dState, VERR_INVALID_STATE);
1705
1706 PVMSVGA3DDXCONTEXT pDXContext;
1707 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1708 AssertRCReturn(rc, rc);
1709
1710 SVGA3dBlendStateId const blendId = pCmd->blendId;
1711
1712 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1713 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1714 RT_UNTRUSTED_VALIDATED_FENCE();
1715
1716 pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext, blendId);
1717
1718 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1719 RT_ZERO(*pEntry);
1720
1721 return rc;
1722}
1723
1724
1725int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1726{
1727 int rc;
1728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1731 AssertReturn(p3dState, VERR_INVALID_STATE);
1732
1733 PVMSVGA3DDXCONTEXT pDXContext;
1734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1735 AssertRCReturn(rc, rc);
1736
1737 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1738
1739 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1740 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1741 RT_UNTRUSTED_VALIDATED_FENCE();
1742
1743 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1744 pEntry->depthEnable = pCmd->depthEnable;
1745 pEntry->depthWriteMask = pCmd->depthWriteMask;
1746 pEntry->depthFunc = pCmd->depthFunc;
1747 pEntry->stencilEnable = pCmd->stencilEnable;
1748 pEntry->frontEnable = pCmd->frontEnable;
1749 pEntry->backEnable = pCmd->backEnable;
1750 pEntry->stencilReadMask = pCmd->stencilReadMask;
1751 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1752
1753 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1754 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1755 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1756 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1757
1758 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1759 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1760 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1761 pEntry->backStencilFunc = pCmd->backStencilFunc;
1762
1763 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1764 return rc;
1765}
1766
1767
1768int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd)
1769{
1770 int rc;
1771 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1772 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1773 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1774 AssertReturn(p3dState, VERR_INVALID_STATE);
1775
1776 PVMSVGA3DDXCONTEXT pDXContext;
1777 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1778 AssertRCReturn(rc, rc);
1779
1780 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1781
1782 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1783 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1784 RT_UNTRUSTED_VALIDATED_FENCE();
1785
1786 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext, depthStencilId);
1787
1788 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1789 RT_ZERO(*pEntry);
1790
1791 return rc;
1792}
1793
1794
1795int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1796{
1797 int rc;
1798 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1799 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1800 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1801 AssertReturn(p3dState, VERR_INVALID_STATE);
1802
1803 PVMSVGA3DDXCONTEXT pDXContext;
1804 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1805 AssertRCReturn(rc, rc);
1806
1807 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1808
1809 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1810 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1811 RT_UNTRUSTED_VALIDATED_FENCE();
1812
1813 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1814 pEntry->fillMode = pCmd->fillMode;
1815 pEntry->cullMode = pCmd->cullMode;
1816 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1817 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1818 pEntry->depthBias = pCmd->depthBias;
1819 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1820 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1821 pEntry->depthClipEnable = pCmd->depthClipEnable;
1822 pEntry->scissorEnable = pCmd->scissorEnable;
1823 pEntry->multisampleEnable = pCmd->multisampleEnable;
1824 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1825 pEntry->lineWidth = pCmd->lineWidth;
1826 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1827 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1828 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1829 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1830 RT_ZERO(pEntry->mustBeZero);
1831
1832 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1833 return rc;
1834}
1835
1836
1837int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd)
1838{
1839 int rc;
1840 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1841 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1842 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1843 AssertReturn(p3dState, VERR_INVALID_STATE);
1844
1845 PVMSVGA3DDXCONTEXT pDXContext;
1846 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1847 AssertRCReturn(rc, rc);
1848
1849 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1850
1851 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1852 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1853 RT_UNTRUSTED_VALIDATED_FENCE();
1854
1855 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext, rasterizerId);
1856
1857 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1858 RT_ZERO(*pEntry);
1859
1860 return rc;
1861}
1862
1863
1864int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1865{
1866 int rc;
1867 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1868 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1869 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1870 AssertReturn(p3dState, VERR_INVALID_STATE);
1871
1872 PVMSVGA3DDXCONTEXT pDXContext;
1873 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1874 AssertRCReturn(rc, rc);
1875
1876 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1877
1878 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1879 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1880 RT_UNTRUSTED_VALIDATED_FENCE();
1881
1882 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1883 pEntry->filter = pCmd->filter;
1884 pEntry->addressU = pCmd->addressU;
1885 pEntry->addressV = pCmd->addressV;
1886 pEntry->addressW = pCmd->addressW;
1887 pEntry->mipLODBias = pCmd->mipLODBias;
1888 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1889 pEntry->comparisonFunc = pCmd->comparisonFunc;
1890 pEntry->borderColor = pCmd->borderColor;
1891 pEntry->minLOD = pCmd->minLOD;
1892 pEntry->maxLOD = pCmd->maxLOD;
1893
1894 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1895 return rc;
1896}
1897
1898
1899int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd)
1900{
1901 int rc;
1902 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1903 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1904 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1905 AssertReturn(p3dState, VERR_INVALID_STATE);
1906
1907 PVMSVGA3DDXCONTEXT pDXContext;
1908 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1909 AssertRCReturn(rc, rc);
1910
1911 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1912
1913 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1914 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1915 RT_UNTRUSTED_VALIDATED_FENCE();
1916
1917 pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext, samplerId);
1918
1919 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1920 RT_ZERO(*pEntry);
1921
1922 return rc;
1923}
1924
1925
1926int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1927{
1928 int rc;
1929 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1930 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1931 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1932 AssertReturn(p3dState, VERR_INVALID_STATE);
1933
1934 PVMSVGA3DDXCONTEXT pDXContext;
1935 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1936 AssertRCReturn(rc, rc);
1937
1938 SVGA3dShaderId const shaderId = pCmd->shaderId;
1939
1940 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1941 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1942 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1943 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1944 RT_UNTRUSTED_VALIDATED_FENCE();
1945
1946 /* Cleanup the current shader. */
1947 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1948
1949 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1950 pEntry->type = pCmd->type;
1951 pEntry->sizeInBytes = pCmd->sizeInBytes;
1952 pEntry->offsetInBytes = 0;
1953 pEntry->mobid = SVGA_ID_INVALID;
1954
1955 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1956 return rc;
1957}
1958
1959
1960int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1961{
1962 int rc;
1963 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1964 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1965 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1966 AssertReturn(p3dState, VERR_INVALID_STATE);
1967
1968 PVMSVGA3DDXCONTEXT pDXContext;
1969 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1970 AssertRCReturn(rc, rc);
1971
1972 SVGA3dShaderId const shaderId = pCmd->shaderId;
1973
1974 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1975 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1976 RT_UNTRUSTED_VALIDATED_FENCE();
1977
1978 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1979
1980 /* Cleanup COTable entries.*/
1981 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1982 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1983 pEntry->sizeInBytes = 0;
1984 pEntry->offsetInBytes = 0;
1985 pEntry->mobid = SVGA_ID_INVALID;
1986
1987 /** @todo Destroy shaders on context and backend deletion. */
1988 return rc;
1989}
1990
1991
1992static int dxBindShader(DXShaderInfo *pShaderInfo, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1993{
1994 /* How many bytes the MOB can hold. */
1995 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1996 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1997 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1998
1999 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, pShaderInfo);
2000 if (RT_SUCCESS(rc))
2001 {
2002 /* Get the length of the shader bytecode. */
2003 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
2004 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
2005 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
2006
2007 /* Check if the shader contains SVGA3dDXSignatureHeader and signature entries after the bytecode.
2008 * If they are not there (Linux guest driver does not provide them), then it is fine
2009 * and the signatures generated by DXShaderParse will be used.
2010 */
2011 uint32_t cbSignaturesAvail = pEntry->sizeInBytes - cToken * 4; /* How many bytes for signatures are available. */
2012 if (cbSignaturesAvail >= sizeof(SVGA3dDXSignatureHeader))
2013 {
2014 cbSignaturesAvail -= sizeof(SVGA3dDXSignatureHeader);
2015
2016 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + cToken * 4);
2017 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
2018 {
2019 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShaderInfo->aInputSignature)
2020 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShaderInfo->aOutputSignature)
2021 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShaderInfo->aPatchConstantSignature),
2022 VERR_INVALID_PARAMETER);
2023
2024 uint32_t const cSignature = pSignatureHeader->numInputSignatures
2025 + pSignatureHeader->numOutputSignatures
2026 + pSignatureHeader->numPatchConstantSignatures;
2027 uint32_t const cbSignature = cSignature * sizeof(SVGA3dDXSignatureEntry);
2028 ASSERT_GUEST_RETURN(cbSignaturesAvail >= cbSignature, VERR_INVALID_PARAMETER);
2029
2030 /* The shader does not need guesswork. */
2031 pShaderInfo->fGuestSignatures = true;
2032
2033 /* Copy to DXShaderInfo. */
2034 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
2035 pShaderInfo->cInputSignature = pSignatureHeader->numInputSignatures;
2036 memcpy(pShaderInfo->aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
2037
2038 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
2039 pShaderInfo->cOutputSignature = pSignatureHeader->numOutputSignatures;
2040 memcpy(pShaderInfo->aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
2041
2042 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
2043 pShaderInfo->cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
2044 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
2045
2046 DXShaderGenerateSemantics(pShaderInfo);
2047 }
2048 }
2049 }
2050
2051 return rc;
2052}
2053
2054
2055int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
2056{
2057 int rc;
2058 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2059 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
2060 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2061 AssertReturn(p3dState, VERR_INVALID_STATE);
2062
2063 PVMSVGA3DDXCONTEXT pDXContext;
2064 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2065 AssertRCReturn(rc, rc);
2066
2067 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
2068 RT_UNTRUSTED_VALIDATED_FENCE();
2069
2070 /* 'type' and 'sizeInBytes' has been already initialized by DefineShader. */
2071 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
2072 //pEntry->type;
2073 //pEntry->sizeInBytes;
2074 pEntry->offsetInBytes = pCmd->offsetInBytes;
2075 pEntry->mobid = vmsvgaR3MobId(pMob);
2076
2077 if (pMob)
2078 {
2079 /* Bind a mob to the shader. */
2080
2081 /* Create a memory pointer for the MOB, which is accessible by host. */
2082 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
2083 if (RT_SUCCESS(rc))
2084 {
2085 /* Get pointer to the shader bytecode. This will also verify the offset. */
2086 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
2087 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
2088
2089 /* Get the shader and optional signatures from the MOB. */
2090 DXShaderInfo shaderInfo;
2091 RT_ZERO(shaderInfo);
2092 rc = dxBindShader(&shaderInfo, pMob, pEntry, pvShaderBytecode);
2093 if (RT_SUCCESS(rc))
2094 {
2095 /* pfnDXBindShader makes a copy of shaderInfo on success. */
2096 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pCmd->shid, &shaderInfo);
2097 }
2098 AssertRC(rc);
2099
2100 /** @todo Backing store is not needed anymore in any case? */
2101 if (RT_FAILURE(rc))
2102 {
2103 DXShaderFree(&shaderInfo);
2104
2105 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2106 }
2107 }
2108 }
2109 else
2110 {
2111 /* Unbind. */
2112 /** @todo Nothing to do here but release the MOB? */
2113 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2114 }
2115
2116 return rc;
2117}
2118
2119
2120int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
2121{
2122 int rc;
2123 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2124 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
2125 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2126 AssertReturn(p3dState, VERR_INVALID_STATE);
2127
2128 PVMSVGA3DDXCONTEXT pDXContext;
2129 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2130 AssertRCReturn(rc, rc);
2131
2132 SVGA3dStreamOutputId const soid = pCmd->soid;
2133
2134 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2135 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2136 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
2137 RT_UNTRUSTED_VALIDATED_FENCE();
2138
2139 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2140 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
2141 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
2142 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
2143 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
2144 pEntry->numOutputStreamStrides = 0;
2145 pEntry->mobid = SVGA_ID_INVALID;
2146 pEntry->offsetInBytes = 0;
2147 pEntry->usesMob = 0;
2148 pEntry->pad0 = 0;
2149 pEntry->pad1 = 0;
2150 RT_ZERO(pEntry->pad2);
2151
2152 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
2153 return rc;
2154}
2155
2156
2157int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
2158{
2159 int rc;
2160 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2161 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
2162 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2163 AssertReturn(p3dState, VERR_INVALID_STATE);
2164
2165 PVMSVGA3DDXCONTEXT pDXContext;
2166 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2167 AssertRCReturn(rc, rc);
2168
2169 SVGA3dStreamOutputId const soid = pCmd->soid;
2170
2171 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2172 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2173 RT_UNTRUSTED_VALIDATED_FENCE();
2174
2175 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
2176
2177 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2178 RT_ZERO(*pEntry);
2179 pEntry->mobid = SVGA_ID_INVALID;
2180
2181 return rc;
2182}
2183
2184
2185int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
2186{
2187 int rc;
2188 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2189 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
2190 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2191 AssertReturn(p3dState, VERR_INVALID_STATE);
2192
2193 PVMSVGA3DDXCONTEXT pDXContext;
2194 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2195 AssertRCReturn(rc, rc);
2196
2197 SVGA3dStreamOutputId const soid = pCmd->soid;
2198
2199 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
2200 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2201 RT_UNTRUSTED_VALIDATED_FENCE();
2202
2203 pDXContext->svgaDXContext.streamOut.soid = soid;
2204
2205 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2206 return rc;
2207}
2208
2209
2210static int dxSetOrGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGAMOB pMob,
2211 SVGACOTableType type, uint32_t validSizeInBytes, bool fGrow)
2212{
2213 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2214 int rc = VINF_SUCCESS;
2215
2216 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2217 RT_UNTRUSTED_VALIDATED_FENCE();
2218
2219 uint32_t cbCOT;
2220 if (pMob)
2221 {
2222 /* Bind a new mob to the COTable. */
2223 cbCOT = vmsvgaR3MobSize(pMob);
2224
2225 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2226 RT_UNTRUSTED_VALIDATED_FENCE();
2227
2228 /* Create a memory pointer, which is accessible by host. */
2229 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2230 }
2231 else
2232 {
2233 /* Unbind. */
2234 validSizeInBytes = 0;
2235 cbCOT = 0;
2236 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[type]);
2237 }
2238
2239 uint32_t cEntries = 0;
2240 uint32_t cValidEntries = 0;
2241 if (RT_SUCCESS(rc))
2242 {
2243 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2244 {
2245 sizeof(SVGACOTableDXRTViewEntry),
2246 sizeof(SVGACOTableDXDSViewEntry),
2247 sizeof(SVGACOTableDXSRViewEntry),
2248 sizeof(SVGACOTableDXElementLayoutEntry),
2249 sizeof(SVGACOTableDXBlendStateEntry),
2250 sizeof(SVGACOTableDXDepthStencilEntry),
2251 sizeof(SVGACOTableDXRasterizerStateEntry),
2252 sizeof(SVGACOTableDXSamplerEntry),
2253 sizeof(SVGACOTableDXStreamOutputEntry),
2254 sizeof(SVGACOTableDXQueryEntry),
2255 sizeof(SVGACOTableDXShaderEntry),
2256 sizeof(SVGACOTableDXUAViewEntry),
2257 };
2258
2259 cEntries = cbCOT / s_acbEntry[type];
2260 cValidEntries = validSizeInBytes / s_acbEntry[type];
2261 }
2262
2263 if (RT_SUCCESS(rc))
2264 {
2265 if ( fGrow
2266 && pDXContext->aCOTMobs[type]
2267 && cValidEntries)
2268 {
2269 /* Copy entries from the current mob to the new mob. */
2270 void const *pvSrc = vmsvgaR3MobBackingStorePtr(pDXContext->aCOTMobs[type], 0);
2271 void *pvDst = vmsvgaR3MobBackingStorePtr(pMob, 0);
2272 if (pvSrc && pvDst)
2273 memcpy(pvDst, pvSrc, validSizeInBytes);
2274 else
2275 AssertFailedStmt(rc = VERR_INVALID_STATE);
2276 }
2277 }
2278
2279 if (RT_SUCCESS(rc))
2280 {
2281 pDXContext->aCOTMobs[type] = pMob;
2282
2283 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2284 switch (type)
2285 {
2286 case SVGA_COTABLE_RTVIEW:
2287 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2288 pDXContext->cot.cRTView = cEntries;
2289 break;
2290 case SVGA_COTABLE_DSVIEW:
2291 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2292 pDXContext->cot.cDSView = cEntries;
2293 break;
2294 case SVGA_COTABLE_SRVIEW:
2295 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2296 pDXContext->cot.cSRView = cEntries;
2297 break;
2298 case SVGA_COTABLE_ELEMENTLAYOUT:
2299 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2300 pDXContext->cot.cElementLayout = cEntries;
2301 break;
2302 case SVGA_COTABLE_BLENDSTATE:
2303 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2304 pDXContext->cot.cBlendState = cEntries;
2305 break;
2306 case SVGA_COTABLE_DEPTHSTENCIL:
2307 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2308 pDXContext->cot.cDepthStencil = cEntries;
2309 break;
2310 case SVGA_COTABLE_RASTERIZERSTATE:
2311 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2312 pDXContext->cot.cRasterizerState = cEntries;
2313 break;
2314 case SVGA_COTABLE_SAMPLER:
2315 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2316 pDXContext->cot.cSampler = cEntries;
2317 break;
2318 case SVGA_COTABLE_STREAMOUTPUT:
2319 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2320 pDXContext->cot.cStreamOutput = cEntries;
2321 break;
2322 case SVGA_COTABLE_DXQUERY:
2323 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2324 pDXContext->cot.cQuery = cEntries;
2325 break;
2326 case SVGA_COTABLE_DXSHADER:
2327 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2328 pDXContext->cot.cShader = cEntries;
2329 break;
2330 case SVGA_COTABLE_UAVIEW:
2331 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2332 pDXContext->cot.cUAView = cEntries;
2333 break;
2334 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2335 }
2336 }
2337 else
2338 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2339
2340 /* Notify the backend. */
2341 if (RT_SUCCESS(rc))
2342 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, type, cValidEntries);
2343
2344 return rc;
2345}
2346
2347
2348int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2349{
2350 int rc;
2351 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2352 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2353 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2354 AssertReturn(p3dState, VERR_INVALID_STATE);
2355
2356 PVMSVGA3DDXCONTEXT pDXContext;
2357 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2358 AssertRCReturn(rc, rc);
2359 RT_UNTRUSTED_VALIDATED_FENCE();
2360
2361 return dxSetOrGrowCOTable(pThisCC, pDXContext, pMob, pCmd->type, pCmd->validSizeInBytes, false);
2362}
2363
2364
2365int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2366{
2367 int rc;
2368 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2369 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2370 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2371 AssertReturn(p3dState, VERR_INVALID_STATE);
2372
2373 PVMSVGA3DDXCONTEXT pDXContext;
2374 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2375 AssertRCReturn(rc, rc);
2376 RT_UNTRUSTED_VALIDATED_FENCE();
2377
2378 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2379 RT_UNTRUSTED_VALIDATED_FENCE();
2380
2381 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2382 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2383 return rc;
2384}
2385
2386
2387int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2388{
2389 int rc;
2390 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2391 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2392 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2393 AssertReturn(p3dState, VERR_INVALID_STATE);
2394
2395 PVMSVGA3DDXCONTEXT pDXContext;
2396 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2397 AssertRCReturn(rc, rc);
2398
2399 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2400 return rc;
2401}
2402
2403
2404int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2405{
2406 int rc;
2407 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2408 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2409 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2410 AssertReturn(p3dState, VERR_INVALID_STATE);
2411
2412 PVMSVGA3DDXCONTEXT pDXContext;
2413 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2414 AssertRCReturn(rc, rc);
2415
2416 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2417 return rc;
2418}
2419
2420
2421int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2422{
2423 int rc;
2424 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2425 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2426 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2427 AssertReturn(p3dState, VERR_INVALID_STATE);
2428
2429 PVMSVGA3DDXCONTEXT pDXContext;
2430 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2431 AssertRCReturn(rc, rc);
2432
2433 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2434 return rc;
2435}
2436
2437
2438int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd)
2439{
2440 int rc;
2441 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2442 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2443 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2444 AssertReturn(p3dState, VERR_INVALID_STATE);
2445
2446 RT_NOREF(idDXContext);
2447
2448 PVMSVGA3DDXCONTEXT pDXContext;
2449 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2450 AssertRCReturn(rc, rc);
2451
2452 for (uint32_t i = 0; i < pDXContext->cot.cQuery; ++i)
2453 {
2454 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[i];
2455 if (pEntry->type != SVGA3D_QUERYTYPE_INVALID)
2456 pEntry->mobid = pCmd->mobid;
2457 }
2458
2459 return rc;
2460}
2461
2462
2463int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd)
2464{
2465 int rc;
2466 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2467 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2468 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2469 AssertReturn(p3dState, VERR_INVALID_STATE);
2470
2471 RT_NOREF(idDXContext);
2472
2473 PVMSVGA3DDXCONTEXT pDXContext;
2474 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2475 AssertRCReturn(rc, rc);
2476
2477 /* "Read back cached states from the device if they exist."
2478 * The device does not cache queries. So this is a NOP.
2479 */
2480 RT_NOREF(pDXContext);
2481
2482 return rc;
2483}
2484
2485
2486int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2487{
2488 int rc;
2489 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2490 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2491 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2492 AssertReturn(p3dState, VERR_INVALID_STATE);
2493
2494 PVMSVGA3DDXCONTEXT pDXContext;
2495 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2496 AssertRCReturn(rc, rc);
2497
2498 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2499 return rc;
2500}
2501
2502
2503int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2504{
2505 int rc;
2506 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2507 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2508 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2509 AssertReturn(p3dState, VERR_INVALID_STATE);
2510
2511 PVMSVGA3DDXCONTEXT pDXContext;
2512 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2513 AssertRCReturn(rc, rc);
2514
2515 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2516 return rc;
2517}
2518
2519
2520int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2521{
2522 int rc;
2523 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2524 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2525 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2526 AssertReturn(p3dState, VERR_INVALID_STATE);
2527
2528 PVMSVGA3DDXCONTEXT pDXContext;
2529 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2530 AssertRCReturn(rc, rc);
2531
2532 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2533 return rc;
2534}
2535
2536
2537int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2538{
2539 int rc;
2540 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2541 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2542 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2543 AssertReturn(p3dState, VERR_INVALID_STATE);
2544
2545 PVMSVGA3DDXCONTEXT pDXContext;
2546 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2547 AssertRCReturn(rc, rc);
2548
2549 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2550 return rc;
2551}
2552
2553
2554int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2555{
2556 int rc;
2557 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2558 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2559 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2560 AssertReturn(p3dState, VERR_INVALID_STATE);
2561
2562 PVMSVGA3DDXCONTEXT pDXContext;
2563 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2564 AssertRCReturn(rc, rc);
2565
2566 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2567 return rc;
2568}
2569
2570
2571int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2572{
2573 int rc;
2574 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2575 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2576 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2577 AssertReturn(p3dState, VERR_INVALID_STATE);
2578
2579 PVMSVGA3DDXCONTEXT pDXContext;
2580 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2581 AssertRCReturn(rc, rc);
2582
2583 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2584 return rc;
2585}
2586
2587
2588int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2589{
2590 int rc;
2591 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2592 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2593 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2594 AssertReturn(p3dState, VERR_INVALID_STATE);
2595
2596 PVMSVGA3DDXCONTEXT pDXContext;
2597 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2598 AssertRCReturn(rc, rc);
2599
2600 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2601 return rc;
2602}
2603
2604
2605int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2606{
2607 int rc;
2608 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2609 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2610 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2611 AssertReturn(p3dState, VERR_INVALID_STATE);
2612
2613 PVMSVGA3DDXCONTEXT pDXContext;
2614 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2615 AssertRCReturn(rc, rc);
2616
2617 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2618 return rc;
2619}
2620
2621
2622int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2623{
2624 int rc;
2625 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2626 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2627 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2628 AssertReturn(p3dState, VERR_INVALID_STATE);
2629
2630 PVMSVGA3DDXCONTEXT pDXContext;
2631 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2632 AssertRCReturn(rc, rc);
2633
2634 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2635 return rc;
2636}
2637
2638
2639int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2640{
2641 int rc;
2642 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2643 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2644 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2645 AssertReturn(p3dState, VERR_INVALID_STATE);
2646
2647 PVMSVGA3DDXCONTEXT pDXContext;
2648 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2649 AssertRCReturn(rc, rc);
2650
2651 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2652 return rc;
2653}
2654
2655
2656int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2657{
2658 int rc;
2659 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2660 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2661 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2662 AssertReturn(p3dState, VERR_INVALID_STATE);
2663
2664 PVMSVGA3DDXCONTEXT pDXContext;
2665 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2666 AssertRCReturn(rc, rc);
2667
2668 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2669 return rc;
2670}
2671
2672
2673int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXGrowCOTable const *pCmd)
2674{
2675 int rc;
2676 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2677 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2678 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2679 AssertReturn(p3dState, VERR_INVALID_STATE);
2680
2681 PVMSVGA3DDXCONTEXT pDXContext;
2682 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2683 AssertRCReturn(rc, rc);
2684
2685 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, pCmd->mobid);
2686 return dxSetOrGrowCOTable(pThisCC, pDXContext, pMob, pCmd->type, pCmd->validSizeInBytes, true);
2687}
2688
2689
2690int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2691{
2692 int rc;
2693 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2694 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2695 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2696 AssertReturn(p3dState, VERR_INVALID_STATE);
2697
2698 PVMSVGA3DDXCONTEXT pDXContext;
2699 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2700 AssertRCReturn(rc, rc);
2701
2702 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2703 return rc;
2704}
2705
2706
2707int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2708{
2709 int rc;
2710 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2711 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2712 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2713 AssertReturn(p3dState, VERR_INVALID_STATE);
2714
2715 PVMSVGA3DDXCONTEXT pDXContext;
2716 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2717 AssertRCReturn(rc, rc);
2718
2719 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2720 return rc;
2721}
2722
2723
2724int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2725{
2726 int rc;
2727 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2728 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2729 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2730 AssertReturn(p3dState, VERR_INVALID_STATE);
2731
2732 PVMSVGA3DDXCONTEXT pDXContext;
2733 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2734 AssertRCReturn(rc, rc);
2735
2736 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2737 return rc;
2738}
2739
2740
2741int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2742{
2743 int rc;
2744 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2745 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2746 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2747 AssertReturn(p3dState, VERR_INVALID_STATE);
2748
2749 PVMSVGA3DDXCONTEXT pDXContext;
2750 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2751 AssertRCReturn(rc, rc);
2752
2753 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2754 return rc;
2755}
2756
2757
2758int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2759{
2760 int rc;
2761 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2762 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2763 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2764 AssertReturn(p3dState, VERR_INVALID_STATE);
2765
2766 PVMSVGA3DDXCONTEXT pDXContext;
2767 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2768 AssertRCReturn(rc, rc);
2769
2770 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2771 return rc;
2772}
2773
2774
2775int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2776{
2777 int rc;
2778 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2779 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2780 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2781 AssertReturn(p3dState, VERR_INVALID_STATE);
2782
2783 PVMSVGA3DDXCONTEXT pDXContext;
2784 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2785 AssertRCReturn(rc, rc);
2786
2787 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2788 return rc;
2789}
2790
2791
2792int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineUAView const *pCmd)
2793{
2794 int rc;
2795 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2796 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2797 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2798 AssertReturn(p3dState, VERR_INVALID_STATE);
2799
2800 PVMSVGA3DDXCONTEXT pDXContext;
2801 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2802 AssertRCReturn(rc, rc);
2803
2804 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2805
2806 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2807 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2808 RT_UNTRUSTED_VALIDATED_FENCE();
2809
2810 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
2811 pEntry->sid = pCmd->sid;
2812 pEntry->format = pCmd->format;
2813 pEntry->resourceDimension = pCmd->resourceDimension;
2814 pEntry->desc = pCmd->desc;
2815 pEntry->structureCount = 0;
2816
2817 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext, uaViewId, pEntry);
2818 return rc;
2819}
2820
2821
2822int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyUAView const *pCmd)
2823{
2824 int rc;
2825 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2826 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2827 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2828 AssertReturn(p3dState, VERR_INVALID_STATE);
2829
2830 PVMSVGA3DDXCONTEXT pDXContext;
2831 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2832 AssertRCReturn(rc, rc);
2833
2834 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2835
2836 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2837 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2838 RT_UNTRUSTED_VALIDATED_FENCE();
2839
2840 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
2841 RT_ZERO(*pEntry);
2842
2843 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext, uaViewId);
2844 return rc;
2845}
2846
2847
2848int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewUint const *pCmd)
2849{
2850 int rc;
2851 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2852 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2853 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2854 AssertReturn(p3dState, VERR_INVALID_STATE);
2855
2856 PVMSVGA3DDXCONTEXT pDXContext;
2857 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2858 AssertRCReturn(rc, rc);
2859
2860 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2861
2862 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2863 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2864 RT_UNTRUSTED_VALIDATED_FENCE();
2865
2866 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext, uaViewId, pCmd->value.value);
2867 return rc;
2868}
2869
2870
2871int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearUAViewFloat const *pCmd)
2872{
2873 int rc;
2874 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2875 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2876 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2877 AssertReturn(p3dState, VERR_INVALID_STATE);
2878
2879 PVMSVGA3DDXCONTEXT pDXContext;
2880 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2881 AssertRCReturn(rc, rc);
2882
2883 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
2884
2885 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2886 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2887 RT_UNTRUSTED_VALIDATED_FENCE();
2888
2889 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext, uaViewId, pCmd->value.value);
2890 return rc;
2891}
2892
2893
2894int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXCopyStructureCount const *pCmd)
2895{
2896 int rc;
2897 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2898 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2899 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2900 AssertReturn(p3dState, VERR_INVALID_STATE);
2901
2902 PVMSVGA3DDXCONTEXT pDXContext;
2903 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2904 AssertRCReturn(rc, rc);
2905
2906 SVGA3dUAViewId const uaViewId = pCmd->srcUAViewId;
2907
2908 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
2909 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
2910 RT_UNTRUSTED_VALIDATED_FENCE();
2911
2912 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext, uaViewId, pCmd->destSid, pCmd->destByteOffset);
2913 return rc;
2914}
2915
2916
2917int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetUAViews const *pCmd, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
2918{
2919 int rc;
2920 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2921 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2922 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2923 AssertReturn(p3dState, VERR_INVALID_STATE);
2924
2925 PVMSVGA3DDXCONTEXT pDXContext;
2926 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2927 AssertRCReturn(rc, rc);
2928
2929 ASSERT_GUEST_RETURN(pCmd->uavSpliceIndex <= SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS, VERR_INVALID_PARAMETER);
2930 ASSERT_GUEST_RETURN(cUAViewId <= SVGA3D_DX11_1_MAX_UAVIEWS, VERR_INVALID_PARAMETER);
2931 for (uint32_t i = 0; i < cUAViewId; ++i)
2932 ASSERT_GUEST_RETURN( paUAViewId[i] < pDXContext->cot.cUAView
2933 || paUAViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
2934 RT_UNTRUSTED_VALIDATED_FENCE();
2935
2936 for (uint32_t i = 0; i < cUAViewId; ++i)
2937 {
2938 SVGA3dUAViewId const uaViewId = paUAViewId[i];
2939 pDXContext->svgaDXContext.uaViewIds[i] = uaViewId;
2940 }
2941 pDXContext->svgaDXContext.uavSpliceIndex = pCmd->uavSpliceIndex;
2942
2943 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext, pCmd->uavSpliceIndex, cUAViewId, paUAViewId);
2944 return rc;
2945}
2946
2947
2948int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstancedIndirect const *pCmd)
2949{
2950 int rc;
2951 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2952 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2953 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2954 AssertReturn(p3dState, VERR_INVALID_STATE);
2955
2956 PVMSVGA3DDXCONTEXT pDXContext;
2957 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2958 AssertRCReturn(rc, rc);
2959
2960 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext, pCmd->argsBufferSid, pCmd->byteOffsetForArgs);
2961 return rc;
2962}
2963
2964
2965int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstancedIndirect const *pCmd)
2966{
2967 int rc;
2968 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2969 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2970 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2971 AssertReturn(p3dState, VERR_INVALID_STATE);
2972
2973 PVMSVGA3DDXCONTEXT pDXContext;
2974 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2975 AssertRCReturn(rc, rc);
2976
2977 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext, pCmd->argsBufferSid, pCmd->byteOffsetForArgs);
2978 return rc;
2979}
2980
2981
2982int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDispatch const *pCmd)
2983{
2984 int rc;
2985 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2986 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2987 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2988 AssertReturn(p3dState, VERR_INVALID_STATE);
2989
2990 PVMSVGA3DDXCONTEXT pDXContext;
2991 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2992 AssertRCReturn(rc, rc);
2993
2994 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext, pCmd->threadGroupCountX, pCmd->threadGroupCountY, pCmd->threadGroupCountZ);
2995 return rc;
2996}
2997
2998
2999int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
3000{
3001 int rc;
3002 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3003 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
3004 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3005 AssertReturn(p3dState, VERR_INVALID_STATE);
3006
3007 PVMSVGA3DDXCONTEXT pDXContext;
3008 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3009 AssertRCReturn(rc, rc);
3010
3011 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
3012 return rc;
3013}
3014
3015
3016int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
3017{
3018 int rc;
3019 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3020 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
3021 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3022 AssertReturn(p3dState, VERR_INVALID_STATE);
3023
3024 PVMSVGA3DDXCONTEXT pDXContext;
3025 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3026 AssertRCReturn(rc, rc);
3027
3028 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
3029 return rc;
3030}
3031
3032
3033int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
3034{
3035 int rc;
3036 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3037 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
3038 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3039 AssertReturn(p3dState, VERR_INVALID_STATE);
3040
3041 PVMSVGA3DDXCONTEXT pDXContext;
3042 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3043 AssertRCReturn(rc, rc);
3044
3045 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
3046 return rc;
3047}
3048
3049
3050int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
3051{
3052 int rc;
3053 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3054 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
3055 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3056 AssertReturn(p3dState, VERR_INVALID_STATE);
3057
3058 PVMSVGA3DDXCONTEXT pDXContext;
3059 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3060 AssertRCReturn(rc, rc);
3061
3062 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
3063 return rc;
3064}
3065
3066
3067int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStructureCount const *pCmd)
3068{
3069 int rc;
3070 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3071 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3072 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3073 AssertReturn(p3dState, VERR_INVALID_STATE);
3074
3075 PVMSVGA3DDXCONTEXT pDXContext;
3076 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3077 AssertRCReturn(rc, rc);
3078
3079 SVGA3dUAViewId const uaViewId = pCmd->uaViewId;
3080
3081 ASSERT_GUEST_RETURN(pDXContext->cot.paUAView, VERR_INVALID_STATE);
3082 ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
3083 RT_UNTRUSTED_VALIDATED_FENCE();
3084
3085 SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[uaViewId];
3086 pEntry->structureCount = pCmd->structureCount;
3087
3088 return VINF_SUCCESS;
3089}
3090
3091
3092int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3093{
3094 int rc;
3095 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3096 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
3097 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3098 AssertReturn(p3dState, VERR_INVALID_STATE);
3099
3100 PVMSVGA3DDXCONTEXT pDXContext;
3101 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3102 AssertRCReturn(rc, rc);
3103
3104 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
3105 return rc;
3106}
3107
3108
3109int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3110{
3111 int rc;
3112 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3113 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
3114 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3115 AssertReturn(p3dState, VERR_INVALID_STATE);
3116
3117 PVMSVGA3DDXCONTEXT pDXContext;
3118 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3119 AssertRCReturn(rc, rc);
3120
3121 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
3122 return rc;
3123}
3124
3125
3126int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3127{
3128 int rc;
3129 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3130 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
3131 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3132 AssertReturn(p3dState, VERR_INVALID_STATE);
3133
3134 PVMSVGA3DDXCONTEXT pDXContext;
3135 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3136 AssertRCReturn(rc, rc);
3137
3138 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
3139 return rc;
3140}
3141
3142
3143int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
3144{
3145 int rc;
3146 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3147 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
3148 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3149 AssertReturn(p3dState, VERR_INVALID_STATE);
3150
3151 PVMSVGA3DDXCONTEXT pDXContext;
3152 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3153 AssertRCReturn(rc, rc);
3154
3155 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
3156 return rc;
3157}
3158
3159
3160int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3161{
3162 int rc;
3163 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3164 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
3165 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3166 AssertReturn(p3dState, VERR_INVALID_STATE);
3167
3168 PVMSVGA3DDXCONTEXT pDXContext;
3169 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3170 AssertRCReturn(rc, rc);
3171
3172 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
3173 return rc;
3174}
3175
3176
3177int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3178{
3179 int rc;
3180 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3181 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
3182 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3183 AssertReturn(p3dState, VERR_INVALID_STATE);
3184
3185 PVMSVGA3DDXCONTEXT pDXContext;
3186 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3187 AssertRCReturn(rc, rc);
3188
3189 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
3190 return rc;
3191}
3192
3193
3194int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetCSUAViews const *pCmd, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
3195{
3196 int rc;
3197 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3198 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
3199 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3200 AssertReturn(p3dState, VERR_INVALID_STATE);
3201
3202 PVMSVGA3DDXCONTEXT pDXContext;
3203 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3204 AssertRCReturn(rc, rc);
3205
3206 ASSERT_GUEST_RETURN(pCmd->startIndex < SVGA3D_DX11_1_MAX_UAVIEWS, VERR_INVALID_PARAMETER);
3207 ASSERT_GUEST_RETURN(cUAViewId <= SVGA3D_DX11_1_MAX_UAVIEWS - pCmd->startIndex, VERR_INVALID_PARAMETER);
3208 for (uint32_t i = 0; i < cUAViewId; ++i)
3209 ASSERT_GUEST_RETURN( paUAViewId[i] < pDXContext->cot.cUAView
3210 || paUAViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
3211 RT_UNTRUSTED_VALIDATED_FENCE();
3212
3213 for (uint32_t i = 0; i < cUAViewId; ++i)
3214 {
3215 SVGA3dUAViewId const uaViewId = paUAViewId[i];
3216 pDXContext->svgaDXContext.csuaViewIds[pCmd->startIndex + i] = uaViewId;
3217 }
3218
3219 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext, pCmd->startIndex, cUAViewId, paUAViewId);
3220 return rc;
3221}
3222
3223
3224int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
3225{
3226 int rc;
3227 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3228 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
3229 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3230 AssertReturn(p3dState, VERR_INVALID_STATE);
3231
3232 PVMSVGA3DDXCONTEXT pDXContext;
3233 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3234 AssertRCReturn(rc, rc);
3235
3236 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
3237 return rc;
3238}
3239
3240
3241int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutputWithMob const *pCmd)
3242{
3243 int rc;
3244 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3245 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3246 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3247 AssertReturn(p3dState, VERR_INVALID_STATE);
3248
3249 PVMSVGA3DDXCONTEXT pDXContext;
3250 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3251 AssertRCReturn(rc, rc);
3252
3253 SVGA3dStreamOutputId const soid = pCmd->soid;
3254
3255 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
3256 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
3257 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
3258 RT_UNTRUSTED_VALIDATED_FENCE();
3259
3260 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
3261 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
3262 RT_ZERO(pEntry->decl);
3263 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
3264 pEntry->rasterizedStream = pCmd->rasterizedStream;
3265 pEntry->numOutputStreamStrides = pCmd->numOutputStreamStrides;
3266 pEntry->mobid = SVGA_ID_INVALID;
3267 pEntry->offsetInBytes = 0;
3268 pEntry->usesMob = 1;
3269 pEntry->pad0 = 0;
3270 pEntry->pad1 = 0;
3271 RT_ZERO(pEntry->pad2);
3272
3273 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
3274 return rc;
3275}
3276
3277
3278int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3279{
3280 int rc;
3281 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3282 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3283 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3284 AssertReturn(p3dState, VERR_INVALID_STATE);
3285
3286 PVMSVGA3DDXCONTEXT pDXContext;
3287 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3288 AssertRCReturn(rc, rc);
3289
3290 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3291 return rc;
3292}
3293
3294
3295int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindStreamOutput const *pCmd)
3296{
3297 int rc;
3298 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3299 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
3300 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3301 AssertReturn(p3dState, VERR_INVALID_STATE);
3302
3303 PVMSVGA3DDXCONTEXT pDXContext;
3304 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3305 AssertRCReturn(rc, rc);
3306 SVGA3dStreamOutputId const soid = pCmd->soid;
3307
3308 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
3309 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
3310 RT_UNTRUSTED_VALIDATED_FENCE();
3311
3312 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
3313
3314 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= pEntry->numOutputStreamEntries * sizeof(SVGA3dStreamOutputDeclarationEntry), VERR_INVALID_PARAMETER);
3315 ASSERT_GUEST(pEntry->usesMob);
3316
3317 pEntry->mobid = pCmd->mobid;
3318 pEntry->offsetInBytes = pCmd->offsetInBytes;
3319 pEntry->usesMob = 1;
3320
3321 return VINF_SUCCESS;
3322}
3323
3324
3325int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3326{
3327 int rc;
3328 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3329 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3330 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3331 AssertReturn(p3dState, VERR_INVALID_STATE);
3332
3333 PVMSVGA3DDXCONTEXT pDXContext;
3334 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3335 AssertRCReturn(rc, rc);
3336
3337 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3338 return rc;
3339}
3340
3341
3342int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3343{
3344 int rc;
3345 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3346 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3347 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3348 AssertReturn(p3dState, VERR_INVALID_STATE);
3349
3350 PVMSVGA3DDXCONTEXT pDXContext;
3351 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3352 AssertRCReturn(rc, rc);
3353
3354 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3355 return rc;
3356}
3357
3358
3359int vmsvga3dVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdVBDXClearRenderTargetViewRegion const *pCmd, uint32_t cRect, SVGASignedRect const *paRect)
3360{
3361 int rc;
3362 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3363 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnVBDXClearRenderTargetViewRegion, VERR_INVALID_STATE);
3364 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3365 AssertReturn(p3dState, VERR_INVALID_STATE);
3366
3367 PVMSVGA3DDXCONTEXT pDXContext;
3368 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3369 AssertRCReturn(rc, rc);
3370
3371 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->viewId;
3372
3373 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
3374 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
3375 ASSERT_GUEST_RETURN(cRect <= 65536, VERR_INVALID_PARAMETER); /* Arbitrary limit. */
3376 RT_UNTRUSTED_VALIDATED_FENCE();
3377
3378 rc = pSvgaR3State->pFuncsDX->pfnVBDXClearRenderTargetViewRegion(pThisCC, pDXContext, renderTargetViewId, &pCmd->color, cRect, paRect);
3379 return rc;
3380}
3381
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