VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 94063

Last change on this file since 94063 was 94063, checked in by vboxsync, 3 years ago

Devices/Graphics: shader resource and render target views should be set before a Draw call; resource view cleanup: bugref:9830
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File size: 107.4 KB
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1/* $Id: DevVGA-SVGA3d-dx.cpp 94063 2022-03-02 15:41:38Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
43{
44 int rc;
45 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
46 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
47 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
48 AssertReturn(p3dState, VERR_INVALID_STATE);
49
50 PVMSVGA3DDXCONTEXT pDXContext;
51 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
52 AssertRCReturn(rc, rc);
53
54 /* Copy the host structure back to the guest memory. */
55 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
56
57 return rc;
58}
59
60
61/**
62 * Create a new 3D DX context.
63 *
64 * @returns VBox status code.
65 * @param pThisCC The VGA/VMSVGA state for ring-3.
66 * @param cid Context id to be created.
67 */
68int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
69{
70 int rc;
71 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
72 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
73 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
74 AssertReturn(p3dState, VERR_INVALID_STATE);
75
76 PVMSVGA3DDXCONTEXT pDXContext;
77
78 LogFunc(("cid %d\n", cid));
79
80 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
81
82 if (cid >= p3dState->cDXContexts)
83 {
84 /* Grow the array. */
85 uint32_t cNew = RT_ALIGN(cid + 15, 16);
86 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
87 AssertReturn(pvNew, VERR_NO_MEMORY);
88 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
89 while (p3dState->cDXContexts < cNew)
90 {
91 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
92 AssertReturn(pDXContext, VERR_NO_MEMORY);
93 pDXContext->cid = SVGA3D_INVALID_ID;
94 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
95 }
96 }
97 /* If one already exists with this id, then destroy it now. */
98 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
99 vmsvga3dDXDestroyContext(pThisCC, cid);
100
101 pDXContext = p3dState->papDXContexts[cid];
102 memset(pDXContext, 0, sizeof(*pDXContext));
103 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
104 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
105 pDXContext->cid = cid;
106
107 /* Init the backend specific data. */
108 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
109
110 /* Cleanup on failure. */
111 if (RT_FAILURE(rc))
112 vmsvga3dDXDestroyContext(pThisCC, cid);
113
114 return rc;
115}
116
117
118int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
119{
120 int rc;
121 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
122 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
123 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
124 AssertReturn(p3dState, VERR_INVALID_STATE);
125
126 PVMSVGA3DDXCONTEXT pDXContext;
127 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
128 AssertRCReturn(rc, rc);
129
130 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
131 return rc;
132}
133
134
135int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
136{
137 int rc;
138 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
139 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
140 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
141 AssertReturn(p3dState, VERR_INVALID_STATE);
142
143 PVMSVGA3DDXCONTEXT pDXContext;
144 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
145 AssertRCReturn(rc, rc);
146
147 if (pSvgaDXContext)
148 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
149
150 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
151 return rc;
152}
153
154
155int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
156{
157 int rc;
158 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
159 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
160 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
161 AssertReturn(p3dState, VERR_INVALID_STATE);
162
163 PVMSVGA3DDXCONTEXT pDXContext;
164 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
165 AssertRCReturn(rc, rc);
166
167 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
168 if (RT_SUCCESS(rc))
169 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
170 return rc;
171}
172
173
174int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
175{
176 int rc;
177 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
178 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
179 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
180 AssertReturn(p3dState, VERR_INVALID_STATE);
181
182 PVMSVGA3DDXCONTEXT pDXContext;
183 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
184 AssertRCReturn(rc, rc);
185
186 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
187 return rc;
188}
189
190
191int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
192{
193 int rc;
194 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
195 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
196 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
197 AssertReturn(p3dState, VERR_INVALID_STATE);
198
199 PVMSVGA3DDXCONTEXT pDXContext;
200 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
201 AssertRCReturn(rc, rc);
202
203 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
204 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
205 RT_UNTRUSTED_VALIDATED_FENCE();
206
207 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
208 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
209 pCBB->sid = pCmd->sid;
210 pCBB->offsetInBytes = pCmd->offsetInBytes;
211 pCBB->sizeInBytes = pCmd->sizeInBytes;
212
213 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
214 return rc;
215}
216
217
218int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
219{
220 int rc;
221 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
222 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
223 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
224 AssertReturn(p3dState, VERR_INVALID_STATE);
225
226 PVMSVGA3DDXCONTEXT pDXContext;
227 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
228 AssertRCReturn(rc, rc);
229
230 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
231 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
232 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
233 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
234 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
235 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
236 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
237 RT_UNTRUSTED_VALIDATED_FENCE();
238
239 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
240 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
241 {
242 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
243 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
244 }
245
246 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
247 return rc;
248}
249
250
251int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
252{
253 int rc;
254 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
255 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
256 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
257 AssertReturn(p3dState, VERR_INVALID_STATE);
258
259 PVMSVGA3DDXCONTEXT pDXContext;
260 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
261 AssertRCReturn(rc, rc);
262
263 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
264 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
265 RT_UNTRUSTED_VALIDATED_FENCE();
266
267 PVMSVGA3DSHADER pShader;
268 if (pCmd->shaderId != SVGA_ID_INVALID)
269 {
270 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shaderId];
271 ASSERT_GUEST_RETURN(pEntry->type == pCmd->type, VERR_INVALID_PARAMETER);
272 RT_UNTRUSTED_VALIDATED_FENCE();
273
274 pShader = &pDXContext->paShader[pCmd->shaderId];
275 }
276 else
277 pShader = NULL;
278
279 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->type, pShader);
280 return rc;
281}
282
283
284int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
285{
286 int rc;
287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
288 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
289 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
290 AssertReturn(p3dState, VERR_INVALID_STATE);
291
292 PVMSVGA3DDXCONTEXT pDXContext;
293 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
294 AssertRCReturn(rc, rc);
295
296 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
297 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
298 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
299 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
300 for (uint32_t i = 0; i < cSamplerId; ++i)
301 {
302 SVGA3dSamplerId const samplerId = paSamplerId[i];
303 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
304 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
305 }
306 RT_UNTRUSTED_VALIDATED_FENCE();
307
308 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
309 return rc;
310}
311
312
313int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
314{
315 int rc;
316 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
317 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
318 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
319 AssertReturn(p3dState, VERR_INVALID_STATE);
320
321 PVMSVGA3DDXCONTEXT pDXContext;
322 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
323 AssertRCReturn(rc, rc);
324
325 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
326#ifdef DUMP_BITMAPS
327 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
328 SVGA3dSurfaceImageId image;
329 image.sid = pRTViewEntry->sid;
330 image.face = 0;
331 image.mipmap = 0;
332 VMSVGA3D_MAPPED_SURFACE map;
333 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
334 if (RT_SUCCESS(rc2))
335 {
336 vmsvga3dMapWriteBmpFile(&map, "rt-");
337 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
338 }
339#endif
340 return rc;
341}
342
343
344int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
345{
346 int rc;
347 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
348 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
349 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
350 AssertReturn(p3dState, VERR_INVALID_STATE);
351
352 PVMSVGA3DDXCONTEXT pDXContext;
353 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
354 AssertRCReturn(rc, rc);
355
356 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
357#ifdef DUMP_BITMAPS
358 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
359 SVGA3dSurfaceImageId image;
360 image.sid = pRTViewEntry->sid;
361 image.face = 0;
362 image.mipmap = 0;
363 VMSVGA3D_MAPPED_SURFACE map;
364 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
365 if (RT_SUCCESS(rc2))
366 {
367 vmsvga3dMapWriteBmpFile(&map, "rt-");
368 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
369 }
370#endif
371 return rc;
372}
373
374
375int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
376{
377 int rc;
378 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
379 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
380 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
381 AssertReturn(p3dState, VERR_INVALID_STATE);
382
383 PVMSVGA3DDXCONTEXT pDXContext;
384 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
385 AssertRCReturn(rc, rc);
386
387 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
388 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
389#ifdef DUMP_BITMAPS
390 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
391 SVGA3dSurfaceImageId image;
392 image.sid = pRTViewEntry->sid;
393 image.face = 0;
394 image.mipmap = 0;
395 VMSVGA3D_MAPPED_SURFACE map;
396 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
397 if (RT_SUCCESS(rc2))
398 {
399 vmsvga3dMapWriteBmpFile(&map, "rt-");
400 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
401 }
402#endif
403 return rc;
404}
405
406
407int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
408{
409 int rc;
410 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
411 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
412 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
413 AssertReturn(p3dState, VERR_INVALID_STATE);
414
415 PVMSVGA3DDXCONTEXT pDXContext;
416 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
417 AssertRCReturn(rc, rc);
418
419 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
420 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
421#ifdef DUMP_BITMAPS
422 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
423 SVGA3dSurfaceImageId image;
424 image.sid = pRTViewEntry->sid;
425 image.face = 0;
426 image.mipmap = 0;
427 VMSVGA3D_MAPPED_SURFACE map;
428 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
429 if (RT_SUCCESS(rc2))
430 {
431 vmsvga3dMapWriteBmpFile(&map, "rt-");
432 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
433 }
434#endif
435 return rc;
436}
437
438
439int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
440{
441 int rc;
442 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
443 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
444 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
445 AssertReturn(p3dState, VERR_INVALID_STATE);
446
447 PVMSVGA3DDXCONTEXT pDXContext;
448 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
449 AssertRCReturn(rc, rc);
450
451 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
452#ifdef DUMP_BITMAPS
453 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
454 SVGA3dSurfaceImageId image;
455 image.sid = pRTViewEntry->sid;
456 image.face = 0;
457 image.mipmap = 0;
458 VMSVGA3D_MAPPED_SURFACE map;
459 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
460 if (RT_SUCCESS(rc2))
461 {
462 vmsvga3dMapWriteBmpFile(&map, "rt-");
463 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
464 }
465#endif
466 return rc;
467}
468
469
470int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
471{
472 int rc;
473 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
474 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
475 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
476 AssertReturn(p3dState, VERR_INVALID_STATE);
477
478 PVMSVGA3DDXCONTEXT pDXContext;
479 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
480 AssertRCReturn(rc, rc);
481
482 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
483 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
484 RT_UNTRUSTED_VALIDATED_FENCE();
485
486 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
487 return rc;
488}
489
490
491int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
492{
493 int rc;
494 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
495 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
496 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
497 AssertReturn(p3dState, VERR_INVALID_STATE);
498
499 PVMSVGA3DDXCONTEXT pDXContext;
500 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
501 AssertRCReturn(rc, rc);
502
503 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
504 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
505 RT_UNTRUSTED_VALIDATED_FENCE();
506
507 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
508 return rc;
509}
510
511
512int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
513{
514 int rc;
515 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
516 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
517 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
518 AssertReturn(p3dState, VERR_INVALID_STATE);
519
520 PVMSVGA3DDXCONTEXT pDXContext;
521 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
522 AssertRCReturn(rc, rc);
523
524 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
525 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
526 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
527
528 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
529 return rc;
530}
531
532
533int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
534{
535 int rc;
536 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
537 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
538 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
539 AssertReturn(p3dState, VERR_INVALID_STATE);
540
541 PVMSVGA3DDXCONTEXT pDXContext;
542 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
543 AssertRCReturn(rc, rc);
544
545 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
546
547 pDXContext->svgaDXContext.inputAssembly.topology = topology;
548
549 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
550 return rc;
551}
552
553
554int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
555{
556 int rc;
557 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
558 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
559 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
560 AssertReturn(p3dState, VERR_INVALID_STATE);
561
562 PVMSVGA3DDXCONTEXT pDXContext;
563 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
564 AssertRCReturn(rc, rc);
565
566 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
567 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
568 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
569 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
570 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
571 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
572 RT_UNTRUSTED_VALIDATED_FENCE();
573
574 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
575 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
576 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
577
578 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
579 return rc;
580}
581
582
583int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
584{
585 int rc;
586 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
587 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
588 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
589 AssertReturn(p3dState, VERR_INVALID_STATE);
590
591 PVMSVGA3DDXCONTEXT pDXContext;
592 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
593 AssertRCReturn(rc, rc);
594
595 SVGA3dBlendStateId const blendId = pCmd->blendId;
596
597 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
598 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
599 RT_UNTRUSTED_VALIDATED_FENCE();
600
601 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
602 return rc;
603}
604
605
606int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
607{
608 int rc;
609 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
610 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
611 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
612 AssertReturn(p3dState, VERR_INVALID_STATE);
613
614 PVMSVGA3DDXCONTEXT pDXContext;
615 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
616 AssertRCReturn(rc, rc);
617
618 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
619
620 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
621 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
622 RT_UNTRUSTED_VALIDATED_FENCE();
623
624 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
625 return rc;
626}
627
628
629int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
630{
631 int rc;
632 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
633 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
634 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
635 AssertReturn(p3dState, VERR_INVALID_STATE);
636
637 PVMSVGA3DDXCONTEXT pDXContext;
638 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
639 AssertRCReturn(rc, rc);
640
641 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
642 RT_UNTRUSTED_VALIDATED_FENCE();
643
644 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
645 return rc;
646}
647
648
649int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
650{
651 int rc;
652 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
653 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
654 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
655 AssertReturn(p3dState, VERR_INVALID_STATE);
656
657 PVMSVGA3DDXCONTEXT pDXContext;
658 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
659 AssertRCReturn(rc, rc);
660
661 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
662 return rc;
663}
664
665
666int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
667{
668 int rc;
669 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
670 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
671 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
672 AssertReturn(p3dState, VERR_INVALID_STATE);
673
674 PVMSVGA3DDXCONTEXT pDXContext;
675 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
676 AssertRCReturn(rc, rc);
677
678 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
679 return rc;
680}
681
682
683int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
684{
685 int rc;
686 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
687 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
688 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
689 AssertReturn(p3dState, VERR_INVALID_STATE);
690
691 PVMSVGA3DDXCONTEXT pDXContext;
692 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
693 AssertRCReturn(rc, rc);
694
695 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
696 return rc;
697}
698
699
700int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
701{
702 int rc;
703 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
704 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
705 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
706 AssertReturn(p3dState, VERR_INVALID_STATE);
707
708 PVMSVGA3DDXCONTEXT pDXContext;
709 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
710 AssertRCReturn(rc, rc);
711
712 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
713 return rc;
714}
715
716
717int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
718{
719 int rc;
720 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
721 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
722 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
723 AssertReturn(p3dState, VERR_INVALID_STATE);
724
725 PVMSVGA3DDXCONTEXT pDXContext;
726 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
727 AssertRCReturn(rc, rc);
728
729 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
730 return rc;
731}
732
733
734int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
735{
736 int rc;
737 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
738 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
739 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
740 AssertReturn(p3dState, VERR_INVALID_STATE);
741
742 PVMSVGA3DDXCONTEXT pDXContext;
743 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
744 AssertRCReturn(rc, rc);
745
746 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
747 return rc;
748}
749
750
751int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
752{
753 int rc;
754 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
755 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
756 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
757 AssertReturn(p3dState, VERR_INVALID_STATE);
758
759 PVMSVGA3DDXCONTEXT pDXContext;
760 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
761 AssertRCReturn(rc, rc);
762
763 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
764 return rc;
765}
766
767
768int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
769{
770 int rc;
771 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
772 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
773 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
774 AssertReturn(p3dState, VERR_INVALID_STATE);
775
776 PVMSVGA3DDXCONTEXT pDXContext;
777 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
778 AssertRCReturn(rc, rc);
779
780 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
781 return rc;
782}
783
784
785int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
786{
787 int rc;
788 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
789 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
790 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
791 AssertReturn(p3dState, VERR_INVALID_STATE);
792
793 PVMSVGA3DDXCONTEXT pDXContext;
794 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
795 AssertRCReturn(rc, rc);
796
797 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
798
799 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
800 return rc;
801}
802
803
804int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
805{
806 int rc;
807 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
808 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
809 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
810 AssertReturn(p3dState, VERR_INVALID_STATE);
811
812 PVMSVGA3DDXCONTEXT pDXContext;
813 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
814 AssertRCReturn(rc, rc);
815
816 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
817 return rc;
818}
819
820
821int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
822{
823 int rc;
824 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
825 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
826 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
827 AssertReturn(p3dState, VERR_INVALID_STATE);
828
829 PVMSVGA3DDXCONTEXT pDXContext;
830 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
831 AssertRCReturn(rc, rc);
832
833 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
834 return rc;
835}
836
837
838int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
839{
840 int rc;
841 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
842 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
843 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
844 AssertReturn(p3dState, VERR_INVALID_STATE);
845
846 PVMSVGA3DDXCONTEXT pDXContext;
847 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
848 AssertRCReturn(rc, rc);
849
850 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
851
852 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
853 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
854 RT_UNTRUSTED_VALIDATED_FENCE();
855
856 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
857 return rc;
858}
859
860
861int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
862{
863 int rc;
864 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
865 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
866 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
867 AssertReturn(p3dState, VERR_INVALID_STATE);
868
869 PVMSVGA3DDXCONTEXT pDXContext;
870 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
871 AssertRCReturn(rc, rc);
872
873 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
874
875 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
876 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
877 RT_UNTRUSTED_VALIDATED_FENCE();
878
879 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
880 return rc;
881}
882
883
884int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
885{
886 int rc;
887 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
888 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
889 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
890 AssertReturn(p3dState, VERR_INVALID_STATE);
891
892 PVMSVGA3DDXCONTEXT pDXContext;
893 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
894 AssertRCReturn(rc, rc);
895
896 /** @todo Memcpy if both resources do not have the hardware resource. */
897
898 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
899 return rc;
900}
901
902
903int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
904{
905 int rc;
906 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
907 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
908 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
909 AssertReturn(p3dState, VERR_INVALID_STATE);
910
911 PVMSVGA3DDXCONTEXT pDXContext;
912 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
913 AssertRCReturn(rc, rc);
914
915 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
916 return rc;
917}
918
919
920int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
921{
922 int rc;
923 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
924 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
925 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
926 AssertReturn(p3dState, VERR_INVALID_STATE);
927
928 PVMSVGA3DDXCONTEXT pDXContext;
929 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
930 AssertRCReturn(rc, rc);
931
932 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
933 return rc;
934}
935
936
937int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
938{
939 int rc;
940 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
941 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
942 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
943 AssertReturn(p3dState, VERR_INVALID_STATE);
944
945 PVMSVGA3DDXCONTEXT pDXContext;
946 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
947 AssertRCReturn(rc, rc);
948
949 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
950
951 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
952 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
953 RT_UNTRUSTED_VALIDATED_FENCE();
954
955 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
956 return rc;
957}
958
959
960int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
961{
962 int rc;
963 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
964 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
965 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
966 AssertReturn(p3dState, VERR_INVALID_STATE);
967
968 PVMSVGA3DDXCONTEXT pDXContext;
969 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
970 AssertRCReturn(rc, rc);
971
972 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
973
974 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
975 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
976 RT_UNTRUSTED_VALIDATED_FENCE();
977
978 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
979 pEntry->sid = pCmd->sid;
980 pEntry->format = pCmd->format;
981 pEntry->resourceDimension = pCmd->resourceDimension;
982 pEntry->desc = pCmd->desc;
983
984 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
985 return rc;
986}
987
988
989int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
990{
991 int rc;
992 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
993 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
994 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
995 AssertReturn(p3dState, VERR_INVALID_STATE);
996
997 PVMSVGA3DDXCONTEXT pDXContext;
998 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
999 AssertRCReturn(rc, rc);
1000
1001 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1002
1003 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1004 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1005 RT_UNTRUSTED_VALIDATED_FENCE();
1006
1007 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1008 RT_ZERO(*pEntry);
1009
1010 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1011 return rc;
1012}
1013
1014
1015int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1016{
1017 int rc;
1018 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1019 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1020 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1021 AssertReturn(p3dState, VERR_INVALID_STATE);
1022
1023 PVMSVGA3DDXCONTEXT pDXContext;
1024 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1025 AssertRCReturn(rc, rc);
1026
1027 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1028
1029 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1030 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1031 RT_UNTRUSTED_VALIDATED_FENCE();
1032
1033 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1034 pEntry->sid = pCmd->sid;
1035 pEntry->format = pCmd->format;
1036 pEntry->resourceDimension = pCmd->resourceDimension;
1037 pEntry->desc = pCmd->desc;
1038
1039 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1040 return rc;
1041}
1042
1043
1044int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1045{
1046 int rc;
1047 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1048 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1049 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1050 AssertReturn(p3dState, VERR_INVALID_STATE);
1051
1052 PVMSVGA3DDXCONTEXT pDXContext;
1053 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1054 AssertRCReturn(rc, rc);
1055
1056 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1057
1058 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1059 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1060 RT_UNTRUSTED_VALIDATED_FENCE();
1061
1062 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1063 RT_ZERO(*pEntry);
1064
1065 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1066 {
1067 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1068 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1069 }
1070
1071 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1072 return rc;
1073}
1074
1075
1076int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1077{
1078 int rc;
1079 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1080 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1081 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1082 AssertReturn(p3dState, VERR_INVALID_STATE);
1083
1084 PVMSVGA3DDXCONTEXT pDXContext;
1085 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1086 AssertRCReturn(rc, rc);
1087
1088 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1089
1090 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1091 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1092 RT_UNTRUSTED_VALIDATED_FENCE();
1093
1094 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1095 pEntry->sid = pCmd->sid;
1096 pEntry->format = pCmd->format;
1097 pEntry->resourceDimension = pCmd->resourceDimension;
1098 pEntry->mipSlice = pCmd->mipSlice;
1099 pEntry->firstArraySlice = pCmd->firstArraySlice;
1100 pEntry->arraySize = pCmd->arraySize;
1101 pEntry->flags = pCmd->flags;
1102
1103 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1104 return rc;
1105}
1106
1107
1108int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1109{
1110 int rc;
1111 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1112 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1113 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1114 AssertReturn(p3dState, VERR_INVALID_STATE);
1115
1116 PVMSVGA3DDXCONTEXT pDXContext;
1117 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1118 AssertRCReturn(rc, rc);
1119
1120 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1121
1122 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1123 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1124 RT_UNTRUSTED_VALIDATED_FENCE();
1125
1126 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1127 RT_ZERO(*pEntry);
1128
1129 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1130 return rc;
1131}
1132
1133
1134int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1135{
1136 int rc;
1137 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1138 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1139 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1140 AssertReturn(p3dState, VERR_INVALID_STATE);
1141
1142 PVMSVGA3DDXCONTEXT pDXContext;
1143 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1144 AssertRCReturn(rc, rc);
1145
1146 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1147 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1148 RT_UNTRUSTED_VALIDATED_FENCE();
1149
1150 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1151 pEntry->elid = elementLayoutId;
1152 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1153 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1154
1155#ifdef LOG_ENABLED
1156 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1157 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1158 {
1159 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1160 i,
1161 pEntry->descs[i].inputSlot,
1162 pEntry->descs[i].alignedByteOffset,
1163 pEntry->descs[i].format,
1164 pEntry->descs[i].inputSlotClass,
1165 pEntry->descs[i].instanceDataStepRate,
1166 pEntry->descs[i].inputRegister
1167 ));
1168 }
1169#endif
1170
1171 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1172 return rc;
1173}
1174
1175
1176int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1177{
1178 int rc;
1179 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1180 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1181 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1182 AssertReturn(p3dState, VERR_INVALID_STATE);
1183
1184 PVMSVGA3DDXCONTEXT pDXContext;
1185 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1186 AssertRCReturn(rc, rc);
1187
1188 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1189 return rc;
1190}
1191
1192
1193int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1194{
1195 int rc;
1196 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1197 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1198 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1199 AssertReturn(p3dState, VERR_INVALID_STATE);
1200
1201 PVMSVGA3DDXCONTEXT pDXContext;
1202 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1203 AssertRCReturn(rc, rc);
1204
1205 const SVGA3dBlendStateId blendId = pCmd->blendId;
1206
1207 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1208 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1209 RT_UNTRUSTED_VALIDATED_FENCE();
1210
1211 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1212 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1213 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1214 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1215
1216 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1217 return rc;
1218}
1219
1220
1221int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1222{
1223 int rc;
1224 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1225 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1226 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1227 AssertReturn(p3dState, VERR_INVALID_STATE);
1228
1229 PVMSVGA3DDXCONTEXT pDXContext;
1230 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1231 AssertRCReturn(rc, rc);
1232
1233 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1234 return rc;
1235}
1236
1237
1238int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1239{
1240 int rc;
1241 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1242 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1243 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1244 AssertReturn(p3dState, VERR_INVALID_STATE);
1245
1246 PVMSVGA3DDXCONTEXT pDXContext;
1247 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1248 AssertRCReturn(rc, rc);
1249
1250 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1251
1252 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1253 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1254 RT_UNTRUSTED_VALIDATED_FENCE();
1255
1256 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1257 pEntry->depthEnable = pCmd->depthEnable;
1258 pEntry->depthWriteMask = pCmd->depthWriteMask;
1259 pEntry->depthFunc = pCmd->depthFunc;
1260 pEntry->stencilEnable = pCmd->stencilEnable;
1261 pEntry->frontEnable = pCmd->frontEnable;
1262 pEntry->backEnable = pCmd->backEnable;
1263 pEntry->stencilReadMask = pCmd->stencilReadMask;
1264 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1265
1266 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1267 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1268 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1269 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1270
1271 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1272 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1273 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1274 pEntry->backStencilFunc = pCmd->backStencilFunc;
1275
1276 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1277 return rc;
1278}
1279
1280
1281int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1282{
1283 int rc;
1284 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1285 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1286 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1287 AssertReturn(p3dState, VERR_INVALID_STATE);
1288
1289 PVMSVGA3DDXCONTEXT pDXContext;
1290 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1291 AssertRCReturn(rc, rc);
1292
1293 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1294 return rc;
1295}
1296
1297
1298int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1299{
1300 int rc;
1301 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1302 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1303 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1304 AssertReturn(p3dState, VERR_INVALID_STATE);
1305
1306 PVMSVGA3DDXCONTEXT pDXContext;
1307 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1308 AssertRCReturn(rc, rc);
1309
1310 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1311
1312 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1313 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1314 RT_UNTRUSTED_VALIDATED_FENCE();
1315
1316 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1317 pEntry->fillMode = pCmd->fillMode;
1318 pEntry->cullMode = pCmd->cullMode;
1319 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1320 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1321 pEntry->depthBias = pCmd->depthBias;
1322 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1323 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1324 pEntry->depthClipEnable = pCmd->depthClipEnable;
1325 pEntry->scissorEnable = pCmd->scissorEnable;
1326 pEntry->multisampleEnable = pCmd->multisampleEnable;
1327 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1328 pEntry->lineWidth = pCmd->lineWidth;
1329 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1330 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1331 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1332 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1333 RT_ZERO(pEntry->mustBeZero);
1334
1335 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1336 return rc;
1337}
1338
1339
1340int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1341{
1342 int rc;
1343 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1344 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1345 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1346 AssertReturn(p3dState, VERR_INVALID_STATE);
1347
1348 PVMSVGA3DDXCONTEXT pDXContext;
1349 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1350 AssertRCReturn(rc, rc);
1351
1352 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1353 return rc;
1354}
1355
1356
1357int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1358{
1359 int rc;
1360 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1361 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1362 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1363 AssertReturn(p3dState, VERR_INVALID_STATE);
1364
1365 PVMSVGA3DDXCONTEXT pDXContext;
1366 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1367 AssertRCReturn(rc, rc);
1368
1369 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1370
1371 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1372 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1373 RT_UNTRUSTED_VALIDATED_FENCE();
1374
1375 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1376 pEntry->filter = pCmd->filter;
1377 pEntry->addressU = pCmd->addressU;
1378 pEntry->addressV = pCmd->addressV;
1379 pEntry->addressW = pCmd->addressW;
1380 pEntry->mipLODBias = pCmd->mipLODBias;
1381 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1382 pEntry->comparisonFunc = pCmd->comparisonFunc;
1383 pEntry->borderColor = pCmd->borderColor;
1384 pEntry->minLOD = pCmd->minLOD;
1385 pEntry->maxLOD = pCmd->maxLOD;
1386
1387 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1388 return rc;
1389}
1390
1391
1392int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1393{
1394 int rc;
1395 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1396 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1397 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1398 AssertReturn(p3dState, VERR_INVALID_STATE);
1399
1400 PVMSVGA3DDXCONTEXT pDXContext;
1401 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1402 AssertRCReturn(rc, rc);
1403
1404 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1405 return rc;
1406}
1407
1408
1409int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1410{
1411 int rc;
1412 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1413 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1414 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1415 AssertReturn(p3dState, VERR_INVALID_STATE);
1416
1417 PVMSVGA3DDXCONTEXT pDXContext;
1418 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1419 AssertRCReturn(rc, rc);
1420
1421 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1422
1423 SVGA3dShaderId const shaderId = pCmd->shaderId;
1424
1425 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1426 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1427 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1428 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1429 RT_UNTRUSTED_VALIDATED_FENCE();
1430
1431 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1432 pEntry->type = pCmd->type;
1433 pEntry->sizeInBytes = pCmd->sizeInBytes;
1434 pEntry->offsetInBytes = 0;
1435 pEntry->mobid = SVGA_ID_INVALID;
1436
1437 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1438 if (pShader->id != SVGA_ID_INVALID)
1439 {
1440 /* Cleanup the current shader. */
1441 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1442 RTMemFree(pShader->pShaderProgram);
1443 }
1444
1445 pShader->id = shaderId;
1446 pShader->cid = idDXContext;
1447 pShader->type = pEntry->type;
1448 pShader->cbData = pEntry->sizeInBytes;
1449 pShader->pShaderProgram = NULL;
1450 pShader->u.pvBackendShader = NULL;
1451
1452 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1453 return rc;
1454}
1455
1456
1457int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1458{
1459 int rc;
1460 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1461 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1462 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1463 AssertReturn(p3dState, VERR_INVALID_STATE);
1464
1465 PVMSVGA3DDXCONTEXT pDXContext;
1466 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1467 AssertRCReturn(rc, rc);
1468
1469 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1470
1471 SVGA3dShaderId const shaderId = pCmd->shaderId;
1472
1473 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1474 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1475 RT_UNTRUSTED_VALIDATED_FENCE();
1476
1477 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1478
1479 /* Cleanup COTable entries.*/
1480 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1481 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1482 pEntry->sizeInBytes = 0;
1483 pEntry->offsetInBytes = 0;
1484 pEntry->mobid = SVGA_ID_INVALID;
1485
1486 /** @todo Destroy shaders on context and backend deletion. */
1487 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1488 DXShaderFree(&pShader->shaderInfo);
1489 pShader->id = SVGA_ID_INVALID;
1490 pShader->cid = SVGA_ID_INVALID;
1491 pShader->type = SVGA3D_SHADERTYPE_INVALID;
1492 pShader->cbData = 0;
1493 RTMemFree(pShader->pShaderProgram);
1494 pShader->pShaderProgram = NULL;
1495 pShader->u.pvBackendShader = NULL;
1496
1497 return rc;
1498}
1499
1500
1501static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1502{
1503 /* How many bytes the MOB can hold. */
1504 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1505 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1506 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1507
1508 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1509 if (RT_SUCCESS(rc))
1510 {
1511 /* Get the length of the shader bytecode. */
1512 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1513 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1514 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1515
1516 pShader->cbData = cToken * 4;
1517
1518 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1519 * If they are not there (Linux guest driver does not provide them), then it is fine
1520 * and the signatures generated by DXShaderParse will be used.
1521 */
1522 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1523 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1524 {
1525 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1526 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1527 {
1528 DEBUG_BREAKPOINT_TEST();
1529 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1530 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1531 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1532 VERR_INVALID_PARAMETER);
1533
1534 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1535 + pSignatureHeader->numOutputSignatures
1536 + pSignatureHeader->numPatchConstantSignatures;
1537 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1538 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1539
1540 /* Copy to DXShaderInfo. */
1541 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1542 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1543 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1544
1545 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1546 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1547 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1548
1549 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1550 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1551 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1552 }
1553 }
1554 }
1555
1556 return rc;
1557}
1558
1559
1560int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1561{
1562 int rc;
1563 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1564 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1565 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1566 AssertReturn(p3dState, VERR_INVALID_STATE);
1567
1568 PVMSVGA3DDXCONTEXT pDXContext;
1569 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1570 AssertRCReturn(rc, rc);
1571
1572 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1573 RT_UNTRUSTED_VALIDATED_FENCE();
1574
1575 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
1576 //pEntry->type;
1577 //pEntry->sizeInBytes;
1578 pEntry->offsetInBytes = pCmd->offsetInBytes;
1579 pEntry->mobid = vmsvgaR3MobId(pMob);
1580
1581 if (pMob)
1582 {
1583 /* Bind a mob to the shader. */
1584
1585 /* Create a memory pointer for the MOB, which is accessible by host. */
1586 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1587 if (RT_SUCCESS(rc))
1588 {
1589 /* Get pointer to the shader bytecode. This will also verify the offset. */
1590 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1591 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1592
1593 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shid];
1594 Assert( pShader->id == pCmd->shid
1595 && pShader->type == pEntry->type); /* The host ensures this. */
1596
1597 /* Get the shader and optional signatures from the MOB. */
1598 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1599 if (RT_SUCCESS(rc))
1600 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1601
1602 if (RT_FAILURE(rc))
1603 {
1604 /** @todo Any cleanup? */
1605 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1606 }
1607 }
1608 }
1609 else
1610 {
1611 /* Unbind. */
1612 /** @todo Nothing to do here but release the MOB? */
1613 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1614 }
1615
1616 return rc;
1617}
1618
1619
1620int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
1621{
1622 int rc;
1623 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1624 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1625 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1626 AssertReturn(p3dState, VERR_INVALID_STATE);
1627
1628 PVMSVGA3DDXCONTEXT pDXContext;
1629 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1630 AssertRCReturn(rc, rc);
1631
1632 SVGA3dStreamOutputId const soid = pCmd->soid;
1633
1634 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1635 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1636 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
1637 RT_UNTRUSTED_VALIDATED_FENCE();
1638
1639 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1640 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
1641 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
1642 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
1643 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
1644 pEntry->numOutputStreamStrides = 0;
1645 pEntry->mobid = SVGA_ID_INVALID;
1646 pEntry->offsetInBytes = 0;
1647 pEntry->usesMob = 0;
1648 pEntry->pad0 = 0;
1649 pEntry->pad1 = 0;
1650 RT_ZERO(pEntry->pad2);
1651
1652 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
1653 return rc;
1654}
1655
1656
1657int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
1658{
1659 int rc;
1660 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1661 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1662 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1663 AssertReturn(p3dState, VERR_INVALID_STATE);
1664
1665 PVMSVGA3DDXCONTEXT pDXContext;
1666 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1667 AssertRCReturn(rc, rc);
1668
1669 SVGA3dStreamOutputId const soid = pCmd->soid;
1670
1671 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1672 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1673 RT_UNTRUSTED_VALIDATED_FENCE();
1674
1675 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
1676
1677 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1678 RT_ZERO(*pEntry);
1679 pEntry->mobid = SVGA_ID_INVALID;
1680
1681 return rc;
1682}
1683
1684
1685int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
1686{
1687 int rc;
1688 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1689 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1690 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1691 AssertReturn(p3dState, VERR_INVALID_STATE);
1692
1693 PVMSVGA3DDXCONTEXT pDXContext;
1694 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1695 AssertRCReturn(rc, rc);
1696
1697 SVGA3dStreamOutputId const soid = pCmd->soid;
1698
1699 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1700 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
1701 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1702 RT_UNTRUSTED_VALIDATED_FENCE();
1703
1704 pDXContext->svgaDXContext.streamOut.soid = soid;
1705
1706 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
1707 return rc;
1708}
1709
1710
1711int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
1712{
1713 int rc;
1714 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1715 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
1716 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1717 AssertReturn(p3dState, VERR_INVALID_STATE);
1718
1719 PVMSVGA3DDXCONTEXT pDXContext;
1720 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1721 AssertRCReturn(rc, rc);
1722 RT_UNTRUSTED_VALIDATED_FENCE();
1723
1724 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1725 RT_UNTRUSTED_VALIDATED_FENCE();
1726
1727 uint32_t validSizeInBytes;
1728 uint32_t cbCOT;
1729 if (pMob)
1730 {
1731 /* Bind a mob to the COTable. */
1732 validSizeInBytes = pCmd->validSizeInBytes;
1733 cbCOT = vmsvgaR3MobSize(pMob);
1734
1735 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
1736 RT_UNTRUSTED_VALIDATED_FENCE();
1737
1738 /* Create a memory pointer, which is accessible by host. */
1739 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
1740 }
1741 else
1742 {
1743 /* Unbind. */
1744 validSizeInBytes = 0;
1745 cbCOT = 0;
1746 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
1747 }
1748
1749 uint32_t cEntries = 0;
1750 uint32_t cValidEntries = 0;
1751 if (RT_SUCCESS(rc))
1752 {
1753 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
1754 {
1755 sizeof(SVGACOTableDXRTViewEntry),
1756 sizeof(SVGACOTableDXDSViewEntry),
1757 sizeof(SVGACOTableDXSRViewEntry),
1758 sizeof(SVGACOTableDXElementLayoutEntry),
1759 sizeof(SVGACOTableDXBlendStateEntry),
1760 sizeof(SVGACOTableDXDepthStencilEntry),
1761 sizeof(SVGACOTableDXRasterizerStateEntry),
1762 sizeof(SVGACOTableDXSamplerEntry),
1763 sizeof(SVGACOTableDXStreamOutputEntry),
1764 sizeof(SVGACOTableDXQueryEntry),
1765 sizeof(SVGACOTableDXShaderEntry),
1766 sizeof(SVGACOTableDXUAViewEntry),
1767 };
1768
1769 cEntries = cbCOT / s_acbEntry[pCmd->type];
1770 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
1771 }
1772
1773 if (RT_SUCCESS(rc))
1774 {
1775 pDXContext->aCOTMobs[pCmd->type] = pMob;
1776
1777 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
1778 switch (pCmd->type)
1779 {
1780 case SVGA_COTABLE_RTVIEW:
1781 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
1782 pDXContext->cot.cRTView = cEntries;
1783 break;
1784 case SVGA_COTABLE_DSVIEW:
1785 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
1786 pDXContext->cot.cDSView = cEntries;
1787 break;
1788 case SVGA_COTABLE_SRVIEW:
1789 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
1790 pDXContext->cot.cSRView = cEntries;
1791 break;
1792 case SVGA_COTABLE_ELEMENTLAYOUT:
1793 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
1794 pDXContext->cot.cElementLayout = cEntries;
1795 break;
1796 case SVGA_COTABLE_BLENDSTATE:
1797 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
1798 pDXContext->cot.cBlendState = cEntries;
1799 break;
1800 case SVGA_COTABLE_DEPTHSTENCIL:
1801 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
1802 pDXContext->cot.cDepthStencil = cEntries;
1803 break;
1804 case SVGA_COTABLE_RASTERIZERSTATE:
1805 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
1806 pDXContext->cot.cRasterizerState = cEntries;
1807 break;
1808 case SVGA_COTABLE_SAMPLER:
1809 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
1810 pDXContext->cot.cSampler = cEntries;
1811 break;
1812 case SVGA_COTABLE_STREAMOUTPUT:
1813 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
1814 pDXContext->cot.cStreamOutput = cEntries;
1815 break;
1816 case SVGA_COTABLE_DXQUERY:
1817 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
1818 pDXContext->cot.cQuery = cEntries;
1819 break;
1820 case SVGA_COTABLE_DXSHADER:
1821 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
1822 pDXContext->cot.cShader = cEntries;
1823
1824 /* Create host array for information about shaders. */
1825 RTMemFree(pDXContext->paShader);
1826 pDXContext->paShader = NULL;
1827
1828 if (pDXContext->cot.cShader)
1829 {
1830 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
1831 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
1832 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
1833 pDXContext->paShader[i].id = SVGA_ID_INVALID;
1834 }
1835 break;
1836 case SVGA_COTABLE_UAVIEW:
1837 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
1838 pDXContext->cot.cUAView = cEntries;
1839 break;
1840 case SVGA_COTABLE_MAX: break; /* Compiler warning */
1841 }
1842 }
1843 else
1844 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1845
1846 /* Notify the backend. */
1847 if (RT_SUCCESS(rc))
1848 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
1849
1850 return rc;
1851}
1852
1853
1854int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
1855{
1856 int rc;
1857 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1858 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1859 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1860 AssertReturn(p3dState, VERR_INVALID_STATE);
1861
1862 PVMSVGA3DDXCONTEXT pDXContext;
1863 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1864 AssertRCReturn(rc, rc);
1865 RT_UNTRUSTED_VALIDATED_FENCE();
1866
1867 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1868 RT_UNTRUSTED_VALIDATED_FENCE();
1869
1870 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
1871 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
1872 return rc;
1873}
1874
1875
1876int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1877{
1878 int rc;
1879 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1880 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
1881 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1882 AssertReturn(p3dState, VERR_INVALID_STATE);
1883
1884 PVMSVGA3DDXCONTEXT pDXContext;
1885 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1886 AssertRCReturn(rc, rc);
1887
1888 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
1889 return rc;
1890}
1891
1892
1893int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
1894{
1895 int rc;
1896 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1897 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
1898 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1899 AssertReturn(p3dState, VERR_INVALID_STATE);
1900
1901 PVMSVGA3DDXCONTEXT pDXContext;
1902 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1903 AssertRCReturn(rc, rc);
1904
1905 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
1906 return rc;
1907}
1908
1909
1910int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1911{
1912 int rc;
1913 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1914 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
1915 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1916 AssertReturn(p3dState, VERR_INVALID_STATE);
1917
1918 PVMSVGA3DDXCONTEXT pDXContext;
1919 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1920 AssertRCReturn(rc, rc);
1921
1922 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
1923 return rc;
1924}
1925
1926
1927int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1928{
1929 int rc;
1930 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1931 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
1932 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1933 AssertReturn(p3dState, VERR_INVALID_STATE);
1934
1935 PVMSVGA3DDXCONTEXT pDXContext;
1936 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1937 AssertRCReturn(rc, rc);
1938
1939 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
1940 return rc;
1941}
1942
1943
1944int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1945{
1946 int rc;
1947 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1948 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
1949 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1950 AssertReturn(p3dState, VERR_INVALID_STATE);
1951
1952 PVMSVGA3DDXCONTEXT pDXContext;
1953 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1954 AssertRCReturn(rc, rc);
1955
1956 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
1957 return rc;
1958}
1959
1960
1961int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
1962{
1963 int rc;
1964 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1965 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
1966 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1967 AssertReturn(p3dState, VERR_INVALID_STATE);
1968
1969 PVMSVGA3DDXCONTEXT pDXContext;
1970 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1971 AssertRCReturn(rc, rc);
1972
1973 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
1974 return rc;
1975}
1976
1977
1978int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1979{
1980 int rc;
1981 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1982 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
1983 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1984 AssertReturn(p3dState, VERR_INVALID_STATE);
1985
1986 PVMSVGA3DDXCONTEXT pDXContext;
1987 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1988 AssertRCReturn(rc, rc);
1989
1990 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
1991 return rc;
1992}
1993
1994
1995int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
1996{
1997 int rc;
1998 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1999 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2000 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2001 AssertReturn(p3dState, VERR_INVALID_STATE);
2002
2003 PVMSVGA3DDXCONTEXT pDXContext;
2004 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2005 AssertRCReturn(rc, rc);
2006
2007 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2008 return rc;
2009}
2010
2011
2012int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2013{
2014 int rc;
2015 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2016 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2017 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2018 AssertReturn(p3dState, VERR_INVALID_STATE);
2019
2020 PVMSVGA3DDXCONTEXT pDXContext;
2021 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2022 AssertRCReturn(rc, rc);
2023
2024 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2025 return rc;
2026}
2027
2028
2029int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2030{
2031 int rc;
2032 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2033 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2034 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2035 AssertReturn(p3dState, VERR_INVALID_STATE);
2036
2037 PVMSVGA3DDXCONTEXT pDXContext;
2038 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2039 AssertRCReturn(rc, rc);
2040
2041 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2042 return rc;
2043}
2044
2045
2046int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2047{
2048 int rc;
2049 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2050 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2051 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2052 AssertReturn(p3dState, VERR_INVALID_STATE);
2053
2054 PVMSVGA3DDXCONTEXT pDXContext;
2055 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2056 AssertRCReturn(rc, rc);
2057
2058 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2059 return rc;
2060}
2061
2062
2063int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2064{
2065 int rc;
2066 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2067 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2068 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2069 AssertReturn(p3dState, VERR_INVALID_STATE);
2070
2071 PVMSVGA3DDXCONTEXT pDXContext;
2072 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2073 AssertRCReturn(rc, rc);
2074
2075 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2076 return rc;
2077}
2078
2079
2080int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2081{
2082 int rc;
2083 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2084 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2085 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2086 AssertReturn(p3dState, VERR_INVALID_STATE);
2087
2088 PVMSVGA3DDXCONTEXT pDXContext;
2089 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2090 AssertRCReturn(rc, rc);
2091
2092 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2093 return rc;
2094}
2095
2096
2097int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2098{
2099 int rc;
2100 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2101 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2102 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2103 AssertReturn(p3dState, VERR_INVALID_STATE);
2104
2105 PVMSVGA3DDXCONTEXT pDXContext;
2106 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2107 AssertRCReturn(rc, rc);
2108
2109 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2110 return rc;
2111}
2112
2113
2114int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2115{
2116 int rc;
2117 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2118 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2119 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2120 AssertReturn(p3dState, VERR_INVALID_STATE);
2121
2122 PVMSVGA3DDXCONTEXT pDXContext;
2123 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2124 AssertRCReturn(rc, rc);
2125
2126 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2127 return rc;
2128}
2129
2130
2131int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2132{
2133 int rc;
2134 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2135 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2136 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2137 AssertReturn(p3dState, VERR_INVALID_STATE);
2138
2139 PVMSVGA3DDXCONTEXT pDXContext;
2140 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2141 AssertRCReturn(rc, rc);
2142
2143 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2144 return rc;
2145}
2146
2147
2148int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2149{
2150 int rc;
2151 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2152 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2153 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2154 AssertReturn(p3dState, VERR_INVALID_STATE);
2155
2156 PVMSVGA3DDXCONTEXT pDXContext;
2157 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2158 AssertRCReturn(rc, rc);
2159
2160 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2161 return rc;
2162}
2163
2164
2165int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2166{
2167 int rc;
2168 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2169 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2170 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2171 AssertReturn(p3dState, VERR_INVALID_STATE);
2172
2173 PVMSVGA3DDXCONTEXT pDXContext;
2174 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2175 AssertRCReturn(rc, rc);
2176
2177 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2178 return rc;
2179}
2180
2181
2182int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2183{
2184 int rc;
2185 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2186 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2187 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2188 AssertReturn(p3dState, VERR_INVALID_STATE);
2189
2190 PVMSVGA3DDXCONTEXT pDXContext;
2191 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2192 AssertRCReturn(rc, rc);
2193
2194 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2195 return rc;
2196}
2197
2198
2199int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2200{
2201 int rc;
2202 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2203 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2204 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2205 AssertReturn(p3dState, VERR_INVALID_STATE);
2206
2207 PVMSVGA3DDXCONTEXT pDXContext;
2208 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2209 AssertRCReturn(rc, rc);
2210
2211 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2212 return rc;
2213}
2214
2215
2216int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2217{
2218 int rc;
2219 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2220 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2221 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2222 AssertReturn(p3dState, VERR_INVALID_STATE);
2223
2224 PVMSVGA3DDXCONTEXT pDXContext;
2225 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2226 AssertRCReturn(rc, rc);
2227
2228 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2229 return rc;
2230}
2231
2232
2233int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2234{
2235 int rc;
2236 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2237 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2238 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2239 AssertReturn(p3dState, VERR_INVALID_STATE);
2240
2241 PVMSVGA3DDXCONTEXT pDXContext;
2242 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2243 AssertRCReturn(rc, rc);
2244
2245 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2246 return rc;
2247}
2248
2249
2250int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2251{
2252 int rc;
2253 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2254 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2255 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2256 AssertReturn(p3dState, VERR_INVALID_STATE);
2257
2258 PVMSVGA3DDXCONTEXT pDXContext;
2259 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2260 AssertRCReturn(rc, rc);
2261
2262 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2263 return rc;
2264}
2265
2266
2267int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2268{
2269 int rc;
2270 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2271 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2272 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2273 AssertReturn(p3dState, VERR_INVALID_STATE);
2274
2275 PVMSVGA3DDXCONTEXT pDXContext;
2276 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2277 AssertRCReturn(rc, rc);
2278
2279 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2280 return rc;
2281}
2282
2283
2284int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2285{
2286 int rc;
2287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2288 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2289 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2290 AssertReturn(p3dState, VERR_INVALID_STATE);
2291
2292 PVMSVGA3DDXCONTEXT pDXContext;
2293 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2294 AssertRCReturn(rc, rc);
2295
2296 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2297 return rc;
2298}
2299
2300
2301int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2302{
2303 int rc;
2304 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2305 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2306 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2307 AssertReturn(p3dState, VERR_INVALID_STATE);
2308
2309 PVMSVGA3DDXCONTEXT pDXContext;
2310 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2311 AssertRCReturn(rc, rc);
2312
2313 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2314 return rc;
2315}
2316
2317
2318int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2319{
2320 int rc;
2321 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2322 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2323 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2324 AssertReturn(p3dState, VERR_INVALID_STATE);
2325
2326 PVMSVGA3DDXCONTEXT pDXContext;
2327 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2328 AssertRCReturn(rc, rc);
2329
2330 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2331 return rc;
2332}
2333
2334
2335int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2336{
2337 int rc;
2338 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2339 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2340 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2341 AssertReturn(p3dState, VERR_INVALID_STATE);
2342
2343 PVMSVGA3DDXCONTEXT pDXContext;
2344 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2345 AssertRCReturn(rc, rc);
2346
2347 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2348 return rc;
2349}
2350
2351
2352int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2353{
2354 int rc;
2355 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2356 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2357 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2358 AssertReturn(p3dState, VERR_INVALID_STATE);
2359
2360 PVMSVGA3DDXCONTEXT pDXContext;
2361 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2362 AssertRCReturn(rc, rc);
2363
2364 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2365 return rc;
2366}
2367
2368
2369int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2370{
2371 int rc;
2372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2375 AssertReturn(p3dState, VERR_INVALID_STATE);
2376
2377 PVMSVGA3DDXCONTEXT pDXContext;
2378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2379 AssertRCReturn(rc, rc);
2380
2381 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2382 return rc;
2383}
2384
2385
2386int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2387{
2388 int rc;
2389 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2390 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2391 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2392 AssertReturn(p3dState, VERR_INVALID_STATE);
2393
2394 PVMSVGA3DDXCONTEXT pDXContext;
2395 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2396 AssertRCReturn(rc, rc);
2397
2398 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2399 return rc;
2400}
2401
2402
2403int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2404{
2405 int rc;
2406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2407 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2408 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2409 AssertReturn(p3dState, VERR_INVALID_STATE);
2410
2411 PVMSVGA3DDXCONTEXT pDXContext;
2412 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2413 AssertRCReturn(rc, rc);
2414
2415 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2416 return rc;
2417}
2418
2419
2420int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2421{
2422 int rc;
2423 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2424 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2425 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2426 AssertReturn(p3dState, VERR_INVALID_STATE);
2427
2428 PVMSVGA3DDXCONTEXT pDXContext;
2429 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2430 AssertRCReturn(rc, rc);
2431
2432 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2433 return rc;
2434}
2435
2436
2437int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2438{
2439 int rc;
2440 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2441 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2442 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2443 AssertReturn(p3dState, VERR_INVALID_STATE);
2444
2445 PVMSVGA3DDXCONTEXT pDXContext;
2446 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2447 AssertRCReturn(rc, rc);
2448
2449 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2450 return rc;
2451}
2452
2453
2454int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2455{
2456 int rc;
2457 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2458 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2459 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2460 AssertReturn(p3dState, VERR_INVALID_STATE);
2461
2462 PVMSVGA3DDXCONTEXT pDXContext;
2463 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2464 AssertRCReturn(rc, rc);
2465
2466 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2467 return rc;
2468}
2469
2470
2471int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2472{
2473 int rc;
2474 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2475 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2476 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2477 AssertReturn(p3dState, VERR_INVALID_STATE);
2478
2479 PVMSVGA3DDXCONTEXT pDXContext;
2480 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2481 AssertRCReturn(rc, rc);
2482
2483 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2484 return rc;
2485}
2486
2487
2488int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2489{
2490 int rc;
2491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2492 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2493 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2494 AssertReturn(p3dState, VERR_INVALID_STATE);
2495
2496 PVMSVGA3DDXCONTEXT pDXContext;
2497 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2498 AssertRCReturn(rc, rc);
2499
2500 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2501 return rc;
2502}
2503
2504
2505int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2506{
2507 int rc;
2508 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2509 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2510 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2511 AssertReturn(p3dState, VERR_INVALID_STATE);
2512
2513 PVMSVGA3DDXCONTEXT pDXContext;
2514 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2515 AssertRCReturn(rc, rc);
2516
2517 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2518 return rc;
2519}
2520
2521
2522int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2523{
2524 int rc;
2525 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2526 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2527 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2528 AssertReturn(p3dState, VERR_INVALID_STATE);
2529
2530 PVMSVGA3DDXCONTEXT pDXContext;
2531 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2532 AssertRCReturn(rc, rc);
2533
2534 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2535 return rc;
2536}
2537
2538
2539int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2540{
2541 int rc;
2542 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2543 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2544 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2545 AssertReturn(p3dState, VERR_INVALID_STATE);
2546
2547 PVMSVGA3DDXCONTEXT pDXContext;
2548 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2549 AssertRCReturn(rc, rc);
2550
2551 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2552 return rc;
2553}
2554
2555
2556int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2557{
2558 int rc;
2559 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2560 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2561 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2562 AssertReturn(p3dState, VERR_INVALID_STATE);
2563
2564 PVMSVGA3DDXCONTEXT pDXContext;
2565 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2566 AssertRCReturn(rc, rc);
2567
2568 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2569 return rc;
2570}
2571
2572
2573int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2574{
2575 int rc;
2576 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2577 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2578 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2579 AssertReturn(p3dState, VERR_INVALID_STATE);
2580
2581 PVMSVGA3DDXCONTEXT pDXContext;
2582 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2583 AssertRCReturn(rc, rc);
2584
2585 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2586 return rc;
2587}
2588
2589
2590int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2591{
2592 int rc;
2593 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2594 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2595 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2596 AssertReturn(p3dState, VERR_INVALID_STATE);
2597
2598 PVMSVGA3DDXCONTEXT pDXContext;
2599 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2600 AssertRCReturn(rc, rc);
2601
2602 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2603 return rc;
2604}
2605
2606
2607int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2608{
2609 int rc;
2610 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2611 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2612 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2613 AssertReturn(p3dState, VERR_INVALID_STATE);
2614
2615 PVMSVGA3DDXCONTEXT pDXContext;
2616 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2617 AssertRCReturn(rc, rc);
2618
2619 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2620 return rc;
2621}
2622
2623
2624int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2625{
2626 int rc;
2627 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2628 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2629 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2630 AssertReturn(p3dState, VERR_INVALID_STATE);
2631
2632 PVMSVGA3DDXCONTEXT pDXContext;
2633 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2634 AssertRCReturn(rc, rc);
2635
2636 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2637 return rc;
2638}
2639
2640
2641int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2642{
2643 int rc;
2644 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2645 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2646 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2647 AssertReturn(p3dState, VERR_INVALID_STATE);
2648
2649 PVMSVGA3DDXCONTEXT pDXContext;
2650 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2651 AssertRCReturn(rc, rc);
2652
2653 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2654 return rc;
2655}
2656
2657
2658int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2659{
2660 int rc;
2661 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2662 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2663 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2664 AssertReturn(p3dState, VERR_INVALID_STATE);
2665
2666 PVMSVGA3DDXCONTEXT pDXContext;
2667 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2668 AssertRCReturn(rc, rc);
2669
2670 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2671 return rc;
2672}
2673
2674
2675int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2676{
2677 int rc;
2678 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2679 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2680 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2681 AssertReturn(p3dState, VERR_INVALID_STATE);
2682
2683 PVMSVGA3DDXCONTEXT pDXContext;
2684 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2685 AssertRCReturn(rc, rc);
2686
2687 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2688 return rc;
2689}
2690
2691
2692int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2693{
2694 int rc;
2695 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2696 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2697 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2698 AssertReturn(p3dState, VERR_INVALID_STATE);
2699
2700 PVMSVGA3DDXCONTEXT pDXContext;
2701 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2702 AssertRCReturn(rc, rc);
2703
2704 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2705 return rc;
2706}
2707
2708
2709int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
2710{
2711 int rc;
2712 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2713 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
2714 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2715 AssertReturn(p3dState, VERR_INVALID_STATE);
2716
2717 PVMSVGA3DDXCONTEXT pDXContext;
2718 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2719 AssertRCReturn(rc, rc);
2720
2721 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
2722 return rc;
2723}
2724
2725
2726int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2727{
2728 int rc;
2729 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2730 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
2731 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2732 AssertReturn(p3dState, VERR_INVALID_STATE);
2733
2734 PVMSVGA3DDXCONTEXT pDXContext;
2735 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2736 AssertRCReturn(rc, rc);
2737
2738 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
2739 return rc;
2740}
2741
2742
2743int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
2744{
2745 int rc;
2746 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2747 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
2748 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2749 AssertReturn(p3dState, VERR_INVALID_STATE);
2750
2751 PVMSVGA3DDXCONTEXT pDXContext;
2752 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2753 AssertRCReturn(rc, rc);
2754
2755 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
2756 return rc;
2757}
2758
2759
2760int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
2761{
2762 int rc;
2763 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2764 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
2765 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2766 AssertReturn(p3dState, VERR_INVALID_STATE);
2767
2768 PVMSVGA3DDXCONTEXT pDXContext;
2769 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2770 AssertRCReturn(rc, rc);
2771
2772 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
2773 return rc;
2774}
2775
2776
2777int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2778{
2779 int rc;
2780 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2781 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
2782 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2783 AssertReturn(p3dState, VERR_INVALID_STATE);
2784
2785 PVMSVGA3DDXCONTEXT pDXContext;
2786 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2787 AssertRCReturn(rc, rc);
2788
2789 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
2790 return rc;
2791}
2792
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