VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-savedstate.cpp

Last change on this file was 102808, checked in by vboxsync, 4 months ago

Devices/Graphics: multisampling.
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1/* $Id: DevVGA-SVGA3d-dx-savedstate.cpp 102808 2024-01-10 08:16:30Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - DX backend saved state.
4 */
5
6/*
7 * Copyright (C) 2022-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33#include <VBox/AssertGuest.h>
34#include <iprt/errcore.h>
35#include <VBox/log.h>
36#include <VBox/vmm/pdmdev.h>
37
38#include <iprt/assert.h>
39#include <iprt/mem.h>
40
41#include <VBoxVideo.h> /* required by DevVGA.h */
42
43/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
44#include "DevVGA.h"
45
46#include "DevVGA-SVGA.h"
47#include "DevVGA-SVGA3d.h"
48#include "DevVGA-SVGA3d-internal.h"
49#include "DevVGA-SVGA-internal.h"
50
51/*
52 * Load
53 */
54
55static int vmsvga3dDXLoadSurface(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
56{
57 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
58 int rc;
59
60 uint32_t sid;
61 rc = pHlp->pfnSSMGetU32(pSSM, &sid);
62 AssertRCReturn(rc, rc);
63
64 if (sid == SVGA3D_INVALID_ID)
65 return VINF_SUCCESS;
66
67 /* Define the surface. */
68 SVGAOTableSurfaceEntry entrySurface;
69 rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, sid, &entrySurface);
70 AssertRCReturn(rc, rc);
71
72 /** @todo fAllocMipLevels=false and alloc miplevels if there is data to be loaded. */
73 rc = vmsvga3dSurfaceDefine(pThisCC, sid, RT_MAKE_U64(entrySurface.surface1Flags, entrySurface.surface2Flags), entrySurface.format,
74 entrySurface.multisampleCount, (SVGA3dMSPattern)entrySurface.multisamplePattern, (SVGA3dMSQualityLevel)entrySurface.qualityLevel, entrySurface.autogenFilter,
75 entrySurface.numMipLevels, &entrySurface.size,
76 entrySurface.arraySize, entrySurface.bufferByteStride,
77 /* fAllocMipLevels = */ true);
78 AssertRCReturn(rc, rc);
79
80 PVMSVGA3DSURFACE pSurface = p3dState->papSurfaces[sid];
81 AssertReturn(pSurface->id == sid, VERR_INTERNAL_ERROR);
82
83 /* Load the surface fields which are not part of SVGAOTableSurfaceEntry. */
84 pHlp->pfnSSMGetU32(pSSM, &pSurface->idAssociatedContext);
85
86 /* Load miplevels data to the surface buffers. */
87 for (uint32_t j = 0; j < pSurface->cLevels * pSurface->surfaceDesc.numArrayElements; j++)
88 {
89 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[j];
90
91 /* vmsvga3dSurfaceDefine already allocated the surface data buffer. */
92 Assert(pMipmapLevel->cbSurface);
93 AssertReturn(pMipmapLevel->pSurfaceData, VERR_INTERNAL_ERROR);
94
95 /* Fetch the data present boolean first. */
96 bool fDataPresent;
97 rc = pHlp->pfnSSMGetBool(pSSM, &fDataPresent);
98 AssertRCReturn(rc, rc);
99
100 if (fDataPresent)
101 {
102 rc = pHlp->pfnSSMGetMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
103 AssertRCReturn(rc, rc);
104
105 pMipmapLevel->fDirty = true;
106 pSurface->fDirty = true;
107 }
108 else
109 pMipmapLevel->fDirty = false;
110 }
111
112 return VINF_SUCCESS;
113}
114
115static int vmsvga3dDXLoadContext(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
116{
117 PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
118 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
119 uint32_t u32;
120 int rc;
121
122 uint32_t cid;
123 rc = pHlp->pfnSSMGetU32(pSSM, &cid);
124 AssertRCReturn(rc, rc);
125
126 if (cid == SVGA3D_INVALID_ID)
127 return VINF_SUCCESS;
128
129 /* Define the context. */
130 rc = vmsvga3dDXDefineContext(pThisCC, cid);
131 AssertRCReturn(rc, rc);
132
133 PVMSVGA3DDXCONTEXT pDXContext = p3dState->papDXContexts[cid];
134 AssertReturn(pDXContext->cid == cid, VERR_INTERNAL_ERROR);
135
136 /* Load the context. */
137 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
138 AssertRCReturn(rc, rc);
139 AssertReturn(u32 == sizeof(SVGADXContextMobFormat), VERR_INVALID_STATE);
140
141 pHlp->pfnSSMGetMem(pSSM, &pDXContext->svgaDXContext, sizeof(SVGADXContextMobFormat));
142
143 uint32_t cCOTMobs;
144 rc = pHlp->pfnSSMGetU32(pSSM, &cCOTMobs);
145 AssertLogRelRCReturn(rc, rc);
146 AssertReturn(cCOTMobs <= RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_STATE);
147
148 for (unsigned i = 0; i < cCOTMobs; ++i)
149 {
150 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
151 AssertLogRelRCReturn(rc, rc);
152 pDXContext->aCOTMobs[i] = vmsvgaR3MobGet(pSvgaR3State, u32);
153 Assert(pDXContext->aCOTMobs[i] || u32 == SVGA_ID_INVALID);
154 }
155
156 struct
157 {
158 SVGACOTableType COTableType;
159 uint32_t cbEntry;
160 uint32_t *pcEntries;
161 void **ppaEntries;
162 } cot[] =
163 {
164 {SVGA_COTABLE_RTVIEW, sizeof(SVGACOTableDXRTViewEntry), &pDXContext->cot.cRTView, (void **)&pDXContext->cot.paRTView},
165 {SVGA_COTABLE_DSVIEW, sizeof(SVGACOTableDXDSViewEntry), &pDXContext->cot.cDSView, (void **)&pDXContext->cot.paDSView},
166 {SVGA_COTABLE_SRVIEW, sizeof(SVGACOTableDXSRViewEntry), &pDXContext->cot.cSRView, (void **)&pDXContext->cot.paSRView},
167 {SVGA_COTABLE_ELEMENTLAYOUT, sizeof(SVGACOTableDXElementLayoutEntry), &pDXContext->cot.cElementLayout, (void **)&pDXContext->cot.paElementLayout},
168 {SVGA_COTABLE_BLENDSTATE, sizeof(SVGACOTableDXBlendStateEntry), &pDXContext->cot.cBlendState, (void **)&pDXContext->cot.paBlendState},
169 {SVGA_COTABLE_DEPTHSTENCIL, sizeof(SVGACOTableDXDepthStencilEntry), &pDXContext->cot.cDepthStencil, (void **)&pDXContext->cot.paDepthStencil},
170 {SVGA_COTABLE_RASTERIZERSTATE, sizeof(SVGACOTableDXRasterizerStateEntry), &pDXContext->cot.cRasterizerState, (void **)&pDXContext->cot.paRasterizerState},
171 {SVGA_COTABLE_SAMPLER, sizeof(SVGACOTableDXSamplerEntry), &pDXContext->cot.cSampler, (void **)&pDXContext->cot.paSampler},
172 {SVGA_COTABLE_STREAMOUTPUT, sizeof(SVGACOTableDXStreamOutputEntry), &pDXContext->cot.cStreamOutput, (void **)&pDXContext->cot.paStreamOutput},
173 {SVGA_COTABLE_DXQUERY, sizeof(SVGACOTableDXQueryEntry), &pDXContext->cot.cQuery, (void **)&pDXContext->cot.paQuery},
174 {SVGA_COTABLE_DXSHADER, sizeof(SVGACOTableDXShaderEntry), &pDXContext->cot.cShader, (void **)&pDXContext->cot.paShader},
175 {SVGA_COTABLE_UAVIEW, sizeof(SVGACOTableDXUAViewEntry), &pDXContext->cot.cUAView, (void **)&pDXContext->cot.paUAView},
176 {VBSVGA_COTABLE_VIDEOPROCESSOR, sizeof(VBSVGACOTableDXVideoProcessorEntry), &pDXContext->cot.cVideoProcessor, (void **)&pDXContext->cot.paVideoProcessor},
177 {VBSVGA_COTABLE_VDOV, sizeof(VBSVGACOTableDXVideoDecoderOutputViewEntry), &pDXContext->cot.cVideoDecoderOutputView, (void **)&pDXContext->cot.paVideoDecoderOutputView},
178 {VBSVGA_COTABLE_VIDEODECODER, sizeof(VBSVGACOTableDXVideoDecoderEntry), &pDXContext->cot.cVideoDecoder, (void **)&pDXContext->cot.paVideoDecoder},
179 {VBSVGA_COTABLE_VPIV, sizeof(VBSVGACOTableDXVideoProcessorInputViewEntry), &pDXContext->cot.cVideoProcessorInputView, (void **)&pDXContext->cot.paVideoProcessorInputView},
180 {VBSVGA_COTABLE_VPOV, sizeof(VBSVGACOTableDXVideoProcessorOutputViewEntry), &pDXContext->cot.cVideoProcessorOutputView, (void **)&pDXContext->cot.paVideoProcessorOutputView},
181 };
182
183 AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs));
184 for (unsigned i = 0; i < cCOTMobs; ++i)
185 {
186 uint32_t idxCOTable;
187 if (cot[i].COTableType < SVGA_COTABLE_MAX)
188 idxCOTable = cot[i].COTableType;
189 else if (cot[i].COTableType >= VBSVGA_COTABLE_MIN && cot[i].COTableType < VBSVGA_COTABLE_MAX)
190 idxCOTable = SVGA_COTABLE_MAX + (cot[i].COTableType - VBSVGA_COTABLE_MIN);
191 else
192 AssertFailedReturn(VERR_INVALID_STATE);
193
194 uint32_t cEntries;
195 pHlp->pfnSSMGetU32(pSSM, &cEntries);
196 rc = pHlp->pfnSSMGetU32(pSSM, &u32);
197 AssertRCReturn(rc, rc);
198 AssertReturn(u32 == cot[i].cbEntry, VERR_INVALID_STATE);
199
200 *cot[i].pcEntries = cEntries;
201 *cot[i].ppaEntries = vmsvgaR3MobBackingStorePtr(pDXContext->aCOTMobs[idxCOTable], 0);
202
203 if (cEntries)
204 {
205 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, cot[i].COTableType, cEntries);
206 AssertLogRelRCReturn(rc, rc);
207 }
208 }
209
210 rc = pSvgaR3State->pFuncsDX->pfnDXLoadState(pThisCC, pDXContext, pHlp, pSSM);
211 AssertRCReturn(rc, rc);
212
213 return VINF_SUCCESS;
214}
215
216int vmsvga3dDXLoadExec(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
217{
218 RT_NOREF(pThis, uPass);
219
220 if (uVersion < VGA_SAVEDSTATE_VERSION_VMSVGA_DX)
221 AssertFailedReturn(VERR_INVALID_STATE);
222
223 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
224 PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
225 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
226 int rc;
227
228 /*
229 * VMSVGA3DSTATE
230 */
231 pHlp->pfnSSMGetU32(pSSM, &p3dState->cSurfaces);
232 rc = pHlp->pfnSSMGetU32(pSSM, &p3dState->cDXContexts);
233 AssertRCReturn(rc, rc);
234
235 /*
236 * Surfaces
237 */
238 if (p3dState->cSurfaces)
239 {
240 p3dState->papSurfaces = (PVMSVGA3DSURFACE *)RTMemAlloc(p3dState->cSurfaces * sizeof(PVMSVGA3DSURFACE));
241 AssertReturn(p3dState->papSurfaces, VERR_NO_MEMORY);
242 for (uint32_t i = 0; i < p3dState->cSurfaces; ++i)
243 {
244 p3dState->papSurfaces[i] = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(VMSVGA3DSURFACE));
245 AssertPtrReturn(p3dState->papSurfaces[i], VERR_NO_MEMORY);
246 p3dState->papSurfaces[i]->id = SVGA3D_INVALID_ID;
247 }
248
249 for (uint32_t i = 0; i < p3dState->cSurfaces; ++i)
250 {
251 rc = vmsvga3dDXLoadSurface(pHlp, pThisCC, pSSM);
252 AssertRCReturn(rc, rc);
253 }
254 }
255 else
256 p3dState->papSurfaces = NULL;
257
258 /*
259 * DX contexts
260 */
261 if (p3dState->cDXContexts)
262 {
263 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)RTMemAlloc(p3dState->cDXContexts * sizeof(PVMSVGA3DDXCONTEXT));
264 AssertReturn(p3dState->papDXContexts, VERR_NO_MEMORY);
265 for (uint32_t i = 0; i < p3dState->cDXContexts; ++i)
266 {
267 p3dState->papDXContexts[i] = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DDXCONTEXT));
268 AssertPtrReturn(p3dState->papDXContexts[i], VERR_NO_MEMORY);
269 p3dState->papDXContexts[i]->cid = SVGA3D_INVALID_ID;
270 }
271
272 for (uint32_t i = 0; i < p3dState->cDXContexts; ++i)
273 {
274 rc = vmsvga3dDXLoadContext(pHlp, pThisCC, pSSM);
275 AssertRCReturn(rc, rc);
276 }
277 }
278 else
279 p3dState->papDXContexts = NULL;
280
281 if (pSvgaR3State->idDXContextCurrent != SVGA_ID_INVALID)
282 vmsvga3dDXSwitchContext(pThisCC, pSvgaR3State->idDXContextCurrent);
283
284 return VINF_SUCCESS;
285}
286
287/*
288 * Save
289 */
290
291static int vmsvga3dDXSaveSurface(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM, PVMSVGA3DSURFACE pSurface)
292{
293 RT_NOREF(pThisCC);
294 int rc;
295
296 rc = pHlp->pfnSSMPutU32(pSSM, pSurface->id);
297 AssertRCReturn(rc, rc);
298
299 if (pSurface->id == SVGA3D_INVALID_ID)
300 return VINF_SUCCESS;
301
302 /* Save the surface fields which are not part of SVGAOTableSurfaceEntry. */
303 pHlp->pfnSSMPutU32(pSSM, pSurface->idAssociatedContext);
304
305 for (uint32_t iArray = 0; iArray < pSurface->surfaceDesc.numArrayElements; ++iArray)
306 {
307 for (uint32_t iMipmap = 0; iMipmap < pSurface->cLevels; ++iMipmap)
308 {
309 uint32_t idx = iMipmap + iArray * pSurface->cLevels;
310 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[idx];
311
312 /* Multisample surface content can't be accessed. */
313 if (pSurface->surfaceDesc.multisampleCount > 1)
314 {
315 /* No data follows */
316 rc = pHlp->pfnSSMPutBool(pSSM, false);
317 AssertRCReturn(rc, rc);
318 continue;
319 }
320
321 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
322 {
323 if (pMipmapLevel->pSurfaceData)
324 {
325 /* Data follows */
326 rc = pHlp->pfnSSMPutBool(pSSM, true);
327 AssertRCReturn(rc, rc);
328
329 Assert(pMipmapLevel->cbSurface);
330 rc = pHlp->pfnSSMPutMem(pSSM, pMipmapLevel->pSurfaceData, pMipmapLevel->cbSurface);
331 AssertRCReturn(rc, rc);
332 }
333 else
334 {
335 /* No data follows */
336 rc = pHlp->pfnSSMPutBool(pSSM, false);
337 AssertRCReturn(rc, rc);
338 }
339 }
340 else
341 {
342 SVGA3dSurfaceImageId image;
343 image.sid = pSurface->id;
344 image.face = iArray;
345 image.mipmap = iMipmap;
346
347 VMSGA3D_BOX_DIMENSIONS dims;
348 rc = vmsvga3dGetBoxDimensions(pThisCC, &image, NULL, &dims);
349 AssertRCReturn(rc, rc);
350
351 VMSVGA3D_MAPPED_SURFACE map;
352 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
353 if (RT_SUCCESS(rc))
354 {
355 /* Save mapped surface data. */
356 pHlp->pfnSSMPutBool(pSSM, true);
357 if (map.cbRow == map.cbRowPitch)
358 {
359 rc = pHlp->pfnSSMPutMem(pSSM, map.pvData, pMipmapLevel->cbSurface);
360 AssertRCReturn(rc, rc);
361 }
362 else
363 {
364 uint8_t *pu8Map = (uint8_t *)map.pvData;
365 for (uint32_t z = 0; z < map.box.d; ++z)
366 {
367 uint8_t *pu8MapPlane = pu8Map;
368 for (uint32_t y = 0; y < map.cRows; ++y)
369 {
370 rc = pHlp->pfnSSMPutMem(pSSM, pu8MapPlane, dims.cbRow);
371 AssertRCReturn(rc, rc);
372
373 pu8MapPlane += map.cbRowPitch;
374 }
375 pu8Map += map.cbDepthPitch;
376 }
377 }
378
379 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, false);
380 }
381 else
382 {
383 AssertFailed();
384
385 /* No data follows */
386 rc = pHlp->pfnSSMPutBool(pSSM, false);
387 AssertRCReturn(rc, rc);
388 }
389 }
390 }
391 }
392
393 return VINF_SUCCESS;
394}
395
396static int vmsvga3dDXSaveContext(PCPDMDEVHLPR3 pHlp, PVGASTATECC pThisCC, PSSMHANDLE pSSM, PVMSVGA3DDXCONTEXT pDXContext)
397{
398 PVMSVGAR3STATE pSvgaR3State = pThisCC->svga.pSvgaR3State;
399 int rc;
400
401 rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->cid);
402 AssertRCReturn(rc, rc);
403
404 if (pDXContext->cid == SVGA3D_INVALID_ID)
405 return VINF_SUCCESS;
406
407 /* Save the context. */
408 pHlp->pfnSSMPutU32(pSSM, sizeof(SVGADXContextMobFormat));
409 pHlp->pfnSSMPutMem(pSSM, &pDXContext->svgaDXContext, sizeof(SVGADXContextMobFormat));
410
411 rc = pHlp->pfnSSMPutU32(pSSM, RT_ELEMENTS(pDXContext->aCOTMobs));
412 AssertLogRelRCReturn(rc, rc);
413 for (unsigned i = 0; i < RT_ELEMENTS(pDXContext->aCOTMobs); ++i)
414 {
415 uint32_t const mobId = vmsvgaR3MobId(pDXContext->aCOTMobs[i]);
416 rc = pHlp->pfnSSMPutU32(pSSM, mobId);
417 AssertLogRelRCReturn(rc, rc);
418 }
419
420 struct
421 {
422 uint32_t cEntries;
423 uint32_t cbEntry;
424 void *paEntries;
425 } cot[] =
426 {
427 {pDXContext->cot.cRTView, sizeof(SVGACOTableDXRTViewEntry), pDXContext->cot.paRTView},
428 {pDXContext->cot.cDSView, sizeof(SVGACOTableDXDSViewEntry), pDXContext->cot.paDSView},
429 {pDXContext->cot.cSRView, sizeof(SVGACOTableDXSRViewEntry), pDXContext->cot.paSRView},
430 {pDXContext->cot.cElementLayout, sizeof(SVGACOTableDXElementLayoutEntry), pDXContext->cot.paElementLayout},
431 {pDXContext->cot.cBlendState, sizeof(SVGACOTableDXBlendStateEntry), pDXContext->cot.paBlendState},
432 {pDXContext->cot.cDepthStencil, sizeof(SVGACOTableDXDepthStencilEntry), pDXContext->cot.paDepthStencil},
433 {pDXContext->cot.cRasterizerState, sizeof(SVGACOTableDXRasterizerStateEntry), pDXContext->cot.paRasterizerState},
434 {pDXContext->cot.cSampler, sizeof(SVGACOTableDXSamplerEntry), pDXContext->cot.paSampler},
435 {pDXContext->cot.cStreamOutput, sizeof(SVGACOTableDXStreamOutputEntry), pDXContext->cot.paStreamOutput},
436 {pDXContext->cot.cQuery, sizeof(SVGACOTableDXQueryEntry), pDXContext->cot.paQuery},
437 {pDXContext->cot.cShader, sizeof(SVGACOTableDXShaderEntry), pDXContext->cot.paShader},
438 {pDXContext->cot.cUAView, sizeof(SVGACOTableDXUAViewEntry), pDXContext->cot.paUAView},
439 {pDXContext->cot.cVideoProcessor, sizeof(VBSVGACOTableDXVideoProcessorEntry), pDXContext->cot.paVideoProcessor},
440 {pDXContext->cot.cVideoDecoderOutputView, sizeof(VBSVGACOTableDXVideoDecoderOutputViewEntry), pDXContext->cot.paVideoDecoderOutputView},
441 {pDXContext->cot.cVideoDecoder, sizeof(VBSVGACOTableDXVideoDecoderEntry), pDXContext->cot.paVideoDecoder},
442 {pDXContext->cot.cVideoProcessorInputView, sizeof(VBSVGACOTableDXVideoProcessorInputViewEntry), pDXContext->cot.paVideoProcessorInputView},
443 {pDXContext->cot.cVideoProcessorOutputView, sizeof(VBSVGACOTableDXVideoProcessorOutputViewEntry), pDXContext->cot.paVideoProcessorOutputView},
444 };
445
446 AssertCompile(RT_ELEMENTS(cot) == RT_ELEMENTS(pDXContext->aCOTMobs));
447 for (unsigned i = 0; i < RT_ELEMENTS(cot); ++i)
448 {
449 pHlp->pfnSSMPutU32(pSSM, cot[i].cEntries);
450 rc = pHlp->pfnSSMPutU32(pSSM, cot[i].cbEntry);
451 AssertLogRelRCReturn(rc, rc);
452 }
453
454 rc = pSvgaR3State->pFuncsDX->pfnDXSaveState(pThisCC, pDXContext, pHlp, pSSM);
455 AssertRCReturn(rc, rc);
456
457 return VINF_SUCCESS;
458}
459
460int vmsvga3dDXSaveExec(PPDMDEVINS pDevIns, PVGASTATECC pThisCC, PSSMHANDLE pSSM)
461{
462 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
463 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
464 int rc;
465
466 /*
467 * VMSVGA3DSTATE
468 */
469 pHlp->pfnSSMPutU32(pSSM, p3dState->cSurfaces);
470 rc = pHlp->pfnSSMPutU32(pSSM, p3dState->cDXContexts);
471 AssertRCReturn(rc, rc);
472
473 /*
474 * Surfaces
475 */
476 for (uint32_t sid = 0; sid < p3dState->cSurfaces; ++sid)
477 {
478 rc = vmsvga3dDXSaveSurface(pHlp, pThisCC, pSSM, p3dState->papSurfaces[sid]);
479 AssertRCReturn(rc, rc);
480 }
481
482 /*
483 * DX contexts
484 */
485 for (uint32_t cid = 0; cid < p3dState->cDXContexts; ++cid)
486 {
487 rc = vmsvga3dDXSaveContext(pHlp, pThisCC, pSSM, p3dState->papDXContexts[cid]);
488 AssertRCReturn(rc, rc);
489 }
490
491 return VINF_SUCCESS;
492}
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