VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp

Last change on this file was 106953, checked in by vboxsync, 3 months ago

3D: Move declaration of VMSVGA2dGBO into VMSVGA3DSTATE to avoid passing it as an argument. bugref:10580

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 512.4 KB
Line 
1/* $Id: DevVGA-SVGA3d-dx-dx11.cpp 106953 2024-11-12 09:53:05Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33#include <VBox/AssertGuest.h>
34#include <VBox/log.h>
35#include <VBox/vmm/pdmdev.h>
36#include <VBox/vmm/pgm.h>
37
38#include <iprt/asm-mem.h>
39#include <iprt/assert.h>
40#include <iprt/errcore.h>
41#include <iprt/mem.h>
42
43#include <VBoxVideo.h> /* required by DevVGA.h */
44#include <VBoxVideo3D.h>
45
46/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47#include "DevVGA.h"
48
49#include "DevVGA-SVGA.h"
50#include "DevVGA-SVGA3d.h"
51#include "DevVGA-SVGA3d-internal.h"
52#include "DevVGA-SVGA3d-dx-shader.h"
53
54/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55#if defined(Status)
56#undef Status
57#endif
58#ifndef RT_OS_WINDOWS
59# pragma GCC diagnostic push
60# pragma GCC diagnostic ignored "-Wpedantic"
61#endif
62#include <d3d11_1.h>
63#ifndef RT_OS_WINDOWS
64# pragma GCC diagnostic pop
65#endif
66
67
68#ifdef RT_OS_WINDOWS
69# define VBOX_D3D11_LIBRARY_NAME "d3d11"
70#else
71# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
72#endif
73
74/* One ID3D11Device object is used for all VMSVGA guest contexts because the VGPU design makes resources
75 * independent from rendering contexts. I.e. multiple guest contexts freely access a surface.
76 *
77 * The initial implementation of this backend has used separate ID3D11Devices for each VMSVGA context
78 * and created shared resources to allow one ID3D11Device to access a resource which was rendered to by
79 * another ID3D11Device. This synchronization of access to shared resources kills performance actually.
80 */
81
82/* A single staging ID3D11Buffer is used for uploading data to other buffers. */
83#define DX_COMMON_STAGING_BUFFER
84/* Always flush after submitting a draw call for debugging. */
85//#define DX_FLUSH_AFTER_DRAW
86
87#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
88 for (uint32_t i = 0; i < (a_Count); ++i) \
89 D3D_RELEASE((a_papArray)[i]); \
90} while (0)
91
92typedef struct D3D11BLITTER
93{
94 ID3D11Device1 *pDevice;
95 ID3D11DeviceContext1 *pImmediateContext;
96
97 ID3D11VertexShader *pVertexShader;
98 ID3D11PixelShader *pPixelShader;
99 ID3D11SamplerState *pSamplerState;
100 ID3D11RasterizerState1 *pRasterizerState;
101 ID3D11BlendState1 *pBlendState;
102} D3D11BLITTER;
103
104typedef struct DXDEVICE
105{
106 ID3D11Device1 *pDevice; /* Device. */
107 ID3D11DeviceContext1 *pImmediateContext; /* Corresponding context. */
108 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
109 D3D_FEATURE_LEVEL FeatureLevel;
110
111 uint32_t MultisampleCountMask; /* 1 << (MSCount - 1) for MSCount = 2, 4, 8, 16, 32 */
112
113 ID3D11VideoDevice *pVideoDevice;
114 ID3D11VideoContext *pVideoContext;
115#ifdef DX_COMMON_STAGING_BUFFER
116 /* Staging buffer for transfer to surface buffers. */
117 ID3D11Buffer *pStagingBuffer; /* The staging buffer resource. */
118 uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
119#endif
120
121 D3D11BLITTER Blitter; /* Blits one texture to another. */
122} DXDEVICE;
123
124/* Kind of a texture view. */
125typedef enum VMSVGA3DBACKVIEWTYPE
126{
127 VMSVGA3D_VIEWTYPE_NONE = 0,
128 VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
129 VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
130 VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
131 VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4,
132 VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT = 5,
133 VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT = 6,
134 VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT = 7
135} VMSVGA3DBACKVIEWTYPE;
136
137/* Information about a texture view to track all created views:.
138 * when a surface is invalidated, then all views must deleted;
139 * when a view is deleted, then the view must be unlinked from the surface.
140 */
141typedef struct DXVIEWINFO
142{
143 uint32_t sid; /* Surface which the view was created for. */
144 uint32_t cid; /* DX context which created the view. */
145 uint32_t viewId; /* View id assigned by the guest. */
146 VMSVGA3DBACKVIEWTYPE enmViewType;
147} DXVIEWINFO;
148
149/* Context Object Table element for a texture view. */
150typedef struct DXVIEW
151{
152 uint32_t cid; /* DX context which created the view. */
153 uint32_t sid; /* Surface which the view was created for. */
154 uint32_t viewId; /* View id assigned by the guest. */
155 VMSVGA3DBACKVIEWTYPE enmViewType;
156
157 union
158 {
159 ID3D11View *pView; /* The view object. */
160 ID3D11RenderTargetView *pRenderTargetView;
161 ID3D11DepthStencilView *pDepthStencilView;
162 ID3D11ShaderResourceView *pShaderResourceView;
163 ID3D11UnorderedAccessView *pUnorderedAccessView;
164 ID3D11VideoDecoderOutputView *pVideoDecoderOutputView;
165 ID3D11VideoProcessorInputView *pVideoProcessorInputView;
166 ID3D11VideoProcessorOutputView *pVideoProcessorOutputView;
167 } u;
168
169 RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
170} DXVIEW;
171
172/* What kind of resource has been created for the VMSVGA3D surface. */
173typedef enum VMSVGA3DBACKRESTYPE
174{
175 VMSVGA3D_RESTYPE_NONE = 0,
176 VMSVGA3D_RESTYPE_TEXTURE_1D = 1,
177 VMSVGA3D_RESTYPE_TEXTURE_2D = 2,
178 VMSVGA3D_RESTYPE_TEXTURE_CUBE = 3,
179 VMSVGA3D_RESTYPE_TEXTURE_3D = 4,
180 VMSVGA3D_RESTYPE_BUFFER = 5,
181} VMSVGA3DBACKRESTYPE;
182
183typedef struct VMSVGA3DBACKENDSURFACE
184{
185 VMSVGA3DBACKRESTYPE enmResType;
186 DXGI_FORMAT enmDxgiFormat;
187 union
188 {
189 ID3D11Resource *pResource;
190 ID3D11Texture1D *pTexture1D;
191 ID3D11Texture2D *pTexture2D;
192 ID3D11Texture3D *pTexture3D;
193 ID3D11Buffer *pBuffer;
194 } u;
195
196 /* For updates from memory. */
197 union /** @todo One per format. */
198 {
199 ID3D11Resource *pResource;
200 ID3D11Texture1D *pTexture1D;
201 ID3D11Texture2D *pTexture2D;
202 ID3D11Texture3D *pTexture3D;
203#ifndef DX_COMMON_STAGING_BUFFER
204 ID3D11Buffer *pBuffer;
205#endif
206 } dynamic;
207
208 /* For reading the texture content. */
209 union /** @todo One per format. */
210 {
211 ID3D11Resource *pResource;
212 ID3D11Texture1D *pTexture1D;
213 ID3D11Texture2D *pTexture2D;
214 ID3D11Texture3D *pTexture3D;
215#ifndef DX_COMMON_STAGING_BUFFER
216 ID3D11Buffer *pBuffer;
217#endif
218 } staging;
219
220 /* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
221 RTLISTANCHOR listView; /* DXVIEW */
222
223} VMSVGA3DBACKENDSURFACE;
224
225
226typedef struct VMSVGAHWSCREEN
227{
228 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
229 IDXGIResource *pDxgiResource; /* Interface of the texture. */
230 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
231 HANDLE SharedHandle; /* The shared handle of this structure. */
232 uint32_t sidScreenTarget; /* The source surface for this screen. */
233} VMSVGAHWSCREEN;
234
235
236typedef struct DXELEMENTLAYOUT
237{
238 ID3D11InputLayout *pElementLayout;
239 uint32_t cElementDesc;
240 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
241} DXELEMENTLAYOUT;
242
243typedef struct DXSHADER
244{
245 SVGA3dShaderType enmShaderType;
246 union
247 {
248 ID3D11DeviceChild *pShader; /* All. */
249 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
250 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
251 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
252 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
253 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
254 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
255 };
256 void *pvDXBC;
257 uint32_t cbDXBC;
258
259 uint32_t soid; /* Stream output declarations for geometry shaders. */
260
261 DXShaderInfo shaderInfo;
262} DXSHADER;
263
264typedef struct DXQUERY
265{
266 union
267 {
268 ID3D11Query *pQuery;
269 ID3D11Predicate *pPredicate;
270 };
271} DXQUERY;
272
273typedef struct DXVIDEOPROCESSOR
274{
275 ID3D11VideoProcessorEnumerator *pEnum;
276 ID3D11VideoProcessor *pVideoProcessor;
277} DXVIDEOPROCESSOR;
278
279typedef struct DXVIDEODECODER
280{
281 ID3D11VideoDecoder *pVideoDecoder;
282} DXVIDEODECODER;
283
284typedef struct DXSTREAMOUTPUT
285{
286 UINT cDeclarationEntry;
287 D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
288} DXSTREAMOUTPUT;
289
290typedef struct DXBOUNDVERTEXBUFFER
291{
292 ID3D11Buffer *pBuffer;
293 uint32_t stride;
294 uint32_t offset;
295} DXBOUNDVERTEXBUFFER;
296
297typedef struct DXBOUNDINDEXBUFFER
298{
299 ID3D11Buffer *pBuffer;
300 DXGI_FORMAT indexBufferFormat;
301 uint32_t indexBufferOffset;
302} DXBOUNDINDEXBUFFER;
303
304typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
305{
306 struct
307 {
308 ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
309 } shaderState[SVGA3D_NUM_SHADERTYPE];
310} DXBOUNDRESOURCES;
311
312
313typedef struct VMSVGA3DBACKENDDXCONTEXT
314{
315 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
316 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
317 uint32_t cDepthStencilState; /* papDepthStencilState */
318 uint32_t cSamplerState; /* papSamplerState */
319 uint32_t cRasterizerState; /* papRasterizerState */
320 uint32_t cElementLayout; /* paElementLayout */
321 uint32_t cRenderTargetView; /* paRenderTargetView */
322 uint32_t cDepthStencilView; /* paDepthStencilView */
323 uint32_t cShaderResourceView; /* paShaderResourceView */
324 uint32_t cQuery; /* paQuery */
325 uint32_t cShader; /* paShader */
326 uint32_t cStreamOutput; /* paStreamOutput */
327 uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
328 ID3D11BlendState1 **papBlendState;
329 ID3D11DepthStencilState **papDepthStencilState;
330 ID3D11SamplerState **papSamplerState;
331 ID3D11RasterizerState1 **papRasterizerState;
332 DXELEMENTLAYOUT *paElementLayout;
333 DXVIEW *paRenderTargetView;
334 DXVIEW *paDepthStencilView;
335 DXVIEW *paShaderResourceView;
336 DXQUERY *paQuery;
337 DXSHADER *paShader;
338 DXSTREAMOUTPUT *paStreamOutput;
339 DXVIEW *paUnorderedAccessView;
340
341 uint32_t cVideoProcessor; /* paVideoProcessor */
342 uint32_t cVideoDecoderOutputView; /* paVideoDecoderOutputView */
343 uint32_t cVideoDecoder; /* paVideoDecoder */
344 uint32_t cVideoProcessorInputView; /* paVideoProcessorInputView */
345 uint32_t cVideoProcessorOutputView; /* paVideoProcessorOutputView */
346 DXVIDEOPROCESSOR *paVideoProcessor;
347 DXVIEW *paVideoDecoderOutputView;
348 DXVIDEODECODER *paVideoDecoder;
349 DXVIEW *paVideoProcessorInputView;
350 DXVIEW *paVideoProcessorOutputView;
351
352 uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
353
354 DXBOUNDRESOURCES resources;
355} VMSVGA3DBACKENDDXCONTEXT;
356
357/* Shader disassembler function. Optional. */
358typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
359typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
360
361typedef struct VMSVGA3DBACKEND
362{
363 RTLDRMOD hD3D11;
364 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
365
366 RTLDRMOD hD3DCompiler;
367 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
368
369 DXDEVICE dxDevice;
370 UINT VendorId;
371 UINT DeviceId;
372
373 SVGADXContextMobFormat svgaDXContext; /* Current state of pipeline. */
374
375 DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
376} VMSVGA3DBACKEND;
377
378
379/* Static function prototypes. */
380static int dxDeviceFlush(DXDEVICE *pDevice);
381static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
382static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
383static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
384static int dxDestroyShader(DXSHADER *pDXShader);
385static int dxDestroyQuery(DXQUERY *pDXQuery);
386static int dxReadBuffer(DXDEVICE *pDevice, ID3D11Buffer *pBuffer, UINT Offset, UINT Bytes, void **ppvData, uint32_t *pcbData);
387
388static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry);
389static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor);
390static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry);
391static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder);
392
393static HRESULT BlitInit(D3D11BLITTER *pBlitter, ID3D11Device1 *pDevice, ID3D11DeviceContext1 *pImmediateContext);
394static void BlitRelease(D3D11BLITTER *pBlitter);
395
396
397/* This is not available with the DXVK headers for some reason. */
398#ifndef RT_OS_WINDOWS
399typedef enum D3D11_TEXTURECUBE_FACE {
400 D3D11_TEXTURECUBE_FACE_POSITIVE_X,
401 D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
402 D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
403 D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
404 D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
405 D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
406} D3D11_TEXTURECUBE_FACE;
407#endif
408
409
410#if 0 /* unused */
411DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
412{
413 D3D11_TEXTURECUBE_FACE Face;
414 switch (iFace)
415 {
416 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
417 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
418 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
419 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
420 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
421 default:
422 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
423 }
424 return Face;
425}
426#endif
427
428#ifdef LOG_ENABLED
429static const char *dxFormatName(DXGI_FORMAT dxgiFormat)
430{
431 switch (dxgiFormat)
432 {
433 RT_CASE_RET_STR(DXGI_FORMAT_UNKNOWN);
434 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32A32_TYPELESS);
435 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32A32_FLOAT);
436 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32A32_UINT);
437 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32A32_SINT);
438 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32_TYPELESS);
439 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32_FLOAT);
440 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32_UINT);
441 RT_CASE_RET_STR(DXGI_FORMAT_R32G32B32_SINT);
442 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_TYPELESS);
443 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_FLOAT);
444 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_UNORM);
445 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_UINT);
446 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_SNORM);
447 RT_CASE_RET_STR(DXGI_FORMAT_R16G16B16A16_SINT);
448 RT_CASE_RET_STR(DXGI_FORMAT_R32G32_TYPELESS);
449 RT_CASE_RET_STR(DXGI_FORMAT_R32G32_FLOAT);
450 RT_CASE_RET_STR(DXGI_FORMAT_R32G32_UINT);
451 RT_CASE_RET_STR(DXGI_FORMAT_R32G32_SINT);
452 RT_CASE_RET_STR(DXGI_FORMAT_R32G8X24_TYPELESS);
453 RT_CASE_RET_STR(DXGI_FORMAT_D32_FLOAT_S8X24_UINT);
454 RT_CASE_RET_STR(DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS);
455 RT_CASE_RET_STR(DXGI_FORMAT_X32_TYPELESS_G8X24_UINT);
456 RT_CASE_RET_STR(DXGI_FORMAT_R10G10B10A2_TYPELESS);
457 RT_CASE_RET_STR(DXGI_FORMAT_R10G10B10A2_UNORM);
458 RT_CASE_RET_STR(DXGI_FORMAT_R10G10B10A2_UINT);
459 RT_CASE_RET_STR(DXGI_FORMAT_R11G11B10_FLOAT);
460 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_TYPELESS);
461 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_UNORM);
462 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_UNORM_SRGB);
463 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_UINT);
464 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_SNORM);
465 RT_CASE_RET_STR(DXGI_FORMAT_R8G8B8A8_SINT);
466 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_TYPELESS);
467 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_FLOAT);
468 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_UNORM);
469 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_UINT);
470 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_SNORM);
471 RT_CASE_RET_STR(DXGI_FORMAT_R16G16_SINT);
472 RT_CASE_RET_STR(DXGI_FORMAT_R32_TYPELESS);
473 RT_CASE_RET_STR(DXGI_FORMAT_D32_FLOAT);
474 RT_CASE_RET_STR(DXGI_FORMAT_R32_FLOAT);
475 RT_CASE_RET_STR(DXGI_FORMAT_R32_UINT);
476 RT_CASE_RET_STR(DXGI_FORMAT_R32_SINT);
477 RT_CASE_RET_STR(DXGI_FORMAT_R24G8_TYPELESS);
478 RT_CASE_RET_STR(DXGI_FORMAT_D24_UNORM_S8_UINT);
479 RT_CASE_RET_STR(DXGI_FORMAT_R24_UNORM_X8_TYPELESS);
480 RT_CASE_RET_STR(DXGI_FORMAT_X24_TYPELESS_G8_UINT);
481 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_TYPELESS);
482 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_UNORM);
483 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_UINT);
484 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_SNORM);
485 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_SINT);
486 RT_CASE_RET_STR(DXGI_FORMAT_R16_TYPELESS);
487 RT_CASE_RET_STR(DXGI_FORMAT_R16_FLOAT);
488 RT_CASE_RET_STR(DXGI_FORMAT_D16_UNORM);
489 RT_CASE_RET_STR(DXGI_FORMAT_R16_UNORM);
490 RT_CASE_RET_STR(DXGI_FORMAT_R16_UINT);
491 RT_CASE_RET_STR(DXGI_FORMAT_R16_SNORM);
492 RT_CASE_RET_STR(DXGI_FORMAT_R16_SINT);
493 RT_CASE_RET_STR(DXGI_FORMAT_R8_TYPELESS);
494 RT_CASE_RET_STR(DXGI_FORMAT_R8_UNORM);
495 RT_CASE_RET_STR(DXGI_FORMAT_R8_UINT);
496 RT_CASE_RET_STR(DXGI_FORMAT_R8_SNORM);
497 RT_CASE_RET_STR(DXGI_FORMAT_R8_SINT);
498 RT_CASE_RET_STR(DXGI_FORMAT_A8_UNORM);
499 RT_CASE_RET_STR(DXGI_FORMAT_R1_UNORM);
500 RT_CASE_RET_STR(DXGI_FORMAT_R9G9B9E5_SHAREDEXP);
501 RT_CASE_RET_STR(DXGI_FORMAT_R8G8_B8G8_UNORM);
502 RT_CASE_RET_STR(DXGI_FORMAT_G8R8_G8B8_UNORM);
503 RT_CASE_RET_STR(DXGI_FORMAT_BC1_TYPELESS);
504 RT_CASE_RET_STR(DXGI_FORMAT_BC1_UNORM);
505 RT_CASE_RET_STR(DXGI_FORMAT_BC1_UNORM_SRGB);
506 RT_CASE_RET_STR(DXGI_FORMAT_BC2_TYPELESS);
507 RT_CASE_RET_STR(DXGI_FORMAT_BC2_UNORM);
508 RT_CASE_RET_STR(DXGI_FORMAT_BC2_UNORM_SRGB);
509 RT_CASE_RET_STR(DXGI_FORMAT_BC3_TYPELESS);
510 RT_CASE_RET_STR(DXGI_FORMAT_BC3_UNORM);
511 RT_CASE_RET_STR(DXGI_FORMAT_BC3_UNORM_SRGB);
512 RT_CASE_RET_STR(DXGI_FORMAT_BC4_TYPELESS);
513 RT_CASE_RET_STR(DXGI_FORMAT_BC4_UNORM);
514 RT_CASE_RET_STR(DXGI_FORMAT_BC4_SNORM);
515 RT_CASE_RET_STR(DXGI_FORMAT_BC5_TYPELESS);
516 RT_CASE_RET_STR(DXGI_FORMAT_BC5_UNORM);
517 RT_CASE_RET_STR(DXGI_FORMAT_BC5_SNORM);
518 RT_CASE_RET_STR(DXGI_FORMAT_B5G6R5_UNORM);
519 RT_CASE_RET_STR(DXGI_FORMAT_B5G5R5A1_UNORM);
520 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8A8_UNORM);
521 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8X8_UNORM);
522 RT_CASE_RET_STR(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM);
523 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8A8_TYPELESS);
524 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8A8_UNORM_SRGB);
525 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8X8_TYPELESS);
526 RT_CASE_RET_STR(DXGI_FORMAT_B8G8R8X8_UNORM_SRGB);
527 RT_CASE_RET_STR(DXGI_FORMAT_BC6H_TYPELESS);
528 RT_CASE_RET_STR(DXGI_FORMAT_BC6H_UF16);
529 RT_CASE_RET_STR(DXGI_FORMAT_BC6H_SF16);
530 RT_CASE_RET_STR(DXGI_FORMAT_BC7_TYPELESS);
531 RT_CASE_RET_STR(DXGI_FORMAT_BC7_UNORM);
532 RT_CASE_RET_STR(DXGI_FORMAT_BC7_UNORM_SRGB);
533 RT_CASE_RET_STR(DXGI_FORMAT_AYUV);
534 RT_CASE_RET_STR(DXGI_FORMAT_Y410);
535 RT_CASE_RET_STR(DXGI_FORMAT_Y416);
536 RT_CASE_RET_STR(DXGI_FORMAT_NV12);
537 RT_CASE_RET_STR(DXGI_FORMAT_P010);
538 RT_CASE_RET_STR(DXGI_FORMAT_P016);
539 RT_CASE_RET_STR(DXGI_FORMAT_420_OPAQUE);
540 RT_CASE_RET_STR(DXGI_FORMAT_YUY2);
541 RT_CASE_RET_STR(DXGI_FORMAT_Y210);
542 RT_CASE_RET_STR(DXGI_FORMAT_Y216);
543 RT_CASE_RET_STR(DXGI_FORMAT_NV11);
544 RT_CASE_RET_STR(DXGI_FORMAT_AI44);
545 RT_CASE_RET_STR(DXGI_FORMAT_IA44);
546 RT_CASE_RET_STR(DXGI_FORMAT_P8);
547 RT_CASE_RET_STR(DXGI_FORMAT_A8P8);
548 RT_CASE_RET_STR(DXGI_FORMAT_B4G4R4A4_UNORM);
549 RT_CASE_RET_STR(DXGI_FORMAT_P208);
550 RT_CASE_RET_STR(DXGI_FORMAT_V208);
551 RT_CASE_RET_STR(DXGI_FORMAT_V408);
552 default:
553 break;
554 }
555 return "not known";
556}
557#endif /* LOG_ENABLED */
558
559/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
560#define DX_REPLACE_X8_WITH_A8
561static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
562{
563 /* Ensure that correct headers are used.
564 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
565 */
566 AssertCompile(SVGA3D_AYUV == 152);
567
568#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
569 /** @todo More formats. */
570 switch (format)
571 {
572#ifdef DX_REPLACE_X8_WITH_A8
573 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
574#else
575 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
576#endif
577 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
578 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
579 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
580 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
581 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
582 case SVGA3D_Z_D32: break;
583 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
584 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
585 case SVGA3D_Z_D15S1: break;
586 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
587 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
588 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
589 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
590 case SVGA3D_DXT1: return DXGI_FORMAT_;
591 case SVGA3D_DXT2: return DXGI_FORMAT_;
592 case SVGA3D_DXT3: return DXGI_FORMAT_;
593 case SVGA3D_DXT4: return DXGI_FORMAT_;
594 case SVGA3D_DXT5: return DXGI_FORMAT_;
595 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
596 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
597 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
598 case SVGA3D_FORMAT_DEAD1: break;
599 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
600 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
601 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
602 case SVGA3D_V8U8: return DXGI_FORMAT_;
603 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
604 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
605 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
606 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
607 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
608 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
609 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
610 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
611 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
612 case SVGA3D_BUFFER: return DXGI_FORMAT_;
613 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
614 case SVGA3D_V16U16: return DXGI_FORMAT_;
615 case SVGA3D_G16R16: return DXGI_FORMAT_;
616 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
617 case SVGA3D_UYVY: return DXGI_FORMAT_;
618 case SVGA3D_YUY2: return DXGI_FORMAT_YUY2;
619 case SVGA3D_NV12: return DXGI_FORMAT_NV12;
620 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
621 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
622 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
623 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
624 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
625 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
626 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
627 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
628 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
629 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
630 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
631 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
632 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
633 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
634 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
635 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
636 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
637 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
638 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
639 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
640 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
641 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
642 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
643 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
644 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
645 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
646 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
647 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
648 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
649 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
650 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
651 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
652 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
653 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
654 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
655 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
656 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
657 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
658 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
659 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
660 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
661 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
662 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
663 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
664 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
665 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
666 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
667 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
668 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
669 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
670 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
671 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
672 case SVGA3D_P8: break;
673 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
674 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
675 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
676 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
677 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
678 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
679 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
680 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
681 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
682 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
683 case SVGA3D_ATI1: break;
684 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
685 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
686 case SVGA3D_ATI2: break;
687 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
688 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
689 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
690 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
691#ifdef DX_REPLACE_X8_WITH_A8
692 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
693 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
694#else
695 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
696 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
697#endif
698 case SVGA3D_Z_DF16: break;
699 case SVGA3D_Z_DF24: break;
700 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
701 case SVGA3D_YV12: break;
702 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
703 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
704 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
705 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
706 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
707 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
708 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
709 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
710 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
711 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
712 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
713 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
714 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
715 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
716 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
717 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
718 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
719 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
720 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
721 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
722#ifdef DX_REPLACE_X8_WITH_A8
723 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
724#else
725 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
726#endif
727 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
728 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
729
730 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
731 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
732 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
733 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
734 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
735 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
736 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
737 case SVGA3D_AYUV: return DXGI_FORMAT_AYUV;
738
739 case SVGA3D_FORMAT_INVALID:
740 case SVGA3D_FORMAT_MAX: break;
741 }
742 // AssertFailed();
743 return DXGI_FORMAT_UNKNOWN;
744#undef DXGI_FORMAT_
745}
746
747
748static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
749{
750 switch (enmDevCap)
751 {
752 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
753 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
754 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
755 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
756 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
757 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
758 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
759 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
760 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
761 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
762 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
763 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
764 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
765 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
766 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
767 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
768 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
769 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
770 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
771 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
772 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
773 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
774 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
775 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
776 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
777 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
778 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
779 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
780 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
781 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
782 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
783 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
784 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
785 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
786 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
787 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
788 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
789 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
790 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
791 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
792 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
793 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
794 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
795 default:
796 AssertFailed();
797 break;
798 }
799 return SVGA3D_FORMAT_INVALID;
800}
801
802
803static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
804{
805 switch (enmDevCap)
806 {
807 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
808 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
809 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
810 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
811 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
812 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
813 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
814 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
815 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
816 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
817 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
818 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
819 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
820 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
821 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
822 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
823 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
824 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
825 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
826 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
827 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
828 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
829 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
830 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
831 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
832 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
833 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
834 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
835 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
836 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
837 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
838 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
839 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
840 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
841 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
842 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
843 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
844 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
845 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
846 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
847 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
848 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
849 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
850 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
851 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
852 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
853 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
854 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
855 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
856 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
857 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
858 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
859 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
860 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
861 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
862 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
863 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
864 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
865 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
866 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
867 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
868 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
869 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
870 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
871 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
872 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
873 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
874 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
875 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
876 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
877 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
878 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
879 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
880 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
881 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
882 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
883 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
884 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
885 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
886 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
887 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
888 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
889 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
890 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
891 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
892 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
893 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
894 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
895 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
896 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
897 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
898 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
899 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
900 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
901 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
902 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
903 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
904 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
905 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
906 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
907 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
908 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
909 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
910 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
911 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
912 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
913 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
914 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
915 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
916 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
917 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
918 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
919 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
920 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
921 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
922 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
923 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
924 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
925 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
926 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
927 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
928 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
929 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
930 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
931 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
932 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
933 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
934 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
935 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
936 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
937 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
938 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
939 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
940 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
941 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
942 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
943 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
944 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
945 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
946 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
947 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
948 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
949 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
950 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
951 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
952 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
953 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
954 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
955 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
956 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
957 default:
958 AssertFailed();
959 break;
960 }
961 return SVGA3D_FORMAT_INVALID;
962}
963
964
965static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
966{
967 int rc = VINF_SUCCESS;
968
969 *pu32DevCap = 0;
970
971 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
972 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
973 {
974 RT_NOREF(pState);
975 /** @todo Implement */
976 }
977 else
978 rc = VERR_NOT_SUPPORTED;
979 return rc;
980}
981
982
983static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
984{
985 int rc = VINF_SUCCESS;
986
987 *pu32DevCap = 0;
988
989 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
990 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
991 {
992 ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
993 UINT FormatSupport = 0;
994 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
995 if (SUCCEEDED(hr))
996 {
997 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
998
999 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
1000 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
1001
1002 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
1003 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
1004
1005 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
1006 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
1007
1008 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
1009 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
1010
1011 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
1012 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
1013
1014 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
1015 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
1016
1017 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
1018 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
1019
1020 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
1021 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
1022
1023 if (pState->pBackend->dxDevice.MultisampleCountMask != 0)
1024 {
1025 UINT NumQualityLevels;
1026 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
1027 if (SUCCEEDED(hr) && NumQualityLevels != 0)
1028 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
1029 }
1030 }
1031 else
1032 {
1033 LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
1034 rc = VERR_NOT_SUPPORTED;
1035 }
1036 }
1037 else
1038 rc = VERR_NOT_SUPPORTED;
1039 return rc;
1040}
1041
1042
1043static void dxLogRelVideoCaps(ID3D11VideoDevice *pVideoDevice)
1044{
1045#define FORMAT_ELEMENT(aFormat) { aFormat, #aFormat }
1046 static const struct {
1047 DXGI_FORMAT format;
1048 char const *pszFormat;
1049 } aVDFormats[] =
1050 {
1051 FORMAT_ELEMENT(DXGI_FORMAT_NV12),
1052 FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
1053 FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
1054 };
1055
1056 static const struct {
1057 DXGI_FORMAT format;
1058 char const *pszFormat;
1059 } aVPFormats[] =
1060 {
1061 // Queried from driver
1062 FORMAT_ELEMENT(DXGI_FORMAT_R8_UNORM),
1063 FORMAT_ELEMENT(DXGI_FORMAT_R16_UNORM),
1064 FORMAT_ELEMENT(DXGI_FORMAT_NV12),
1065 FORMAT_ELEMENT(DXGI_FORMAT_420_OPAQUE),
1066 FORMAT_ELEMENT(DXGI_FORMAT_P010),
1067 FORMAT_ELEMENT(DXGI_FORMAT_P016),
1068 FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
1069 FORMAT_ELEMENT(DXGI_FORMAT_NV11),
1070 FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
1071 FORMAT_ELEMENT(DXGI_FORMAT_R16G16B16A16_FLOAT),
1072 FORMAT_ELEMENT(DXGI_FORMAT_Y216),
1073 FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8X8_UNORM),
1074 FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM),
1075 FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM),
1076 FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10A2_UNORM),
1077
1078 // From format table
1079 FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM),
1080 FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM_SRGB),
1081 FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM_SRGB),
1082 FORMAT_ELEMENT(DXGI_FORMAT_Y410),
1083 FORMAT_ELEMENT(DXGI_FORMAT_Y416),
1084 FORMAT_ELEMENT(DXGI_FORMAT_Y210),
1085 FORMAT_ELEMENT(DXGI_FORMAT_AI44),
1086 FORMAT_ELEMENT(DXGI_FORMAT_IA44),
1087 FORMAT_ELEMENT(DXGI_FORMAT_P8),
1088 FORMAT_ELEMENT(DXGI_FORMAT_A8P8),
1089 };
1090#undef FORMAT_ELEMENT
1091
1092 static char const *apszFilterName[] =
1093 {
1094 "BRIGHTNESS",
1095 "CONTRAST",
1096 "HUE",
1097 "SATURATION",
1098 "NOISE_REDUCTION",
1099 "EDGE_ENHANCEMENT",
1100 "ANAMORPHIC_SCALING",
1101 "STEREO_ADJUSTMENT",
1102 };
1103
1104 HRESULT hr;
1105
1106 UINT cProfiles = pVideoDevice->GetVideoDecoderProfileCount();
1107 for (UINT i = 0; i < cProfiles; ++i)
1108 {
1109 GUID DecodeProfile;
1110 hr = pVideoDevice->GetVideoDecoderProfile(i, &DecodeProfile);
1111 if (SUCCEEDED(hr))
1112 LogRel(("VMSVGA: DecodeProfile[%d]: %RTuuid\n", i, &DecodeProfile));
1113 }
1114
1115 D3D11_VIDEO_DECODER_DESC DecoderDesc;
1116 // Commonly used D3D11_DECODER_PROFILE_H264_VLD_NOFGT
1117 DecoderDesc.Guid = { 0x1b81be68, 0xa0c7,0x11d3,{0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5}};
1118 DecoderDesc.SampleWidth = 1920;
1119 DecoderDesc.SampleHeight = 1080;
1120 DecoderDesc.OutputFormat = DXGI_FORMAT_NV12;
1121
1122 UINT cConfigs = 0;
1123 hr = pVideoDevice->GetVideoDecoderConfigCount(&DecoderDesc, &cConfigs);
1124 for (UINT i = 0; i < cConfigs; ++i)
1125 {
1126 D3D11_VIDEO_DECODER_CONFIG DecoderConfig;
1127 hr = pVideoDevice->GetVideoDecoderConfig(&DecoderDesc, i, &DecoderConfig);
1128 if (SUCCEEDED(hr))
1129 {
1130 LogRel2(("VMSVGA: Config[%d]:\n"
1131 "VMSVGA: %RTuuid\n"
1132 "VMSVGA: %RTuuid\n"
1133 "VMSVGA: %RTuuid\n"
1134 "VMSVGA: BitstreamRaw 0x%x\n"
1135 "VMSVGA: MBCRO 0x%x\n"
1136 "VMSVGA: RDH 0x%x\n"
1137 "VMSVGA: SR8 0x%x\n"
1138 "VMSVGA: R8Sub 0x%x\n"
1139 "VMSVGA: SH8or9C 0x%x\n"
1140 "VMSVGA: SRInterlea 0x%x\n"
1141 "VMSVGA: IRUnsigned 0x%x\n"
1142 "VMSVGA: RDAccel 0x%x\n"
1143 "VMSVGA: HInvScan 0x%x\n"
1144 "VMSVGA: SpecIDCT 0x%x\n"
1145 "VMSVGA: 4GCoefs 0x%x\n"
1146 "VMSVGA: MinRTBC 0x%x\n"
1147 "VMSVGA: DecSpec 0x%x\n"
1148 ,
1149 i, &DecoderConfig.guidConfigBitstreamEncryption,
1150 &DecoderConfig.guidConfigMBcontrolEncryption,
1151 &DecoderConfig.guidConfigResidDiffEncryption,
1152 DecoderConfig.ConfigBitstreamRaw,
1153 DecoderConfig.ConfigMBcontrolRasterOrder,
1154 DecoderConfig.ConfigResidDiffHost,
1155 DecoderConfig.ConfigSpatialResid8,
1156 DecoderConfig.ConfigResid8Subtraction,
1157 DecoderConfig.ConfigSpatialHost8or9Clipping,
1158 DecoderConfig.ConfigSpatialResidInterleaved,
1159 DecoderConfig.ConfigIntraResidUnsigned,
1160 DecoderConfig.ConfigResidDiffAccelerator,
1161 DecoderConfig.ConfigHostInverseScan,
1162 DecoderConfig.ConfigSpecificIDCT,
1163 DecoderConfig.Config4GroupedCoefs,
1164 DecoderConfig.ConfigMinRenderTargetBuffCount,
1165 DecoderConfig.ConfigDecoderSpecific
1166 ));
1167 }
1168 }
1169
1170 for (UINT idxFormat = 0; idxFormat < RT_ELEMENTS(aVDFormats); ++idxFormat)
1171 {
1172 BOOL Supported;
1173 hr = pVideoDevice->CheckVideoDecoderFormat(&DecoderDesc.Guid, aVDFormats[idxFormat].format, &Supported);
1174 if (FAILED(hr))
1175 Supported = FALSE;
1176 LogRel(("VMSVGA: %s: %s\n", aVDFormats[idxFormat].pszFormat, Supported ? "supported" : "-"));
1177 }
1178
1179 /* An arbitrary common video content. */
1180 D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
1181 Desc.InputFrameFormat = D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
1182 Desc.InputFrameRate.Numerator = 25;
1183 Desc.InputFrameRate.Denominator = 1;
1184 Desc.InputWidth = 1920;
1185 Desc.InputHeight = 1080;
1186 Desc.OutputFrameRate.Numerator = 30;
1187 Desc.OutputFrameRate.Denominator = 1;
1188 Desc.OutputWidth = 864;
1189 Desc.OutputHeight = 486;
1190 Desc.Usage = D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
1191
1192 ID3D11VideoProcessorEnumerator *pEnum = 0;
1193 hr = pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pEnum);
1194 if (SUCCEEDED(hr))
1195 {
1196 for (unsigned i = 0; i < RT_ELEMENTS(aVPFormats); ++i)
1197 {
1198 UINT Flags;
1199 hr = pEnum->CheckVideoProcessorFormat(aVPFormats[i].format, &Flags);
1200 if (FAILED(hr))
1201 Flags = 0;
1202 LogRel(("VMSVGA: %s: flags %x\n", aVPFormats[i].pszFormat, Flags));
1203 }
1204
1205 D3D11_VIDEO_PROCESSOR_CAPS Caps;
1206 hr = pEnum->GetVideoProcessorCaps(&Caps);
1207 if (SUCCEEDED(hr))
1208 {
1209 LogRel(("VMSVGA: VideoProcessorCaps:\n"
1210 "VMSVGA: DeviceCaps %x\n"
1211 "VMSVGA: FeatureCaps %x\n"
1212 "VMSVGA: FilterCaps %x\n"
1213 "VMSVGA: InputFormatCaps %x\n"
1214 "VMSVGA: AutoStreamCaps %x\n"
1215 "VMSVGA: StereoCaps %x\n"
1216 "VMSVGA: RateConversionCapsCount %d\n"
1217 "VMSVGA: MaxInputStreams %d\n"
1218 "VMSVGA: MaxStreamStates %d\n"
1219 "",
1220 Caps.DeviceCaps,
1221 Caps.FeatureCaps,
1222 Caps.FilterCaps,
1223 Caps.InputFormatCaps,
1224 Caps.AutoStreamCaps,
1225 Caps.StereoCaps,
1226 Caps.RateConversionCapsCount,
1227 Caps.MaxInputStreams,
1228 Caps.MaxStreamStates
1229 ));
1230
1231 for (unsigned i = 0; i < RT_ELEMENTS(apszFilterName); ++i)
1232 {
1233 if (Caps.FilterCaps & (1 << i))
1234 {
1235 D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
1236 hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
1237 if (SUCCEEDED(hr))
1238 {
1239 LogRel(("VMSVGA: Filter[%s]: Min %d, Max %d, Default %d, Multiplier " FLOAT_FMT_STR "\n",
1240 apszFilterName[i],
1241 Range.Minimum,
1242 Range.Maximum,
1243 Range.Default,
1244 FLOAT_FMT_ARGS(Range.Multiplier)
1245 ));
1246 }
1247 }
1248 }
1249
1250 for (unsigned idxRateCaps = 0; idxRateCaps < Caps.RateConversionCapsCount; ++idxRateCaps)
1251 {
1252 D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
1253 hr = pEnum->GetVideoProcessorRateConversionCaps(idxRateCaps, &RateCaps);
1254 if (SUCCEEDED(hr))
1255 {
1256 LogRel(("VMSVGA: RateConversionCaps[%u]:\n"
1257 "VMSVGA: PastFrames %d\n"
1258 "VMSVGA: FutureFrames %d\n"
1259 "VMSVGA: ProcessorCaps %x\n"
1260 "VMSVGA: ITelecineCaps %x\n"
1261 "VMSVGA: CustomRateCount %d\n"
1262 "",
1263 idxRateCaps,
1264 RateCaps.PastFrames,
1265 RateCaps.FutureFrames,
1266 RateCaps.ProcessorCaps,
1267 RateCaps.ITelecineCaps,
1268 RateCaps.CustomRateCount
1269 ));
1270
1271 for (unsigned idxCustomRateCap = 0; idxCustomRateCap < RateCaps.CustomRateCount; ++idxCustomRateCap)
1272 {
1273 D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
1274 hr = pEnum->GetVideoProcessorCustomRate(idxRateCaps, idxCustomRateCap, &Rate);
1275 if (SUCCEEDED(hr))
1276 {
1277 LogRel(("VMSVGA: CustomRate[%u][%u]:\n"
1278 "VMSVGA: CustomRate %d/%d\n"
1279 "VMSVGA: OutputFrames %d\n"
1280 "VMSVGA: InputInterlaced %d\n"
1281 "VMSVGA: InputFramesOrFields %d\n"
1282 "",
1283 idxRateCaps, idxCustomRateCap,
1284 Rate.CustomRate.Numerator,
1285 Rate.CustomRate.Denominator,
1286 Rate.OutputFrames,
1287 Rate.InputInterlaced,
1288 Rate.InputFramesOrFields
1289 ));
1290 }
1291 }
1292 }
1293 }
1294 }
1295
1296 D3D_RELEASE(pEnum);
1297 }
1298}
1299
1300
1301static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
1302{
1303 int rc = VINF_SUCCESS;
1304
1305 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
1306 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1307 {
1308 D3D_FEATURE_LEVEL_11_1,
1309 D3D_FEATURE_LEVEL_11_0
1310 };
1311 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1312#ifdef DEBUG
1313 Flags |= D3D11_CREATE_DEVICE_DEBUG;
1314#endif
1315
1316 ID3D11Device *pDevice = 0;
1317 ID3D11DeviceContext *pImmediateContext = 0;
1318 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1319 D3D_DRIVER_TYPE_HARDWARE,
1320 NULL,
1321 Flags,
1322 s_aFeatureLevels,
1323 RT_ELEMENTS(s_aFeatureLevels),
1324 D3D11_SDK_VERSION,
1325 &pDevice,
1326 &pDXDevice->FeatureLevel,
1327 &pImmediateContext);
1328#ifdef DEBUG
1329 if (FAILED(hr))
1330 {
1331 /* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
1332 * Settings/System/Apps/Optional features/Add a feature/Graphics Tools
1333 * Retry without the flag.
1334 */
1335 Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
1336 hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1337 D3D_DRIVER_TYPE_HARDWARE,
1338 NULL,
1339 Flags,
1340 s_aFeatureLevels,
1341 RT_ELEMENTS(s_aFeatureLevels),
1342 D3D11_SDK_VERSION,
1343 &pDevice,
1344 &pDXDevice->FeatureLevel,
1345 &pImmediateContext);
1346 }
1347#endif
1348
1349 if (SUCCEEDED(hr))
1350 {
1351 LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
1352
1353 hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
1354 AssertReturnStmt(SUCCEEDED(hr),
1355 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
1356 VERR_NOT_SUPPORTED);
1357
1358 hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
1359 AssertReturnStmt(SUCCEEDED(hr),
1360 D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
1361 VERR_NOT_SUPPORTED);
1362
1363 HRESULT hr2;
1364#ifdef DEBUG
1365 /* Break into debugger when DX runtime detects anything unusual. */
1366 ID3D11Debug *pDebug = 0;
1367 hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1368 if (SUCCEEDED(hr2))
1369 {
1370 ID3D11InfoQueue *pInfoQueue = 0;
1371 hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
1372 if (SUCCEEDED(hr2))
1373 {
1374 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
1375// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
1376// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
1377
1378 /* No breakpoints for the following messages. */
1379 D3D11_MESSAGE_ID saIgnoredMessageIds[] =
1380 {
1381 /* Message ID: Caused by: */
1382 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
1383 D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
1384 (D3D11_MESSAGE_ID)3146081 /*DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET*/, /* U. */
1385 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
1386 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
1387 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
1388 D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
1389 };
1390
1391 D3D11_INFO_QUEUE_FILTER filter;
1392 RT_ZERO(filter);
1393 filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
1394 filter.DenyList.pIDList = saIgnoredMessageIds;
1395 pInfoQueue->AddStorageFilterEntries(&filter);
1396
1397 D3D_RELEASE(pInfoQueue);
1398 }
1399 D3D_RELEASE(pDebug);
1400 }
1401#endif
1402
1403 IDXGIDevice *pDxgiDevice = 0;
1404 hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1405 if (SUCCEEDED(hr))
1406 {
1407 IDXGIAdapter *pDxgiAdapter = 0;
1408 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1409 if (SUCCEEDED(hr))
1410 {
1411 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1412 D3D_RELEASE(pDxgiAdapter);
1413 }
1414
1415 D3D_RELEASE(pDxgiDevice);
1416 }
1417
1418 /* Failure to query VideoDevice should be ignored. */
1419 hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11VideoDevice), (void**)&pDXDevice->pVideoDevice);
1420 Assert(SUCCEEDED(hr2));
1421 if (SUCCEEDED(hr2))
1422 {
1423 hr2 = pDXDevice->pImmediateContext->QueryInterface(__uuidof(ID3D11VideoContext), (void**)&pDXDevice->pVideoContext);
1424 Assert(SUCCEEDED(hr2));
1425 if (SUCCEEDED(hr2))
1426 {
1427 LogRel(("VMSVGA: VideoDevice available\n"));
1428 }
1429 else
1430 {
1431 D3D_RELEASE(pDXDevice->pVideoDevice);
1432 pDXDevice->pVideoContext = NULL;
1433 }
1434 }
1435 else
1436 pDXDevice->pVideoDevice = NULL;
1437 }
1438
1439 if (SUCCEEDED(hr))
1440 BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1441 else
1442 rc = VERR_NOT_SUPPORTED;
1443
1444 if (SUCCEEDED(hr))
1445 {
1446 /* Query multisample support for a common format. */
1447 DXGI_FORMAT const dxgiFormat = DXGI_FORMAT_B8G8R8A8_UNORM;
1448
1449 for (uint32_t i = 2; i <= D3D11_MAX_MULTISAMPLE_SAMPLE_COUNT; i *= 2)
1450 {
1451 UINT NumQualityLevels = 0;
1452 HRESULT hr2 = pDXDevice->pDevice->CheckMultisampleQualityLevels(dxgiFormat, i, &NumQualityLevels);
1453 if (SUCCEEDED(hr2) && NumQualityLevels > 0)
1454 pDXDevice->MultisampleCountMask |= UINT32_C(1) << (i - 1);
1455 }
1456 }
1457 return rc;
1458}
1459
1460
1461static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1462{
1463 RT_NOREF(pBackend);
1464
1465 BlitRelease(&pDevice->Blitter);
1466
1467#ifdef DX_COMMON_STAGING_BUFFER
1468 D3D_RELEASE(pDevice->pStagingBuffer);
1469#endif
1470
1471 D3D_RELEASE(pDevice->pVideoDevice);
1472 D3D_RELEASE(pDevice->pVideoContext);
1473
1474 D3D_RELEASE(pDevice->pDxgiFactory);
1475 D3D_RELEASE(pDevice->pImmediateContext);
1476
1477#ifdef DEBUG
1478 HRESULT hr2;
1479 ID3D11Debug *pDebug = 0;
1480 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1481 if (SUCCEEDED(hr2))
1482 {
1483 /// @todo Use this to see whether all resources have been properly released.
1484 //DEBUG_BREAKPOINT_TEST();
1485 //pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL | (D3D11_RLDO_FLAGS)0x4 /*D3D11_RLDO_IGNORE_INTERNAL*/);
1486 D3D_RELEASE(pDebug);
1487 }
1488#endif
1489
1490 D3D_RELEASE(pDevice->pDevice);
1491 RT_ZERO(*pDevice);
1492}
1493
1494
1495static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1496{
1497 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1498 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1499
1500 Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1501
1502 PVMSVGA3DSURFACE pSurface;
1503 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1504 AssertRCReturnVoid(rc);
1505
1506 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1507}
1508
1509
1510static void dxViewRemoveFromList(DXVIEW *pDXView)
1511{
1512 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1513 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1514 /* pView can be NULL, if COT entry is already empty. */
1515 if (pDXView->u.pView)
1516 {
1517 Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1518 RTListNodeRemove(&pDXView->nodeSurfaceView);
1519 }
1520}
1521
1522
1523static int dxViewDestroy(DXVIEW *pDXView)
1524{
1525 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1526 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1527 if (pDXView->u.pView)
1528 {
1529 D3D_RELEASE(pDXView->u.pView);
1530 RTListNodeRemove(&pDXView->nodeSurfaceView);
1531 RT_ZERO(*pDXView);
1532 }
1533
1534 return VINF_SUCCESS;
1535}
1536
1537
1538static int dxViewInit(DXVIEW *pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1539{
1540 pDXView->cid = pDXContext->cid;
1541 pDXView->sid = pSurface->id;
1542 pDXView->viewId = viewId;
1543 pDXView->enmViewType = enmViewType;
1544 pDXView->u.pView = pView;
1545 RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1546
1547 LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1548 pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1549
1550DXVIEW *pIter, *pNext;
1551RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1552{
1553 AssertPtr(pNext);
1554 LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1555}
1556
1557 return VINF_SUCCESS;
1558}
1559
1560
1561static DXDEVICE *dxDeviceGet(PVMSVGA3DSTATE p3dState)
1562{
1563 DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
1564#ifdef DEBUG
1565 HRESULT hr = pDXDevice->pDevice->GetDeviceRemovedReason();
1566 Assert(SUCCEEDED(hr));
1567#endif
1568 return pDXDevice;
1569}
1570
1571
1572static int dxDeviceFlush(DXDEVICE *pDevice)
1573{
1574 /** @todo Should the flush follow the query submission? */
1575 pDevice->pImmediateContext->Flush();
1576
1577 ID3D11Query *pQuery = 0;
1578 D3D11_QUERY_DESC qd;
1579 RT_ZERO(qd);
1580 qd.Query = D3D11_QUERY_EVENT;
1581
1582 HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1583 Assert(hr == S_OK); RT_NOREF(hr);
1584 pDevice->pImmediateContext->End(pQuery);
1585
1586 BOOL queryData;
1587 while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1588 RTThreadYield();
1589
1590 D3D_RELEASE(pQuery);
1591
1592 return VINF_SUCCESS;
1593}
1594
1595
1596static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface)
1597{
1598 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1599 if (!pBackendSurface)
1600 AssertFailedReturn(NULL);
1601 return pBackendSurface->u.pResource;
1602}
1603
1604// Not used
1605#if 0
1606static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1607{
1608 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1609
1610 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1611 return pRTViewEntry->sid;
1612}
1613#endif
1614
1615static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry, DXSHADER *pDXShader)
1616{
1617 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1618 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1619
1620 /* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1621 SVGA3dStreamOutputDeclarationEntry const *paDecls;
1622 PVMSVGAMOB pMob = NULL;
1623 if (pEntry->usesMob)
1624 {
1625 pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1626 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1627
1628 /* Create a memory pointer for the MOB, which is accessible by host. */
1629 int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1630 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1631
1632 /* Get pointer to the shader bytecode. This will also verify the offset. */
1633 paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1634 AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1635 }
1636 else
1637 paDecls = &pEntry->decl[0];
1638
1639 pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1640 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1641 {
1642 D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1643 SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1644
1645 uint32_t const registerMask = pSrc->registerMask & 0xF;
1646 unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1647 unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1648
1649 pDst->Stream = pSrc->stream;
1650 pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1651 pDst->SemanticIndex = 0;
1652 pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1653 pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1654 pDst->OutputSlot = pSrc->outputSlot;
1655 }
1656
1657 uint32_t MaxSemanticIndex = 0;
1658 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1659 {
1660 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1661 SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1662
1663 /* Find the corresponding register and mask in the GS shader output. */
1664 int idxFound = -1;
1665 for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1666 {
1667 SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1668 if ( pOutputEntry->registerIndex == decl->registerIndex
1669 && (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1670 {
1671 idxFound = iOutputEntry;
1672 break;
1673 }
1674 }
1675
1676 if (idxFound >= 0)
1677 {
1678 DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1679 pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1680 pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1681 MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1682 }
1683 else
1684 AssertFailed();
1685 }
1686
1687 /* A geometry shader may return components of the same register as different attributes:
1688 *
1689 * Output signature
1690 * Name Index Mask Register
1691 * ATTRIB 2 xy 2
1692 * ATTRIB 3 z 2
1693 *
1694 * For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1695 * (not StartComponent = 2 and ComponentCount = 1):
1696 *
1697 * Stream output declaration
1698 * SemanticName SemanticIndex StartComponent ComponentCount
1699 * ATTRIB 2 0 2
1700 * ATTRIB 3 0 1
1701 *
1702 * Stream output declaration can have multiple entries for the same attribute.
1703 * In this case StartComponent is the offset within the attribute.
1704 *
1705 * Output signature
1706 * Name Index Mask Register
1707 * ATTRIB 0 xyzw 0
1708 *
1709 * Stream output declaration
1710 * SemanticName SemanticIndex StartComponent ComponentCount
1711 * ATTRIB 0 0 1
1712 * ATTRIB 0 1 1
1713 *
1714 * StartComponent has been computed as the component offset in a register:
1715 * 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1716 *
1717 * StartComponent must be the offset in an attribute.
1718 */
1719 for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1720 {
1721 /* Find minimum StartComponent value for this attribute. */
1722 uint32_t MinStartComponent = UINT32_MAX;
1723 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1724 {
1725 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1726 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1727 MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1728 }
1729
1730 AssertContinue(MinStartComponent != UINT32_MAX);
1731
1732 /* Adjust the StartComponent to start from 0 for this attribute. */
1733 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1734 {
1735 D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1736 if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1737 pDeclarationEntry->StartComponent -= MinStartComponent;
1738 }
1739 }
1740
1741 if (pMob)
1742 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1743
1744 return VINF_SUCCESS;
1745}
1746
1747static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1748{
1749 RT_ZERO(*pDXStreamOutput);
1750}
1751
1752static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1753{
1754 /* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1755 switch (svgaBlend)
1756 {
1757 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1758 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1759 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1760 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1761 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1762 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1763 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1764 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1765 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1766 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1767 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1768 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1769 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1770 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1771 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1772 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1773 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1774 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1775 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1776 default:
1777 break;
1778 }
1779 return D3D11_BLEND_ZERO;
1780}
1781
1782
1783static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1784{
1785 switch (svgaBlend)
1786 {
1787 case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1788 case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1789 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1790 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1791 case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1792 case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1793 case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1794 case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1795 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1796 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1797 case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1798 case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1799 case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1800 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1801 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1802 case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1803 case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1804 case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1805 case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1806 default:
1807 break;
1808 }
1809 return D3D11_BLEND_ZERO;
1810}
1811
1812
1813static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1814{
1815 return (D3D11_BLEND_OP)svgaBlendEq;
1816}
1817
1818
1819static D3D11_LOGIC_OP dxLogicOp(uint8_t svgaLogicEq)
1820{
1821 return (D3D11_LOGIC_OP)svgaLogicEq;
1822}
1823
1824
1825/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1826static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState1 **pp)
1827{
1828 D3D11_BLEND_DESC1 BlendDesc;
1829 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1830 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1831 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1832 {
1833 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1834 BlendDesc.RenderTarget[i].LogicOpEnable = RT_BOOL(pEntry->perRT[i].logicOpEnable);
1835 BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1836 BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1837 BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1838 BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1839 BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1840 BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1841 BlendDesc.RenderTarget[i].LogicOp = dxLogicOp (pEntry->perRT[i].logicOp);
1842 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1843 }
1844
1845 HRESULT hr = pDevice->pDevice->CreateBlendState1(&BlendDesc, pp);
1846 Assert(SUCCEEDED(hr));
1847 return hr;
1848}
1849
1850
1851static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
1852{
1853 D3D11_DEPTH_STENCIL_DESC desc;
1854 desc.DepthEnable = pEntry->depthEnable;
1855 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1856 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1857 desc.StencilEnable = pEntry->stencilEnable;
1858 desc.StencilReadMask = pEntry->stencilReadMask;
1859 desc.StencilWriteMask = pEntry->stencilWriteMask;
1860 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1861 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1862 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1863 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1864 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1865 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1866 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1867 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1868 /** @todo frontEnable, backEnable */
1869
1870 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1871 Assert(SUCCEEDED(hr));
1872 return hr;
1873}
1874
1875
1876static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
1877{
1878 D3D11_SAMPLER_DESC desc;
1879 /* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1880 if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1881 desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1882 ? D3D11_FILTER_COMPARISON_ANISOTROPIC
1883 : D3D11_FILTER_ANISOTROPIC;
1884 else
1885 desc.Filter = (D3D11_FILTER)pEntry->filter;
1886 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1887 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1888 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1889 desc.MipLODBias = pEntry->mipLODBias;
1890 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1891 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1892 desc.BorderColor[0] = pEntry->borderColor.value[0];
1893 desc.BorderColor[1] = pEntry->borderColor.value[1];
1894 desc.BorderColor[2] = pEntry->borderColor.value[2];
1895 desc.BorderColor[3] = pEntry->borderColor.value[3];
1896 desc.MinLOD = pEntry->minLOD;
1897 desc.MaxLOD = pEntry->maxLOD;
1898
1899 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1900 Assert(SUCCEEDED(hr));
1901 return hr;
1902}
1903
1904
1905static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1906{
1907 if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1908 return D3D11_FILL_WIREFRAME;
1909 return (D3D11_FILL_MODE)svgaFillMode;
1910}
1911
1912
1913static D3D11_CULL_MODE dxCullMode(uint8_t svgaCullMode)
1914{
1915 return (D3D11_CULL_MODE)svgaCullMode;
1916}
1917
1918
1919static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState1 **pp)
1920{
1921 D3D11_RASTERIZER_DESC1 desc;
1922 desc.FillMode = dxFillMode(pEntry->fillMode);
1923 desc.CullMode = dxCullMode(pEntry->cullMode);
1924 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1925 /** @todo provokingVertexLast */
1926 desc.DepthBias = pEntry->depthBias;
1927 desc.DepthBiasClamp = pEntry->depthBiasClamp;
1928 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1929 desc.DepthClipEnable = pEntry->depthClipEnable;
1930 desc.ScissorEnable = pEntry->scissorEnable;
1931 desc.MultisampleEnable = pEntry->multisampleEnable;
1932 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1933 desc.ForcedSampleCount = pEntry->forcedSampleCount;
1934 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern */
1935
1936 HRESULT hr = pDevice->pDevice->CreateRasterizerState1(&desc, pp);
1937 Assert(SUCCEEDED(hr));
1938 return hr;
1939}
1940
1941
1942static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
1943{
1944 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1945
1946 ID3D11Resource *pResource = dxResource(pSurface);
1947
1948 D3D11_RENDER_TARGET_VIEW_DESC desc;
1949 RT_ZERO(desc);
1950 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1951 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
1952 switch (pEntry->resourceDimension)
1953 {
1954 case SVGA3D_RESOURCE_BUFFER:
1955 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1956 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1957 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1958 break;
1959 case SVGA3D_RESOURCE_TEXTURE1D:
1960 if (pSurface->surfaceDesc.numArrayElements <= 1)
1961 {
1962 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1963 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1964 }
1965 else
1966 {
1967 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1968 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1969 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1970 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1971 }
1972 break;
1973 case SVGA3D_RESOURCE_TEXTURE2D:
1974 if (pSurface->surfaceDesc.numArrayElements <= 1)
1975 {
1976 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1977 ? D3D11_RTV_DIMENSION_TEXTURE2DMS
1978 : D3D11_RTV_DIMENSION_TEXTURE2D;
1979 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1980 }
1981 else
1982 {
1983 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1984 ? D3D11_RTV_DIMENSION_TEXTURE2DMSARRAY
1985 : D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1986 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1987 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1988 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1989 }
1990 break;
1991 case SVGA3D_RESOURCE_TEXTURE3D:
1992 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1993 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1994 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1995 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1996 break;
1997 case SVGA3D_RESOURCE_TEXTURECUBE:
1998 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1999 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
2000 desc.Texture2DArray.FirstArraySlice = 0;
2001 desc.Texture2DArray.ArraySize = 6;
2002 break;
2003 case SVGA3D_RESOURCE_BUFFEREX:
2004 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
2005 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
2006 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2007 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2008 break;
2009 default:
2010 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2011 }
2012
2013 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
2014 Assert(SUCCEEDED(hr));
2015 return hr;
2016}
2017
2018
2019static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
2020{
2021 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2022
2023 ID3D11Resource *pResource = dxResource(pSurface);
2024
2025 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
2026 RT_ZERO(desc);
2027 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2028 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
2029
2030 switch (pEntry->resourceDimension)
2031 {
2032 case SVGA3D_RESOURCE_BUFFER:
2033 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
2034 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2035 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2036 break;
2037 case SVGA3D_RESOURCE_TEXTURE1D:
2038 if (pSurface->surfaceDesc.numArrayElements <= 1)
2039 {
2040 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
2041 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2042 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
2043 }
2044 else
2045 {
2046 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
2047 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2048 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
2049 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2050 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
2051 }
2052 break;
2053 case SVGA3D_RESOURCE_TEXTURE2D:
2054 if (pSurface->surfaceDesc.numArrayElements <= 1)
2055 {
2056 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2057 ? D3D11_SRV_DIMENSION_TEXTURE2DMS
2058 : D3D11_SRV_DIMENSION_TEXTURE2D;
2059 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2060 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
2061 }
2062 else
2063 {
2064 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2065 ? D3D11_SRV_DIMENSION_TEXTURE2DMSARRAY
2066 : D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
2067 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2068 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
2069 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2070 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
2071 }
2072 break;
2073 case SVGA3D_RESOURCE_TEXTURE3D:
2074 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
2075 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2076 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
2077 break;
2078 case SVGA3D_RESOURCE_TEXTURECUBE:
2079 if (pSurface->surfaceDesc.numArrayElements <= 6)
2080 {
2081 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
2082 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2083 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
2084 }
2085 else
2086 {
2087 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
2088 desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
2089 desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
2090 desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
2091 desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
2092 }
2093 break;
2094 case SVGA3D_RESOURCE_BUFFEREX:
2095 AssertFailed(); /** @todo test. */
2096 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
2097 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
2098 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
2099 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
2100 break;
2101 default:
2102 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2103 }
2104
2105 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
2106 Assert(SUCCEEDED(hr));
2107 return hr;
2108}
2109
2110
2111static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, SVGACOTableDXUAViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11UnorderedAccessView **pp)
2112{
2113 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2114
2115 ID3D11Resource *pResource = dxResource(pSurface);
2116
2117 D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
2118 RT_ZERO(desc);
2119 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2120 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
2121
2122 switch (pEntry->resourceDimension)
2123 {
2124 case SVGA3D_RESOURCE_BUFFER:
2125 desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
2126 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2127 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2128 desc.Buffer.Flags = pEntry->desc.buffer.flags;
2129 break;
2130 case SVGA3D_RESOURCE_TEXTURE1D:
2131 if (pSurface->surfaceDesc.numArrayElements <= 1)
2132 {
2133 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
2134 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
2135 }
2136 else
2137 {
2138 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
2139 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
2140 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2141 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
2142 }
2143 break;
2144 case SVGA3D_RESOURCE_TEXTURE2D:
2145 if (pSurface->surfaceDesc.numArrayElements <= 1)
2146 {
2147 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
2148 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
2149 }
2150 else
2151 {
2152 desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
2153 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
2154 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2155 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
2156 }
2157 break;
2158 case SVGA3D_RESOURCE_TEXTURE3D:
2159 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
2160 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
2161 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
2162 break;
2163 default:
2164 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2165 }
2166
2167 HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
2168 Assert(SUCCEEDED(hr));
2169 return hr;
2170}
2171
2172
2173static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11DepthStencilView **pp)
2174{
2175 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2176
2177 ID3D11Resource *pResource = dxResource(pSurface);
2178
2179 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
2180 RT_ZERO(desc);
2181 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2182 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN || pEntry->format == SVGA3D_BUFFER, E_FAIL);
2183 desc.Flags = pEntry->flags;
2184 switch (pEntry->resourceDimension)
2185 {
2186 case SVGA3D_RESOURCE_TEXTURE1D:
2187 if (pSurface->surfaceDesc.numArrayElements <= 1)
2188 {
2189 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
2190 desc.Texture1D.MipSlice = pEntry->mipSlice;
2191 }
2192 else
2193 {
2194 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
2195 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
2196 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
2197 desc.Texture1DArray.ArraySize = pEntry->arraySize;
2198 }
2199 break;
2200 case SVGA3D_RESOURCE_TEXTURE2D:
2201 if (pSurface->surfaceDesc.numArrayElements <= 1)
2202 {
2203 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2204 ? D3D11_DSV_DIMENSION_TEXTURE2DMS
2205 : D3D11_DSV_DIMENSION_TEXTURE2D;
2206 desc.Texture2D.MipSlice = pEntry->mipSlice;
2207 }
2208 else
2209 {
2210 desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2211 ? D3D11_DSV_DIMENSION_TEXTURE2DMSARRAY
2212 : D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
2213 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
2214 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
2215 desc.Texture2DArray.ArraySize = pEntry->arraySize;
2216 }
2217 break;
2218 default:
2219 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2220 }
2221
2222 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
2223 Assert(SUCCEEDED(hr));
2224 return hr;
2225}
2226
2227
2228static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
2229{
2230 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2231
2232 HRESULT hr = S_OK;
2233
2234 switch (pDXShader->enmShaderType)
2235 {
2236 case SVGA3D_SHADERTYPE_VS:
2237 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
2238 Assert(SUCCEEDED(hr));
2239 break;
2240 case SVGA3D_SHADERTYPE_PS:
2241 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
2242 Assert(SUCCEEDED(hr));
2243 break;
2244 case SVGA3D_SHADERTYPE_GS:
2245 {
2246 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
2247 if (soid == SVGA_ID_INVALID)
2248 {
2249 hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
2250 Assert(SUCCEEDED(hr));
2251 }
2252 else
2253 {
2254 ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
2255
2256 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
2257 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
2258
2259 hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
2260 pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
2261 pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
2262 pEntry->rasterizedStream,
2263 /*pClassLinkage=*/ NULL, &pDXShader->pGeometryShader);
2264 AssertBreak(SUCCEEDED(hr));
2265
2266 pDXShader->soid = soid;
2267 }
2268 break;
2269 }
2270 case SVGA3D_SHADERTYPE_HS:
2271 hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
2272 Assert(SUCCEEDED(hr));
2273 break;
2274 case SVGA3D_SHADERTYPE_DS:
2275 hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
2276 Assert(SUCCEEDED(hr));
2277 break;
2278 case SVGA3D_SHADERTYPE_CS:
2279 hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
2280 Assert(SUCCEEDED(hr));
2281 break;
2282 default:
2283 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2284 }
2285
2286 return hr;
2287}
2288
2289
2290static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2291{
2292 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2293
2294 switch (type)
2295 {
2296 case SVGA3D_SHADERTYPE_VS:
2297 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2298 break;
2299 case SVGA3D_SHADERTYPE_PS:
2300 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2301 break;
2302 case SVGA3D_SHADERTYPE_GS:
2303 {
2304 Assert(!pDXShader || (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2305 RT_NOREF(pDXContext);
2306 pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2307 } break;
2308 case SVGA3D_SHADERTYPE_HS:
2309 pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2310 break;
2311 case SVGA3D_SHADERTYPE_DS:
2312 pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2313 break;
2314 case SVGA3D_SHADERTYPE_CS:
2315 pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2316 break;
2317 default:
2318 ASSERT_GUEST_FAILED_RETURN_VOID();
2319 }
2320}
2321
2322
2323static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
2324{
2325 switch (type)
2326 {
2327 case SVGA3D_SHADERTYPE_VS:
2328 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2329 break;
2330 case SVGA3D_SHADERTYPE_PS:
2331 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2332 break;
2333 case SVGA3D_SHADERTYPE_GS:
2334 pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2335 break;
2336 case SVGA3D_SHADERTYPE_HS:
2337 pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2338 break;
2339 case SVGA3D_SHADERTYPE_DS:
2340 pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2341 break;
2342 case SVGA3D_SHADERTYPE_CS:
2343 pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2344 break;
2345 default:
2346 ASSERT_GUEST_FAILED_RETURN_VOID();
2347 }
2348}
2349
2350
2351static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
2352{
2353 switch (type)
2354 {
2355 case SVGA3D_SHADERTYPE_VS:
2356 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2357 break;
2358 case SVGA3D_SHADERTYPE_PS:
2359 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2360 break;
2361 case SVGA3D_SHADERTYPE_GS:
2362 pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2363 break;
2364 case SVGA3D_SHADERTYPE_HS:
2365 pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2366 break;
2367 case SVGA3D_SHADERTYPE_DS:
2368 pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2369 break;
2370 case SVGA3D_SHADERTYPE_CS:
2371 pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2372 break;
2373 default:
2374 ASSERT_GUEST_FAILED_RETURN_VOID();
2375 }
2376}
2377
2378
2379static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
2380{
2381 switch (type)
2382 {
2383 case SVGA3D_SHADERTYPE_VS:
2384 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2385 break;
2386 case SVGA3D_SHADERTYPE_PS:
2387 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2388 break;
2389 case SVGA3D_SHADERTYPE_GS:
2390 pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2391 break;
2392 case SVGA3D_SHADERTYPE_HS:
2393 pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2394 break;
2395 case SVGA3D_SHADERTYPE_DS:
2396 pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2397 break;
2398 case SVGA3D_SHADERTYPE_CS:
2399 pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2400 break;
2401 default:
2402 ASSERT_GUEST_FAILED_RETURN_VOID();
2403 }
2404}
2405
2406
2407static void dxCSUnorderedAccessViewSet(DXDEVICE *pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView * const *papUnorderedAccessView, UINT *pUAVInitialCounts)
2408{
2409 pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2410}
2411
2412
2413static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2414{
2415 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2416 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2417 RTListInit(&pBackendSurface->listView);
2418 *ppBackendSurface = pBackendSurface;
2419 return VINF_SUCCESS;
2420}
2421
2422
2423static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2424{
2425 /* Catch unimplemented flags. */
2426 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2427
2428 UINT BindFlags = 0;
2429
2430 if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER | SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2431 BindFlags |= D3D11_BIND_VERTEX_BUFFER;
2432 if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER | SVGA3D_SURFACE_HINT_INDEXBUFFER))
2433 BindFlags |= D3D11_BIND_INDEX_BUFFER;
2434 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
2435 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
2436 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
2437 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
2438 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
2439 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
2440 if (surfaceFlags & SVGA3D_SURFACE_RESERVED1) BindFlags |= D3D11_BIND_DECODER;
2441
2442 return BindFlags;
2443}
2444
2445
2446static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2447{
2448 switch (dxgiFormat)
2449 {
2450 case DXGI_FORMAT_R32G32B32A32_FLOAT:
2451 case DXGI_FORMAT_R32G32B32A32_UINT:
2452 case DXGI_FORMAT_R32G32B32A32_SINT:
2453 return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2454 case DXGI_FORMAT_R32G32B32_FLOAT:
2455 case DXGI_FORMAT_R32G32B32_UINT:
2456 case DXGI_FORMAT_R32G32B32_SINT:
2457 return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2458 case DXGI_FORMAT_R16G16B16A16_FLOAT:
2459 case DXGI_FORMAT_R16G16B16A16_UNORM:
2460 case DXGI_FORMAT_R16G16B16A16_UINT:
2461 case DXGI_FORMAT_R16G16B16A16_SNORM:
2462 case DXGI_FORMAT_R16G16B16A16_SINT:
2463 return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2464 case DXGI_FORMAT_R32G32_FLOAT:
2465 case DXGI_FORMAT_R32G32_UINT:
2466 case DXGI_FORMAT_R32G32_SINT:
2467 return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2468 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2469 case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2470 case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2471 return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2472 case DXGI_FORMAT_R10G10B10A2_UNORM:
2473 case DXGI_FORMAT_R10G10B10A2_UINT:
2474 return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2475 case DXGI_FORMAT_R8G8B8A8_UNORM:
2476 case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2477 case DXGI_FORMAT_R8G8B8A8_UINT:
2478 case DXGI_FORMAT_R8G8B8A8_SNORM:
2479 case DXGI_FORMAT_R8G8B8A8_SINT:
2480 return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2481 case DXGI_FORMAT_R16G16_FLOAT:
2482 case DXGI_FORMAT_R16G16_UNORM:
2483 case DXGI_FORMAT_R16G16_UINT:
2484 case DXGI_FORMAT_R16G16_SNORM:
2485 case DXGI_FORMAT_R16G16_SINT:
2486 return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2487 case DXGI_FORMAT_D32_FLOAT:
2488 case DXGI_FORMAT_R32_FLOAT:
2489 case DXGI_FORMAT_R32_UINT:
2490 case DXGI_FORMAT_R32_SINT:
2491 return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2492 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2493 case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2494 case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2495 return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2496 case DXGI_FORMAT_R8G8_UNORM:
2497 case DXGI_FORMAT_R8G8_UINT:
2498 case DXGI_FORMAT_R8G8_SNORM:
2499 case DXGI_FORMAT_R8G8_SINT:
2500 return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2501 case DXGI_FORMAT_R16_FLOAT:
2502 case DXGI_FORMAT_D16_UNORM:
2503 case DXGI_FORMAT_R16_UNORM:
2504 case DXGI_FORMAT_R16_UINT:
2505 case DXGI_FORMAT_R16_SNORM:
2506 case DXGI_FORMAT_R16_SINT:
2507 return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2508 case DXGI_FORMAT_R8_UNORM:
2509 case DXGI_FORMAT_R8_UINT:
2510 case DXGI_FORMAT_R8_SNORM:
2511 case DXGI_FORMAT_R8_SINT:
2512 return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2513 case DXGI_FORMAT_BC1_UNORM:
2514 case DXGI_FORMAT_BC1_UNORM_SRGB:
2515 return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2516 case DXGI_FORMAT_BC2_UNORM:
2517 case DXGI_FORMAT_BC2_UNORM_SRGB:
2518 return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2519 case DXGI_FORMAT_BC3_UNORM:
2520 case DXGI_FORMAT_BC3_UNORM_SRGB:
2521 return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2522 case DXGI_FORMAT_BC4_UNORM:
2523 case DXGI_FORMAT_BC4_SNORM:
2524 return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2525 case DXGI_FORMAT_BC5_UNORM:
2526 case DXGI_FORMAT_BC5_SNORM:
2527 return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2528 case DXGI_FORMAT_B8G8R8A8_UNORM:
2529 case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2530 return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2531 case DXGI_FORMAT_B8G8R8X8_UNORM:
2532 case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2533 return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2534 case DXGI_FORMAT_BC6H_UF16:
2535 case DXGI_FORMAT_BC6H_SF16:
2536 return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2537 case DXGI_FORMAT_BC7_UNORM:
2538 case DXGI_FORMAT_BC7_UNORM_SRGB:
2539 return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2540 default:
2541 break;
2542 }
2543
2544 return dxgiFormat;
2545}
2546
2547
2548static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2549{
2550 switch (dxgiFormat)
2551 {
2552 case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2553 case DXGI_FORMAT_D32_FLOAT:
2554 case DXGI_FORMAT_D24_UNORM_S8_UINT:
2555 case DXGI_FORMAT_D16_UNORM:
2556 return true;
2557 default:
2558 break;
2559 }
2560
2561 return false;
2562}
2563
2564
2565static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2566{
2567 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2568 AssertReturn(p3dState, VERR_INVALID_STATE);
2569
2570 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2571 AssertReturn(pBackend, VERR_INVALID_STATE);
2572
2573 UINT MiscFlags = 0;
2574 DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
2575 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2576
2577 if (pSurface->pBackendSurface != NULL)
2578 {
2579 AssertFailed(); /** @todo Should the function not be used like that? */
2580 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2581 }
2582
2583 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2584 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2585 AssertRCReturn(rc, rc);
2586
2587 uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2588 uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2589 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2590 uint32_t const numMipLevels = pSurface->cLevels;
2591
2592 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2593 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2594
2595 /* Create typeless textures, unless it is a depth/stencil resource,
2596 * because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2597 * Always use typeless format for staging/dynamic resources.
2598 * Use explicit format for screen targets. For example they can be used
2599 * for video processor output view, which does not allow a typeless format.
2600 */
2601 DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2602 if ( !dxIsDepthStencilFormat(dxgiFormat)
2603 && !RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET))
2604 dxgiFormat = dxgiFormatTypeless;
2605
2606 /* Format for staging resource is always the typeless one. */
2607 DXGI_FORMAT const dxgiFormatStaging = dxgiFormatTypeless;
2608
2609 DXGI_FORMAT dxgiFormatDynamic;
2610 /* Some drivers do not allow to use depth typeless formats for dynamic resources.
2611 * Create a placeholder texture (it does not work with CopySubresource).
2612 */
2613 /** @todo Implement upload from such textures. */
2614 if (dxgiFormatTypeless == DXGI_FORMAT_R24G8_TYPELESS)
2615 dxgiFormatDynamic = DXGI_FORMAT_R32_UINT;
2616 else if (dxgiFormatTypeless == DXGI_FORMAT_R32G8X24_TYPELESS)
2617 dxgiFormatDynamic = DXGI_FORMAT_R32G32_UINT;
2618 else
2619 dxgiFormatDynamic = dxgiFormatTypeless;
2620
2621 UINT const BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2622
2623 /*
2624 * Create D3D11 texture object.
2625 *
2626 * No initial data for multisample resources.
2627 * On NVidia the host driver does not allow initial data for large textures with D3D11_BIND_DECODER flag.
2628 */
2629 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2630 if ( pSurface->paMipmapLevels[0].pSurfaceData
2631 && pSurface->surfaceDesc.multisampleCount <= 1
2632 && (BindFlags & D3D11_BIND_DECODER) == 0
2633 )
2634 {
2635 /* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2636 uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2637 paInitialData = (D3D11_SUBRESOURCE_DATA *)RTMemAlloc(cSubresource * sizeof(D3D11_SUBRESOURCE_DATA));
2638 AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2639
2640 for (uint32_t i = 0; i < cSubresource; ++i)
2641 {
2642 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2643 D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2644 p->pSysMem = pMipmapLevel->pSurfaceData;
2645 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2646 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2647 }
2648 }
2649
2650 LogFlowFunc(("sid = %u %ux%ux%u mips = %u fmt = %s(%u) typeless = %s(%u) staging = %s(%u) dyn = %s(%u) pInitData = %p\n",
2651 pSurface->id, cWidth, cHeight, cDepth, numMipLevels,
2652 dxFormatName(dxgiFormat), dxgiFormat, dxFormatName(dxgiFormatTypeless), dxgiFormatTypeless,
2653 dxFormatName(dxgiFormatStaging), dxgiFormatStaging, dxFormatName(dxgiFormatDynamic), dxgiFormatDynamic,
2654 paInitialData));
2655
2656 HRESULT hr = S_OK;
2657 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2658 {
2659 Assert(pSurface->cFaces == 6);
2660 Assert(cWidth == cHeight);
2661 Assert(cDepth == 1);
2662//DEBUG_BREAKPOINT_TEST();
2663
2664 D3D11_TEXTURE2D_DESC td;
2665 RT_ZERO(td);
2666 td.Width = cWidth;
2667 td.Height = cHeight;
2668 td.MipLevels = numMipLevels;
2669 td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2670 td.Format = dxgiFormat;
2671 td.SampleDesc.Count = 1;
2672 td.SampleDesc.Quality = 0;
2673 td.Usage = D3D11_USAGE_DEFAULT;
2674 td.BindFlags = BindFlags;
2675 td.CPUAccessFlags = 0; /** @todo */
2676 td.MiscFlags = MiscFlags | D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2677 if ( numMipLevels > 1
2678 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2679 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2680
2681 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2682 Assert(SUCCEEDED(hr));
2683 if (SUCCEEDED(hr))
2684 {
2685 /* Map-able texture. */
2686 td.Format = dxgiFormatDynamic;
2687 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2688 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2689 td.Usage = D3D11_USAGE_DYNAMIC;
2690 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2691 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2692 td.MiscFlags = 0;
2693 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2694 Assert(SUCCEEDED(hr));
2695 }
2696
2697 if (SUCCEEDED(hr))
2698 {
2699 /* Staging texture. */
2700 td.Format = dxgiFormatStaging;
2701 td.Usage = D3D11_USAGE_STAGING;
2702 td.BindFlags = 0; /* No flags allowed. */
2703 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2704 td.MiscFlags = 0;
2705 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2706 Assert(SUCCEEDED(hr));
2707 }
2708
2709 if (SUCCEEDED(hr))
2710 {
2711 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2712 }
2713 }
2714 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2715 {
2716 /*
2717 * 1D texture.
2718 */
2719 Assert(pSurface->cFaces == 1);
2720
2721 D3D11_TEXTURE1D_DESC td;
2722 RT_ZERO(td);
2723 td.Width = cWidth;
2724 td.MipLevels = numMipLevels;
2725 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2726 td.Format = dxgiFormat;
2727 td.Usage = D3D11_USAGE_DEFAULT;
2728 td.BindFlags = BindFlags;
2729 td.CPUAccessFlags = 0;
2730 td.MiscFlags = MiscFlags; /** @todo */
2731 if ( numMipLevels > 1
2732 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2733 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2734
2735 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2736 Assert(SUCCEEDED(hr));
2737 if (SUCCEEDED(hr))
2738 {
2739 /* Map-able texture. */
2740 td.Format = dxgiFormatDynamic;
2741 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2742 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2743 td.Usage = D3D11_USAGE_DYNAMIC;
2744 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2745 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2746 td.MiscFlags = 0;
2747 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2748 Assert(SUCCEEDED(hr));
2749 }
2750
2751 if (SUCCEEDED(hr))
2752 {
2753 /* Staging texture. */
2754 td.Format = dxgiFormatStaging;
2755 td.Usage = D3D11_USAGE_STAGING;
2756 td.BindFlags = 0; /* No flags allowed. */
2757 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2758 td.MiscFlags = 0;
2759 hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2760 Assert(SUCCEEDED(hr));
2761 }
2762
2763 if (SUCCEEDED(hr))
2764 {
2765 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2766 }
2767 }
2768 else
2769 {
2770 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2771 {
2772 /*
2773 * Volume texture.
2774 */
2775 Assert(pSurface->cFaces == 1);
2776 Assert(pSurface->surfaceDesc.numArrayElements == 1);
2777
2778 D3D11_TEXTURE3D_DESC td;
2779 RT_ZERO(td);
2780 td.Width = cWidth;
2781 td.Height = cHeight;
2782 td.Depth = cDepth;
2783 td.MipLevels = numMipLevels;
2784 td.Format = dxgiFormat;
2785 td.Usage = D3D11_USAGE_DEFAULT;
2786 td.BindFlags = BindFlags;
2787 td.CPUAccessFlags = 0; /** @todo */
2788 td.MiscFlags = MiscFlags; /** @todo */
2789 if ( numMipLevels > 1
2790 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2791 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2792
2793 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2794 Assert(SUCCEEDED(hr));
2795 if (SUCCEEDED(hr))
2796 {
2797 /* Map-able texture. */
2798 td.Format = dxgiFormatDynamic;
2799 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2800 td.Usage = D3D11_USAGE_DYNAMIC;
2801 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2802 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2803 td.MiscFlags = 0;
2804 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2805 Assert(SUCCEEDED(hr));
2806 }
2807
2808 if (SUCCEEDED(hr))
2809 {
2810 /* Staging texture. */
2811 td.Format = dxgiFormatStaging;
2812 td.Usage = D3D11_USAGE_STAGING;
2813 td.BindFlags = 0; /* No flags allowed. */
2814 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2815 td.MiscFlags = 0;
2816 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2817 Assert(SUCCEEDED(hr));
2818 }
2819
2820 if (SUCCEEDED(hr))
2821 {
2822 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2823 }
2824 }
2825 else
2826 {
2827 /*
2828 * 2D texture.
2829 */
2830 Assert(cDepth == 1);
2831 Assert(pSurface->cFaces == 1);
2832
2833 D3D11_TEXTURE2D_DESC td;
2834 RT_ZERO(td);
2835 td.Width = cWidth;
2836 td.Height = cHeight;
2837 td.MipLevels = numMipLevels;
2838 td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2839 td.Format = dxgiFormat;
2840 td.SampleDesc.Count = pSurface->surfaceDesc.multisampleCount;
2841 td.SampleDesc.Quality = 0;
2842 td.Usage = D3D11_USAGE_DEFAULT;
2843 td.BindFlags = BindFlags;
2844 td.CPUAccessFlags = 0; /** @todo */
2845 td.MiscFlags = MiscFlags; /** @todo */
2846 if ( numMipLevels > 1
2847 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
2848 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2849
2850 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2851 Assert(SUCCEEDED(hr));
2852 if (SUCCEEDED(hr))
2853 {
2854 /* Map-able texture. */
2855 td.Format = dxgiFormatDynamic;
2856 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2857 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2858 td.SampleDesc.Count = 1;
2859 td.SampleDesc.Quality = 0;
2860 td.Usage = D3D11_USAGE_DYNAMIC;
2861 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2862 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2863 td.MiscFlags = 0;
2864 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2865 Assert(SUCCEEDED(hr));
2866 }
2867
2868 if (SUCCEEDED(hr))
2869 {
2870 /* Staging texture. */
2871 td.Format = dxgiFormatStaging;
2872 td.Usage = D3D11_USAGE_STAGING;
2873 td.BindFlags = 0; /* No flags allowed. */
2874 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2875 td.MiscFlags = 0;
2876 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2877 Assert(SUCCEEDED(hr));
2878 }
2879
2880 if (SUCCEEDED(hr))
2881 {
2882 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2883 }
2884 }
2885 }
2886
2887 if (hr == DXGI_ERROR_DEVICE_REMOVED)
2888 {
2889 DEBUG_BREAKPOINT_TEST();
2890 hr = pDXDevice->pDevice->GetDeviceRemovedReason();
2891 }
2892
2893 Assert(hr == S_OK);
2894
2895 RTMemFree(paInitialData);
2896
2897 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2898 {
2899 }
2900
2901 if (SUCCEEDED(hr))
2902 {
2903 /*
2904 * Success.
2905 */
2906 LogFunc(("sid = %u\n", pSurface->id));
2907 pBackendSurface->enmDxgiFormat = dxgiFormat;
2908 pSurface->pBackendSurface = pBackendSurface;
2909 return VINF_SUCCESS;
2910 }
2911
2912 D3D_RELEASE(pBackendSurface->staging.pResource);
2913 D3D_RELEASE(pBackendSurface->dynamic.pResource);
2914 D3D_RELEASE(pBackendSurface->u.pResource);
2915 RTMemFree(pBackendSurface);
2916 return VERR_NO_MEMORY;
2917}
2918
2919#if 0
2920static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2921{
2922 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2923 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2924
2925 /* Buffers should be created as such. */
2926 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2927 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2928 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2929 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2930 )), VERR_INVALID_PARAMETER);
2931
2932 if (pSurface->pBackendSurface != NULL)
2933 {
2934 AssertFailed(); /** @todo Should the function not be used like that? */
2935 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2936 }
2937
2938 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2939 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2940 AssertRCReturn(rc, rc);
2941
2942 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2943 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2944 AssertRCReturn(rc, rc);
2945
2946 LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2947
2948 /* Upload the current data, if any. */
2949 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2950 D3D11_SUBRESOURCE_DATA initialData;
2951 if (pMipLevel->pSurfaceData)
2952 {
2953 initialData.pSysMem = pMipLevel->pSurfaceData;
2954 initialData.SysMemPitch = pMipLevel->cbSurface;
2955 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2956
2957 pInitialData = &initialData;
2958 }
2959
2960 D3D11_BUFFER_DESC bd;
2961 RT_ZERO(bd);
2962 bd.ByteWidth = pMipLevel->cbSurface;
2963 bd.Usage = D3D11_USAGE_DEFAULT;
2964 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2965
2966 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2967 Assert(SUCCEEDED(hr));
2968#ifndef DX_COMMON_STAGING_BUFFER
2969 if (SUCCEEDED(hr))
2970 {
2971 /* Map-able Buffer. */
2972 bd.Usage = D3D11_USAGE_DYNAMIC;
2973 bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2974 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2975 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
2976 Assert(SUCCEEDED(hr));
2977 }
2978
2979 if (SUCCEEDED(hr))
2980 {
2981 /* Staging texture. */
2982 bd.Usage = D3D11_USAGE_STAGING;
2983 bd.BindFlags = 0; /* No flags allowed. */
2984 bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2985 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
2986 Assert(SUCCEEDED(hr));
2987 }
2988#endif
2989
2990 if (SUCCEEDED(hr))
2991 {
2992 /*
2993 * Success.
2994 */
2995 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2996 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2997 pSurface->pBackendSurface = pBackendSurface;
2998 return VINF_SUCCESS;
2999 }
3000
3001 /* Failure. */
3002 D3D_RELEASE(pBackendSurface->u.pBuffer);
3003#ifndef DX_COMMON_STAGING_BUFFER
3004 D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
3005 D3D_RELEASE(pBackendSurface->staging.pBuffer);
3006#endif
3007 RTMemFree(pBackendSurface);
3008 return VERR_NO_MEMORY;
3009}
3010#endif
3011
3012static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3013{
3014 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
3015 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3016
3017 /* Buffers should be created as such. */
3018 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
3019
3020 if (pSurface->pBackendSurface != NULL)
3021 {
3022 AssertFailed(); /** @todo Should the function not be used like that? */
3023 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3024 }
3025
3026 PVMSVGA3DBACKENDSURFACE pBackendSurface;
3027 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
3028 AssertRCReturn(rc, rc);
3029
3030 D3D11_BUFFER_DESC bd;
3031 RT_ZERO(bd);
3032 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
3033 bd.Usage = D3D11_USAGE_DEFAULT;
3034 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3035 bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
3036 bd.MiscFlags = 0;
3037 bd.StructureByteStride = 0;
3038
3039 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
3040#ifndef DX_COMMON_STAGING_BUFFER
3041 if (SUCCEEDED(hr))
3042 {
3043 /* Map-able Buffer. */
3044 bd.Usage = D3D11_USAGE_DYNAMIC;
3045 bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3046 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3047 hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->dynamic.pBuffer);
3048 Assert(SUCCEEDED(hr));
3049 }
3050
3051 if (SUCCEEDED(hr))
3052 {
3053 /* Staging texture. */
3054 bd.Usage = D3D11_USAGE_STAGING;
3055 bd.BindFlags = 0; /* No flags allowed. */
3056 bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
3057 hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->staging.pBuffer);
3058 Assert(SUCCEEDED(hr));
3059 }
3060#endif
3061
3062 if (SUCCEEDED(hr))
3063 {
3064 /*
3065 * Success.
3066 */
3067 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3068 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3069 pSurface->pBackendSurface = pBackendSurface;
3070 return VINF_SUCCESS;
3071 }
3072
3073 /* Failure. */
3074 D3D_RELEASE(pBackendSurface->u.pBuffer);
3075#ifndef DX_COMMON_STAGING_BUFFER
3076 D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
3077 D3D_RELEASE(pBackendSurface->staging.pBuffer);
3078#endif
3079 RTMemFree(pBackendSurface);
3080 return VERR_NO_MEMORY;
3081}
3082
3083#if 0
3084static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
3085{
3086 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
3087 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3088
3089 /* Buffers should be created as such. */
3090 AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
3091
3092 if (pSurface->pBackendSurface != NULL)
3093 {
3094 AssertFailed(); /** @todo Should the function not be used like that? */
3095 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3096 }
3097
3098 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3099 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3100 AssertRCReturn(rc, rc);
3101
3102 ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
3103 && sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3104
3105 PVMSVGA3DBACKENDSURFACE pBackendSurface;
3106 rc = dxBackendSurfaceAlloc(&pBackendSurface);
3107 AssertRCReturn(rc, rc);
3108
3109 /* Upload the current data, if any. */
3110 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3111 D3D11_SUBRESOURCE_DATA initialData;
3112 if (pMipLevel->pSurfaceData)
3113 {
3114 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
3115 initialData.SysMemPitch = pMipLevel->cbSurface;
3116 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3117
3118 pInitialData = &initialData;
3119
3120 // Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
3121 }
3122
3123 D3D11_BUFFER_DESC bd;
3124 RT_ZERO(bd);
3125 bd.ByteWidth = sizeInBytes;
3126 bd.Usage = D3D11_USAGE_DYNAMIC;
3127 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
3128 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3129 bd.MiscFlags = 0;
3130 bd.StructureByteStride = 0;
3131
3132 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3133 if (SUCCEEDED(hr))
3134 {
3135 /*
3136 * Success.
3137 */
3138 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3139 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3140 pSurface->pBackendSurface = pBackendSurface;
3141 return VINF_SUCCESS;
3142 }
3143
3144 /* Failure. */
3145 D3D_RELEASE(pBackendSurface->u.pBuffer);
3146 RTMemFree(pBackendSurface);
3147 return VERR_NO_MEMORY;
3148}
3149#endif
3150
3151static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3152{
3153 DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
3154 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3155
3156 if (pSurface->pBackendSurface != NULL)
3157 {
3158 AssertFailed(); /** @todo Should the function not be used like that? */
3159 vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3160 }
3161
3162 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3163 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3164 AssertRCReturn(rc, rc);
3165
3166 PVMSVGA3DBACKENDSURFACE pBackendSurface;
3167 rc = dxBackendSurfaceAlloc(&pBackendSurface);
3168 AssertRCReturn(rc, rc);
3169
3170 HRESULT hr;
3171
3172 /*
3173 * Figure out the type of the surface.
3174 */
3175 if (pSurface->format == SVGA3D_BUFFER)
3176 {
3177 /* Upload the current data, if any. */
3178 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3179 D3D11_SUBRESOURCE_DATA initialData;
3180 if (pMipLevel->pSurfaceData)
3181 {
3182 initialData.pSysMem = pMipLevel->pSurfaceData;
3183 initialData.SysMemPitch = pMipLevel->cbSurface;
3184 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3185
3186 pInitialData = &initialData;
3187 }
3188
3189 D3D11_BUFFER_DESC bd;
3190 RT_ZERO(bd);
3191 bd.ByteWidth = pMipLevel->cbSurface;
3192
3193 if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD | SVGA3D_SURFACE_STAGING_DOWNLOAD))
3194 bd.Usage = D3D11_USAGE_STAGING;
3195 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3196 bd.Usage = D3D11_USAGE_DYNAMIC;
3197 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3198 {
3199 /* Use D3D11_USAGE_DEFAULT instead of D3D11_USAGE_IMMUTABLE to let the guest the guest update
3200 * the buffer later.
3201 *
3202 * The guest issues SVGA_3D_CMD_INVALIDATE_GB_IMAGE followed by SVGA_3D_CMD_UPDATE_GB_IMAGE
3203 * when the data in SVGA3D_SURFACE_HINT_STATIC surface is updated.
3204 * D3D11_USAGE_IMMUTABLE would work if the device destroys the D3D buffer on INVALIDATE
3205 * and re-creates it in setupPipeline with initial data from the backing guest MOB.
3206 * Currently the device does not destroy the buffer on INVALIDATE. So just use D3D11_USAGE_DEFAULT.
3207 */
3208 bd.Usage = D3D11_USAGE_DEFAULT;
3209 }
3210 else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3211 bd.Usage = D3D11_USAGE_DEFAULT;
3212
3213 bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3214
3215 if (bd.Usage == D3D11_USAGE_STAGING)
3216 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
3217 else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3218 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3219
3220 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3221 bd.MiscFlags |= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3222 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3223 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3224 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3225 bd.MiscFlags |= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3226 if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3227 bd.MiscFlags |= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3228
3229 if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3230 {
3231 SVGAOTableSurfaceEntry entrySurface;
3232 rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3233 AssertRCReturn(rc, rc);
3234
3235 bd.StructureByteStride = entrySurface.bufferByteStride;
3236 }
3237
3238 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3239 Assert(SUCCEEDED(hr));
3240#ifndef DX_COMMON_STAGING_BUFFER
3241 if (SUCCEEDED(hr))
3242 {
3243 /* Map-able Buffer. */
3244 bd.Usage = D3D11_USAGE_DYNAMIC;
3245 bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3246 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3247 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
3248 Assert(SUCCEEDED(hr));
3249 }
3250
3251 if (SUCCEEDED(hr))
3252 {
3253 /* Staging texture. */
3254 bd.Usage = D3D11_USAGE_STAGING;
3255 bd.BindFlags = 0; /* No flags allowed. */
3256 bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
3257 hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
3258 Assert(SUCCEEDED(hr));
3259 }
3260#endif
3261 if (SUCCEEDED(hr))
3262 {
3263 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3264 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3265 }
3266 }
3267 else
3268 {
3269 /** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3270 AssertFailed();
3271 hr = E_FAIL;
3272 }
3273
3274 if (SUCCEEDED(hr))
3275 {
3276 /*
3277 * Success.
3278 */
3279 pSurface->pBackendSurface = pBackendSurface;
3280 return VINF_SUCCESS;
3281 }
3282
3283 /* Failure. */
3284 D3D_RELEASE(pBackendSurface->u.pResource);
3285 D3D_RELEASE(pBackendSurface->dynamic.pResource);
3286 D3D_RELEASE(pBackendSurface->staging.pResource);
3287 RTMemFree(pBackendSurface);
3288 return VERR_NO_MEMORY;
3289}
3290
3291
3292static int dxEnsureResource(PVGASTATECC pThisCC, uint32_t sid,
3293 PVMSVGA3DSURFACE *ppSurface, ID3D11Resource **ppResource)
3294{
3295 /* Get corresponding resource for sid. Create the surface if does not yet exist. */
3296 PVMSVGA3DSURFACE pSurface;
3297 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3298 AssertRCReturn(rc, rc);
3299
3300 if (pSurface->pBackendSurface == NULL)
3301 {
3302 /* Create the actual texture or buffer. */
3303 /** @todo One function to create all resources from surfaces. */
3304 if (pSurface->format != SVGA3D_BUFFER)
3305 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
3306 else
3307 rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSurface);
3308
3309 AssertRCReturn(rc, rc);
3310 LogFunc(("Created for sid = %u\n", sid));
3311 }
3312
3313 ID3D11Resource *pResource = dxResource(pSurface);
3314 AssertReturn(pResource, VERR_INVALID_STATE);
3315
3316 *ppSurface = pSurface;
3317 *ppResource = pResource;
3318 return VINF_SUCCESS;
3319}
3320
3321
3322#ifdef DX_COMMON_STAGING_BUFFER
3323static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3324{
3325 AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3326
3327 if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3328 return VINF_SUCCESS;
3329
3330 D3D_RELEASE(pDXDevice->pStagingBuffer);
3331
3332 uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3333
3334 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3335 D3D11_BUFFER_DESC bd;
3336 RT_ZERO(bd);
3337 bd.ByteWidth = cbAlloc;
3338 bd.Usage = D3D11_USAGE_STAGING;
3339 //bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3340 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
3341
3342 int rc = VINF_SUCCESS;
3343 ID3D11Buffer *pBuffer;
3344 HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3345 if (SUCCEEDED(hr))
3346 {
3347 pDXDevice->pStagingBuffer = pBuffer;
3348 pDXDevice->cbStagingBuffer = cbAlloc;
3349 }
3350 else
3351 {
3352 pDXDevice->cbStagingBuffer = 0;
3353 rc = VERR_NO_MEMORY;
3354 }
3355
3356 return rc;
3357}
3358#endif
3359
3360
3361static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3362{
3363 RT_NOREF(pDevIns, pThis);
3364
3365 int rc;
3366#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3367 rc = glLdrInit(pDevIns);
3368 if (RT_FAILURE(rc))
3369 {
3370 LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3371 return rc;
3372 }
3373#endif
3374
3375 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3376 AssertReturn(pBackend, VERR_NO_MEMORY);
3377 pThisCC->svga.p3dState->pBackend = pBackend;
3378
3379 rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3380 AssertRC(rc);
3381 if (RT_SUCCESS(rc))
3382 {
3383 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3384 AssertRC(rc);
3385 }
3386
3387 if (RT_SUCCESS(rc))
3388 {
3389 /* Failure to load the shader disassembler is ignored. */
3390 int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3391 if (RT_SUCCESS(rc2))
3392 rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3393 Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3394 }
3395
3396 vmsvga3dDXInitContextMobData(&pBackend->svgaDXContext);
3397//DEBUG_BREAKPOINT_TEST();
3398 return rc;
3399}
3400
3401
3402static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3403{
3404 RT_NOREF(pDevIns, pThis);
3405
3406 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3407 AssertReturn(pState, VERR_INVALID_STATE);
3408
3409 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3410 AssertReturn(pBackend, VERR_INVALID_STATE);
3411
3412 int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3413 if (RT_SUCCESS(rc))
3414 {
3415 IDXGIAdapter *pAdapter = NULL;
3416 HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3417 if (SUCCEEDED(hr))
3418 {
3419 DXGI_ADAPTER_DESC desc;
3420 hr = pAdapter->GetDesc(&desc);
3421 if (SUCCEEDED(hr))
3422 {
3423 pBackend->VendorId = desc.VendorId;
3424 pBackend->DeviceId = desc.DeviceId;
3425
3426 char sz[RT_ELEMENTS(desc.Description)];
3427 for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3428 sz[i] = (char)desc.Description[i];
3429 LogRelMax(1, ("VMSVGA: Adapter %04x:%04x [%s]\n", pBackend->VendorId, pBackend->DeviceId, sz));
3430 }
3431
3432 pAdapter->Release();
3433 }
3434
3435 if (pBackend->dxDevice.pVideoDevice)
3436 dxLogRelVideoCaps(pBackend->dxDevice.pVideoDevice);
3437
3438 if (!pThis->svga.fVMSVGA3dMSAA)
3439 pBackend->dxDevice.MultisampleCountMask = 0;
3440 }
3441 return rc;
3442}
3443
3444
3445static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3446{
3447 RT_NOREF(pThisCC);
3448 return VINF_SUCCESS;
3449}
3450
3451
3452static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3453{
3454 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3455 AssertReturn(pState, VERR_INVALID_STATE);
3456
3457 if (pState->pBackend)
3458 dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3459
3460 return VINF_SUCCESS;
3461}
3462
3463
3464/** @todo Such structures must be in VBoxVideo3D.h */
3465typedef struct VBOX3DNOTIFYDEFINESCREEN
3466{
3467 VBOX3DNOTIFY Core;
3468 uint32_t cWidth;
3469 uint32_t cHeight;
3470 int32_t xRoot;
3471 int32_t yRoot;
3472 uint32_t fPrimary;
3473 uint32_t cDpi;
3474} VBOX3DNOTIFYDEFINESCREEN;
3475
3476
3477static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3478{
3479 VBOX3DNOTIFYDEFINESCREEN n;
3480 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3481 n.Core.iDisplay = pScreen->idScreen;
3482 n.Core.u32Reserved = 0;
3483 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3484 RT_ZERO(n.Core.au8Data);
3485 n.cWidth = pScreen->cWidth;
3486 n.cHeight = pScreen->cHeight;
3487 n.xRoot = pScreen->xOrigin;
3488 n.yRoot = pScreen->yOrigin;
3489 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3490 n.cDpi = pScreen->cDpi;
3491
3492 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3493}
3494
3495
3496static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3497{
3498 VBOX3DNOTIFY n;
3499 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3500 n.iDisplay = pScreen->idScreen;
3501 n.u32Reserved = 0;
3502 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3503 RT_ZERO(n.au8Data);
3504
3505 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3506}
3507
3508
3509static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3510{
3511 VBOX3DNOTIFY n;
3512 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3513 n.iDisplay = pScreen->idScreen;
3514 n.u32Reserved = 0;
3515 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3516 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
3517
3518 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3519}
3520
3521
3522typedef struct VBOX3DNOTIFYUPDATE
3523{
3524 VBOX3DNOTIFY Core;
3525 uint32_t x;
3526 uint32_t y;
3527 uint32_t w;
3528 uint32_t h;
3529} VBOX3DNOTIFYUPDATE;
3530
3531
3532static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3533 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3534{
3535 VBOX3DNOTIFYUPDATE n;
3536 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3537 n.Core.iDisplay = pScreen->idScreen;
3538 n.Core.u32Reserved = 0;
3539 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3540 RT_ZERO(n.Core.au8Data);
3541 n.x = x;
3542 n.y = y;
3543 n.w = w;
3544 n.h = h;
3545
3546 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3547}
3548
3549static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3550{
3551 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3552
3553 DXDEVICE *pDXDevice = &pBackend->dxDevice;
3554 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3555
3556 D3D11_TEXTURE2D_DESC td;
3557 RT_ZERO(td);
3558 td.Width = cWidth;
3559 td.Height = cHeight;
3560 td.MipLevels = 1;
3561 td.ArraySize = 1;
3562 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3563 td.SampleDesc.Count = 1;
3564 td.SampleDesc.Quality = 0;
3565 td.Usage = D3D11_USAGE_DEFAULT;
3566 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
3567 td.CPUAccessFlags = 0;
3568 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3569
3570 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3571 if (SUCCEEDED(hr))
3572 {
3573 /* Get the shared handle. */
3574 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3575 if (SUCCEEDED(hr))
3576 {
3577 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3578 if (SUCCEEDED(hr))
3579 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3580 }
3581 }
3582
3583 if (SUCCEEDED(hr))
3584 return VINF_SUCCESS;
3585
3586 AssertFailed();
3587 return VERR_NOT_SUPPORTED;
3588}
3589
3590
3591static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3592{
3593 RT_NOREF(pState);
3594 D3D_RELEASE(p->pDXGIKeyedMutex);
3595 D3D_RELEASE(p->pDxgiResource);
3596 D3D_RELEASE(p->pTexture);
3597 p->SharedHandle = 0;
3598 p->sidScreenTarget = SVGA_ID_INVALID;
3599}
3600
3601
3602static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3603{
3604 RT_NOREF(pThis, pThisCC, pScreen);
3605
3606 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3607
3608 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3609 AssertReturn(pState, VERR_INVALID_STATE);
3610
3611 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3612 AssertReturn(pBackend, VERR_INVALID_STATE);
3613
3614 Assert(pScreen->pHwScreen == NULL);
3615
3616 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3617 AssertPtrReturn(p, VERR_NO_MEMORY);
3618
3619 p->sidScreenTarget = SVGA_ID_INVALID;
3620
3621 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3622 if (RT_SUCCESS(rc))
3623 {
3624 /* The frontend supports the screen. Create the actual resource. */
3625 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3626 if (RT_SUCCESS(rc))
3627 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3628 }
3629
3630 if (RT_SUCCESS(rc))
3631 {
3632 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3633 pScreen->pHwScreen = p;
3634 }
3635 else
3636 {
3637 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3638 vmsvga3dHwScreenDestroy(pState, p);
3639 RTMemFree(p);
3640 }
3641
3642 return rc;
3643}
3644
3645
3646static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3647{
3648 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3649 AssertReturn(pState, VERR_INVALID_STATE);
3650
3651 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3652
3653 if (pScreen->pHwScreen)
3654 {
3655 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3656 RTMemFree(pScreen->pHwScreen);
3657 pScreen->pHwScreen = NULL;
3658 }
3659
3660 return VINF_SUCCESS;
3661}
3662
3663
3664static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3665 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3666 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3667{
3668 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3669
3670 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3671 AssertReturn(pState, VERR_INVALID_STATE);
3672
3673 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3674 AssertReturn(pBackend, VERR_INVALID_STATE);
3675
3676 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3677 AssertReturn(p, VERR_NOT_SUPPORTED);
3678
3679 PVMSVGA3DSURFACE pSurface;
3680 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3681 AssertRCReturn(rc, rc);
3682
3683 /** @todo Implement. */
3684 AssertFailed();
3685 return VERR_NOT_IMPLEMENTED;
3686}
3687
3688
3689static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
3690 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3691{
3692 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3693 AssertReturn(pState, VERR_INVALID_STATE);
3694
3695 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3696 AssertReturn(pBackend, VERR_INVALID_STATE);
3697
3698 PVMSVGA3DSURFACE pSurface;
3699 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3700 AssertRCReturn(rc, rc);
3701
3702 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3703 AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3704
3705 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3706 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3707 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3708
3709 DXDEVICE *pDevice = &pBackend->dxDevice;
3710 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3711
3712 SVGA3dBox clipBox;
3713 if (pBox)
3714 {
3715 clipBox = *pBox;
3716 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3717 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3718 }
3719 else
3720 {
3721 clipBox.x = 0;
3722 clipBox.y = 0;
3723 clipBox.z = 0;
3724 clipBox.w = pMipLevel->mipmapSize.width;
3725 clipBox.h = pMipLevel->mipmapSize.height;
3726 clipBox.d = pMipLevel->mipmapSize.depth;
3727 }
3728
3729 D3D11_MAP d3d11MapType;
3730 switch (enmMapType)
3731 {
3732 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3733 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3734 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3735 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3736 default:
3737 AssertFailed();
3738 return VERR_INVALID_PARAMETER;
3739 }
3740
3741 D3D11_MAPPED_SUBRESOURCE mappedResource;
3742 RT_ZERO(mappedResource);
3743
3744 if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3745 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3746 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3747 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3748 {
3749 ID3D11Resource *pMappedResource;
3750 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3751 {
3752 pMappedResource = pBackendSurface->staging.pResource;
3753
3754 /* Copy the texture content to the staging texture.
3755 * The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3756 * because the staging (and dynamic) structures do not have miplevels.
3757 * Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3758 */
3759 ID3D11Resource *pDstResource = pMappedResource;
3760 UINT DstSubresource = 0;
3761 UINT DstX = 0;
3762 UINT DstY = 0;
3763 UINT DstZ = 0;
3764 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3765 UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3766 D3D11_BOX *pSrcBox = NULL;
3767 //D3D11_BOX SrcBox;
3768 //SrcBox.left = 0;
3769 //SrcBox.top = 0;
3770 //SrcBox.front = 0;
3771 //SrcBox.right = pMipLevel->mipmapSize.width;
3772 //SrcBox.bottom = pMipLevel->mipmapSize.height;
3773 //SrcBox.back = pMipLevel->mipmapSize.depth;
3774 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3775 pSrcResource, SrcSubresource, pSrcBox);
3776 }
3777 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3778 pMappedResource = pBackendSurface->staging.pResource;
3779 else
3780 pMappedResource = pBackendSurface->dynamic.pResource;
3781
3782 UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3783 HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3784 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3785 if (SUCCEEDED(hr))
3786 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3787 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3788 else
3789 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3790 }
3791 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3792 {
3793#ifdef DX_COMMON_STAGING_BUFFER
3794 /* Map the staging buffer. */
3795 rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3796 if (RT_SUCCESS(rc))
3797 {
3798 /* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3799 if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3800 d3d11MapType = D3D11_MAP_WRITE;
3801
3802 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3803 {
3804 /* Copy from the buffer to the staging buffer. */
3805 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3806 UINT DstSubresource = 0;
3807 UINT DstX = clipBox.x;
3808 UINT DstY = clipBox.y;
3809 UINT DstZ = clipBox.z;
3810 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3811 UINT SrcSubresource = 0;
3812 D3D11_BOX SrcBox;
3813 SrcBox.left = clipBox.x;
3814 SrcBox.top = clipBox.y;
3815 SrcBox.front = clipBox.z;
3816 SrcBox.right = clipBox.w;
3817 SrcBox.bottom = clipBox.h;
3818 SrcBox.back = clipBox.d;
3819 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3820 pSrcResource, SrcSubresource, &SrcBox);
3821 }
3822
3823 UINT const Subresource = 0; /* Buffers have only one subresource. */
3824 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3825 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3826 if (SUCCEEDED(hr))
3827 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3828 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3829 else
3830 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3831 }
3832#else
3833 ID3D11Resource *pMappedResource;
3834 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3835 {
3836 pMappedResource = pBackendSurface->staging.pResource;
3837
3838 /* Copy the resource content to the staging resource. */
3839 ID3D11Resource *pDstResource = pMappedResource;
3840 UINT DstSubresource = 0;
3841 UINT DstX = clipBox.x;
3842 UINT DstY = clipBox.y;
3843 UINT DstZ = clipBox.z;
3844 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3845 UINT SrcSubresource = 0;
3846 D3D11_BOX SrcBox;
3847 SrcBox.left = clipBox.x;
3848 SrcBox.top = clipBox.y;
3849 SrcBox.front = clipBox.z;
3850 SrcBox.right = clipBox.w;
3851 SrcBox.bottom = clipBox.h;
3852 SrcBox.back = clipBox.d;
3853 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3854 pSrcResource, SrcSubresource, &SrcBox);
3855 }
3856 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3857 pMappedResource = pBackendSurface->staging.pResource;
3858 else
3859 pMappedResource = pBackendSurface->dynamic.pResource;
3860
3861 UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3862 HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3863 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3864 if (SUCCEEDED(hr))
3865 vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3866 mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3867 else
3868 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3869#endif
3870 }
3871 else
3872 {
3873 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3874 /** @todo Implement. */
3875 AssertFailed();
3876 rc = VERR_NOT_IMPLEMENTED;
3877 }
3878
3879 return rc;
3880}
3881
3882
3883static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
3884{
3885 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3886 AssertReturn(pState, VERR_INVALID_STATE);
3887
3888 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3889 AssertReturn(pBackend, VERR_INVALID_STATE);
3890
3891 PVMSVGA3DSURFACE pSurface;
3892 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3893 AssertRCReturn(rc, rc);
3894
3895 /* The called should not use the function for system memory surfaces. */
3896 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3897 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3898
3899 PVMSVGA3DMIPMAPLEVEL pMipLevel;
3900 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3901 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3902
3903 DXDEVICE *pDevice = &pBackend->dxDevice;
3904 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3905
3906 if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3907 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3908 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3909 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3910 {
3911 ID3D11Resource *pMappedResource;
3912 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3913 pMappedResource = pBackendSurface->staging.pResource;
3914 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3915 pMappedResource = pBackendSurface->staging.pResource;
3916 else
3917 pMappedResource = pBackendSurface->dynamic.pResource;
3918
3919 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3920 pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3921
3922 if ( fWritten
3923 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3924 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3925 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3926 {
3927 /* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3928 * Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3929 */
3930 uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3931 uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3932 uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3933 /** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3934 bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3935 && pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3936
3937 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3938 UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3939 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3940 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3941 UINT DstZ = pMap->box.z;
3942 ID3D11Resource *pSrcResource = pMappedResource;
3943 UINT SrcSubresource = Subresource;
3944 D3D11_BOX *pSrcBox;
3945 D3D11_BOX SrcBox;
3946 if (fEntireResource)
3947 pSrcBox = NULL;
3948 else
3949 {
3950 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3951 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3952
3953 SrcBox.left = DstX;
3954 SrcBox.top = DstY;
3955 SrcBox.front = DstZ;
3956 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3957 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3958 SrcBox.back = DstZ + pMap->box.d;
3959 pSrcBox = &SrcBox;
3960 }
3961
3962 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3963 pSrcResource, SrcSubresource, pSrcBox);
3964 }
3965 }
3966 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3967 {
3968 Log4(("Unmap buffer sid = %u:\n%.*Rhxd\n", pSurface->id, pMap->cbRow, pMap->pvData));
3969
3970#ifdef DX_COMMON_STAGING_BUFFER
3971 /* Unmap the staging buffer. */
3972 UINT const Subresource = 0; /* Buffers have only one subresource. */
3973 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3974
3975 /* Copy from the staging buffer to the actual buffer */
3976 if ( fWritten
3977 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3978 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3979 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3980 {
3981 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3982 UINT DstSubresource = 0;
3983 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3984 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3985 UINT DstZ = pMap->box.z;
3986 ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3987 UINT SrcSubresource = 0;
3988 D3D11_BOX SrcBox;
3989
3990 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3991 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3992
3993 SrcBox.left = DstX;
3994 SrcBox.top = DstY;
3995 SrcBox.front = DstZ;
3996 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3997 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3998 SrcBox.back = DstZ + pMap->box.d;
3999
4000 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4001 pSrcResource, SrcSubresource, &SrcBox);
4002 }
4003#else
4004 ID3D11Resource *pMappedResource;
4005 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
4006 pMappedResource = pBackendSurface->staging.pResource;
4007 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
4008 pMappedResource = pBackendSurface->staging.pResource;
4009 else
4010 pMappedResource = pBackendSurface->dynamic.pResource;
4011
4012 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
4013 pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
4014
4015 if ( fWritten
4016 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
4017 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
4018 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
4019 {
4020 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
4021 UINT DstSubresource = 0;
4022 UINT DstX = pMap->box.x;
4023 UINT DstY = pMap->box.y;
4024 UINT DstZ = pMap->box.z;
4025 ID3D11Resource *pSrcResource = pMappedResource;
4026 UINT SrcSubresource = 0;
4027 D3D11_BOX SrcBox;
4028 SrcBox.left = DstX;
4029 SrcBox.top = DstY;
4030 SrcBox.front = DstZ;
4031 SrcBox.right = DstX + pMap->box.w;
4032 SrcBox.bottom = DstY + pMap->box.h;
4033 SrcBox.back = DstZ + pMap->box.d;
4034 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4035 pSrcResource, SrcSubresource, &SrcBox);
4036 }
4037#endif
4038 }
4039 else
4040 {
4041 AssertFailed();
4042 rc = VERR_NOT_IMPLEMENTED;
4043 }
4044
4045 return rc;
4046}
4047
4048
4049static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
4050{
4051 int rc = VINF_SUCCESS;
4052
4053 PVMSVGA3DSURFACE pSurface;
4054 if (sid != SVGA_ID_INVALID)
4055 {
4056 /* Create the surface if does not yet exist. */
4057 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4058 AssertReturn(pState, VERR_INVALID_STATE);
4059
4060 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
4061 AssertRCReturn(rc, rc);
4062
4063 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) && !pState->fVMSVGA2dGBO)
4064 {
4065 /* Create the actual texture. */
4066 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
4067 AssertRCReturn(rc, rc);
4068 }
4069 }
4070 else
4071 pSurface = NULL;
4072
4073 /* Notify the HW accelerated screen if it is used. */
4074 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
4075 if (!pHwScreen)
4076 return VINF_SUCCESS;
4077
4078 /* Same surface -> do nothing. */
4079 if (pHwScreen->sidScreenTarget == sid)
4080 return VINF_SUCCESS;
4081
4082 if (sid != SVGA_ID_INVALID)
4083 {
4084 AssertReturn( pSurface->pBackendSurface
4085 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
4086 && RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
4087
4088 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
4089 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
4090 }
4091
4092 if (RT_SUCCESS(rc))
4093 {
4094 pHwScreen->sidScreenTarget = sid;
4095 }
4096
4097 return rc;
4098}
4099
4100
4101static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
4102{
4103 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
4104 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
4105
4106 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
4107 return VINF_SUCCESS; /* No surface bound. */
4108
4109 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4110 AssertReturn(pState, VERR_INVALID_STATE);
4111
4112 PVMSVGA3DBACKEND pBackend = pState->pBackend;
4113 AssertReturn(pBackend, VERR_INVALID_STATE);
4114
4115 PVMSVGA3DSURFACE pSurface;
4116 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
4117 AssertRCReturn(rc, rc);
4118
4119 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4120 AssertReturn( pBackendSurface
4121 && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
4122 && RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET),
4123 VERR_INVALID_PARAMETER);
4124
4125 SVGA3dRect boundRect;
4126 boundRect.x = 0;
4127 boundRect.y = 0;
4128 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4129 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
4130 SVGA3dRect clipRect = *pRect;
4131 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
4132 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
4133
4134 /* Copy the screen texture to the shared surface. */
4135 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
4136 if (result == S_OK)
4137 {
4138 pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
4139
4140 dxDeviceFlush(&pBackend->dxDevice);
4141
4142 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
4143 }
4144 else
4145 AssertFailed();
4146
4147 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
4148 return rc;
4149}
4150
4151
4152/*
4153 *
4154 * 3D interface.
4155 *
4156 */
4157
4158static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
4159{
4160 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4161 AssertReturn(pState, VERR_INVALID_STATE);
4162
4163 int rc = VINF_SUCCESS;
4164
4165 *pu32Val = 0;
4166
4167 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
4168 {
4169 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
4170 return VERR_NOT_SUPPORTED;
4171 }
4172
4173 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
4174
4175 /* Most values are taken from:
4176 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
4177 *
4178 * Shader values are from
4179 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
4180 */
4181
4182 switch (idx3dCaps)
4183 {
4184 case SVGA3D_DEVCAP_3D:
4185 *pu32Val = VBSVGA3D_CAP_3D;
4186 if (pState->pBackend->dxDevice.pVideoDevice)
4187 *pu32Val |= VBSVGA3D_CAP_VIDEO;
4188 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_1)
4189 *pu32Val |= VBSVGA3D_CAP_RASTERIZER_STATE_V2;
4190 break;
4191
4192 case SVGA3D_DEVCAP_MAX_LIGHTS:
4193 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
4194 break;
4195
4196 case SVGA3D_DEVCAP_MAX_TEXTURES:
4197 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
4198 break;
4199
4200 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
4201 *pu32Val = SVGA3D_NUM_CLIPPLANES;
4202 break;
4203
4204 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
4205 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4206 *pu32Val = SVGA3DVSVERSION_40;
4207 else
4208 *pu32Val = SVGA3DVSVERSION_30;
4209 break;
4210
4211 case SVGA3D_DEVCAP_VERTEX_SHADER:
4212 *pu32Val = 1;
4213 break;
4214
4215 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
4216 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4217 *pu32Val = SVGA3DPSVERSION_40;
4218 else
4219 *pu32Val = SVGA3DPSVERSION_30;
4220 break;
4221
4222 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
4223 *pu32Val = 1;
4224 break;
4225
4226 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
4227 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4228 *pu32Val = 8;
4229 else
4230 *pu32Val = 4;
4231 break;
4232
4233 case SVGA3D_DEVCAP_S23E8_TEXTURES:
4234 case SVGA3D_DEVCAP_S10E5_TEXTURES:
4235 /* Must be obsolete by now; surface format caps specify the same thing. */
4236 break;
4237
4238 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4239 /* Obsolete */
4240 break;
4241
4242 /*
4243 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4244 * return TRUE. Even on physical hardware that does not support
4245 * these formats natively, the SVGA3D device will provide an emulation
4246 * which should be invisible to the guest OS.
4247 */
4248 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4249 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4250 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4251 *pu32Val = 1;
4252 break;
4253
4254 case SVGA3D_DEVCAP_QUERY_TYPES:
4255 /* Obsolete */
4256 break;
4257
4258 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4259 /* Obsolete */
4260 break;
4261
4262 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4263 AssertCompile(sizeof(uint32_t) == sizeof(float));
4264 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4265 break;
4266
4267 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4268 /* Obsolete */
4269 break;
4270
4271 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4272 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4273 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4274 *pu32Val = 16384;
4275 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4276 *pu32Val = 8192;
4277 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4278 *pu32Val = 4096;
4279 else
4280 *pu32Val = 2048;
4281 break;
4282
4283 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4284 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4285 *pu32Val = 2048;
4286 else
4287 *pu32Val = 256;
4288 break;
4289
4290 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4291 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4292 *pu32Val = 16384;
4293 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4294 *pu32Val = 8192;
4295 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4296 *pu32Val = 2048;
4297 else
4298 *pu32Val = 128;
4299 break;
4300
4301 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4302 /* Obsolete */
4303 break;
4304
4305 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4306 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4307 *pu32Val = D3D11_REQ_MAXANISOTROPY;
4308 else
4309 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4310 break;
4311
4312 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4313 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4314 *pu32Val = UINT32_MAX;
4315 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4316 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4317 else
4318 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4319 break;
4320
4321 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4322 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4323 *pu32Val = UINT32_MAX;
4324 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4325 *pu32Val = 1048575;
4326 else
4327 *pu32Val = 65534;
4328 break;
4329
4330 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4331 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4332 *pu32Val = UINT32_MAX;
4333 else
4334 *pu32Val = 512;
4335 break;
4336
4337 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4338 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4339 *pu32Val = UINT32_MAX;
4340 else
4341 *pu32Val = 512;
4342 break;
4343
4344 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4345 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4346 *pu32Val = 4096;
4347 else
4348 *pu32Val = 32;
4349 break;
4350
4351 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4352 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4353 *pu32Val = 4096;
4354 else
4355 *pu32Val = 32;
4356 break;
4357
4358 case SVGA3D_DEVCAP_TEXTURE_OPS:
4359 /* Obsolete */
4360 break;
4361
4362 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4363 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4364 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4365 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4366 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4367 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4368 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4369 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4370 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4371 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4372 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4373 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4374 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4375 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4376 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4377 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4378 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4379 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4380 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4381 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4382 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4383 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4384 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4385 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4386 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4387 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4388 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4389 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4390 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4391 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4392 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4393 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4394 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4395 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4396 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4397 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4398 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4399 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4400 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4401 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4402 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4403 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4404 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4405 {
4406 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4407 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4408 break;
4409 }
4410
4411 case SVGA3D_DEVCAP_MISSING62:
4412 /* Unused */
4413 break;
4414
4415 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4416 /* Obsolete */
4417 break;
4418
4419 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4420 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4421 *pu32Val = 8;
4422 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4423 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4424 else
4425 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4426 break;
4427
4428 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4429 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4430 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
4431 break;
4432
4433 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4434 /* Obsolete */
4435 break;
4436
4437 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4438 /* Obsolete */
4439 break;
4440
4441 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4442 *pu32Val = 1;
4443 break;
4444
4445 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4446 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4447 break;
4448
4449 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4450 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
4451 break;
4452
4453 case SVGA3D_DEVCAP_DEAD1:
4454 /* Obsolete */
4455 break;
4456
4457 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4458 /* Obsolete */
4459 break;
4460
4461 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4462 /* Obsolete */
4463 break;
4464
4465 case SVGA3D_DEVCAP_LINE_AA:
4466 *pu32Val = 1;
4467 break;
4468
4469 case SVGA3D_DEVCAP_LINE_STIPPLE:
4470 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4471 break;
4472
4473 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4474 AssertCompile(sizeof(uint32_t) == sizeof(float));
4475 *(float *)pu32Val = 1.0f;
4476 break;
4477
4478 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4479 AssertCompile(sizeof(uint32_t) == sizeof(float));
4480 *(float *)pu32Val = 1.0f;
4481 break;
4482
4483 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4484 /* Deprecated. */
4485 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4486 break;
4487
4488 case SVGA3D_DEVCAP_TS_COLOR_KEY:
4489 *pu32Val = 0; /* DX11 does not seem to support this directly. */
4490 break;
4491
4492 case SVGA3D_DEVCAP_DEAD2:
4493 break;
4494
4495 case SVGA3D_DEVCAP_DXCONTEXT:
4496 *pu32Val = 1;
4497 break;
4498
4499 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4500 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4501 break;
4502
4503 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4504 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4505 break;
4506
4507 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4508 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4509 break;
4510
4511 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4512 *pu32Val = 0; /* boolean */
4513 break;
4514
4515 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4516 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4517 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4518 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4519 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4520 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4521 case SVGA3D_DEVCAP_DXFMT_Z_D32:
4522 case SVGA3D_DEVCAP_DXFMT_Z_D16:
4523 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4524 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4525 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4526 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4527 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4528 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4529 case SVGA3D_DEVCAP_DXFMT_DXT1:
4530 case SVGA3D_DEVCAP_DXFMT_DXT2:
4531 case SVGA3D_DEVCAP_DXFMT_DXT3:
4532 case SVGA3D_DEVCAP_DXFMT_DXT4:
4533 case SVGA3D_DEVCAP_DXFMT_DXT5:
4534 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4535 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4536 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4537 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4538 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4539 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4540 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4541 case SVGA3D_DEVCAP_DXFMT_V8U8:
4542 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4543 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4544 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4545 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4546 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4547 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4548 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4549 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4550 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4551 case SVGA3D_DEVCAP_DXFMT_BUFFER:
4552 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4553 case SVGA3D_DEVCAP_DXFMT_V16U16:
4554 case SVGA3D_DEVCAP_DXFMT_G16R16:
4555 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4556 case SVGA3D_DEVCAP_DXFMT_UYVY:
4557 case SVGA3D_DEVCAP_DXFMT_YUY2:
4558 case SVGA3D_DEVCAP_DXFMT_NV12:
4559 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4560 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4561 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4562 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4563 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4564 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4565 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4566 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4567 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4568 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4569 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4570 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4571 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4572 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4573 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4574 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4575 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4576 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4577 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4578 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4579 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4580 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4581 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4582 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4583 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4584 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4585 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4586 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4587 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4588 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4589 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4590 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4591 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4592 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4593 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4594 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4595 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4596 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4597 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4598 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4599 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4600 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4601 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4602 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4603 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4604 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4605 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4606 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4607 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4608 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4609 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4610 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4611 case SVGA3D_DEVCAP_DXFMT_P8:
4612 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4613 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4614 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4615 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4616 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4617 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4618 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4619 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4620 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4621 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4622 case SVGA3D_DEVCAP_DXFMT_ATI1:
4623 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4624 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4625 case SVGA3D_DEVCAP_DXFMT_ATI2:
4626 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4627 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4628 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4629 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4630 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4631 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4632 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4633 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4634 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4635 case SVGA3D_DEVCAP_DXFMT_YV12:
4636 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4637 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4638 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4639 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4640 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4641 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4642 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4643 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4644 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4645 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4646 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4647 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4648 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4649 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4650 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4651 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4652 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4653 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4654 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4655 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4656 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4657 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4658 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4659 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4660 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4661 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4662 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4663 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4664 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4665 {
4666 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4667 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4668 break;
4669 }
4670
4671 case SVGA3D_DEVCAP_SM41:
4672 *pu32Val = 1; /* boolean */
4673 break;
4674
4675 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4676 *pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (2 - 1))); /* boolean */
4677 break;
4678
4679 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4680 *pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (4 - 1))); /* boolean */
4681 break;
4682
4683 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4684 *pu32Val = 0; /* boolean */
4685 break;
4686
4687 case SVGA3D_DEVCAP_LOGICOPS:
4688 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4689 *pu32Val = 0; /* boolean */
4690 break;
4691
4692 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4693 *pu32Val = 0; /* boolean */
4694 break;
4695
4696 case SVGA3D_DEVCAP_RESERVED_1:
4697 break;
4698
4699 case SVGA3D_DEVCAP_RESERVED_2:
4700 break;
4701
4702 case SVGA3D_DEVCAP_SM5:
4703 *pu32Val = 1; /* boolean */
4704 break;
4705
4706 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4707 *pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (8 - 1))); /* boolean */
4708 break;
4709
4710 case SVGA3D_DEVCAP_MAX:
4711 case SVGA3D_DEVCAP_INVALID:
4712 rc = VERR_NOT_SUPPORTED;
4713 break;
4714 }
4715
4716 return rc;
4717}
4718
4719
4720static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4721{
4722 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4723 AssertReturn(pState, VERR_INVALID_STATE);
4724
4725 return VINF_SUCCESS;
4726}
4727
4728
4729static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4730 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4731{
4732 RT_NOREF(cCopyBoxes);
4733 AssertReturn(pBox, VERR_INVALID_PARAMETER);
4734
4735 LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4736
4737 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4738 AssertReturn(pState, VERR_INVALID_STATE);
4739
4740 PVMSVGA3DBACKEND pBackend = pState->pBackend;
4741
4742 PVMSVGA3DSURFACE pSrcSurface;
4743 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4744 AssertRCReturn(rc, rc);
4745
4746 PVMSVGA3DSURFACE pDstSurface;
4747 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4748 AssertRCReturn(rc, rc);
4749
4750/** @todo Implement a separate code paths for memory->texture, texture->memory */
4751 LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
4752 pSrcSurface->pBackendSurface ? "" : " sysmem", pSrcSurface->id,
4753 pDstSurface->pBackendSurface ? "" : " sysmem", pDstSurface->id));
4754
4755 /* Clip the box. */
4756 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4757 rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4758 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4759
4760 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4761 rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4762 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4763
4764 SVGA3dCopyBox clipBox = *pBox;
4765 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4766
4767 if (pSrcSurface->pBackendSurface == NULL && pDstSurface->pBackendSurface == NULL)
4768 {
4769 AssertReturn(pSrcSurface->format == pDstSurface->format, VERR_INVALID_PARAMETER);
4770 AssertReturn(pSrcSurface->cbBlock == pDstSurface->cbBlock, VERR_INVALID_PARAMETER);
4771 AssertReturn(pSrcMipLevel->pSurfaceData && pDstMipLevel->pSurfaceData, VERR_INVALID_STATE);
4772
4773 uint32_t const cxBlocks = (clipBox.w + pSrcSurface->cxBlock - 1) / pSrcSurface->cxBlock;
4774 uint32_t const cyBlocks = (clipBox.h + pSrcSurface->cyBlock - 1) / pSrcSurface->cyBlock;
4775 uint32_t const cbRow = cxBlocks * pSrcSurface->cbBlock;
4776
4777 uint8_t const *pu8Src = (uint8_t *)pSrcMipLevel->pSurfaceData
4778 + (clipBox.srcx / pSrcSurface->cxBlock) * pSrcSurface->cbBlock
4779 + (clipBox.srcy / pSrcSurface->cyBlock) * pSrcMipLevel->cbSurfacePitch
4780 + clipBox.srcz * pSrcMipLevel->cbSurfacePlane;
4781
4782 uint8_t *pu8Dst = (uint8_t *)pDstMipLevel->pSurfaceData
4783 + (clipBox.x / pDstSurface->cxBlock) * pDstSurface->cbBlock
4784 + (clipBox.y / pDstSurface->cyBlock) * pDstMipLevel->cbSurfacePitch
4785 + clipBox.z * pDstMipLevel->cbSurfacePlane;
4786
4787 for (uint32_t z = 0; z < clipBox.d; ++z)
4788 {
4789 uint8_t const *pu8PlaneSrc = pu8Src;
4790 uint8_t *pu8PlaneDst = pu8Dst;
4791
4792 for (uint32_t y = 0; y < cyBlocks; ++y)
4793 {
4794 memcpy(pu8PlaneDst, pu8PlaneSrc, cbRow);
4795 pu8PlaneDst += pDstMipLevel->cbSurfacePitch;
4796 pu8PlaneSrc += pSrcMipLevel->cbSurfacePitch;
4797 }
4798
4799 pu8Src += pSrcMipLevel->cbSurfacePlane;
4800 pu8Dst += pDstMipLevel->cbSurfacePlane;
4801 }
4802
4803 return VINF_SUCCESS;
4804 }
4805
4806 //DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
4807 //AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4808 DXDEVICE *pDXDevice = &pBackend->dxDevice;
4809
4810 if (pSrcSurface->pBackendSurface == NULL)
4811 {
4812 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
4813 AssertRCReturn(rc, rc);
4814 }
4815
4816 if (pDstSurface->pBackendSurface == NULL)
4817 {
4818 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
4819 AssertRCReturn(rc, rc);
4820 }
4821
4822 UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4823 UINT DstX = clipBox.x;
4824 UINT DstY = clipBox.y;
4825 UINT DstZ = clipBox.z;
4826
4827 UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4828 D3D11_BOX SrcBox;
4829 SrcBox.left = clipBox.srcx;
4830 SrcBox.top = clipBox.srcy;
4831 SrcBox.front = clipBox.srcz;
4832 SrcBox.right = clipBox.srcx + clipBox.w;
4833 SrcBox.bottom = clipBox.srcy + clipBox.h;
4834 SrcBox.back = clipBox.srcz + clipBox.d;
4835
4836 Assert(cCopyBoxes == 1); /** @todo */
4837
4838 ID3D11Resource *pDstResource;
4839 ID3D11Resource *pSrcResource;
4840 pDstResource = dxResource(pDstSurface);
4841 pSrcResource = dxResource(pSrcSurface);
4842
4843 pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4844 pSrcResource, SrcSubresource, &SrcBox);
4845
4846 return rc;
4847}
4848
4849
4850static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4851{
4852 RT_NOREF(pThisCC, idScreen, pOldViewport);
4853 /** @todo Scroll the screen content without requiring the guest to redraw. */
4854}
4855
4856
4857static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4858{
4859 /** @todo */
4860 RT_NOREF(pThisCC, pSurface);
4861 return VERR_NOT_IMPLEMENTED;
4862}
4863
4864
4865/*
4866 *
4867 * VGPU9 callbacks. Not implemented.
4868 *
4869 */
4870/** @todo later */
4871
4872/**
4873 * Create a new 3d context
4874 *
4875 * @returns VBox status code.
4876 * @param pThisCC The VGA/VMSVGA state for ring-3.
4877 * @param cid Context id
4878 */
4879static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4880{
4881 RT_NOREF(cid);
4882
4883 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4884 AssertReturn(pState, VERR_INVALID_STATE);
4885
4886 DEBUG_BREAKPOINT_TEST();
4887 return VERR_NOT_IMPLEMENTED;
4888}
4889
4890
4891/**
4892 * Destroy an existing 3d context
4893 *
4894 * @returns VBox status code.
4895 * @param pThisCC The VGA/VMSVGA state for ring-3.
4896 * @param cid Context id
4897 */
4898static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4899{
4900 RT_NOREF(cid);
4901
4902 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4903 AssertReturn(pState, VERR_INVALID_STATE);
4904
4905 DEBUG_BREAKPOINT_TEST();
4906 return VINF_SUCCESS;
4907}
4908
4909
4910static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4911{
4912 RT_NOREF(cid, type, matrix);
4913
4914 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4915 AssertReturn(pState, VERR_INVALID_STATE);
4916
4917 DEBUG_BREAKPOINT_TEST();
4918 return VINF_SUCCESS;
4919}
4920
4921
4922static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4923{
4924 RT_NOREF(cid, zRange);
4925
4926 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4927 AssertReturn(pState, VERR_INVALID_STATE);
4928
4929 DEBUG_BREAKPOINT_TEST();
4930 return VINF_SUCCESS;
4931}
4932
4933
4934static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4935{
4936 RT_NOREF(cid, cRenderStates, pRenderState);
4937
4938 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4939 AssertReturn(pState, VERR_INVALID_STATE);
4940
4941 DEBUG_BREAKPOINT_TEST();
4942 return VINF_SUCCESS;
4943}
4944
4945
4946static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4947{
4948 RT_NOREF(cid, type, target);
4949
4950 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4951 AssertReturn(pState, VERR_INVALID_STATE);
4952
4953 DEBUG_BREAKPOINT_TEST();
4954 return VINF_SUCCESS;
4955}
4956
4957
4958static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4959{
4960 RT_NOREF(cid, cTextureStates, pTextureState);
4961
4962 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4963 AssertReturn(pState, VERR_INVALID_STATE);
4964
4965 DEBUG_BREAKPOINT_TEST();
4966 return VINF_SUCCESS;
4967}
4968
4969
4970static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4971{
4972 RT_NOREF(cid, face, pMaterial);
4973
4974 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4975 AssertReturn(pState, VERR_INVALID_STATE);
4976
4977 DEBUG_BREAKPOINT_TEST();
4978 return VINF_SUCCESS;
4979}
4980
4981
4982static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4983{
4984 RT_NOREF(cid, index, pData);
4985
4986 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4987 AssertReturn(pState, VERR_INVALID_STATE);
4988
4989 DEBUG_BREAKPOINT_TEST();
4990 return VINF_SUCCESS;
4991}
4992
4993
4994static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4995{
4996 RT_NOREF(cid, index, enabled);
4997
4998 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4999 AssertReturn(pState, VERR_INVALID_STATE);
5000
5001 DEBUG_BREAKPOINT_TEST();
5002 return VINF_SUCCESS;
5003}
5004
5005
5006static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
5007{
5008 RT_NOREF(cid, pRect);
5009
5010 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5011 AssertReturn(pState, VERR_INVALID_STATE);
5012
5013 DEBUG_BREAKPOINT_TEST();
5014 return VINF_SUCCESS;
5015}
5016
5017
5018static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
5019{
5020 RT_NOREF(cid, index, plane);
5021
5022 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5023 AssertReturn(pState, VERR_INVALID_STATE);
5024
5025 DEBUG_BREAKPOINT_TEST();
5026 return VINF_SUCCESS;
5027}
5028
5029
5030static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
5031 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
5032{
5033 /* From SVGA3D_BeginClear comments:
5034 *
5035 * Clear is not affected by clipping, depth test, or other
5036 * render state which affects the fragment pipeline.
5037 *
5038 * Therefore this code must ignore the current scissor rect.
5039 */
5040
5041 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
5042
5043 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5044 AssertReturn(pState, VERR_INVALID_STATE);
5045
5046 DEBUG_BREAKPOINT_TEST();
5047 return VINF_SUCCESS;
5048}
5049
5050
5051static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
5052 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
5053 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
5054{
5055 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
5056
5057 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5058 AssertReturn(pState, VERR_INVALID_STATE);
5059
5060 DEBUG_BREAKPOINT_TEST();
5061 return VINF_SUCCESS;
5062}
5063
5064
5065static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
5066{
5067 RT_NOREF(cid, pRect);
5068
5069 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5070 AssertReturn(pState, VERR_INVALID_STATE);
5071
5072 DEBUG_BREAKPOINT_TEST();
5073 return VINF_SUCCESS;
5074}
5075
5076
5077static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
5078{
5079 RT_NOREF(sid, filter);
5080
5081 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5082 AssertReturn(pState, VERR_INVALID_STATE);
5083
5084 DEBUG_BREAKPOINT_TEST();
5085 return VINF_SUCCESS;
5086}
5087
5088
5089static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
5090 uint32_t cbData, uint32_t *pShaderData)
5091{
5092 RT_NOREF(cid, shid, type, cbData, pShaderData);
5093
5094 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5095 AssertReturn(pState, VERR_INVALID_STATE);
5096
5097 DEBUG_BREAKPOINT_TEST();
5098 return VINF_SUCCESS;
5099}
5100
5101
5102static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC