VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h@ 75715

Last change on this file since 75715 was 75715, checked in by vboxsync, 6 years ago

Device/Graphics: multiple screens for VMSVGA.
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1/* $Id: DevVGA-SVGA.h 75715 2018-11-25 15:59:10Z vboxsync $ */
2/** @file
3 * VMware SVGA device
4 */
5/*
6 * Copyright (C) 2013-2017 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 */
16
17#ifndef ___DevVGA_SVGA_h___
18#define ___DevVGA_SVGA_h___
19
20#ifndef VBOX_WITH_VMSVGA
21# error "VBOX_WITH_VMSVGA is not defined"
22#endif
23
24#include <VBox/vmm/pdmthread.h>
25
26
27/** Default FIFO size. */
28#define VMSVGA_FIFO_SIZE _2M
29/** The old FIFO size. */
30#define VMSVGA_FIFO_SIZE_OLD _128K
31
32/** Default scratch region size. */
33#define VMSVGA_SCRATCH_SIZE 0x100
34/** Surface memory available to the guest. */
35#define VMSVGA_SURFACE_SIZE (512*1024*1024)
36/** Maximum GMR pages. */
37#define VMSVGA_MAX_GMR_PAGES 0x100000
38/** Maximum nr of GMR ids. */
39#define VMSVGA_MAX_GMR_IDS _8K
40/** Maximum number of GMR descriptors. */
41#define VMSVGA_MAX_GMR_DESC_LOOP_COUNT VMSVGA_MAX_GMR_PAGES
42
43#define VMSVGA_VAL_UNINITIALIZED (unsigned)-1
44
45/** For validating X and width values.
46 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
47#define VMSVGA_MAX_X _1M
48/** For validating Y and height values.
49 * The code assumes it's at least an order of magnitude less than UINT32_MAX. */
50#define VMSVGA_MAX_Y _1M
51
52/* u32ActionFlags */
53#define VMSVGA_ACTION_CHANGEMODE_BIT 0
54#define VMSVGA_ACTION_CHANGEMODE RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
55
56
57#ifdef DEBUG
58/* Enable to log FIFO register accesses. */
59//# define DEBUG_FIFO_ACCESS
60/* Enable to log GMR page accesses. */
61//# define DEBUG_GMR_ACCESS
62#endif
63
64#define VMSVGA_FIFO_EXTCMD_NONE 0
65#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
66#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
67#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
68#define VMSVGA_FIFO_EXTCMD_RESET 4
69#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
70
71/** Size of the region to backup when switching into svga mode. */
72#define VMSVGA_VGA_FB_BACKUP_SIZE _512K
73
74/** @def VMSVGA_WITH_VGA_FB_BACKUP
75 * Enables correct VGA MMIO read/write handling when VMSVGA is enabled. It
76 * is SLOW and probably not entirely right, but it helps with getting 3dmark
77 * output and other stuff. */
78#define VMSVGA_WITH_VGA_FB_BACKUP 1
79
80/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
81 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3) */
82#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
83# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3 1
84#else
85# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RING3
86#endif
87
88/** @def VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
89 * defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3) */
90#if (defined(VMSVGA_WITH_VGA_FB_BACKUP) && !defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
91# define VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ 1
92#else
93# undef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
94#endif
95
96
97typedef struct
98{
99 PSSMHANDLE pSSM;
100 uint32_t uVersion;
101 uint32_t uPass;
102} VMSVGA_STATE_LOAD;
103typedef VMSVGA_STATE_LOAD *PVMSVGA_STATE_LOAD;
104
105/** Host screen viewport.
106 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
107typedef struct VMSVGAVIEWPORT
108{
109 uint32_t x; /**< x coordinate (left). */
110 uint32_t y; /**< y coordinate (top). */
111 uint32_t cx; /**< width. */
112 uint32_t cy; /**< height. */
113 /** Right side coordinate (exclusive). Same as x + cx. */
114 uint32_t xRight;
115 /** First quadrant low y coordinate.
116 * Same as y + cy - 1 in window coordinates. */
117 uint32_t yLowWC;
118 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
119 * Same as y - 1 in window coordinates. */
120 uint32_t yHighWC;
121 /** Alignment padding. */
122 uint32_t uAlignment;
123} VMSVGAVIEWPORT;
124
125/**
126 * Screen object state.
127 */
128typedef struct VMSVGASCREENOBJECT
129{
130 /** SVGA_SCREEN_* flags. */
131 uint32_t fuScreen;
132 /** The screen object id. */
133 uint32_t idScreen;
134 /** The screen dimensions. */
135 int32_t xOrigin;
136 int32_t yOrigin;
137 uint32_t cWidth;
138 uint32_t cHeight;
139 /** Offset of the screen buffer in the guest VRAM. */
140 uint32_t offVRAM;
141 /** Scanline pitch. */
142 uint32_t cbPitch;
143 /** Bits per pixel. */
144 uint32_t cBpp;
145 bool fDefined;
146 bool fModified;
147} VMSVGASCREENOBJECT;
148
149/** Pointer to the private VMSVGA ring-3 state structure.
150 * @todo Still not entirely satisfired with the type name, but better than
151 * the previous lower/upper case only distinction. */
152typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
153/** Pointer to the private (implementation specific) VMSVGA3d state. */
154typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
155
156
157/**
158 * The VMSVGA device state.
159 *
160 * This instantatiated as VGASTATE::svga.
161 */
162typedef struct VMSVGAState
163{
164 /** The host window handle */
165 uint64_t u64HostWindowId;
166 /** The R3 FIFO pointer. */
167 R3PTRTYPE(uint32_t *) pFIFOR3;
168 /** The R0 FIFO pointer. */
169 R0PTRTYPE(uint32_t *) pFIFOR0;
170 /** R3 Opaque pointer to svga state. */
171 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
172 /** R3 Opaque pointer to 3d state. */
173 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
174 /** The separate VGA frame buffer in svga mode.
175 * Unlike the the boch-based VGA device implementation, VMSVGA seems to have a
176 * separate frame buffer for VGA and allows concurrent use of both. The SVGA
177 * SDK is making use of this to do VGA text output while testing other things in
178 * SVGA mode, displaying the result by switching back to VGA text mode. So,
179 * when entering SVGA mode we copy the first part of the frame buffer here and
180 * direct VGA accesses here instead. It is copied back when leaving SVGA mode. */
181 R3PTRTYPE(uint8_t *) pbVgaFrameBufferR3;
182 /** R3 Opaque pointer to an external fifo cmd parameter. */
183 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
184
185 /** Guest physical address of the FIFO memory range. */
186 RTGCPHYS GCPhysFIFO;
187 /** Size in bytes of the FIFO memory range.
188 * This may be smaller than cbFIFOConfig after restoring an old VM state. */
189 uint32_t cbFIFO;
190 /** The configured FIFO size. */
191 uint32_t cbFIFOConfig;
192 /** SVGA id. */
193 uint32_t u32SVGAId;
194 /** SVGA extensions enabled or not. */
195 uint32_t fEnabled;
196 /** SVGA memory area configured status. */
197 uint32_t fConfigured;
198 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
199 * VMSVGA_BUSY_F_EMT_FORCE). */
200 uint32_t volatile fBusy;
201#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
202#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
203 /** Traces (dirty page detection) enabled or not. */
204 uint32_t fTraces;
205 /** Guest OS identifier. */
206 uint32_t u32GuestId;
207 /** Scratch region size (VMSVGAState::au32ScratchRegion). */
208 uint32_t cScratchRegion;
209 /** Irq status. */
210 uint32_t u32IrqStatus;
211 /** Irq mask. */
212 uint32_t u32IrqMask;
213 /** Pitch lock. */
214 uint32_t u32PitchLock;
215 /** Current GMR id. (SVGA_REG_GMR_ID) */
216 uint32_t u32CurrentGMRId;
217 /** Register caps. */
218 uint32_t u32RegCaps;
219 /** Physical address of command mmio range. */
220 RTIOPORT BasePort;
221 RTIOPORT Padding0;
222 /** Port io index register. */
223 uint32_t u32IndexReg;
224 /** The support driver session handle for use with FIFORequestSem. */
225 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
226 /** FIFO request semaphore. */
227 SUPSEMEVENT FIFORequestSem;
228 /** FIFO external command semaphore. */
229 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
230 /** FIFO IO Thread. */
231 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
232 /** The legacy GFB mode registers. If used, they correspond to screen 0. */
233 /** True when the guest modifies the GFB mode registers. */
234 bool fGFBRegisters;
235 bool afPadding[7];
236 uint32_t uWidth;
237 uint32_t uHeight;
238 uint32_t uBpp;
239 uint32_t cbScanline;
240 /** Maximum width supported. */
241 uint32_t u32MaxWidth;
242 /** Maximum height supported. */
243 uint32_t u32MaxHeight;
244 /** Viewport rectangle, i.e. what's currently visible of the target host
245 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
246 * shrunk and scrolling applied, both the origin and size may differ. */
247 VMSVGAVIEWPORT viewport;
248 /** Action flags */
249 uint32_t u32ActionFlags;
250 /** SVGA 3d extensions enabled or not. */
251 bool f3DEnabled;
252 /** VRAM page monitoring enabled or not. */
253 bool fVRAMTracking;
254 /** External command to be executed in the FIFO thread. */
255 uint8_t volatile u8FIFOExtCommand;
256 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
257 * thread and does not want it do anything but the command. */
258 bool volatile fFifoExtCommandWakeup;
259#if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
260 /** GMR debug access handler type handle. */
261 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
262 /** FIFO debug access handler type handle. */
263 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
264#endif
265 /** Number of GMRs. */
266 uint32_t cGMR;
267 uint32_t uScreenOffset; /* Used only for loading older saved states. */
268
269 /** Scratch array.
270 * Putting this at the end since it's big it probably not . */
271 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
272
273 STAMCOUNTER StatRegBitsPerPixelWr;
274 STAMCOUNTER StatRegBusyWr;
275 STAMCOUNTER StatRegCursorXxxxWr;
276 STAMCOUNTER StatRegDepthWr;
277 STAMCOUNTER StatRegDisplayHeightWr;
278 STAMCOUNTER StatRegDisplayIdWr;
279 STAMCOUNTER StatRegDisplayIsPrimaryWr;
280 STAMCOUNTER StatRegDisplayPositionXWr;
281 STAMCOUNTER StatRegDisplayPositionYWr;
282 STAMCOUNTER StatRegDisplayWidthWr;
283 STAMCOUNTER StatRegEnableWr;
284 STAMCOUNTER StatRegGmrIdWr;
285 STAMCOUNTER StatRegGuestIdWr;
286 STAMCOUNTER StatRegHeightWr;
287 STAMCOUNTER StatRegIdWr;
288 STAMCOUNTER StatRegIrqMaskWr;
289 STAMCOUNTER StatRegNumDisplaysWr;
290 STAMCOUNTER StatRegNumGuestDisplaysWr;
291 STAMCOUNTER StatRegPaletteWr;
292 STAMCOUNTER StatRegPitchLockWr;
293 STAMCOUNTER StatRegPseudoColorWr;
294 STAMCOUNTER StatRegReadOnlyWr;
295 STAMCOUNTER StatRegScratchWr;
296 STAMCOUNTER StatRegSyncWr;
297 STAMCOUNTER StatRegTopWr;
298 STAMCOUNTER StatRegTracesWr;
299 STAMCOUNTER StatRegUnknownWr;
300 STAMCOUNTER StatRegWidthWr;
301
302 STAMCOUNTER StatRegBitsPerPixelRd;
303 STAMCOUNTER StatRegBlueMaskRd;
304 STAMCOUNTER StatRegBusyRd;
305 STAMCOUNTER StatRegBytesPerLineRd;
306 STAMCOUNTER StatRegCapabilitesRd;
307 STAMCOUNTER StatRegConfigDoneRd;
308 STAMCOUNTER StatRegCursorXxxxRd;
309 STAMCOUNTER StatRegDepthRd;
310 STAMCOUNTER StatRegDisplayHeightRd;
311 STAMCOUNTER StatRegDisplayIdRd;
312 STAMCOUNTER StatRegDisplayIsPrimaryRd;
313 STAMCOUNTER StatRegDisplayPositionXRd;
314 STAMCOUNTER StatRegDisplayPositionYRd;
315 STAMCOUNTER StatRegDisplayWidthRd;
316 STAMCOUNTER StatRegEnableRd;
317 STAMCOUNTER StatRegFbOffsetRd;
318 STAMCOUNTER StatRegFbSizeRd;
319 STAMCOUNTER StatRegFbStartRd;
320 STAMCOUNTER StatRegGmrIdRd;
321 STAMCOUNTER StatRegGmrMaxDescriptorLengthRd;
322 STAMCOUNTER StatRegGmrMaxIdsRd;
323 STAMCOUNTER StatRegGmrsMaxPagesRd;
324 STAMCOUNTER StatRegGreenMaskRd;
325 STAMCOUNTER StatRegGuestIdRd;
326 STAMCOUNTER StatRegHeightRd;
327 STAMCOUNTER StatRegHostBitsPerPixelRd;
328 STAMCOUNTER StatRegIdRd;
329 STAMCOUNTER StatRegIrqMaskRd;
330 STAMCOUNTER StatRegMaxHeightRd;
331 STAMCOUNTER StatRegMaxWidthRd;
332 STAMCOUNTER StatRegMemorySizeRd;
333 STAMCOUNTER StatRegMemRegsRd;
334 STAMCOUNTER StatRegMemSizeRd;
335 STAMCOUNTER StatRegMemStartRd;
336 STAMCOUNTER StatRegNumDisplaysRd;
337 STAMCOUNTER StatRegNumGuestDisplaysRd;
338 STAMCOUNTER StatRegPaletteRd;
339 STAMCOUNTER StatRegPitchLockRd;
340 STAMCOUNTER StatRegPsuedoColorRd;
341 STAMCOUNTER StatRegRedMaskRd;
342 STAMCOUNTER StatRegScratchRd;
343 STAMCOUNTER StatRegScratchSizeRd;
344 STAMCOUNTER StatRegSyncRd;
345 STAMCOUNTER StatRegTopRd;
346 STAMCOUNTER StatRegTracesRd;
347 STAMCOUNTER StatRegUnknownRd;
348 STAMCOUNTER StatRegVramSizeRd;
349 STAMCOUNTER StatRegWidthRd;
350 STAMCOUNTER StatRegWriteOnlyRd;
351} VMSVGAState;
352
353
354DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
355 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
356
357DECLCALLBACK(void) vmsvgaPortSetViewport(PPDMIDISPLAYPORT pInterface, uint32_t uScreenId,
358 uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
359
360int vmsvgaInit(PPDMDEVINS pDevIns);
361int vmsvgaReset(PPDMDEVINS pDevIns);
362int vmsvgaDestruct(PPDMDEVINS pDevIns);
363int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
364int vmsvgaLoadDone(PPDMDEVINS pDevIns);
365int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
366DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
367DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
368
369#ifdef IN_RING3
370typedef struct VGAState *PVGASTATE;
371VMSVGASCREENOBJECT *vmsvgaGetScreenObject(PVGASTATE pThis, uint32_t idScreen);
372int vmsvgaUpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
373#endif
374
375#endif
376
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